Three-dimensional scanning system

Abstract

The utility model relates to a three-dimensional scanning system, which comprises an image sensor, a processing system and a storage unit, and is characterized in that the processing system comprises a processing module and a programmable logic module; the image sensor is used for acquiring an image, and the image sensor is connected with the programmable logic module for image processing; and the storage unit is respectively connected with the processing module and the programmable logic module and is used for transmitting the image data processed by the programmable logic module to the processing module. Through the application, the problems that the system complexity is high and the system stability and the cost control are influenced are solved, and the system complexity is effectively reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of three-dimensional scanning, in particular to a three-dimensional scanning system. Background Art

[0002] In the existing 3D scanning system, a combination of a finished camera and a Universal Serial Bus (USB) chip is used to realize image acquisition and transmission, or a customized Field Programmable Gate Array (FPGA) and embedded chip are used, such as an ARM processor for image acquisition and image algorithm pre-processing. Among them, the FPGA is responsible for driving and controlling the image sensor and processing the received image data, and the processing results are sent to the embedded chip through the USB chip, and the embedded chip completes the overall control of the system and bandwidth optimization.

[0003] However, the above system not only needs to configure a variety of power supplies, hardware peripheral connections and heat dissipation design, but also needs to design corresponding communication connections between various devices and develop at the software and hardware levels, which makes the system complex and affects system stability and cost control.

[0004] There is currently no effective solution to the problems of high system complexity, which affects system stability and cost control in related technologies. Utility Model Content

[0005] Based on this, it is necessary to provide a three-dimensional scanning system to address the problems of high system complexity, affecting system stability and cost control in the prior art.

[0006] In a first aspect, the utility model provides a three-dimensional scanning system, the system comprising an image sensor, a processing system and a storage unit; wherein the processing system comprises a processing module and a programmable logic module;

[0007] The image sensor is used to collect images;

[0008] The image sensor is connected to the programmable logic module for image processing;

[0009] The storage unit is connected to the processing module and the programmable logic module respectively, and is used to transmit the image data processed by the programmable logic module to the processing module.

[0010] In some of the embodiments, the programmable logic module is connected to the storage unit via an advanced extensible interface bus;

[0011] The programmable logic module is further used to write the processed image data into the storage unit through the advanced extensible interface bus.

[0012] In some embodiments, the processing module is connected to the storage unit via an Advanced eXtensible Interface bus.

[0013] In some of these embodiments, the processing module includes a direct memory access channel;

[0014] The direct memory access channel is used to receive the image data processed by the programmable logic module in the storage unit through the advanced extensible interface bus.

[0015] In some of these embodiments, the processing system further includes a block random access memory;

[0016] The block random access memory is connected to the processing module and the programmable logic module, and is used for transmitting control signals between the processing module and the programmable logic module.

[0017] In some embodiments, the processing module and the programmable logic module are both connected to the block random access memory via an advanced extensible interface bus.

[0018] In some of the embodiments, the programmable logic module includes at least one register;

[0019] The register is connected to the block random access memory.

[0020] In some of the embodiments, the processing module is an ARM processor.

[0021] In some of the embodiments, the programmable logic module is a field programmable gate array.

[0022] In some of the embodiments, the storage unit is a DDR storage particle.

[0023] Compared with the related art, a three-dimensional scanning system is provided in the utility model, wherein the system includes an image sensor, a processing system and a storage unit; wherein the processing system includes a processing module and a programmable logic module; the image sensor is used to collect images, and the image sensor is connected to the programmable logic module for image processing; the storage unit is respectively connected to the processing module and the programmable logic module, and is used to transmit the image data processed by the programmable logic module to the processing module, which solves the problems of high system complexity, affecting system stability and cost control, and effectively reduces system complexity.

[0024] Details of one or more embodiments of the present invention are set forth in the following drawings and description to make other features, objectives, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a structural block diagram of a three-dimensional scanning system provided by an embodiment of the present application;

[0026] Figure 2 is a schematic diagram of the principle of a three-dimensional scanning system provided by an embodiment of the present application;

[0027] Figure 3 This is a data flow diagram of control signal communication provided by an embodiment of the present application;

[0028] Figure 4 It is a structural schematic diagram of a three-dimensional scanning system provided in a preferred embodiment of the present application.

[0029] Figure numerals: 100, image sensor; 200, processing system; 210, programmable logic module; 220, processing module; 230, block random access memory; 300, storage unit; 400, PC terminal. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0031] It should be noted that when a component is referred to as being "mounted on" another component, it may be directly on the other component or there may be a central component. When a component is considered to be "set on" another component, it may be directly set on the other component or there may be a central component at the same time. When a component is considered to be "fixed to" another component, it may be directly fixed on the other component or there may be a central component at the same time.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art in the technical field of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "or / and" used herein includes any and all combinations of one or more related listed items.

[0033] The utility model provides a three-dimensional scanning system. Figure 1FIG. 1 is a structural block diagram of a three-dimensional scanning system according to an embodiment of the present invention. Figure 1 As shown, the three-dimensional scanning system includes an image sensor 100, a processing system 200 and a storage unit 300; wherein the processing system 200 includes a processing module 220 and a programmable logic module 210;

[0034] An image sensor 100, used for collecting images;

[0035] The image sensor 100 is connected to a programmable logic module 210 for image processing;

[0036] The storage unit 300 is connected to the processing module 220 and the programmable logic module 210 respectively, and is used to transmit the image data processed by the programmable logic module 210 to the processing module 220 .

[0037] In this embodiment, the three-dimensional scanning system includes an image sensor 100, a processing system 200 and a storage unit 300, and the processing system 200 includes a processing module 220 and a programmable logic module 210. The image sensor 100 is connected to the programmable logic module 210, and the storage unit 300 is connected to the processing module 220 and the programmable logic module 210 respectively.

[0038] Specifically, the image sensor 100 is used to capture images and transmit the captured image data to the programmable logic module 210 , and the programmable logic module 210 is responsible for processing the received image data and transmitting the processed image data to the processing module 220 using the storage unit 300 .

[0039] It should be noted that when the processing module 220 and the programmable logic module 210 use the external storage unit 300 to communicate image data, direct memory access (DMA) transmission can be used between the two to complete data transfer through shared memory particles without the need for other hardware connections, thereby reducing system complexity, thereby improving system stability and achieving cost control.

[0040] In addition, by connecting the PC end 400 to the processing module 220 in the processing system 200, the image data acquired by the processing module 220 can be transmitted to the PC end 400, and a control signal can be sent to the processing module 220 through the PC end 400, and further transmitted to the programmable logic module 210.

[0041] In existing 3D scanning systems, a combination of off-the-shelf cameras and USB chips is used to capture and transmit images, or customized FPGAs and embedded chips are used. This requires not only the configuration of multiple types of power supplies, hardware peripheral connections, and heat dissipation designs, but also the design of corresponding communication connections between various devices and development at the software and hardware levels, which makes the system complex and affects system stability and cost control.

[0042] Compared with the prior art, the three-dimensional scanning system of the present application includes an image sensor 100, a processing system 200 and a storage unit 300; wherein the processing system 200 includes a processing module 220 and a programmable logic module 210; the image sensor 100 is used to collect images, and the image sensor 100 is connected to the programmable logic module 210 for image processing; the storage unit 300 is connected to the processing module 220 and the programmable logic module 210 respectively, and is used to transmit the image data processed by the programmable logic module 210 to the processing module 220. Based on this, the processing module 220 and the programmable logic module 210 communicate through the storage unit 300, and there is no need to use other hardware connections for data transmission, while reducing the complexity of the system software, solving the problem of high system complexity, affecting system stability and cost control, and achieving effective reduction of system complexity, improving system stability, and reducing the workload and difficulty of subsequent development, testing and maintenance stages.

[0043] See also Figure 2 , the image data communication process of the system is explained below.

[0044] In some of the embodiments, the programmable logic module 210 is connected to the storage unit 300 via an advanced extensible interface bus;

[0045] The programmable logic module 210 is further configured to write the processed image data into the storage unit 300 via the advanced extensible interface bus.

[0046] Specifically, the programmable logic module 210 in the processing system 200 is connected to the storage unit 300 via an Advanced Extensible Interface (AXI) bus. During image data communication, the programmable logic module 210 writes the processed image data into the storage unit 300 outside the processing system 200 via the AXI bus, and then the processing module 220 reads the image data in the storage unit 300.

[0047] It should be noted that the programmable logic module 210 and the processing module 220 use a shared memory area to transfer data without the need to arrange separate wiring or cables, thereby reducing the complexity of the system structure and effectively enhancing the reliability of the system.

[0048] Through this embodiment, the programmable logic module 210 is connected to the storage unit 300 through the advanced extensible interface bus, and the processed image data is written into the storage unit 300 through the advanced extensible interface bus, so that the processing module 220 can obtain the image data in the storage unit 300, simplifying the system structure to ensure the stability of the system, while reducing the workload and difficulty of subsequent development, testing and maintenance stages.

[0049] In some embodiments, the processing module 220 is connected to the storage unit 300 via an ATE bus.

[0050] Specifically, the processing module 220 in the processing system 200 is connected to the storage unit 300 via the advanced extensible interface bus, so as to share the memory area with the programmable logic module 210. When the image data processed by the programmable logic module 210 is written into the storage unit 300, the processing module 220 reads the image data in the storage unit 300 to complete the transmission of the image data.

[0051] Through this embodiment, the processing module 220 is connected to the storage unit 300 through the advanced extensible interface bus, so that image data communication within the processing system 200 can be achieved without using additional hardware connections, thereby enhancing the reliability of the system.

[0052] In some of these embodiments, the processing module 220 includes a direct memory access channel;

[0053] The direct memory access channel is used to receive the image data processed by the programmable logic module 210 in the storage unit 300 through the advanced extensible interface bus.

[0054] Specifically, the processing module 220 is provided with a direct memory access channel. When the programmable logic module 210 and the processing module 220 communicate image data, when the programmable logic module 210 writes the processed image data into the storage unit 300, the image data is received by the direct memory access channel of the processing module 220.

[0055] According to this embodiment, the processed image data is obtained from the storage unit 300 through the direct memory access channel of the processing module 220, so that the data transmission within the system is stably realized.

[0056] In some embodiments, the processing module 220 is an ARM processor.

[0057] Specifically, an ARM processor is used as the processing module 220, and the ARM processor is used to complete the power-on self-test of each internal functional module, and configure the external device by sending parameters, such as configuring the exposure time of the fill light, the exposure time of the camera, the camera working mode, and the laser working mode.

[0058] In addition, the ARM processor is used to obtain the packaged image data processed by the programmable logic module 210 through DMA, select different network or wireless working modes, and increase the transmission frame rate by compressing the data volume by adopting existing image algorithms or transmission algorithms. At the same time, the ARM processor has a system abnormality detection and reset mechanism to improve the security of the system and ensure the normal operation of the system.

[0059] Through this embodiment, the ARM processor is combined with the programmable logic module 210, so that a single device integrates the embedded processing system 200 and the programmable logic, realizes efficient data transmission, and accurately configures the modes and parameters of external devices such as fill lights, cameras, and lasers, significantly improving the stability and performance of the system.

[0060] In some embodiments, the programmable logic module 210 is a field programmable gate array.

[0061] Specifically, FPGA is used as the programmable logic module 210. FPGA is used to complete the initial configuration, driving and intermediate control of the image sensor 100, and is responsible for the reception, serial-to-parallel conversion and splicing integration of image data; controls external devices such as fill lights, light strips, lasers and buzzers, and performs multi-channel parallel caching and feature processing on special images, such as regional recognition, cutting and transmission of marking points in three-dimensional scanning, and recognition, filtering, packaging and transmission of laser line segments.

[0062] In addition, FPGA is also used to utilize AXI and storage unit 300 to schedule and control the sequential output of images, to judge the complete frame and extract the latest frame according to the changes in data interface throughput and image frame rate, and to provide feedback on the image data status of external devices, such as reporting the real-time frame rate, device number, abnormal data of each key node and the working status of each external device.

[0063] Through this embodiment, the FPGA and the processing module 220 are integrated, so that image data communication can be realized through the storage unit 300 and a variety of peripheral connections can be achieved.

[0064] In some of the embodiments, the storage unit 300 is a DDR storage particle.

[0065] In this embodiment, DDR storage particles are used as storage units 300, and the DDR storage particles are respectively connected to the processing module 220 and the programmable logic module 210. DMA transmission is used between the processing module 220 and the programmable logic module 210, and data transmission is completed through the shared memory particles. Specifically, the programmable logic module 210 writes the image data to be sent into the DDR storage particles through the AXI bus, and the DMA channel of the processing module 220 receives the image data.

[0066] Through this embodiment, DDR storage particles are used to realize image data communication.

[0067] See also Figure 3 , the control signal communication process within the processing system 200 is described below.

[0068] In some of these embodiments, the processing system 200 also includes a block random access memory 230;

[0069] The block random access memory 230 is connected to the processing module 220 and the programmable logic module 210 for transmitting control signals between the processing module 220 and the programmable logic module 210 .

[0070] In this embodiment, the processing system 200 is provided with a block random access memory 230 (Block Random Access Memory, referred to as BRAM), which is respectively connected to the processing module 220 and the programmable logic module 210 inside the processing system 200 to transmit control signals between the processing module 220 and the programmable logic module 210.

[0071] Specifically, when the processing module 220 sends an instruction to the programmable logic module 210, based on the address information corresponding to different functions agreed upon in the relevant protocol, the processing module 220 writes data to the BRAM and updates the corresponding bit of the flag address in the BRAM to a high level. The address information includes the flag address and the data transmission address for the interactive control command, and the role of each address is fixed in the form of a protocol.

[0072] Furthermore, since the programmable logic module 210 requires fewer resources for parallel processing, it can monitor the data in the flag address in real time. When the programmable logic module 210 detects that the flag bit has changed, it performs a data read operation on the address corresponding to the current flag bit, that is, obtains the data sent by the processing module 220 to the programmable logic module 210.

[0073] It should be noted that, corresponding to the process of the processing module 220 issuing instructions, when the programmable logic module 210 transmits instructions to the processing module 220, the programmable logic module 210 first operates the flag bit address in the BRAM, and then performs read and write operations on the corresponding data transmission address to realize instruction transmission.

[0074] According to this embodiment, a block random access memory 230 is provided in the processing system 200 , and the block random access memory 230 is connected to the processing module 220 and the programmable logic module 210 , so as to realize control signal communication between the processing module 220 and the programmable logic module 210 .

[0075] In some embodiments, the processing module 220 and the programmable logic module 210 are both connected to the block random access memory 230 via an ATEX bus.

[0076] Specifically, the processing module 220 and the programmable logic module 210 share control signals through AXI-BRAM communication, wherein the processing module 220 and the programmable logic module 210 are connected to the BRAM through the AXI bus, and both the processing module 220 and the programmable logic module 210 can read and write the BRAM.

[0077] Through this embodiment, the processing module 220 and the programmable logic module 210 are both connected to the block random access memory 230 through the advanced extensible interface bus, without the need for USB transmission, thereby reducing the complexity of the system structure and achieving stable transmission of control signals.

[0078] In some of these embodiments, the programmable logic module 210 includes at least one register;

[0079] The register is connected to the block random access memory 230 .

[0080] Specifically, at least one register is provided inside the programmable logic module 210, each register is connected to the block random access memory 230, and different functions agreed upon by the protocol correspond to the registers. During the control signal transmission process, data is read and written through the corresponding register according to the change of the flag bit.

[0081] Exemplarily, when the processing module 220 sends an instruction to the programmable logic module 210, the processing module 220 writes data to the BRAM based on the address information corresponding to different functions agreed upon in the relevant protocol. At this time, the programmable logic module 210 detects a change in the flag bit and performs a data read operation through the corresponding register.

[0082] Through this embodiment, the registers in the programmable logic module 210 are connected to the block random access memory 230 to realize the control signal communication inside the processing system 200, while ensuring the reliability of signal transmission.

[0083] The present embodiment is described and illustrated below through preferred embodiments.

[0084] Figure 4 is a schematic diagram of the structure of a three-dimensional scanning system provided by a preferred embodiment of the present application, such as Figure 4 As shown, the three-dimensional scanning system includes an image sensor 100, a processing system 200 and a storage unit 300, wherein the processing system 200 includes a processing module 220, a programmable logic module 210 and a block random access memory 230; wherein the image sensor 100 is connected to an array of programmable logic modules 210 for image processing; the storage unit 300 is connected to the processor and the programmable logic module 210 via an AXI bus; and the block random access memory 230 is connected to the processing module 220 and the programmable logic module 210 via an AXI bus.

[0085] In this embodiment, a Zynq chip is used as the processing system 200, and a DDR storage particle is used as the storage unit 300. Accordingly, the ARM processor is the processing module 220, and the field programmable logic gate array is the programmable logic module 210. DMA transmission is used between the ARM processor and the field programmable logic gate array. When the field programmable logic gate array receives the image data collected by the image sensor 100, it processes and packages the image data, and writes the processed image data into the DDR storage particle through the AXI bus, and then the DMA on the ARM side receives the image data, thereby realizing data transmission through the shared memory particle.

[0086] In addition, the ARM processor and the field programmable gate array share control signal communication through AXI-BRAM. When the ARM processor needs to send instructions to the field programmable gate array, the ARM processor writes data to the BRAM based on the address information corresponding to different functions agreed upon in the relevant protocol, and at the same time pulls up the corresponding bit of the flag address in the BRAM. The field programmable gate array monitors the data in the flag address in real time. When a change in the flag bit is detected, it reads the data corresponding to the address of the current flag bit, that is, obtains the data sent by the ARM processor to the field programmable gate array. Accordingly, when the field programmable gate array transmits instructions to the ARM processor, the field programmable gate array first operates the flag bit address in the BRAM, and reads and writes the corresponding data transmission address to realize instruction transmission.

[0087] Through this embodiment, a Zynq chip integrated with an embedded processing system and programmable logic is used to process and transmit images without laying out additional hardware connections, thereby reducing the complexity of system hardware and improving system stability while achieving system cost control. In addition, the use of a single device integrated with an embedded processing system and programmable logic can reduce the complexity of system software development, thereby reducing the workload and difficulty of system development, testing, and maintenance.

[0088] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0089] The above-mentioned embodiments only express several implementation methods of the utility model, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the utility model patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the utility model, which all belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent shall be based on the attached claims.

Claims

1. A three-dimensional scanning system, characterized in that: The system comprises an image sensor, a processing system and a storage unit; wherein the processing system comprises a processing module and a programmable logic module; The image sensor is used to collect images; The image sensor is connected to the programmable logic module for image processing; The storage unit is connected to the processing module and the programmable logic module respectively, and is used to transmit the image data processed by the programmable logic module to the processing module.

2. The three-dimensional scanning system according to claim 1, characterized in that: The programmable logic module is connected to the storage unit via an advanced extensible interface bus; The programmable logic module is further used to write the processed image data into the storage unit through the advanced extensible interface bus.

3. The three-dimensional scanning system according to claim 1, characterized in that: The processing module is connected to the storage unit via an advanced extensible interface bus.

4. The three-dimensional scanning system according to claim 3, characterized in that: The processing module includes a direct memory access channel; The direct memory access channel is used to receive the image data processed by the programmable logic module in the storage unit through the advanced extensible interface bus.

5. The three-dimensional scanning system according to claim 1, characterized in that: The processing system also includes a block random access memory; The block random access memory is connected to the processing module and the programmable logic module, and is used for transmitting control signals between the processing module and the programmable logic module.

6. The three-dimensional scanning system according to claim 5, characterized in that: The processing module and the programmable logic module are both connected to the block random access memory via an advanced extensible interface bus.

7. The three-dimensional scanning system according to claim 5, characterized in that: The programmable logic module includes at least one register; The register is connected to the block random access memory.

8. The three-dimensional scanning system according to claim 1, characterized in that: The processing module is an ARM processor.

9. The three-dimensional scanning system according to claim 1, characterized in that: The programmable logic module is a field programmable logic gate array.

10. The three-dimensional scanning system according to claim 1, characterized in that: The storage unit is a DDR storage particle.

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