Hall rotation turn number counter

Abstract

The utility model relates to a Hall rotation number counter, which is applied to the technical field of motors, and comprises a first counting unit, the first counting unit is used for acquiring a first digital signal and outputting a counting signal, and the first digital signal is a digital signal output by a Hall sensor; the second counting unit is used for acquiring a second digital signal and outputting an enable signal, the second digital signal is a digital signal output by a Hall sensor, and the first digital signal and the second digital signal are two orthogonal digital signals; and the signal processing unit is used for acquiring the counting signal and the enabling signal and outputting a turn count value. The counter has the technical effects that the counter is low in power consumption, low in cost, simple to implement and free of later maintenance.

Description

Technical Field

[0001] The present application relates to the field of motor technology, and in particular to a Hall rotation revolution counter. Background Art

[0002] The rotation of the motor can drive the mechanical structure to move. However, the specific position or distance of the motor's movement cannot be measured directly, and needs to be indirectly measured through the number of motor revolutions. Therefore, the number of motor revolutions is an important parameter of the motor. By counting the number of motor revolutions, the precise positioning and position feedback of the motor can be achieved.

[0003] At present, the method of counting the number of motor revolutions is mainly completed through a single-chip microcomputer. Using a single-chip microcomputer to count the number of revolutions will make the solution complicated, the implementation cost high, and the power consumption large. Summary of the invention

[0004] In order to help solve the problem that the implementation of circle counting by single chip makes the solution complex, the implementation cost is high, and the power consumption is high, the present application provides a Hall rotation circle counter, which adopts the following technical solution: including:

[0005] A first counting unit, the first counting unit is used to obtain a first digital signal and output a counting signal, the first digital signal is a digital signal output by a Hall sensor;

[0006] A second counting unit, the second counting unit is used to obtain a second digital signal and output an enable signal, the second digital signal is a digital signal output by the Hall sensor, and the first digital signal and the second digital signal are two orthogonal digital signals;

[0007] A signal processing unit is used to obtain the counting signal and the enabling signal, and output a turn count value.

[0008] Through the above technical solution, the first counting unit and the second technical unit obtain the first digital signal and the second digital signal, and the two digital signals are combined and processed by the signal processing unit to finally count the number of rotations of the motor. The combination of the two digital signals and signal processing to achieve counting, the implementation scheme is simple, the scheme cost is low, and the circuit power consumption is low.

[0009] In a specific implementation scheme, the first counting unit is further used to output a first square wave signal and a second square wave signal;

[0010] The Hall rotation revolution counter also includes:

[0011] a noise elimination unit, the noise elimination unit being used to acquire the first digital signal and eliminate noise;

[0012] The noise elimination unit is further used to obtain the first square wave signal and the second square wave signal, and output a control signal;

[0013] The second counting unit is further used to obtain the control signal.

[0014] Through the above technical solution, noise may interfere with the counter counting, and the noise elimination unit eliminates the noise to avoid interference with the counting and causing counting errors as much as possible. The first counting unit and the second counting unit are combined to count the number of motor rotations, and the second counting unit and the noise elimination unit are combined to eliminate the noise input to the circuit to ensure the accuracy of the rotation number counting as much as possible.

[0015] In a specific implementation scheme, the counting signal includes a first counting signal and a second counting signal, and the first counting unit includes:

[0016] A resistor R2 and a capacitor C2 connected in series, the other end of the resistor R2 is connected to the first digital signal, and the other end of the capacitor C2 is grounded;

[0017] A buffer U2 having an input terminal and an output terminal, wherein the input terminal of the buffer U2 is connected to a connection point between the resistor R2 and the capacitor C2;

[0018] A resistor R0 and a capacitor C0 connected in series, the other end of the resistor R0 is connected to the output end of the buffer U2, the other end of the capacitor C0 is grounded, and the connection point between the resistor R0 and the capacitor C0 outputs the first counting signal;

[0019] A resistor R1 and a capacitor C1 connected in series, the other end of the resistor R1 is connected to the output end of the buffer U2, and the other end of the capacitor C1 is grounded;

[0020] The buffer U1 has an input terminal and an output terminal. The input terminal of the buffer U1 is connected to the connection point between the resistor R1 and the capacitor C1, and the output terminal of the buffer U1 outputs the second counting signal.

[0021] In a specific implementation scheme, the output end of the buffer U2 outputs a first square wave signal, and the output end of the buffer U1 outputs a second square wave signal.

[0022] In a specific embodiment, the second counting unit comprises:

[0023] A resistor R4 and a capacitor C4 connected in series, the other end of the resistor R4 is connected to the second digital signal, and the other end of the capacitor C4 is grounded;

[0024] A buffer U6 has an input terminal, an output terminal and a control terminal, wherein the input terminal of the buffer U6 is connected to a connection point between the resistor R4 and the capacitor C4, and the control terminal of the buffer U6 is grounded through the resistor R5;

[0025] A buffer U7 having an input terminal and an output terminal, wherein the input terminal of the buffer U7 is connected to the output terminal of the buffer U6, and the output terminal of the buffer U7 is connected to the output terminal of the buffer U6 through a resistor R6;

[0026] The connection point between the output end of the buffer U6 and the resistor R6 outputs the enable signal.

[0027] In a specific implementation scheme, the control terminal of the buffer U6 is used to obtain a control signal.

[0028] In a specific implementation scheme, the signal processing unit includes:

[0029] A first signal processing module, the first signal processing module is used to obtain the counting signal and the enabling signal, and output a pulse signal;

[0030] The second signal processing module is used to obtain the pulse signal and output a turn count value.

[0031] In a specific implementation scheme, the first signal processing module is a decoder; and the second signal processing module is a bidirectional up-down counter.

[0032] In a specific embodiment, the noise elimination unit includes:

[0033] A resistor R3 and a capacitor C3 connected in series, the other end of the resistor R3 is connected to the first digital signal, and the other end of the capacitor C3 is grounded;

[0034] A buffer U3 having an input terminal and an output terminal, wherein the input terminal of the buffer U3 is connected to a connection point between the resistor R3 and the capacitor C3;

[0035] An XOR gate U4 has two input terminals and one output terminal, wherein one input terminal receives the first square wave signal, and the other input terminal is connected to the output terminal of the buffer U3;

[0036] An XOR gate U5 having two input terminals and one output terminal, wherein one input terminal receives the second square wave signal, and the other input terminal is connected to the other input terminal of the XOR gate U4;

[0037] A diode D1, wherein the anode of the diode D1 is connected to the output end of the XOR gate U4;

[0038] A diode D2, wherein the anode of the diode D2 is connected to the output end of the XOR gate U5, and the cathode of the diode D1 is connected to the cathode of the diode D2;

[0039] The control signal is output at a connection point between the cathode of the diode D1 and the cathode of the diode D2.

[0040] In a specific implementation scheme, the second signal processing module is further used to obtain an initialization signal and a counter clearing signal.

[0041] In summary, this application has the following beneficial technical effects:

[0042] 1. The first digital signal and the second digital signal are obtained through the first counting unit and the second technical unit. The two digital signals are combined and processed by the signal processing unit to finally count the number of motor revolutions. The two digital signals are combined and then processed to achieve counting. The implementation scheme is simple, resulting in low cost and low circuit power consumption.

[0043] 2. Noise may interfere with the counter counting. The noise elimination unit is used to eliminate the noise to avoid interference with the counting and cause counting errors. The first counting unit and the second counting unit are combined to count the number of motor rotations. The second counting unit and the noise elimination unit are combined to eliminate the noise input to the circuit to ensure the accuracy of the number of rotations as much as possible. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a circuit diagram of a Hall rotation counter according to an embodiment of the present application;

[0045] Figure 2 It is a schematic diagram of pulse signal output for signal rising edge and falling edge recognition in an embodiment of the present application;

[0046] Figure 3 It is a schematic diagram of pulse signal output for forward and reverse rotation identification in an embodiment of the present application;

[0047] Figure 4 Schematic diagram of the output of the noise elimination control decoder enable signal according to an embodiment of the present application.

[0048] Reference numerals: 100, first counting unit; 200, second counting unit; 300, signal processing unit; 400, noise elimination unit. DETAILED DESCRIPTION

[0049] The following combination Figure 1-Figure 4 This application is described in further detail.

[0050] The embodiment of the present application discloses a Hall rotation number counter, which is used to count the number of motor rotations. A Hall sensor is arranged near the rotating shaft of the motor, and the rotating shaft of the motor drives the magnet to rotate, inducing the Hall sensor arranged orthogonally at 90° nearby, outputting two orthogonal digital signals, and outputting a square wave signal of one cycle per rotation, and the phase difference of the two signals is about 90°. The Hall sensor outputs two orthogonal signals, and the two orthogonal signals are input into the counter to count the number of motor rotations. After obtaining the number of motor rotations, the current position of the motor can be calculated according to the distance moved per rotation of the motor, that is, the step length of the motor. The position of the motor can be obtained by multiplying the step length of the motor by the number of rotations, and the position of the mechanical structure driven by the motor can also be obtained, so that the precise positioning of the motor and the position feedback of the motor can be realized. At present, the motor rotation number counter is mainly implemented by a single-chip microcomputer, but the solution implemented by the single-chip microcomputer is complex, power consumption is large, and the response speed is slow. In addition, the solution implemented by the single-chip microcomputer requires software development and maintenance in the later stage, which will make the cost high. In order to help reduce the cost and power consumption of the counter implementation solution, the present application provides a Hall rotation number counter.

[0051] Reference Figure 1 , Hall rotation counter includes:

[0052] A first counting unit 100, the first counting unit 100 is used to obtain a first digital signal and output a counting signal, the first digital signal is a digital signal output by a Hall sensor, and the counting signal includes a first counting signal and a second counting signal; a second counting unit 200, the second counting unit 200 is used to obtain a second digital signal and output an enable signal, the second digital signal is a digital signal output by a Hall sensor, and the first digital signal and the second digital signal are two orthogonal digital signals; a signal processing unit 300, the signal processing unit 300 is used to obtain a counting signal and an enable signal, and output a turn count value; a noise elimination unit 400, the noise elimination unit 400 is used to obtain the first digital signal and eliminate noise.

[0053] The first counting unit 100 is also used to output the first square wave signal and the second square wave signal; the noise elimination unit 400 is also used to obtain the first square wave signal and the second square wave signal and output a control signal; the second counting unit 200 is also used to obtain a control signal.

[0054] The first digital signal and the second digital signal are obtained by the first counting unit and the second counting unit, and the two digital signals are combined and processed by the signal processing unit to finally count the number of rotations of the motor. The combination of the two digital signals and signal processing to achieve counting, the implementation scheme is simple, making the scheme cost low, and the circuit power consumption is low, which is more energy-saving. In addition, noise may interfere with the counting of the counter, and the noise elimination unit is used to eliminate the noise to avoid interference with the counting as much as possible, resulting in counting errors. The first counting unit and the second counting unit are combined to count the number of rotations of the motor, and the second counting unit and the noise elimination unit can be combined to eliminate the noise input to the circuit to ensure the accuracy of the number of rotations as much as possible.

[0055] The first counting unit 100 includes: a resistor R2 and a capacitor C2 connected in series, the other end of the resistor R2 is connected to the first digital signal, and the other end of the capacitor C2 is grounded; a buffer U2, having an input end and an output end, the input end of the buffer U2 is connected to the connection point between the resistor R2 and the capacitor C2; a resistor R0 and a capacitor C0 connected in series, the other end of the resistor R0 is connected to the output end of the buffer U2, the other end of the capacitor C0 is grounded, and the connection point between the resistor R0 and the capacitor C0 outputs a first counting signal; a resistor R1 and a capacitor C1 connected in series, the other end of the resistor R1 is connected to the output end of the buffer U2, and the other end of the capacitor C1 is grounded; a buffer U1, having an input end and an output end, the input end of the buffer U1 is connected to the connection point between the resistor R1 and the capacitor C1, and the output end of the buffer U1 outputs a second counting signal; the output end of the buffer U2 outputs a first square wave signal, and the output end of the buffer U1 outputs a second square wave signal.

[0056] The second counting unit 200 includes: a resistor R4 and a capacitor C4 connected in series, the other end of the resistor R4 is connected to the second digital signal, and the other end of the capacitor C4 is grounded; a buffer U6, having an input end, an output end and a control end, the input end of the buffer U6 is connected to the connection point between the resistor R4 and the capacitor C4, and the control end of the buffer U6 is grounded through the resistor R5; a buffer U7, having an input end and an output end, the input end of the buffer U7 is connected to the output end of the buffer U6, and the output end of the buffer U7 is connected to the output end of the buffer U6 through the resistor R6; the connection point between the output end of the buffer U6 and the resistor R6 outputs an enable signal; the control end of the buffer U6 is used to obtain the control signal.

[0057] The signal processing unit 300 includes: a first signal processing module, the first signal processing module is used to obtain a counting signal and an enabling signal, and output a pulse signal; a second signal processing module, the second signal processing module is used to obtain a pulse signal and output a circle count value, and in addition, the second signal processing module is also used to obtain an initialization signal and a counter clearing signal. Among them, the first signal processing module is a decoder U8; the second signal processing module is a bidirectional addition and subtraction counter U9; the decoder U8 can be any chip that can realize the combinational logic pulse output of Table 1 and identify the rising edge and falling edge of the signal, and the bidirectional addition and subtraction counter U9 can be any chip that can perform the bidirectional addition and subtraction counting logic function shown in Table 2, for example, the chip model of the decoder U8 can be 74AHC139, and the model of the bidirectional addition and subtraction counter U9 can be 74HC193. In actual applications, the specific model of the chip is not limited, and the user can select the chip model according to actual conditions.

[0058] Table 1 Decoder working logic truth table

[0059]

[0060] H indicates high level, L indicates low level, and X indicates unknown level

[0061] Table 2 Working logic truth table of bidirectional add / subtract counter

[0062]

[0063] H indicates high level, L indicates low level, and X indicates unknown level

[0064] ↑ indicates low level converted to high level

[0065] The noise elimination unit 400 includes: a resistor R3 and a capacitor C3 connected in series, the other end of the resistor R3 is connected to the first digital signal, and the other end of the capacitor C3 is grounded; a buffer U3, having an input end and an output end, the input end of the buffer U3 is connected to the connection point of the resistor R3 and the capacitor C3; an XOR gate U4, having two input ends and an output end, one of which receives the first square wave signal, and the other input end is connected to the output end of the buffer U3; an XOR gate U5, having two input ends and an output end, one of which receives the second square wave signal, and the other input end is connected to the other input end of the XOR gate U4; a diode D1, the anode of the diode D1 is connected to the output end of the XOR gate U4; a diode D2, the anode of the diode D2 is connected to the output end of the XOR gate U5, and the cathode of the diode D1 is connected to the cathode of the diode D2; the connection point between the cathode of the diode D1 and the cathode of the diode D2 outputs a control signal.

[0066] The implementation principle of the embodiment of the present application is:

[0067] The motor shaft drives the magnet to rotate, inducing the Hall sensor set at 90° orthogonal to the vicinity and outputting two orthogonal digital signals M0 and M1; each revolution outputs a square wave signal of one cycle, and the phase difference between the two signals is about 90°. In the counting circuit, the resistor and capacitor form an RC delay / filter circuit, which is used for signal delay or noise filtering; refer to Figure 1 , resistor R0 and capacitor C0 form an RC delay / filter circuit with a delay of T0, resistor R1 and capacitor C1 form an RC delay / filter circuit with a delay of T1, resistor R2 and capacitor C2 form an RC delay / filter circuit with a delay of T2, resistor R3 and capacitor C3 form an RC delay / filter circuit with a delay of T3, and resistor R4 and capacitor C4 form an RC delay / filter circuit with a delay of T3. Among them, for the delay time of the RC circuit, T0 is used to compensate for the propagation delay of U4 and U6, with a typical value of tens of nanoseconds, which is specifically determined by the chip parameters used; T1 is used to generate counting pulses Y1 and Y2, with a typical value of one to two microseconds; T2 is used for short-period noise elimination, with a typical value of twenty microseconds, which does not affect the real-time response of the counter; T3 is used for long-period noise elimination, with a typical value of three hundred microseconds. Buffer U7 is an ordinary buffer, buffers U1, U2, and U3 are buffers with Schmitt trigger inputs, and buffer U6 is a buffer with Schmitt trigger inputs with three-state output control.

[0068] The digital signal M1 is input into the counting circuit, and passes through the RC delay / filter circuit with a delay of T2. The RC filter delay and Schmidt input characteristics are used to eliminate signal jitter and short-period noise, and a square wave signal is output. The square wave signal passes through the RC delay / filter circuit with a delay of T0 and the RC delay / filter circuit with a delay of T1 to obtain two square wave signals A and B for counting, which are input into the 24 decoder U8. Signal A and signal B are two signals with a delay difference, so that U8 can output the signal. The RC circuit with a delay of T1 and the buffer U1 complete the microsecond delay, and can detect the rising and falling edges of the signal in conjunction with the 24 decoder U8. Figure 2 When M1 is input at the falling edge, BA=10, and the output pulse is Y2=0; when M1 is input at the rising edge, BA=01, and the output pulse is Y1=0.

[0069] Reference Figure 3 When performing forward and reverse identification, set M0 = 0. If the falling edge of M1 is detected, the pulse Y2 = 0 is output, and it is determined to be one circle forward, and the counter U9 is increased by one; if the rising edge of M1 is detected, the pulse Y1 = 0 is output, and it is determined to be one circle reverse, and the counter U9 is reduced by one; thus, the forward and reverse counting of the motor can be realized, and the circle count value is finally output through U9. In addition, when performing forward and reverse identification, M0 = 1 can also be set, as long as the logic of the relevant signal is inverted.

[0070] In order to ensure the real-time response of the counter, the delay time T2 is generally less than 20us, so the noise with a period greater than 20us can still pass through the RC circuit with a delay time of T2 and the buffer U2, thereby interfering with the counter count. The probability of this happening is very low, but it still needs to be eliminated. When the XOR gate U4 and XOR gate U5 detect a signal change, which can also be understood as noise, the output of buffer U6 is turned off, and the buffer U7 is used to delay the validity of the decoder enable signal, so that the noise at the beginning of the decoder enable signal cannot generate Y1 and Y2 signals, but the noise at the end of the decoder enable signal can generate paired Y1 and Y2 signals, refer to Figure 2 In this way, when the long-period noise ends, the counter performs paired addition and subtraction operations to immediately restore the correct count value.

[0071] When the power is first turned on, the counter is preset to a specified value using the counter's built-in / PL signal so that the software can recognize and initialize it. The counter can be cleared using the counter's built-in MR signal.

[0072] In the embodiment of the present application, the counting circuit uses an RC circuit in conjunction with a Schmitt-trigger input buffer to eliminate short-period noise; uses an RC circuit in conjunction with a Schmitt-trigger input buffer and a decoder circuit to complete the identification of the rising and falling edges of the signal; and uses a bidirectional up-and-down counter in conjunction with the identification of the rising and falling edges of the signal to complete the immediate recovery of the counter after the long-period noise ends.

[0073] This specific embodiment is merely an explanation of the present invention and is not a limitation of the present invention. After reading this specification, those skilled in the art may make non-creative modifications to the present embodiment as needed. However, as long as they are within the scope of the claims of the present invention, they are protected by the patent law.

Claims

1. A Hall rotation counter, characterized in that: include: A first counting unit, the first counting unit is used to obtain a first digital signal and output a counting signal, the first digital signal is a digital signal output by a Hall sensor; A second counting unit, the second counting unit is used to obtain a second digital signal and output an enable signal, the second digital signal is a digital signal output by the Hall sensor, and the first digital signal and the second digital signal are two orthogonal digital signals; A signal processing unit is used to obtain the counting signal and the enabling signal, and output a turn count value.

2. The Hall rotation counter according to claim 1, characterized in that: The first counting unit is also used to output a first square wave signal and a second square wave signal; The Hall rotation revolution counter also includes: a noise elimination unit, the noise elimination unit being used to acquire the first digital signal and eliminate noise; The noise elimination unit is further used to obtain the first square wave signal and the second square wave signal, and output a control signal; The second counting unit is further used to obtain the control signal.

3. The Hall rotation counter according to claim 1, characterized in that: The counting signal includes a first counting signal and a second counting signal, and the first counting unit includes: A resistor R2 and a capacitor C2 connected in series, the other end of the resistor R2 is connected to the first digital signal, and the other end of the capacitor C2 is grounded; A buffer U2 having an input terminal and an output terminal, wherein the input terminal of the buffer U2 is connected to a connection point between the resistor R2 and the capacitor C2; A resistor R0 and a capacitor C0 connected in series, the other end of the resistor R0 is connected to the output end of the buffer U2, the other end of the capacitor C0 is grounded, and the connection point between the resistor R0 and the capacitor C0 outputs the first counting signal; A resistor R1 and a capacitor C1 connected in series, the other end of the resistor R1 is connected to the output end of the buffer U2, and the other end of the capacitor C1 is grounded; The buffer U1 has an input terminal and an output terminal. The input terminal of the buffer U1 is connected to the connection point between the resistor R1 and the capacitor C1, and the output terminal of the buffer U1 outputs the second counting signal.

4. The Hall rotation counter according to claim 3, characterized in that: The output end of the buffer U2 outputs a first square wave signal, and the output end of the buffer U1 outputs a second square wave signal.

5. The Hall rotation counter according to claim 1, characterized in that: The second counting unit comprises: A resistor R4 and a capacitor C4 connected in series, the other end of the resistor R4 is connected to the second digital signal, and the other end of the capacitor C4 is grounded; A buffer U6 has an input terminal, an output terminal and a control terminal, wherein the input terminal of the buffer U6 is connected to a connection point between the resistor R4 and the capacitor C4, and the control terminal of the buffer U6 is grounded through the resistor R5; A buffer U7 having an input terminal and an output terminal, wherein the input terminal of the buffer U7 is connected to the output terminal of the buffer U6, and the output terminal of the buffer U7 is connected to the output terminal of the buffer U6 through a resistor R6; The connection point between the output end of the buffer U6 and the resistor R6 outputs the enable signal.

6. The Hall rotation counter according to claim 5, characterized in that: The control end of the buffer U6 is used to obtain a control signal.

7. The Hall rotation counter according to claim 1, characterized in that: The signal processing unit comprises: A first signal processing module, the first signal processing module is used to obtain the counting signal and the enabling signal, and output a pulse signal; The second signal processing module is used to obtain the pulse signal and output a turn count value.

8. The Hall rotation counter according to claim 7, characterized in that: The first signal processing module is a decoder; the second signal processing module is a bidirectional up-down counter.

9. The Hall rotation counter according to claim 2, characterized in that: The noise cancellation unit comprises: A resistor R3 and a capacitor C3 connected in series, the other end of the resistor R3 is connected to the first digital signal, and the other end of the capacitor C3 is grounded; A buffer U3 having an input terminal and an output terminal, wherein the input terminal of the buffer U3 is connected to a connection point between the resistor R3 and the capacitor C3; An XOR gate U4 has two input terminals and one output terminal, wherein one input terminal receives the first square wave signal, and the other input terminal is connected to the output terminal of the buffer U3; An XOR gate U5 having two input terminals and one output terminal, wherein one input terminal receives the second square wave signal, and the other input terminal is connected to the other input terminal of the XOR gate U4; A diode D1, wherein the anode of the diode D1 is connected to the output end of the XOR gate U4; A diode D2, wherein the anode of the diode D2 is connected to the output end of the XOR gate U5, and the cathode of the diode D1 is connected to the cathode of the diode D2; The control signal is output at a connection point between the cathode of the diode D1 and the cathode of the diode D2.

10. The Hall rotation counter according to claim 7, characterized in that: The second signal processing module is further used to obtain an initialization signal and a counter clearing signal.

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