Timing protection circuit, amplifier timing control device and amplifier system

Abstract

The utility model relates to a time sequence protection circuit, an amplifier time sequence control device and an amplifier system. The time sequence protection circuit is used for carrying out accidental power failure protection on an amplifier and comprises a first input end used for being connected with a first power supply, and the first power supply is a supply power supply for generating grid voltage of the amplifier; the drain voltage output end is used for outputting drain voltage to the drain of the amplifier; the control end of the first switch module is connected with the first input end, and the first switch module is used for switching the conduction state when the first power supply is powered down so as to enable the drain voltage output end to be grounded. When the system is powered down accidentally, the power-off time sequence requirement of the amplifier can still be met, so that the amplifier is prevented from being damaged due to the abnormal power-off time sequence.

Description

Technical Field

[0001] The present application relates to the technical field of radio frequency amplifiers, and in particular to a timing protection circuit, an amplifier timing control device and an amplifier system. Background Art

[0002] The amplifiers currently used in RF links can only provide optimal performance under specific bias conditions. Although some amplifiers use self-biasing, some amplifiers require an external power supply to provide a static bias point. At this time, the power-on and power-off timings of the relevant voltages of the amplifier need to be strictly controlled to ensure that the device can work safely.

[0003] In traditional technology, the power-on and power-off timings are usually controlled by a general amplifier timing control chip pair. However, when this method is used, once the system unexpectedly loses power, the voltage of the control chip itself will also disappear, so the power-off control program cannot be executed normally, which may damage the amplifier. Summary of the invention

[0004] Based on this, it is necessary to provide a timing protection circuit, an amplifier timing control device and an amplifier system, so that when the system loses power unexpectedly, the power-off timing requirements of the amplifier can still be met, thereby preventing the amplifier from being damaged due to abnormal power-off timing.

[0005] A timing protection circuit is used to protect an amplifier from accidental power failure, the timing protection circuit comprising:

[0006] A first input terminal, used to connect to a first power supply, wherein the first power supply is a power supply for generating a gate voltage of the amplifier;

[0007] A drain voltage output terminal, used for outputting the drain voltage to the drain of the amplifier;

[0008] A first switch module, whose control end is connected to the first input end, is used to switch to a conducting state to ground the drain voltage output end when the first power source is powered off.

[0009] In one embodiment, the first switch module includes a junction field effect transistor unit, a gate of the junction field effect transistor unit is connected to the first input terminal, one end of a source and a drain of the junction field effect transistor unit is connected to the first input terminal, and the other end is grounded.

[0010] In one of the embodiments, the junction field effect transistor unit includes an N-type junction field effect transistor, and when the amplifier is in a normal working state, the N-type junction field effect transistor is in a cut-off state.

[0011] In one embodiment, the timing protection circuit further includes:

[0012] VCC voltage input terminal,

[0013] A voltage stabilizing module, whose input end is connected to the VCC voltage input end, and whose output end is connected to the drain voltage output end;

[0014] A second switch module, whose control end is connected to the VCC voltage input end, is used to ground the enable end of the voltage stabilizing module when the first power supply is not powered on.

[0015] In one embodiment, the timing protection circuit further includes:

[0016] The current limiting module is connected between the VCC voltage input terminal and the enable terminal of the voltage stabilizing module.

[0017] In one embodiment, the timing protection circuit further includes:

[0018] A second input terminal, used to connect to a second power supply, the second power supply is a supply power supply for generating a drain voltage of the amplifier;

[0019] A DC-to-DC module, wherein the input end is connected to the second input end, and the output end is connected to the VCC voltage input end.

[0020] In one embodiment, the timing protection circuit further includes a voltage division module, and the voltage division module includes:

[0021] A first voltage dividing unit, one end of which is connected to the first input end, and the other end of which is connected to the control end of the first switch module and the control end of the second switch module;

[0022] A second voltage dividing unit, one end of which is connected to the control end of the first switch module and the other end of which is grounded;

[0023] And / or, the timing protection circuit further includes:

[0024] The current leakage module is arranged on the line between the drain voltage output terminal and the current input terminal of the first switch module.

[0025] An amplifier timing control device, comprising:

[0026] Such as the timing protection circuit mentioned above;

[0027] A timing control chip and a filtering module, wherein the timing control chip includes a digital-to-analog conversion module, an input power supply end of the digital-to-analog conversion module is used to connect to the first power supply, and an output voltage at the output end of the digital-to-analog conversion module generates a gate voltage of the amplifier after passing through the filtering module.

[0028] In one embodiment, the amplifier timing control device further includes:

[0029] A third switch module is provided on the line between the drain voltage output terminal and the drain of the amplifier, and its control terminal is connected to the timing control chip, and is used to switch the conduction state according to the control signal output by the timing control chip;

[0030] The measuring resistor is located between the current output terminal of the third switch module and the drain of the amplifier and is used to measure the drain current of the amplifier.

[0031] An amplifier system, comprising:

[0032] An amplifier timing control device as described above;

[0033] The amplifier has a gate connected to the output end of the digital-to-analog conversion module and a drain connected to the drain voltage output end.

[0034] The timing protection circuit, amplifier timing control device and amplifier system are provided with a control end of the first switch module connected to the first input end of the first power supply (as the power supply of the gate voltage of the amplifier), so that the first switch module can be quickly switched according to the power failure of the first power supply. At the same time, the first switch module is arranged between the drain voltage output end and the ground end. At this time, after the first power supply is accidentally powered off, the drain voltage can be quickly discharged to the ground, and the gate voltage, because there is no other discharge path, will slowly become 0V with the first power supply voltage after the drain voltage drops to 0V.

[0035] Therefore, when the system unexpectedly loses power, the drain voltage can drop to 0V before the gate voltage, but the gate voltage does not drop to 0V before the drain voltage, thereby effectively ensuring the power-off timing of the gate voltage and the drain voltage. At this time, it can be prevented that the gate voltage is set to 0V when the drain voltage exists, which causes the drain current to be too large and thus be damaged. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 is a block diagram of an amplifier system module in an embodiment;

[0038] Figure 2is a schematic diagram of a partial circuit structure of an amplifier timing control device in an embodiment;

[0039] Figure 3 Schematic diagram of the circuit structure of a timing protection circuit in one embodiment.

[0040] Explanation of the accompanying drawings: 1-amplifier, 2-amplifier timing control device, 10-timing control chip, 11-digital-to-analog conversion module, 20-timing protection circuit, 30-filter module, 40-third switch module, 50-measuring resistor, 21-first input terminal, 22-drain voltage output terminal, 23-first switch module, 24-second input terminal, 25-voltage stabilizing module, 26-second switch module, 27-current limiting module, 28-voltage dividing module, 281-first voltage dividing unit, 282-second voltage dividing unit, 29-current discharge module. DETAILED DESCRIPTION

[0041] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0043] It can be understood that the terms "first", "second", etc. used in the present application can be used in this article to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element.

[0044] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0045] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least a portion of an element” means a part or all of an element.

[0046] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0047] In one embodiment, see Figure 1 , an amplifier system is provided, including an amplifier 1 and an amplifier timing control device 2.

[0048] The amplifier 1 may include a transistor. The amplifier 1 may amplify an input signal through the transistor. In addition, the amplifier 1 may also include an input matching circuit, an output matching circuit, and the like.

[0049] The gate voltage VGG and drain voltage VDD of amplifier 1 can be provided by an external power supply. In order to make amplifier 1 work normally and safely, the power-on timing and power-off timing of gate voltage VGG and drain voltage VDD of amplifier 1 need to be strictly controlled so that the device can work safely.

[0050] The amplifier timing control device 2 can control the power-on timing and power-off timing of the gate voltage VGG and the drain voltage VDD.

[0051] In one embodiment, see Figure 1 as well as Figure 2 The amplifier timing control device 2 may include a timing control chip 10 , a timing protection circuit 20 and a filtering module 30 .

[0052] See also Figure 2 The timing control chip 10 may include a digital-to-analog conversion module 11 (DAC module). The digital-to-analog conversion module 11 may include, for example, a digital-to-analog converter.

[0053] The input power supply terminal of the digital-to-analog conversion module 11 can be connected to a first power supply to receive a first power supply voltage AVSS. The first power supply is a power supply for generating a gate voltage of the amplifier 1 .

[0054] The output voltage at the output end of the digital-to-analog conversion module 11 is passed through the filter module 30 to generate the gate voltage VGG of the amplifier 1. At this time, the digital-to-analog conversion module 11 can use the first power supply voltage AVSS as a power supply signal, and perform digital-to-analog conversion according to the input digital signal, and form the converted signal into a gate voltage VGG and output it to the gate of the amplifier 1, thereby realizing that the first power supply is the power supply of the gate voltage VGG.

[0055] When amplifier 1 is working normally, the gate voltage VGG can be a negative voltage. At this time, the first power supply voltage AVSS can be set to a negative voltage, so that the gate voltage VGG can be powered. For example, when amplifier 1 is an HMC460 RF amplifier, the normal working voltage of the gate voltage VGG is approximately between -2V and 0V, and is in the best working state at about -0.9V. At this time, the first power supply voltage AVSS can be set to -5V.

[0056] The filter module 30 may include but is not limited to a first-order RC low-pass filter circuit. The filter module 30 is located between the output end of the digital-to-analog conversion module 11 and the gate of the amplifier 1, thereby filtering the voltage output from the output end of the digital-to-analog conversion module 11 and providing a stable DC gate voltage VGG.

[0057] As an example, the amplifier timing control device 2 may further include a third switch module 40 and a measuring resistor 50 .

[0058] The third switch module 40 is provided on the line between the drain voltage output terminal 22 and the drain of the amplifier 1. The control terminal of the third switch module 40 is connected to the timing control chip 10, and is used to switch the conduction state according to the control signal output by the timing control chip 10, so as to conduct or disconnect the drain voltage output terminal 22 and the drain of the amplifier 1. Among them, the drain voltage output terminal 22 is used to output the drain voltage VDD.

[0059] The third switch module 40 may include a field effect transistor or a triode, etc. When the third switch module 40 is a field effect transistor (such as a PMOS transistor), its gate may be connected to the timing control chip 10, one of the source and the drain may be connected to the drain voltage output terminal 22, and the other may be connected to the drain of the amplifier 1.

[0060] The measuring resistor 50 is located between the current output terminal of the third switch module 40 and the drain of the amplifier 1, and is used to measure the drain current of the amplifier 1. The voltage across the measuring resistor 50 can be measured to obtain the current flowing through the measuring resistor 50, that is, to obtain the drain current of the amplifier 1.

[0061] The timing control chip 10 can control the power-on timing and the power-off timing of the amplifier 1 when the system is powered normally, that is, when there is no abnormal power failure.

[0062] As an example, when powered on, the timing control chip 10 can first disconnect the third switch module 40 to provide the first power supply voltage AVSS, and then provide the gate voltage VGG. And the provided gate voltage VGG can be set to a cut-off voltage (such as -2V), so that the transistor of the amplifier 1 is in a cut-off state. Then the third switch module 40 is turned on to provide a drain voltage VDD (such as 8V). Afterwards, the timing control chip 10 can adjust the gate voltage VGG to an optimal value (such as about -0.9V) according to the measurement current fed back by the measurement resistor 50.

[0063] The gate voltage VGG to an optimal value (such as about -0.9V) may be between the cut-off voltage of the gate voltage VGG (such as -2V) and 0V. At this time, when the power is turned off, if the gate voltage VGG drops to 0V before the drain voltage VDD, the gate voltage VGG will be set to 0V when the drain voltage VDD exists, which may cause the drain current to be too large and damage the amplifier 1. Therefore, when the power is turned off, the timing control chip 10 can control the gate voltage VGG not to drop to 0V before the drain voltage VDD, thereby controlling the power-off timing of the gate voltage VGG and the drain voltage VDD of the amplifier 1.

[0064] As an example, when power is turned off, the timing control chip 10 can control the third switch module 40 to be disconnected first, and the power supply of the drain voltage VDD is disconnected first, so that the drain voltage VDD is 0 V. Then, the power supply of the first power supply voltage AVSS is disconnected, and then the power supply of the gate voltage VGG is disconnected, so that the gate voltage VGG is 0 V. This process can be controlled by setting a switch (not shown) similar to the third switch module 40.

[0065] Before disconnecting the drain voltage VDD, the gate voltage VGG can be adjusted to a cut-off voltage (e.g., -2V) to turn off the transistor of the amplifier 1. At this time, although the gate voltage VGG is not disconnected, the path between the source and the drain of the transistor has been closed, so that the amplifier 1 can be turned off. Then the drain voltage VDD is reduced to 0V. Then the gate voltage VGG is adjusted from the cut-off voltage (e.g., -2V) to 0V.

[0066] Of course, in other examples, the power-off timing control method of the timing control chip 10 may also be different from this. For example, when powering off, the gate voltage VGG may not be adjusted to the cut-off voltage (such as -2V) first, and the third switch module 40 may be directly disconnected to make the drain voltage VDD 0V. Alternatively, before disconnecting the power supply of the drain voltage VDD, the gate voltage VGG is first adjusted to the cut-off voltage (such as -2V), and since the amplifier 1 has been turned off, the third switch module 40 may not be disconnected to make the drain voltage VDD 0V. The specific adjustment can be made according to the actual situation.

[0067] The power-on timing control and power-off timing control of the timing control chip 10 are performed when the system is powered normally, that is, when there is no abnormal power failure, and the voltage of the timing control chip 10 itself does not disappear.

[0068] When the system is powered off abnormally, the voltage of the timing control chip 10 disappears, and the control function is lost. At this time, the power-off timing of the amplifier 1 can be controlled by the timing protection circuit 20, so as to prevent the amplifier 1 from being damaged due to abnormal power-off timing of the amplifier 1 when the system is powered off abnormally.

[0069] In one embodiment, see Figure 3 , a timing protection circuit 20 is provided, which is used to protect the amplifier 1 from accidental power failure. The timing protection circuit 20 includes a first input terminal 21, a drain voltage output terminal 22 and a first switch module 23.

[0070] The first input terminal 21 is used to access the first power supply, so as to receive the first power supply voltage AVSS. The drain voltage output terminal 22 is used to output the drain voltage VDD to the drain of the amplifier 1 .

[0071] The control end of the first switch module 23 is connected to the first input end 21. The first switch module 23 is used to switch to a conducting state to ground the drain voltage output end 22 when the first power source is powered off.

[0072] At this time, the first switch module 23 can perform switch control according to the first power supply voltage AVSS.

[0073] When the system is not powered off abnormally, the first power supply voltage AVSS exists, and the first switch module 23 can disconnect the drain voltage output terminal 22 from the ground terminal GND, so that the drain voltage VDD can be normally input to the drain of the amplifier 1, thereby allowing the amplifier 1 to work normally.

[0074] When the system is powered off abnormally, the first power supply voltage AVSS begins to disappear, and the disconnection state between the drain voltage output terminal 22 and the ground terminal GND can no longer be maintained. Therefore, when the system is powered off abnormally, the drain voltage output terminal 22 is grounded. At this time, the drain voltage VDD will be quickly discharged to the ground, thereby quickly reducing the drain voltage VDD to 0V.

[0075] As for the gate voltage VGG, since the first power supply providing the first power supply voltage AVSS usually has energy storage devices such as capacitors, the process of the first power supply voltage AVSS becoming 0V is slow, so that the process of the gate voltage VGG becoming 0V is also slow. The gate voltage VGG may experience a process of first rising in the direction of the first power supply voltage AVSS, and then falling to 0V as the first power supply voltage AVSS disappears. At the same time, when the filter module 30 is located between the output end of the digital-to-analog conversion module 11 and the gate of the amplifier 1, the speed of the gate voltage VGG change can be adjusted by adjusting the RC time constant of the filter module 30, so that before the first power supply voltage AVSS completely disappears, the gate voltage VGG can first drop to an optimal value to completely shut down the amplifier 1. For example, when the amplifier 1 is an HMC460 RF amplifier, the gate voltage VGG can first drop to the optimal shutdown voltage -2V. Afterwards, when AVSS_POWER becomes 0, the gate voltage VGG also slowly changes from -2V to 0V.

[0076] In this embodiment, a first switch module 23 is provided between the drain voltage output terminal 22 and the ground terminal GND, and a control terminal of the first switch module 23 is provided to be connected to the first input terminal 21 of the first power supply (the power supply of the gate voltage of the amplifier 1), so that the first switch module 23 can be quickly switched according to the power failure of the first power supply. At this time, after the first power supply is accidentally powered off, the drain voltage VDD can be quickly discharged to the ground, and the gate voltage VGG, because there is no other discharge path, will slowly become 0V with the first power supply voltage AVSS after the drain voltage VDD drops to 0V.

[0077] Therefore, when the system unexpectedly loses power, the drain voltage VDD can drop to 0V before the gate voltage VGG, while the gate voltage VGG does not drop to 0V before the drain voltage VDD, thereby effectively ensuring the power-off timing of the gate voltage VGG and the drain voltage VDD. At this time, it can be prevented that the gate voltage VGG is set to 0V when the drain voltage VDD exists, which causes the drain current to be too large and thus be damaged.

[0078] In one embodiment, the first switch module 23 includes a junction field effect transistor unit.

[0079] The gate of the junction field effect transistor unit is the control end of the first switch module 23, which is connected to the first input end 21. At the same time, one end of the source and drain of the junction field effect transistor unit is connected to the first input end 21, and the other end is connected to the ground end GND.

[0080] According to the characteristics of the junction field effect transistor, when no power is connected, there can be a conductive channel between its source and drain; after the reverse bias voltage is connected, the depletion layer of the junction field effect transistor can expand, thereby pinching off the conductive channel.

[0081] Therefore, by setting the first switch module 23 to include a junction field effect transistor unit, it is possible to effectively disconnect the drain voltage output terminal 22 from the ground terminal GND when the first power supply voltage AVSS exists, and connect the drain voltage output terminal 22 to the ground terminal GND when the first power supply voltage AVSS disappears due to an unexpected power failure, thereby quickly grounding the drain voltage VDD on the drain voltage output terminal 22.

[0082] As an example, the junction field effect transistor unit includes an N-type junction field effect transistor. When the amplifier is in a normal working state, the N-type junction field effect transistor is in a cut-off state. At this time, when the amplifier 1 is working normally, the gate voltage VGG can be a negative voltage.

[0083] If the amplifier 1 is working normally, the gate voltage VGG is a negative voltage, and the first power supply voltage AVSS is also a negative voltage, so that the gate voltage VGG can be powered. At this time, the junction field effect transistor unit is set to include an N-type junction field effect transistor, so that when the first power supply voltage AVSS exists, the N-type junction field effect transistor can be disconnected by the first power supply voltage AVSS at a negative voltage, and when the first power supply voltage AVSS disappears due to an accidental power failure, the N-type junction field effect transistor is turned on.

[0084] Similarly, if the amplifier 1 works normally, the gate voltage VGG is a positive voltage, and the first power supply voltage AVSS is also a positive voltage, then the junction field effect transistor unit may include a P-type junction field effect transistor.

[0085] Of course, in other embodiments, the first switch module 23 may also be in other forms, for example, the first switch module 23 includes a relay. The coil of the relay can receive the first power supply voltage AVSS, the moving contact can be connected to the drain voltage output terminal 22, and the two static contacts can be respectively connected to the ground terminal GND and the drain of the amplifier 1. Among them, the static contact connected to the drain of the amplifier 1 can be specifically connected to the drain of the amplifier 1 through the third switch module 40. At this time, when the first power supply voltage AVSS exists, the coil of the relay can be energized so that the moving contact contacts the static contact connected to the drain of the amplifier 1, and when the first power supply voltage AVSS disappears due to an accidental power failure, the coil of the relay can be powered off so that the moving contact contacts the static contact connected to the ground terminal GND, thereby quickly grounding the drain voltage VDD.

[0086] In one embodiment, the timing protection circuit 20 further includes a VCC voltage input terminal, a voltage stabilizing module 25 and a second switch module 26 .

[0087] The input end of the voltage stabilizing module 25 is connected to the VCC voltage input end, and the output end is connected to the drain voltage output end 22, so that the drain voltage VDD input to the drain voltage output end 22 is more stable. The voltage stabilizing module 25 can be a low-noise voltage stabilizer.

[0088] As an example, the timing protection circuit may further include a second input terminal 24 and a DC to DC conversion module (DCDC module).

[0089] The second input terminal 24 is used to access a second power supply, which is a power supply for generating a drain voltage VDD of the amplifier 1 .

[0090] The input terminal of the DC-DC module can be connected to the second input terminal 24, and the output terminal can be connected to the VCC voltage input terminal.

[0091] The voltage of the second power supply can first pass through the DCDC module to generate the first power supply voltage VCC of the VCC voltage input terminal, and then the first power supply voltage VCC passes through the voltage regulator module 25 to generate the drain voltage VDD used by the amplifier 1. For example, when the drain voltage VDD=8V, VCC can be set to 8.5V.

[0092] The control end of the second switch module 26 is connected to the VCC voltage input end, and is used to ground the enable end En of the voltage stabilizing module 25 when the first power supply is not powered on.

[0093] When the first power supply is not powered on, the first power supply voltage AVSS does not exist, and the enable terminal En of the voltage stabilizing module 25 is connected to the ground terminal GND, so that the enable terminal En of the voltage stabilizing module 25 is grounded.

[0094] After the first power supply is powered on, the system works normally, the first power supply voltage AVSS exists, and the second switch module 26 disconnects the connection between the enable terminal En of the voltage stabilizing module 25 and the ground terminal GND under the action of the first power supply voltage AVSS, so that the enable terminal En of the voltage stabilizing module 25 can be normally enabled, and then the voltage stabilizing module 25 can work normally and output the drain voltage VDD.

[0095] The second switch module 26 may be the same as or different from the first switch module 23 .

[0096] As an example, if the amplifier 1 works normally, the gate voltage VGG is a negative voltage, and the second switch module 26 can be set to include an N-type junction field effect transistor.

[0097] The N-type junction field effect tube is normally turned on, and the turn-off voltage is negative. For example, the MMBT4393LT1G N-type junction field effect tube can be selected, and its turn-off voltage is -2V. When the first power supply voltage AVSS is not present, the N-type junction field effect tube is turned on, so the enable terminal EN of the voltage regulator module 25 is 0 voltage and will not be turned on. Therefore, when power is on, the gate VGG is present first, and then the drain VDD is present.

[0098] In this embodiment, the control end of the second switch module 26 is also connected to the first input end 21 to receive the first power supply voltage AVSS, and the connection between the enable end En of the voltage regulator module 25 and the ground end GND is controlled by the second switch module 26, so that the enable end of the voltage regulator module 25 can be grounded before the first power supply voltage AVSS is powered on. Therefore, the drain voltage VDD will not be formed when the first power supply voltage AVSS is powered on, so that the gate voltage VGG is first generated when the power is turned on, and then the drain voltage VDD is generated, thereby satisfying the power-on timing. Therefore, this embodiment can ensure the power-off timing and protect the amplifier 1 when the system is accidentally powered off, and can also ensure the power-on timing of the amplifier 1 when the system is powered on, and further protect the amplifier 1.

[0099] In one embodiment, the timing protection circuit 20 further includes a current limiting module 27. The current limiting module 27 may include, for example, a current limiting resistor R3.

[0100] The two ends of the current limiting module 27 are respectively connected to the VCC voltage input terminal and the enable terminal of the voltage stabilizing module 25. Specifically, when the timing protection circuit 20 also includes a DCDC module, one end of the current limiting module 27 is connected to the enable terminal En of the voltage stabilizing module 25, and the other end can be connected to the output end of the DCDC module (i.e., the VCC voltage input end), and then connected to the second input terminal 24 through the DCDC module.

[0101] In this embodiment, the enable terminal En of the voltage stabilizing module 25 can be powered by the VCC voltage input terminal. At the same time, the setting of the current limiting module 27 can prevent the current flowing into the second switch module 26 from being too large and causing damage to it after the VCC voltage input terminal (or the second power supply) is powered on.

[0102] In one embodiment, the timing protection circuit 20 further includes a voltage dividing module 28. The voltage dividing module 28 includes a first voltage dividing unit 281 and a second voltage dividing unit 282.

[0103] One end of the first voltage dividing unit 281 is connected to the first input end 21, and the other end is connected to the control end of the first switch module 23 and the control end of the second switch module 26. The first voltage dividing unit 281 may include, for example, a voltage dividing resistor R1.

[0104] One end of the second voltage dividing unit 282 is grounded, and the other end is connected to the control end of the first switch module 23. The second voltage dividing unit 282 may include, for example, a voltage dividing resistor R2.

[0105] By configuring the voltage divider module 28 , the first power supply voltage AVSS can be effectively divided to meet the control terminal voltage requirement of the first switch module 23 (or the first switch module 23 and the second switch module 26 ).

[0106] In one embodiment, the timing protection circuit 20 further includes a leakage module 29. The leakage module 29 may include, for example, a leakage resistor R4.

[0107] The leakage module 29 is located on the line between the drain voltage output terminal 22 and the current input terminal of the first switch module 23, so that the drain voltage VDD can be quickly discharged to the ground through the leakage module 29 (leakage resistor R4) and the first switch module 23, thereby playing the role of quickly reducing the drain voltage VDD to 0 V. At the same time, the leakage module 29 can also reduce the leakage current passing through the first switch module 23 (such as an N-type junction field effect transistor), thereby reducing the power consumption of the circuit.

[0108] In the description of this specification, the description with reference to the terms "one embodiment", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0109] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0110] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A timing protection circuit, characterized in that: Used to protect the amplifier from unexpected power failure, the timing protection circuit includes: A first input terminal, used to connect to a first power supply, wherein the first power supply is a power supply for generating a gate voltage of the amplifier; A drain voltage output terminal, used for outputting the drain voltage to the drain of the amplifier; A first switch module, whose control end is connected to the first input end, is used to switch to a conducting state to ground the drain voltage output end when the first power source is powered off.

2. The timing protection circuit according to claim 1, characterized in that: The first switch module comprises a junction field effect transistor unit, a gate of the junction field effect transistor unit is connected to the first input end, one end of a source and a drain of the junction field effect transistor unit is connected to the first input end, and the other end is grounded.

3. The timing protection circuit according to claim 2, characterized in that: The junction field effect transistor unit includes an N-type junction field effect transistor. When the amplifier is in a normal working state, the N-type junction field effect transistor is in a cut-off state.

4. The timing protection circuit according to claim 1, characterized in that: The timing protection circuit also includes: VCC voltage input terminal, A voltage stabilizing module, whose input end is connected to the VCC voltage input end, and whose output end is connected to the drain voltage output end; A second switch module, whose control end is connected to the VCC voltage input end, is used to ground the enable end of the voltage stabilizing module when the first power supply is not powered on.

5. The timing protection circuit according to claim 4, characterized in that: The timing protection circuit also includes: The current limiting module is connected between the VCC voltage input terminal and the enable terminal of the voltage stabilizing module.

6. The timing protection circuit according to claim 5, characterized in that: The timing protection circuit also includes: A second input terminal, used to connect to a second power supply, the second power supply is a supply power supply for generating a drain voltage of the amplifier; A DC-to-DC module, wherein the input end is connected to the second input end, and the output end is connected to the VCC voltage input end.

7. The timing protection circuit according to claim 4, characterized in that: The timing protection circuit further includes a voltage division module, and the voltage division module includes: A first voltage dividing unit, one end of which is connected to the first input end, and the other end of which is connected to the control end of the first switch module and the control end of the second switch module; A second voltage dividing unit, one end of which is connected to the control end of the first switch module and the other end of which is grounded; And / or, the timing protection circuit further includes: The current leakage module is arranged on the line between the drain voltage output terminal and the current input terminal of the first switch module.

8. An amplifier timing control device, characterized in that: include: The timing protection circuit according to any one of claims 1 to 7; A timing control chip and a filtering module, wherein the timing control chip includes a digital-to-analog conversion module, an input power supply end of the digital-to-analog conversion module is used to connect to the first power supply, and an output voltage at the output end of the digital-to-analog conversion module generates a gate voltage of the amplifier after passing through the filtering module.

9. The amplifier timing control device according to claim 8, characterized in that: The amplifier timing control device also includes: A third switch module is provided on the line between the drain voltage output terminal and the drain of the amplifier, and its control terminal is connected to the timing control chip, and is used to switch the conduction state according to the control signal output by the timing control chip; The measuring resistor is located between the current output terminal of the third switch module and the drain of the amplifier and is used to measure the drain current of the amplifier.

10. An amplifier system, characterized in that: include; The amplifier timing control device as claimed in claim 8 or 9; The amplifier has a gate connected to the output end of the digital-to-analog conversion module and a drain connected to the drain voltage output end.

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