Radio frequency amplifier and radio frequency transceiver module

Abstract

The utility model provides a radio frequency amplifier and a radio frequency transceiver module, and relates to the technical field of radio frequency. An external radio frequency signal to be amplified is divided into a plurality of radio frequency signals to be processed through a power distribution circuit, and the radio frequency signals to be processed are transmitted to a plurality of input matching circuits in a one-to-one correspondence manner; the signal output end of each input matching circuit sequentially passes through a driving stage amplifying circuit formed by stacking at least two stages of transistors and an inter-stage matching circuit; a power stage amplification circuit formed by stacking at least two stages of transistors and an output matching circuit are correspondingly connected with one signal input end of a power synthesis circuit, so that the power synthesis circuit outputs a target radio frequency signal obtained by cooperative amplification of a plurality of driving stage / power stage amplification circuits to the outside; through organic combination of a transistor stacking technology and a power synthesis technology, a corresponding radio frequency amplifier is effectively adapted to a transistor prepared by an advanced silicon-based process, good power amplification efficiency can be achieved, and large enough output power can be effectively maintained.

Description

Technical Field

[0001] The present application relates to the field of radio frequency (RF) technology, and in particular to a radio frequency amplifier and a radio frequency transceiver module. Background Art

[0002] With the continuous development of radio frequency technology, power amplifiers are widely used in communications, remote sensing, radar systems, high-frequency instruments and other fields to achieve radio frequency power amplification effects because they can amplify the input low-power radio frequency signals and output radio frequency signals with sufficiently large radio frequency power.

[0003] With the emergence of advanced silicon-based process technology, the characteristic frequency of transistor cores has been continuously improved, which has laid the foundation for the chip-level circuit design of millimeter waves or higher frequencies. However, it is worth noting that compared with transistors prepared by traditional processes, the breakdown voltage of transistors prepared by advanced silicon-based semiconductor processes will decrease as the device processing speed increases (for example, the power supply voltage of CMOS (Complementary Metal Oxide Semiconductor) transistors in 65nm traditional processes is 1V, while the power supply voltage of CMOS transistors in 28nm advanced silicon-based processes is only 0.9V), and the output voltage swing of low-breakdown voltage transistors will be limited, which will directly affect the final output power. In other words, transistors prepared by advanced silicon-based processes are not actually suitable for traditional power amplifiers, which will greatly limit the saturated output power of corresponding traditional power amplifiers. Utility Model Content

[0004] In view of this, the purpose of this application is to provide a radio frequency amplifier and a radio frequency transceiver module, which can organically combine transistor stacking technology and power synthesis technology to enable the constructed amplifier architecture to effectively adapt to transistors prepared by advanced silicon-based processes, thereby ensuring that the corresponding radio frequency amplifier has good power amplification efficiency while effectively maintaining a sufficiently large output power.

[0005] In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0006] In a first aspect, the present application provides a radio frequency amplifier, the radio frequency amplifier comprising a power distribution circuit, a power synthesis circuit, a plurality of input matching circuits, a plurality of driver stage amplification circuits, a plurality of inter-stage matching circuits, a plurality of power stage amplification circuits and a plurality of output matching circuits, wherein the plurality of driver stage amplification circuits and the plurality of power stage amplification circuits are both formed by stacking at least two stages of transistors;

[0007] The signal input end of the power distribution circuit receives and amplifies the radio frequency signal, and the signal input ends of the multiple input matching circuits are respectively connected to a signal output end of the power distribution circuit, wherein the power distribution circuit is used to divide the radio frequency signal to be amplified into multiple radio frequency signals to be processed;

[0008] The signal output end of each input matching circuit is connected to the signal input end of a driving stage amplifier circuit, the signal output end of each driving stage amplifier circuit is connected to the signal input end of an inter-stage matching circuit, the signal output end of each inter-stage matching circuit is connected to the signal input end of a power stage amplifier circuit, and the signal output end of each power stage amplifier circuit is connected to the signal input end of an output matching circuit;

[0009] The signal output ends of the multiple output matching circuits are respectively connected to a signal input end of the power synthesis circuit, so that the power synthesis circuit outputs the target radio frequency signal through the signal output end, wherein the target radio frequency signal is synthesized by a plurality of radio frequency signals to be processed after being collaboratively amplified by a driving stage amplifier circuit and a power stage amplifier circuit.

[0010] In an optional implementation, the plurality of driving stage amplifier circuits are all driving stage differential amplifier circuits, and each input matching circuit includes a first transformer;

[0011] One end of the primary coil of the first transformer serves as a signal input end of a corresponding input matching circuit, and the other end of the primary coil of the first transformer is grounded;

[0012] The two ends of the secondary coil of the first transformer respectively serve as a signal output end of the corresponding input matching circuit, and are used to transmit a differential signal converted from the received radio frequency signal to be processed to the driving stage amplifier circuit connected to the input matching circuit.

[0013] In an optional embodiment, the voltage supply end of each of the multiple inter-stage matching circuits is externally connected to a first bias voltage, and the voltage discharge end of each driving stage amplifier circuit is grounded, wherein each inter-stage matching circuit drives the corresponding connected driving stage amplifier circuit to operate through the first bias voltage.

[0014] In an optional implementation, the plurality of driving stage amplifier circuits are all driving stage differential amplifier circuits, the plurality of power stage amplifier circuits are all power stage differential amplifier circuits, and each inter-stage matching circuit includes a second transformer;

[0015] The two ends of the primary coil of the second transformer are respectively used as a signal input end of the corresponding inter-stage matching circuit, and the central tap point of the primary coil of the second transformer is used as a voltage supply end of the corresponding inter-stage matching circuit;

[0016] The two ends of the secondary coil of the second transformer serve as a signal output end of the corresponding inter-stage matching circuit, respectively, for transmitting the differential signal amplified by the driving stage amplifier circuit connected to the inter-stage matching circuit to the power stage amplifier circuit connected to the inter-stage matching circuit.

[0017] In an optional embodiment, the plurality of output matching circuits include a first output matching circuit and at least one second output matching circuit, and the plurality of power stage amplifying circuits include a first power stage amplifying circuit and at least one second power stage amplifying circuit, wherein a signal input end of the first output matching circuit is correspondingly connected to a signal output end of the second power stage amplifying circuit;

[0018] The voltage supply end of the first output matching circuit is externally connected to a second bias voltage, the voltage discharge end of the first power stage amplifier circuit is grounded, and the voltage supply end of each of the second output matching circuits is individually connected to a voltage discharge end of the second power stage amplifier circuit, wherein the second bias voltage is used to drive the first power stage amplifier circuit and all the second power stage amplifier circuits to operate.

[0019] In an optional implementation, the plurality of power stage amplifier circuits are all power stage differential amplifier circuits, and each output matching circuit includes a third transformer;

[0020] The two ends of the primary coil of the third transformer are respectively used as a signal input end of the corresponding output matching circuit, for receiving the differential signal amplified by the power stage amplifier circuit connected to the corresponding output matching circuit;

[0021] The center tap point of the primary coil of the third transformer serves as a voltage supply terminal of the corresponding output matching circuit;

[0022] One end of the secondary coil of the third transformer serves as the signal output end of the corresponding output matching circuit, and is used to output the RF signal to be synthesized that matches the received differential signal, wherein the other end of the secondary coil of the third transformer is grounded, and the target RF signal is synthesized by the RF signals to be synthesized output by all the output matching circuits.

[0023] In an optional implementation manner, the radio frequency amplifier further includes at least one linear voltage stabilizing circuit, and the total number of circuits of the linear voltage stabilizing circuit is consistent with the total number of circuits of the second output matching circuit;

[0024] The voltage input terminal of each of the linear voltage regulator circuits is externally connected to the second bias voltage, and the voltage regulator output terminal of each of the linear voltage regulator circuits is individually connected to a voltage supply terminal of the second output matching circuit, so as to stably maintain the actual voltage value at the voltage supply terminal of the second output matching circuit, so that all power stage amplifier circuits evenly share the second bias voltage received by the first output matching circuit.

[0025] In an optional embodiment, the radio frequency amplifier further includes a plurality of adjustable feedback circuits;

[0026] All target amplifier circuits each include a signal input terminal and a signal output terminal with opposite polarities, each of which is connected with an adjustable feedback circuit, wherein the adjustable feedback circuit is used to balance the signal transmission impedance of the correspondingly connected signal input terminal and signal output terminal, and the target amplifier circuit is any one of a plurality of drive-stage amplifier circuits and a plurality of power-stage amplifier circuits.

[0027] In an optional implementation, the adjustable feedback circuit includes an inductor, an adjustable resistor and an adjustable capacitor, and the inductor, the adjustable resistor and the adjustable capacitor are connected in series.

[0028] In a second aspect, the present application provides a radio frequency transceiver module, which includes at least one radio frequency amplifier described in any one of the aforementioned embodiments, wherein each of the radio frequency amplifiers is used to perform power amplification processing on a received radio frequency signal.

[0029] In this case, the beneficial effects of the embodiments of the present application may include the following:

[0030] The present application divides an external RF signal to be amplified into multiple RF signals to be processed through a power distribution circuit, and transmits them one by one to the signal input ends of multiple input matching circuits, and makes the signal output end of each input matching circuit correspondingly connected to the signal input end of a driving stage amplifier circuit formed by stacking at least two stages of transistors, the signal output end of each driving stage amplifier circuit correspondingly connected to the signal input end of an inter-stage matching circuit, the signal output end of each inter-stage matching circuit correspondingly connected to the signal input end of a power stage amplifier circuit formed by stacking at least two stages of transistors, the signal output end of each power stage amplifier circuit correspondingly connected to the signal input end of an output matching circuit, and then makes the signal output end of each of the multiple output matching circuits The output ends are respectively connected to a signal input end of a power synthesis circuit, so that the power synthesis circuit outputs the target RF signal obtained by collaboratively amplifying multiple driving stage amplifier circuits and multiple power stage amplifier circuits through the signal output end. Therefore, through the organic combination of transistor stacking technology and power synthesis technology, each driving stage / power stage amplifier circuit can use a sufficiently large power supply voltage to ensure that the corresponding amplifier circuit has a considerable output voltage swing, significantly improving the overall output power of the RF amplifier, so that the constructed amplifier architecture can effectively adapt to transistors prepared by advanced silicon-based processes, ensuring that the corresponding RF amplifier has good power amplification efficiency and sufficiently large output power when using transistors prepared by advanced silicon-based processes.

[0031] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0033] Figure 1 A schematic diagram of the principle of a first radio frequency amplifier provided in an embodiment of the present application;

[0034] Figure 2 for Figure 1 The circuit diagram of the radio frequency amplifier shown;

[0035] Figure 3 A schematic diagram of the principle of a second radio frequency amplifier provided in an embodiment of the present application;

[0036] Figure 4 for Figure 3 The circuit diagram of the radio frequency amplifier shown;

[0037] Figure 5 A schematic diagram of the principle of a third radio frequency amplifier provided in an embodiment of the present application;

[0038] Figure 6 A schematic diagram of the principle of a fourth radio frequency amplifier provided in an embodiment of the present application;

[0039] Figure 7 A schematic diagram of the principle of a fifth radio frequency amplifier provided in an embodiment of the present application;

[0040] Figure 8 A schematic diagram of the principle of a sixth RF amplifier provided in an embodiment of the present application.

[0041] Icons: 10-RF amplifier; 21-power distribution circuit; 22-power synthesis circuit; 11-input matching circuit; 12-driving stage amplifier circuit; 13-inter-stage matching circuit; 14-power stage amplifier circuit; 15-output matching circuit; 16-linear voltage regulator circuit; 17-adjustable feedback circuit. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0043] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0044] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0045] In the description of the present application, it should be understood that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the product of the application is usually placed when in use, or the positions or positional relationships commonly understood by those skilled in the art, which are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0046] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0047] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0048] Please refer to Figure 1 and Figure 2 ,in Figure 1 is a schematic diagram of the principle of a first RF amplifier 10 provided in an embodiment of the present application, Figure 2 yes Figure 1 Circuit diagram of the RF amplifier 10 shown. In an embodiment of the present application, the RF amplifier 10 can have good power amplification efficiency and sufficiently large output power by organically combining transistor stacking technology and power synthesis technology in the case of transistors prepared by advanced silicon-based processes. Wherein, the RF amplifier 10 may include a power distribution circuit 21, a power synthesis circuit 22, a plurality of input matching circuits 11, a plurality of driver stage amplification circuits 12, a plurality of inter-stage matching circuits 13, a plurality of power stage amplification circuits 14 and a plurality of output matching circuits 15, wherein the actual number of circuits of the plurality of input matching circuits 11, a plurality of driver stage amplification circuits 12, a plurality of inter-stage matching circuits 13, a plurality of power stage amplification circuits 14 and a plurality of output matching circuits 15 included in the RF amplifier 10 is consistent, and at the same time, the total number of signal output terminals of the power distribution circuit 21 is consistent with the total number of input matching circuits, and the total number of signal input terminals of the power synthesis circuit 22 is consistent with the total number of output matching circuits.

[0049] In the embodiment of the present application, the signal input end of the power distribution circuit 21 serves as the RF signal input end of the RF amplifier 10 (ie Figure 1 The RFIN terminal in the power distribution circuit 21 receives the amplified RF signal through the RF signal input terminal, and the received RF signal to be amplified is divided into a plurality of RF signals to be processed by the power distribution circuit 21. The total number of the plurality of RF signals to be processed is consistent with the total number of the signal output terminals of the power distribution circuit 21; the actual signal phase, actual signal power and actual signal amplitude of the plurality of RF signals to be processed are consistent.

[0050] In the embodiment of the present application, the signal input ends of the multiple input matching circuits 11 are respectively connected to a signal output end of the power distribution circuit 21, so that the multiple input matching circuits 11 respectively and individually receive one of the RF signals to be processed transmitted by the power distribution circuit 21.

[0051] In the embodiment of the present application, the signal output end of each input matching circuit 11 is connected to a corresponding signal input end of a driver stage amplifier circuit 12, wherein each of the multiple driver stage amplifier circuits 12 is formed by stacking at least two stages of transistors, and the multiple driver stage amplifier circuits 12 are all driver stage differential amplifier circuits. At this time, each input matching circuit 11 can be implemented by any one of the matching networks such as a transformer matching network with a differential structure, a capacitor and an inductor matching network, etc. Each input matching circuit 11 may include two signal output ends, and each driver stage amplifier circuit 12 will correspond to two signal input ends with opposite polarities and two signal output ends with opposite polarities, and the two signal output ends of each input matching circuit 11 will be separately connected to a signal input end of the corresponding driver stage amplifier circuit 12, and at this time, each input matching circuit 11 will play a role in single-end to differential conversion, impedance matching and feeding, so as to effectively suppress the even harmonics of the RF amplifier 10 by using the differential structure characteristics and reduce distortion.

[0052] Optionally, in an implementation of this embodiment, the plurality of input matching circuits 11 are implemented by using a transformer matching network with a differential structure, and each of the input matching circuits 11 may include a first transformer (ie Figure 1The transformer X1 in the circuit is used as a transformer, one end of the primary coil of the first transformer is used as a signal input end of the corresponding input matching circuit 11 for receiving and processing the external RF signal, and the other end of the primary coil of the first transformer is grounded; the two ends of the secondary coil of the first transformer are respectively used as a signal output end of the corresponding input matching circuit 11, and are directly connected to a signal input end of the driver-stage amplifier circuit 12 to be connected, so as to transmit the differential signal converted from the received RF signal to be processed to the driver-stage amplifier circuit 12. Compared with the traditional inductor-capacitor matching network, the transformer matching network has the advantages of compact area, high matching network order, and easier to achieve bandwidth matching.

[0053] It is understandable that each of the input matching circuits 11 may include other auxiliary electronic components in addition to the first transformer, so as to further improve the output power of the RF amplifier 10 through the other auxiliary electronic components. For example, each of the input matching circuits 11 may also include two capacitors, one of which is connected in parallel with the primary coil of the corresponding first transformer, so that the capacitor cooperates with the primary coil of the first transformer to form an LC resonant network, and the other capacitor is connected in parallel with the secondary coil of the corresponding first transformer, so that the capacitor cooperates with the secondary coil of the first transformer to form another LC resonant network, so as to ensure that the equivalent impedance of the first transformer is maintained in a pure resistance state when resonance occurs, so as to avoid the output power of the RF amplifier 10 from being reduced due to the parasitic capacitance of the transistor when the operating frequency increases, thereby further improving the output power of the RF amplifier 10.

[0054] In the embodiment of the present application, the signal output end of each of the driving stage amplifier circuits 12 will be connected to a corresponding signal input end of an inter-stage matching circuit 13, wherein since each of the driving stage amplifier circuits 12 includes two signal output ends, multiple inter-stage matching circuits 13 will include two signal input ends, so that the two signal output ends of each of the driving stage amplifier circuits 12 are respectively connected to a signal input end of the corresponding inter-stage matching circuit 13, for transmitting the differential signal after amplification by the driving stage amplifier circuit 12 to the corresponding connected inter-stage matching circuit 13.

[0055] It can be understood that in order to ensure that each of the driving stage amplifier circuits 12 can form a driving stage differential amplifier circuit by stacking at least two stages of transistors, each of the driving stage amplifier circuits 12 can be designed to be implemented by at least two stages of transistors using a differential stacking structure, so that it can linearly increase the output voltage swing as the number of transistor stacks increases, ensuring that the isolation between the signal input end and the signal output end of the corresponding driving stage amplifier circuit 12 becomes better, thereby effectively improving the overall output power of the RF amplifier 10, which is conducive to improving linearity. Among them, the number of transistor stacks of each of the multiple driving stage amplifier circuits 12 can be the same, partially the same, or completely different. In one implementation of the present embodiment, the number of transistor stacks of each of the multiple driving stage amplifier circuits 12 remains consistent.

[0056] In one implementation of this embodiment, for a single driver-stage amplifier circuit 12, it may include a first-stage transistor connected to the input matching circuit 11, and at least one stage transistor cascaded with the first-stage transistor, wherein the first-stage transistor and each stage transistor in the at least one stage transistor may be composed of two N-type CMOS transistors, the sources of the two N-type CMOS transistors included in the first-stage transistor are connected to each other as the voltage discharge terminal of the driver-stage amplifier circuit 12, the gates of the two N-type CMOS transistors included in the first-stage transistor are respectively used as a signal input terminal of the driver-stage amplifier circuit 12, and the sources of the two N-type CMOS transistors included in each stage transistor in the at least one stage transistor are respectively connected to the drain of an N-type CMOS transistor included in the previous stage transistor, and at this time, the drains of the two N-type CMOS transistors included in the final stage transistor connected to the inter-stage matching circuit 13 in the at least one stage transistor are respectively used as a signal output terminal of the driver-stage amplifier circuit 12. Wherein, the gate bias voltage (i.e., the gate bias voltage matched with the first-stage transistor in the driver-stage amplifier circuit 12) may be externally connected at the central tap point of the secondary coil of the first transformer included in the corresponding input matching circuit 11. Figure 1 and Figure 2 ) to put the first stage transistor into an amplification state; at the same time, for each stage transistor of the at least one stage transistor included in the driving stage amplifier circuit 12, the gates of the two N-type CMOS transistors included in the stage transistor are respectively adjusted by the voltage swing adjustment circuit ( Figure 2 ) or at least one resonant network (not shown) is externally connected to a matching gate bias voltage (e.g., Figure 2 vg2 and vg3 shown in the figure) to put the transistor of this stage into the amplification state. Figure 2The voltage swing adjustment circuit shown may be composed of a kilo-ohm large resistor and a voltage-dividing capacitor, wherein one end of the kilo-ohm large resistor is electrically connected to one end of the voltage-dividing capacitor and the gate of an N-type CMOS transistor, and the other end of the kilo-ohm large resistor is externally connected to a gate bias voltage matched with the N-type CMOS transistor as a bias voltage terminal, and the other end of the voltage-dividing capacitor is directly grounded, wherein the kilo-ohm large resistor is used to prevent the radio frequency signal flowing through the N-type CMOS transistor from leaking to the bias voltage terminal, and the voltage-dividing capacitor is used to divide the gate-source voltage of the N-type CMOS transistor to adjust the gate voltage swing of the N-type CMOS transistor, thereby adjusting the signal amplification factor of the N-type CMOS transistor.

[0057] It can also be understood that in order to ensure that the multiple driver-stage amplifier circuits 12 each use their own adaptive and sufficiently large power supply voltage for normal power amplification processing, the voltage discharge end of each driver-stage amplifier circuit 12 can be grounded, and the voltage supply end of the inter-stage matching circuit 13 connected to the driver-stage amplifier circuit 12 can be externally connected to the first bias voltage adapted to the driver-stage amplifier circuit 12, so that the first bias voltage received by the inter-stage matching circuit 13 can provide sufficient operating power to the driver-stage amplifier circuit 12 through its own signal input end. At this time, the first bias voltage will be distributed to the transistors of each stage included in the driver-stage amplifier circuit 12 to support the transistors of each stage to achieve normal power amplification function. At this time, each driver-stage amplifier circuit 12 will have a considerable actual output voltage swing at the signal output end, which is conducive to significantly improving the overall output power of the RF amplifier 10.

[0058] In one implementation of this embodiment, the number of transistor stacks of each of the plurality of driver-stage amplifier circuits 12 is kept consistent, and the plurality of driver-stage amplifier circuits 12 adopt the same differential stacking structure design. At this time, the first bias voltages adapted by each of the plurality of driver-stage amplifier circuits 12 are kept consistent, and the voltage supply terminals of the inter-stage matching circuits 13 connected to the plurality of driver-stage amplifier circuits 12 are externally connected to the same first bias voltage (i.e. Figure 1 and Figure 2 VDD1 shown).

[0059] Please refer again Figure 1 and Figure 2In the embodiment of the present application, the signal output end of each inter-stage matching circuit 13 included in the RF amplifier 10 corresponds to the signal input end of a power stage amplifier circuit 14, wherein each of the multiple power stage amplifier circuits 14 is also formed by stacking at least two stages of transistors, and the multiple power stage amplifier circuits 14 are all power stage differential amplifier circuits. At this time, each of the inter-stage matching circuits 13 will correspond to two signal output ends, and each of the power stage amplifier circuits 14 will correspond to two signal input ends with opposite polarities and two signal output ends with opposite polarities, and the two signal output ends of each inter-stage matching circuit 13 will be separately connected to a signal input end of the corresponding power stage amplifier circuit 14, and at this time, each of the inter-stage matching circuits 13 will play the role of impedance matching and feeding. Among them, each of the inter-stage matching circuits 13 can be implemented by any one of the matching networks such as a transformer matching network with a differential structure, a capacitor and inductor matching network, etc., so as to effectively suppress the even harmonics of the RF amplifier 10 and reduce distortion by utilizing the differential structure characteristics.

[0060] Optionally, in an implementation of this embodiment, the plurality of inter-stage matching circuits 13 are all implemented by using a transformer matching network with a differential structure, and each of the inter-stage matching circuits 13 may include a second transformer (ie Figure 1 The transformer X2 in the figure), the two ends of the primary coil of the second transformer are respectively used as a signal input end of the corresponding inter-stage matching circuit 13, and the central tap point of the primary coil of the second transformer is used as the voltage supply end of the corresponding inter-stage matching circuit 13, so that the inter-stage matching circuit 13 can reuse the two signal input ends to apply a first bias voltage to the corresponding connected driving stage amplifier circuit 12; the two ends of the secondary coil of the second transformer are respectively used as a signal output end of the corresponding inter-stage matching circuit 13, and are directly connected to a signal input end of the power stage amplifier circuit 14 to be connected, so as to transmit the differential signal amplified by the aforementioned driving stage amplifier circuit 12 to the power stage amplifier circuit 14 connected to the inter-stage matching circuit 13.

[0061] It can be understood that, similar to the input matching circuit 11 described above, each of the inter-stage matching circuits 13 may also include other auxiliary electronic components in addition to the second transformer, so as to further improve the output power of the RF amplifier 10 through the other auxiliary electronic components. For example, each of the inter-stage matching circuits 13 may also include two capacitors, one of which is connected in parallel with the primary coil of the corresponding second transformer, so that the capacitor cooperates with the primary coil of the second transformer to form an LC resonant network, and the other capacitor is connected in parallel with the secondary coil of the corresponding second transformer, so that the capacitor cooperates with the secondary coil of the second transformer to form another LC resonant network, so as to ensure that the equivalent impedance of the second transformer is maintained in a pure resistance state when resonance occurs, so as to avoid the output power of the RF amplifier 10 from being reduced due to the parasitic capacitance of the transistor when the operating frequency increases, thereby further improving the output power of the RF amplifier 10.

[0062] In an embodiment of the present application, the signal output end of each of the power stage amplifier circuits 14 will be correspondingly connected to the signal input end of an output matching circuit 15, wherein since each of the power stage amplifier circuits 14 includes two signal output ends, multiple output matching circuits 15 will correspondingly include two signal input ends, so that the two signal output ends of each of the power stage amplifier circuits 14 are respectively connected to a signal input end of the corresponding output matching circuit 15, for transmitting the differential signal after amplification by the power stage amplifier circuit 14 to the corresponding connected output matching circuit 15.

[0063] It can be understood that, similar to the driving stage amplifier circuit 12 described above, in order to ensure that each of the power stage amplifier circuits 14 can form a driving stage differential amplifier circuit by stacking at least two stages of transistors, each of the power stage amplifier circuits 14 can also be designed to be implemented by at least two stages of transistors using a differential stacking structure. Among them, the number of transistor stacks of each of the multiple power stage amplifier circuits 14 can be exactly the same, partially the same, or completely different; the number of transistor stacks of each of the multiple power stage amplifier circuits 14 can be exactly the same, partially the same, or completely different from the number of transistor stacks of each of the multiple driving stage amplifier circuits 12. In one implementation of the present embodiment, the number of transistor stacks of each of the multiple driving stage amplifier circuits 12 and the multiple power stage amplifier circuits 14 remain consistent, for example Figure 2 The multiple driving stage amplifier circuits 12 and the multiple power stage amplifier circuits 14 shown in the figure all adopt three-stage transistor stacks, and the multiple driving stage amplifier circuits 12 and the multiple power stage amplifier circuits 14 have the same number of transistor stacks.

[0064] In one implementation of this embodiment, for a single power stage amplifier circuit 14, it may include a first stage transistor connected to the interstage matching circuit 13, and at least one stage transistor cascaded with the first stage transistor, wherein the first stage transistor and each stage transistor in the at least one stage transistor may be composed of two N-type CMOS transistors, the sources of the two N-type CMOS transistors included in the first stage transistor are connected to each other as the voltage discharge end of the power stage amplifier circuit 14, the gates of the two N-type CMOS transistors included in the first stage transistor are respectively used as a signal input end of the power stage amplifier circuit 14, and the sources of the two N-type CMOS transistors included in each stage transistor in the at least one stage transistor are respectively connected to the drain of an N-type CMOS transistor included in the previous stage transistor, and at this time, the drains of the two N-type CMOS transistors included in the final stage transistor connected to the output matching circuit 15 in the at least one stage transistor are respectively used as a signal output end of the power stage amplifier circuit 14. Wherein, the gate bias voltage (i.e., the gate bias voltage matched with the first stage transistor in the power stage amplifier circuit 14) can be externally connected at the central tap point of the secondary coil of the second transformer included in the corresponding interstage matching circuit 13. Figure 1 and Figure 2 VG2 shown in the figure) to put the first stage transistor into the amplification state; at the same time, for each stage transistor of the at least one stage transistor included in the power stage amplifier circuit 14, the gates of the two N-type CMOS transistors included in the stage transistor are respectively adjusted by the voltage swing adjustment circuit ( Figure 2 ) or at least one resonant network (not shown) is externally connected to a matching gate bias voltage (e.g., Figure 2 vg4 and vg5) shown in the figure to put the transistors of this stage into the amplification state.

[0065] It can also be understood that in order to ensure that the multiple power stage amplifier circuits 14 each use their own adaptive and sufficiently large power supply voltage for normal power amplification processing, the voltage discharge end of each power stage amplifier circuit 14 can be grounded, and the voltage supply end of the output matching circuit 15 connected to the power stage amplifier circuit 14 can be externally connected to the target bias voltage adapted to the power stage amplifier circuit 14, so that the target bias voltage received by the output matching circuit 15 can provide sufficient operating power to the power stage amplifier circuit 14 through its own signal input end. At this time, the target bias voltage will be distributed to the transistors of each level included in the power stage amplifier circuit 14 to support the transistors of each level to achieve normal power amplification function. At this time, each power stage amplifier circuit 14 will have a considerable actual output voltage swing at the signal output end, which is conducive to significantly improving the overall output power of the RF amplifier 10.

[0066] In one implementation of this embodiment, the number of transistor stacks of each of the multiple power stage amplifier circuits 14 is consistent, and the multiple power stage amplifier circuits 14 adopt the same differential stacking structure design. At this time, the target bias voltages adapted by each of the multiple power stage amplifier circuits 14 are consistent, and the voltage supply terminals of the output matching circuits 15 connected to each of the multiple power stage amplifier circuits 14 are externally connected to the same target bias voltage (i.e. Figure 1 and Figure 2 VDD2 as shown).

[0067] In the embodiment of the present application, each of the plurality of output matching circuits 15 includes a signal output terminal, and the signal output terminal of each of the plurality of output matching circuits 15 is used to output the RF signal to be synthesized that matches the received differential signal. At this time, the RF signal to be synthesized output by each of the output matching circuits 15 is obtained by collaboratively amplifying one of the RF signals to be processed through a driver stage amplifier circuit 12 and a power stage amplifier circuit 14; the signal output terminals of each of the plurality of output matching circuits 15 are respectively connected to a signal input terminal of the power synthesis circuit 22, so that the signal output terminal of the power synthesis circuit 22 serves as the RF signal output terminal of the RF amplifier 10 (i.e. Figure 1 ) to output the target RF signal to the outside through the RF signal output terminal. At this time, the target RF signal is obtained by the power synthesis circuit 22 synthesizing all the received RF signals to be synthesized, that is, the target RF signal is actually obtained by the RF signal to be amplified through multiple driving stage amplifier circuits 12 and multiple power stage amplifier circuits 14. Each of the output matching circuits 15 will play the role of differential to single-ended conversion, impedance matching and feeding; each of the output matching circuits 15 can be implemented by any one of the matching networks such as a transformer matching network with a differential structure, a capacitor and inductor matching network, etc., so as to effectively suppress the even harmonics of the RF amplifier 10 and reduce distortion by using the differential structure characteristics.

[0068] Optionally, in an implementation of this embodiment, the plurality of output matching circuits 15 are implemented by using a transformer matching network with a differential structure, and each of the output matching circuits 15 may include a third transformer (i.e. Figure 1The transformer X3 in the figure), the two ends of the primary coil of the third transformer are respectively used as a signal input end of the corresponding output matching circuit 15, and the central tap point of the primary coil of the third transformer is used as the voltage supply end of the corresponding output matching circuit 15, so that the output matching circuit 15 can reuse the two signal input ends to apply the target bias voltage to the corresponding connected power stage amplifier circuit 14; one end of the secondary coil of the third transformer is used as the signal output end of the corresponding output matching circuit 15, for outputting the RF signal to be synthesized that matches the received differential signal, wherein the other end of the secondary coil of the third transformer is grounded.

[0069] It is understandable that, similar to the input matching circuit 11 described above, each of the output matching circuits 15 may also include other auxiliary electronic components in addition to the third transformer, so as to further improve the output power of the RF amplifier 10 through the other auxiliary electronic components. For example, each of the output matching circuits 15 may also include two capacitors, one of which is connected in parallel with the primary coil of the corresponding third transformer, so that the capacitor cooperates with the primary coil of the third transformer to form an LC resonant network, and the other capacitor is connected in parallel with the secondary coil of the corresponding third transformer, so that the capacitor cooperates with the secondary coil of the third transformer to form another LC resonant network, so as to ensure that the equivalent impedance of the third transformer is maintained in a pure resistance state when resonance occurs, so as to avoid the output power of the RF amplifier 10 from being reduced due to the parasitic capacitance of the transistor when the operating frequency increases, thereby further improving the output power of the RF amplifier 10.

[0070] Therefore, the present application can ensure that the amplifier architecture of the RF amplifier 10 recorded above can be effectively adapted to transistors prepared by advanced silicon-based processes through the organic combination of transistor stacking technology and power synthesis technology, so that each driver-stage amplifier circuit 12 and each power-stage amplifier circuit 14 included in the corresponding RF amplifier 10 can use a sufficiently large power supply voltage when implemented using advanced silicon-based process transistors, and output a considerable output voltage swing, thereby significantly improving the overall output power of the RF amplifier 10 and improving the power amplification efficiency of the RF amplifier 10.

[0071] In addition, for the RF amplifier 10 provided in the present application, in order to avoid problems such as RF signal phase imbalance and circuit asymmetry in the actual use of the RF amplifier 10, the total number of signal output terminals of the power distribution circuit 21 and the total number of signal input terminals of the power synthesis circuit 22 included in the RF amplifier 10 are positive integer powers of 2. In one implementation of this embodiment, the total number of signal output terminals of the power distribution circuit 21 and the total number of signal input terminals of the power synthesis circuit 22 are both 2.

[0072] Optionally, please refer to Figure 3 and Figure 4 ,in Figure 3 is a schematic diagram of the principle of a second RF amplifier 10 provided in an embodiment of the present application, Figure 4 yes Figure 3 The circuit diagram of the RF amplifier 10 shown in FIG. Figure 1 The local power amplification efficiency of the RF amplifier 10 shown in the figure at the power stage amplification circuit 14 is Figure 3 The second RF amplifier 10 shown is Figure 1 The difference between the first RF amplifier 10 shown is that: Figure 3 The multiple power stage amplifying circuits 14 in the second RF amplifier 10 shown are stacked on each other and current multiplexing is implemented to effectively improve the local power amplification efficiency of the RF amplifier 10 at the power stage amplifying circuit 14 .

[0073] In this embodiment, Figure 3 The plurality of output matching circuits 15 in the second RF amplifier 10 shown in the figure can be divided into a first output matching circuit and at least one second output matching circuit. Figure 3 The plurality of power stage amplifier circuits 14 in the second RF amplifier 10 shown in the figure can be divided into a first power stage amplifier circuit and at least one second power stage amplifier circuit, wherein the voltage supply end of the first output matching circuit is externally connected to a second bias voltage (i.e. Figure 3 The actual power stage amplifier circuit 14 connected to the signal input terminal of the first output matching circuit belongs to the second power stage amplifier circuit, and the actual output matching circuit 15 connected to the signal output terminal of the first power stage amplifier circuit belongs to the second output matching circuit. Figure 3 The voltage supply end of each second output matching circuit is connected to a voltage discharge end of a second power stage amplifier circuit separately, so that Figure 3 The multiple power stage amplifier circuits 14 shown are stacked on each other and can operate normally with current multiplexing under the power supply of the second bias voltage. At this time, the second bias voltage is the sum of the target bias voltages corresponding to each of the multiple power stage amplifier circuits 14. All the second power stage amplifier circuits except the first power stage amplifier circuit in the multiple power stage amplifier circuits 14 can have an output voltage swing greater than the corresponding target bias voltage at the signal output end, so as to effectively improve the local power amplification efficiency of the RF amplifier 10 at the power stage amplifier circuit 14.

[0074] Therefore, this application can be Figure 3 and Figure 4The stacking method of multiple power stage amplifier circuits shown in the figure realizes the amplifier circuit stacking effect between the multiple power stage amplifier circuits 14, and at the same time ensures that the multiple power stage amplifier circuits 14 can realize the power amplification function by current multiplexing, thereby effectively improving the local power amplification efficiency of the RF amplifier 10 at the power stage amplifier circuit 14. Among them, Figure 3 The specific composition of each output matching circuit 15 is similar to that described above. Figure 1 The output matching circuit composition remains consistent as recorded, and will not be described in detail here.

[0075] Optionally, see Figure 5 , Figure 5 Schematic diagram of the principle of the third RF amplifier 10 provided in the embodiment of the present application. Figure 3 Compared with the second RF amplifier 10 shown, Figure 5 The third RF amplifier 10 shown may further include at least one linear voltage regulator circuit 16 , and the total number of circuits of the linear voltage regulator circuit 16 is consistent with the total number of circuits of the second output matching circuit.

[0076] The voltage input terminal of each linear voltage regulator circuit 16 is externally connected to the second bias voltage (i.e. Figure 5 VDD3 in the figure), the voltage stabilization output terminal of each of the linear voltage stabilization circuits 16 is separately connected to a voltage supply terminal of the second output matching circuit, so as to stably maintain the actual voltage value of the correspondingly connected second output matching circuit at the voltage supply terminal in the state of "each of the multiple power stage amplifying circuits 14 divides the second bias voltage received from the first output matching circuit according to its own adapted target bias voltage".

[0077] It can be understood that when the number of transistor stacks of the multiple power stage amplifier circuits 14 is consistent, and the multiple power stage amplifier circuits 14 adopt the same differential stacking structure design, the target bias voltages adapted by the multiple power stage amplifier circuits 14 are consistent. Figure 5 Each of the linear voltage regulator circuits 16 shown is used to stably maintain the actual voltage value of the correspondingly connected second output matching circuit at the voltage supply end in the state of "multiple power stage amplification circuits 14 equally divide the second bias voltage received by the first output matching circuit", thereby effectively avoiding the problem of uneven transistor voltage distribution caused by errors in transistor stacking technology, so as to further improve the circuit robustness of the RF amplifier 10.

[0078] In one implementation of this embodiment, Figure 5The number of circuits of the input matching circuit 11, the driving stage amplifying circuit 12, the inter-stage matching circuit 13, the power stage amplifying circuit 14 and the output matching circuit 15 included in the RF amplifier 10 shown may be only two. Figure 5 The power distribution circuit 21 included in the RF amplifier 10 shown has two signal output terminals. Figure 5 The power synthesis circuit 22 included in the RF amplifier 10 shown has two signal input terminals. At the same time, the two power stage amplifier circuits 14 and the two driver stage amplifier circuits 12 are stacked by three-stage transistors through the same differential stacking structure design. Figure 5 The RF amplifier 10 shown includes only one linear voltage regulator circuit 16, and the target bias voltages corresponding to the two power stage amplifier circuits 14 and the first bias voltages corresponding to the two driver stage amplifier circuits 12 are kept consistent. Figure 5 The second bias voltage shown is twice the target bias voltage (or the first bias voltage). At this time, the voltage discharge end of the second power stage amplifier circuit in the two power stage amplifier circuits 14 and the voltage supply ends of the two inter-stage matching circuits 13 can be simultaneously connected to the voltage stabilization output end of the linear voltage stabilization circuit 16, and the linear voltage stabilization circuit 16 directly outputs half of the second bias voltage to the outside through the voltage stabilization output end, thereby effectively reducing the circuit complexity of the RF amplifier 10.

[0079] Optionally, please refer to Figure 1 and Figure 6 ,in Figure 6 is a schematic diagram of the principle of the fourth RF amplifier 10 provided in the embodiment of the present application. Figure 1 Compared with the first RF amplifier 10 shown, Figure 6 The fourth RF amplifier 10 shown may further include a plurality of adjustable feedback circuits 17 .

[0080] In this embodiment, Figure 6Each of the multiple driving-stage amplifier circuits 12 and the multiple power-stage amplifier circuits 14 in the fourth type of RF amplifier 10 shown can be used as a target amplifier circuit, and an adjustable feedback circuit 17 is electrically connected between a group of signal input terminals and signal output terminals of opposite polarities of each target amplifier circuit, so that the adjustable feedback circuit 17 can form a negative feedback network structure between the signal input terminals and signal output terminals of opposite polarities, so that the signal transmission impedances of the correspondingly connected signal input terminals and signal output terminals can be balanced through the negative feedback network structure, so that the output impedance of the corresponding target amplifier circuit at the signal output terminal can separate part of the real impedance and transfer it to the input impedance at the signal input terminal, thereby effectively improving the high output impedance problem caused by transistor stacking technology and achieving the ultra-wideband matching effect of the target amplifier circuit. At the same time, the negative feedback network structure can ensure the standing wave convergence of the target amplifier circuit within the working bandwidth, optimize the gain flatness, and enhance the circuit stability of the RF amplifier 10.

[0081] In this embodiment, the adjustable feedback circuit 17 may be composed of an inductor, an adjustable resistor and an adjustable capacitor connected in series, wherein the adjustable resistor and the adjustable capacitor may be used to enhance the circuit adjustability of the RF amplifier 10 and improve the output power of the RF amplifier 10 .

[0082] Optionally, see Figure 3 and Figure 7 , Figure 7 is a schematic diagram of the principle of the fifth RF amplifier 10 provided in the embodiment of the present application. Figure 3 Compared with the second RF amplifier 10 shown, Figure 7 The fifth RF amplifier 10 shown may further include a plurality of adjustable feedback circuits 17 .

[0083] In this embodiment, Figure 7Each of the multiple driving-stage amplifier circuits 12 and the multiple power-stage amplifier circuits 14 in the fifth type of RF amplifier 10 shown can also be used as a target amplifier circuit, and an adjustable feedback circuit 17 is electrically connected between a group of signal input terminals and signal output terminals of opposite polarities of each target amplifier circuit, so that the adjustable feedback circuit 17 can form a negative feedback network structure between the signal input terminals and signal output terminals of opposite polarities, so that the signal transmission impedances of the correspondingly connected signal input terminals and signal output terminals can be balanced through the negative feedback network structure, so that the output impedance of the corresponding target amplifier circuit at the signal output terminal can separate part of the real impedance and transfer it to the input impedance at the signal input terminal, thereby effectively improving the high output impedance problem caused by transistor stacking technology and achieving the ultra-wideband matching effect of the target amplifier circuit. At the same time, the negative feedback network structure can ensure the standing wave convergence of the target amplifier circuit within the working bandwidth, optimize the gain flatness, and enhance the circuit stability of the RF amplifier 10.

[0084] Optionally, please refer to Figure 5 and Figure 8 ,in Figure 8 is a schematic diagram of the principle of the sixth RF amplifier 10 provided in the embodiment of the present application. Figure 5 Compared with the third RF amplifier 10 shown, Figure 8 The sixth RF amplifier 10 shown may further include a plurality of adjustable feedback circuits 17 .

[0085] In this embodiment, Figure 8 Each of the multiple driving-stage amplifier circuits 12 and the multiple power-stage amplifier circuits 14 in the sixth type of RF amplifier 10 shown can also be used as a target amplifier circuit, and an adjustable feedback circuit 17 is electrically connected between a group of signal input terminals and signal output terminals of opposite polarities of each target amplifier circuit, so that the adjustable feedback circuit 17 can form a negative feedback network structure between the signal input terminals and signal output terminals of opposite polarities, so that the signal transmission impedances of the correspondingly connected signal input terminals and signal output terminals can be balanced through the negative feedback network structure, so that the output impedance of the corresponding target amplifier circuit at the signal output terminal can separate part of the real impedance and transfer it to the input impedance at the signal input terminal, thereby effectively improving the high output impedance problem caused by transistor stacking technology and achieving the ultra-wideband matching effect of the target amplifier circuit. At the same time, the negative feedback network structure can ensure the standing wave convergence of the target amplifier circuit within the working bandwidth, optimize the gain flatness, and enhance the circuit stability of the RF amplifier 10.

[0086] In the present application, an embodiment of the present application also provides a radio frequency transceiver module, which includes at least one radio frequency amplifier 10, and the amplifier type of each of the at least one radio frequency amplifier 10 is any one of the above-mentioned six types of radio frequency amplifiers 10. The radio frequency transceiver module drives each of the radio frequency amplifiers 10 to perform power amplification processing on the radio frequency signal received by itself.

[0087] The above are only various implementations of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A radio frequency amplifier, characterized in that: The radio frequency amplifier comprises a power distribution circuit, a power synthesis circuit, a plurality of input matching circuits, a plurality of driver stage amplification circuits, a plurality of inter-stage matching circuits, a plurality of power stage amplification circuits and a plurality of output matching circuits, wherein the plurality of driver stage amplification circuits and the plurality of power stage amplification circuits are formed by stacking at least two stages of transistors; The signal input end of the power distribution circuit receives and amplifies the radio frequency signal, and the signal input ends of the multiple input matching circuits are respectively connected to a signal output end of the power distribution circuit, wherein the power distribution circuit is used to divide the radio frequency signal to be amplified into multiple radio frequency signals to be processed; The signal output end of each input matching circuit is connected to the signal input end of a driving stage amplifier circuit, the signal output end of each driving stage amplifier circuit is connected to the signal input end of an inter-stage matching circuit, the signal output end of each inter-stage matching circuit is connected to the signal input end of a power stage amplifier circuit, and the signal output end of each power stage amplifier circuit is connected to the signal input end of an output matching circuit; The signal output ends of the multiple output matching circuits are respectively connected to a signal input end of the power synthesis circuit, so that the power synthesis circuit outputs the target radio frequency signal through the signal output end, wherein the target radio frequency signal is synthesized by a plurality of radio frequency signals to be processed after being collaboratively amplified by a driving stage amplifier circuit and a power stage amplifier circuit.

2. The radio frequency amplifier according to claim 1, characterized in that: The plurality of driving stage amplifier circuits are all driving stage differential amplifier circuits, and each input matching circuit includes a first transformer; One end of the primary coil of the first transformer serves as a signal input end of a corresponding input matching circuit, and the other end of the primary coil of the first transformer is grounded; The two ends of the secondary coil of the first transformer respectively serve as a signal output end of the corresponding input matching circuit, and are used to transmit a differential signal converted from the received radio frequency signal to be processed to the driving stage amplifier circuit connected to the input matching circuit.

3. The radio frequency amplifier according to claim 1, characterized in that: The voltage supply terminals of the plurality of inter-stage matching circuits are respectively connected to a first bias voltage, and the voltage discharge terminal of each driving stage amplifier circuit is grounded, wherein each inter-stage matching circuit drives the corresponding driving stage amplifier circuit to operate through the first bias voltage.

4. The radio frequency amplifier according to claim 3, characterized in that: The plurality of driving stage amplifier circuits are all driving stage differential amplifier circuits, the plurality of power stage amplifier circuits are all power stage differential amplifier circuits, and each inter-stage matching circuit includes a second transformer; The two ends of the primary coil of the second transformer are respectively used as a signal input end of the corresponding inter-stage matching circuit, and the central tap point of the primary coil of the second transformer is used as a voltage supply end of the corresponding inter-stage matching circuit; The two ends of the secondary coil of the second transformer serve as a signal output end of the corresponding inter-stage matching circuit, respectively, for transmitting the differential signal amplified by the driving stage amplifier circuit connected to the inter-stage matching circuit to the power stage amplifier circuit connected to the inter-stage matching circuit.

5. The radio frequency amplifier according to any one of claims 1 to 4, characterized in that: The multiple output matching circuits include a first output matching circuit and at least one second output matching circuit, and the multiple power stage amplifying circuits include a first power stage amplifying circuit and at least one second power stage amplifying circuit, wherein the signal input end of the first output matching circuit is correspondingly connected to a signal output end of the second power stage amplifying circuit; The voltage supply end of the first output matching circuit is externally connected to a second bias voltage, the voltage discharge end of the first power stage amplifier circuit is grounded, and the voltage supply end of each of the second output matching circuits is individually connected to a voltage discharge end of the second power stage amplifier circuit, wherein the second bias voltage is used to drive the first power stage amplifier circuit and all the second power stage amplifier circuits to operate.

6. The radio frequency amplifier according to claim 5, characterized in that: The multiple power stage amplifier circuits are all power stage differential amplifier circuits, and each output matching circuit includes a third transformer; The two ends of the primary coil of the third transformer are respectively used as a signal input end of the corresponding output matching circuit, for receiving the differential signal amplified by the power stage amplifier circuit connected to the corresponding output matching circuit; The center tap point of the primary coil of the third transformer serves as a voltage supply terminal of the corresponding output matching circuit; One end of the secondary coil of the third transformer serves as the signal output end of the corresponding output matching circuit, and is used to output the RF signal to be synthesized that matches the received differential signal, wherein the other end of the secondary coil of the third transformer is grounded, and the target RF signal is synthesized by the RF signals to be synthesized output by all the output matching circuits.

7. The radio frequency amplifier according to claim 5, characterized in that: The radio frequency amplifier further comprises at least one linear voltage stabilizing circuit, and the total number of circuits of the linear voltage stabilizing circuit is consistent with the total number of circuits of the second output matching circuit; The voltage input terminal of each of the linear voltage regulator circuits is externally connected to the second bias voltage, and the voltage regulator output terminal of each of the linear voltage regulator circuits is individually connected to a voltage supply terminal of the second output matching circuit, so as to stably maintain the actual voltage value at the voltage supply terminal of the second output matching circuit, so that all power stage amplifier circuits evenly share the second bias voltage received by the first output matching circuit.

8. The radio frequency amplifier according to claim 1, characterized in that: The radio frequency amplifier also includes a plurality of adjustable feedback circuits; All target amplifier circuits each include a signal input terminal and a signal output terminal with opposite polarities, each of which is connected with an adjustable feedback circuit, wherein the adjustable feedback circuit is used to balance the signal transmission impedance of the correspondingly connected signal input terminal and signal output terminal, and the target amplifier circuit is any one of a plurality of drive-stage amplifier circuits and a plurality of power-stage amplifier circuits.

9. The radio frequency amplifier according to claim 8, characterized in that: The adjustable feedback circuit includes an inductor, an adjustable resistor and an adjustable capacitor, and the inductor, the adjustable resistor and the adjustable capacitor are connected in series.

10. A radio frequency transceiver module, characterized in that: The radio frequency transceiver module comprises at least one radio frequency amplifier according to any one of claims 1 to 9, wherein each of the radio frequency amplifiers is used to perform power amplification processing on a received radio frequency signal.

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