Power device packaging circuit board structure
By integrating the frequency chip, control circuit and driving circuit into one PCB, and achieving the shortest power path through stacking structure and traces, the problem of high parasitic inductance of traditional motor controllers is solved, achieving more efficient performance and smaller volume.
Patent Information
- Application Number
- CN202323477309.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-20
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2033-12-20
AI Technical Summary
Due to the high parasitic inductance and large switching losses of traditional motor controllers, the power modules of traditional motor controllers have large volume and mass, and the complex back-end process, making it difficult to meet the consumption requirements and performance improvements of new energy vehicles.
Design a power device package circuit board structure, integrate frequency chip, control circuit, drive circuit and busbar into a PCB, and achieve the shortest power path through layered structure and traces, reduce parasitic inductance, and pass through blind holes and Thick copper layer achieves conduction and heat dissipation.
Reduces parasitic inductance, simplifies subsequent SMT and assembly processes, achieves the shortest power path, improves product performance, and reduces volume and mass.
Smart Images
Figure CN222483378U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power device packaging, in particular to a power device packaging circuit board structure. Background Art
[0002] With the development and popularization of new energy vehicles, the importance of motor controllers as the core components of electric drive continues to increase. With the increasing number of new energy vehicles, traditional motor controller design ideas can no longer meet the increasing demand for usage, and performance is gradually encountering bottlenecks. With the continuous development of third-generation semiconductors SiC and GaN, the trend of miniaturization of motor controllers is becoming increasingly obvious.
[0003] The power module of a traditional motor controller is based on welding the power chip onto a ceramic substrate, conducting the circuit through bonding lines, and then redesigning the circuit board for drive and control functions. The circuit board and the power module are connected with a connector to realize their functions. This approach results in high parasitic inductance, large switching losses, large size and mass of the controller, and complex back-end processes. Utility Model Content
[0004] The purpose of the utility model is to solve at least one of the technical problems existing in the prior art, and to provide a power device packaging circuit board structure, which can integrate a power chip, a control circuit, a drive circuit, and a busbar into a PCB, thereby reducing parasitic inductance and simplifying subsequent SMT and assembly processes.
[0005] The utility model also provides a circuit board structure with the power device package, comprising: a first packaging layer, a second packaging layer, a third packaging layer, a fourth packaging layer, a fifth packaging layer, and a sixth packaging layer, wherein a carrier unit is disposed between the third packaging layer and the fourth packaging layer, and a busbar can be selectively disposed on the right side of the carrier unit;
[0006] The carrier unit includes a copper substrate, a high thermal conductivity insulation layer is fixedly connected to the upper surface of the copper substrate, a concave copper substrate is fixedly connected to the upper surface of the high thermal conductivity insulation layer, a surface of the concave copper substrate is provided with a groove, and the inner bottom of the groove is fixedly connected to a power chip through a connecting layer.
[0007] According to the power device packaging circuit board structure described in the utility model, the gaps between the first packaging layer, the second packaging layer, the third packaging layer, the fourth packaging layer, the fifth packaging layer, and the sixth packaging layer are provided with insulating materials, and the insulating materials are materials such as epoxy resin and glass fiber cloth, so that the entire PCB is sealed.
[0008] According to the power device packaging circuit board structure described in the utility model, the first packaging layer and the second packaging layer, the second packaging layer and the third packaging layer, the fourth packaging layer and the fifth packaging layer, and the fifth packaging layer and the sixth packaging layer are all connected through blind holes to achieve the functions of conduction and heat transfer.
[0009] According to the power device packaging circuit board structure described in the utility model, the power chip can be Si MOSFET, SiC MOSFET, GaN MOSFET, IGBT, the connecting layer is silver sintering, welding or diffusion welding, and the high thermal conductivity insulation layer is high thermal conductivity PP, ceramic, polyimide, and insulating paper.
[0010] Beneficial Effects
[0011] 1. The utility model can integrate the power chip, control circuit, drive circuit and busbar into one PCB, thereby reducing the parasitic inductance and simplifying the subsequent SMT and assembly process.
[0012] 2. This invention uses a new type of PCB to realize the stacking interconnection with the power chip through the stacking structure and routing of the PCB, realizes the shortest power path, reduces the parasitic inductance of the power loop to below 2nH, and improves the product performance.
[0013] 3. The utility model no longer needs wire bonding to achieve conduction. Instead, copper-plated blind holes and thick copper layers of the second and fifth packaging layers are used for current conduction. The heat emitted by the power chip during operation passes through the carrier unit and then dissipates into the heat sink through the copper-plated blind holes below. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The utility model is further described below in conjunction with the accompanying drawings and embodiments;
[0015] Figure 1 This is an overall structural diagram of an embodiment of the utility model;
[0016] Figure 2 This is a structural diagram of a carrier unit according to an embodiment of the present utility model.
[0017] Legend:
[0018] 1. First packaging layer; 2. Second packaging layer; 3. Third packaging layer; 4. Fourth packaging layer; 5. Fifth packaging layer; 6. Sixth packaging layer; 7. Carrier unit; 8. Busbar; 9. Insulation material; 10. Blind hole;
[0019] 71. Copper substrate; 72. High thermal conductivity insulation layer; 73. Concave copper substrate; 74. Groove; 75. Connection layer; 76. Power chip. DETAILED DESCRIPTION
[0020] This section will describe in detail the specific embodiments of the utility model. The preferred embodiments of the utility model are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the utility model, but it cannot be understood as a limitation on the protection scope of the utility model.
[0021] Reference Figure 1-2 , the power device packaging circuit board structure of the utility model embodiment comprises: a first packaging layer 1, a second packaging layer 2, a third packaging layer 3, a fourth packaging layer 4, a fifth packaging layer 5, and a sixth packaging layer 6, the gaps between the first packaging layer 1, the second packaging layer 2, the third packaging layer 3, the fourth packaging layer 4, the fifth packaging layer 5, and the sixth packaging layer 6 are provided with an insulating material 9, the first packaging layer 1, the second packaging layer 2, the third packaging layer 3, the fourth packaging layer 4, the fifth packaging layer 5, and the sixth packaging layer 6 form a circuit board, a carrier unit 7 is provided between the third packaging layer 3 and the fourth packaging layer 4 to realize the function, and a busbar 8 can be optionally provided on the right side of the carrier unit 7, the first packaging layer 1 and the second packaging layer 2, the second packaging layer 2 and the third packaging layer 3, the fourth packaging layer 4 and the fifth packaging layer 5, and the fifth packaging layer 5 and the sixth packaging layer 6 are all connected through a blind hole 10, so as to realize the purpose of conduction and heat dissipation, and the inner wall of the blind hole 10 is fully plated with copper;
[0022] Through the above device, the power chip, control circuit, drive circuit and busbar are integrated on a PCB.
[0023] The carrier unit 7 includes a copper substrate 71, a high thermal conductivity insulation layer 72 is fixedly connected to the upper surface of the copper substrate 71, a concave copper substrate 73 is fixedly connected to the upper surface of the high thermal conductivity insulation layer 72, a groove 74 is provided on the surface of the concave copper substrate 73, and a power chip 76 is fixedly connected to the inner bottom of the groove 74 via a connecting layer 75.
[0024] The power chip 76 is Si MOSFET, SiC MOSFET, GaN MOSFET, IGBT, the connection layer 75 is silver sintering, welding or diffusion welding, and the high thermal conductivity insulation layer 72 is high thermal conductivity PP, ceramic, polyimide, insulation paper.
[0025] Working principle: When in use, the heat dissipated by the power chip 76 during operation passes through the concave copper base 73, the high thermal conductivity insulation layer 72, the copper base 71, and then dissipates into the heat sink through the blind hole 10 plated with copper below, thereby conducting the heat out.
[0026] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the relevant technical field without departing from the purpose of the present invention.
Claims
1. A power device packaging circuit board structure, characterized in that: include: A first encapsulation layer (1), a second encapsulation layer (2), a third encapsulation layer (3), a fourth encapsulation layer (4), a fifth encapsulation layer (5), and a sixth encapsulation layer (6), wherein a carrier unit (7) is arranged between the third encapsulation layer (3) and the fourth encapsulation layer (4), and a busbar (8) is arranged on the right side of the carrier unit (7); The carrier unit (7) comprises a copper substrate (71), a high thermal conductivity insulating layer (72) being fixedly connected to the upper surface of the copper substrate (71), a concave copper substrate (73) being fixedly connected to the upper surface of the high thermal conductivity insulating layer (72), a groove (74) being provided on the surface of the concave copper substrate (73), and a power chip (76) being fixedly connected to the inner bottom of the groove (74) via a connecting layer (75).
2. The power device packaging circuit board structure according to claim 1, characterized in that: Insulating material (9) is provided at the gaps between the first encapsulation layer (1), the second encapsulation layer (2), the third encapsulation layer (3), the fourth encapsulation layer (4), the fifth encapsulation layer (5) and the sixth encapsulation layer (6).
3. The power device packaging circuit board structure according to claim 1, characterized in that: The first encapsulation layer (1) and the second encapsulation layer (2), the second encapsulation layer (2) and the third encapsulation layer (3), the fourth encapsulation layer (4) and the fifth encapsulation layer (5), and the fifth encapsulation layer (5) and the sixth encapsulation layer (6) are all electrically connected via blind holes (10).
4. The power device packaging circuit board structure according to claim 1, characterized in that: The power chip (76) is a SiC MOSFET, the connection layer (75) is silver sintering, and the high thermal conductivity insulation layer (72) is high thermal conductivity PP.