Diode packaging structure and PCB

Abstract

The utility model discloses a diode packaging structure and a PCB, relates to the technical field of diode packaging, and is used for solving the technical problem of poor reliability of a diode packaging structure in the prior art. The packaging structure comprises a lead frame, a chip, a clamping mechanism and a plastic packaging layer. A placement groove is formed in the lead frame, the chip is installed in the placement groove, at least part of the clamping mechanism is installed in the lead frame, the clamping mechanism is used for clamping the chip, and at least part of the lead frame, at least part of the chip and at least part of the clamping mechanism are wrapped by the plastic packaging layer. According to the packaging structure, the chip is installed in the placing groove, the chip is clamped through the clamping mechanism, and the lead frame, the chip and the clamping mechanism can be plastically packaged into a whole through the plastic packaging layer, so that the stability of the packaging structure can be improved, and finally the reliability of the packaging structure can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of diode packaging, and in particular to a diode packaging structure and a PCB board. Background Art

[0002] A diode is an electronic device made of semiconductor materials. A diode has two electrodes. When a forward voltage is applied between the two electrodes of the diode, the diode is turned on. When a reverse voltage is applied, the diode is cut off. The conduction and cutoff of the diode are equivalent to the on and off of a switch. The diode usually needs to be packaged before use, and the diode packaging structure is formed after the diode is packaged.

[0003] In the related art, the diode packaging structure includes a diode chip, a first conductive structure and a mold sealing layer, and the diode chip has a first electrode and a second electrode. The first conductive structure includes a bearing portion and a pin portion, the bearing portion has a first surface and a second surface opposite to the first surface, the diode chip is arranged on the bearing portion with the first electrode facing the first surface, and the pin portion is connected to the bearing portion and protrudes from the first surface. Among them, the pin portion is electrically connected to the first electrode through the bearing portion, the mold sealing layer covers the diode chip and the first conductive structure, the bearing portion is completely buried in the mold sealing layer, and the first conductive surface of the pin portion is exposed on the outer surface of the mold sealing layer. Such a packaging structure can protect the diode, thereby increasing the service life of the diode.

[0004] However, in the related art, the diode chip of the diode packaging structure is only packaged by a mold sealing layer, which makes the stability of the diode packaging structure not good enough, and ultimately affects the reliability of the diode packaging structure. Utility Model Content

[0005] The main purpose of the present application is to provide a diode packaging structure and a PCB board, aiming to solve the technical problem of poor reliability of the diode packaging structure in the prior art.

[0006] In order to solve the above technical problems, the present application provides a diode packaging structure, which includes:

[0007] A lead frame, wherein a placement groove is formed on the lead frame;

[0008] A chip, wherein the chip is mounted in the placement groove;

[0009] A clamping mechanism, at least part of which is installed in the lead frame, and is used to clamp the chip;

[0010] A plastic encapsulation layer, wherein the plastic encapsulation layer encapsulates at least a portion of the lead frame, at least a portion of the chip, and at least a portion of the clamping mechanism.

[0011] In some possible implementations, the lead frame is provided with a receiving cavity in a horizontal direction and connected to the placement groove;

[0012] The locking mechanism includes a return spring located in the accommodating cavity and connected to the inner wall of the accommodating cavity, and a limit block connected to the return spring. The limit block can slide horizontally in the accommodating cavity, and at least part of the limit block contacts the top surface of the chip.

[0013] In some possible implementations, the limiting block includes a limiting portion, a connecting portion, and a sliding portion that are integrally formed in sequence, the limiting portion contacts the top surface of the chip, and the sliding portion is located in the accommodating cavity.

[0014] In some possible implementations, the limiting portion is provided with a first inclined surface and a second inclined surface that are oppositely arranged, and the first inclined surface is in contact with the top surface of the chip.

[0015] In some possible embodiments, the placement groove includes a first groove and a second groove connected in sequence from top to bottom, the orthographic projection of the second groove on the plane where the chip is located is located within the orthographic projection of the first groove on the plane where the chip is located, and the edge of the chip is located on the step formed by the first groove and the second groove.

[0016] In some possible implementations, an oblique groove connecting the first groove and the second groove is further formed on the inner wall of the first groove.

[0017] In some possible implementations, the chip includes a plurality of groups of contacts, each group of contacts includes a first contact and a second contact, and the chip further includes a lead electrically connecting the first contact and the second contact;

[0018] The packaging structure further includes a pin disposed on the lead frame, and the lead wire extends to be electrically connected to the pin.

[0019] In some possible implementations, the width of the orthographic projection of the placement groove on the plane where the chip is located is in a range of 11 mm to 12 mm; the length of the orthographic projection of the placement groove on the plane where the chip is located is in a range of 12.5 mm to 13.5 mm.

[0020] In some possible implementations, the packaging structure further includes a heat sink mounted on the lead frame.

[0021] In some possible implementations, the present application further provides a PCB board, which includes the diode packaging structure described in the present application, and the number of the diode packaging structures is 3-4.

[0022] Compared with the related art, this application has at least the following beneficial effects:

[0023] A diode packaging structure and a PCB board proposed in the embodiments of the present application install a chip in a placement groove and clamp the chip through a clamping mechanism. The plastic packaging layer can plasticize the lead frame, the chip and the clamping mechanism into a whole, thereby improving the stability of the packaging structure and ultimately improving the reliability of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 One of the schematic diagrams of the top view of the diode packaging structure provided in the embodiment of the present application;

[0026] Figure 2 Provided for the embodiments of this application Figure 1 Schematic cross-sectional view at AA in the middle;

[0027] Figure 3 Provided for the embodiments of this application Figure 2 The enlarged schematic diagram of point A in the middle;

[0028] Figure 4 A front cross-sectional schematic diagram of a limit block provided in an embodiment of the present application;

[0029] Figure 5 A schematic cross-sectional view of a lead frame provided in an embodiment of the present application;

[0030] Figure 6 Provided for the embodiments of this application Figure 1 A schematic cross-sectional view of the middle BB;

[0031] Figure 7 Provided for the embodiments of this application Figure 6 The enlarged schematic diagram of point B in the middle;

[0032] Figure 8 This is the second schematic diagram of the top view of the diode packaging structure provided in the embodiment of the present application.

[0033] Figure numerals: 1. pin; 2. lead; 3. lead frame; 31. accommodating cavity; 4. plastic layer; 5. chip; 51. first contact; 52. second contact; 6. locking mechanism; 61. limit block; 611. limit part; 6111. first inclined surface; 6112. second inclined surface; 612. connecting part; 613. sliding part; 62. reset spring; 7. inclined groove; 8. placement groove; 81. first groove; 82. second groove; 9. heat sink. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0035] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0036] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0037] In the description of the present application, it should be noted that the terms "first", "second", "third", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0038] In the description of the present application, it should be noted that the terms “upper”, “lower”, “top surface”, “horizontal” and the like are based on the corresponding views.

[0039] See also Figure 1-Figure 2 The present application provides a diode packaging structure, which includes a lead frame 3, a chip 5, a clamping mechanism 6 and a plastic packaging layer 4.

[0040] A placement groove 8 is provided on the lead frame 3, and the chip 5 is installed in the placement groove 8. At least part of the clamping mechanism 6 is installed in the lead frame 3, and the clamping mechanism 6 is used to clamp the chip 5. The plastic packaging layer 4 wraps at least part of the lead frame 3, at least part of the chip 5 and at least part of the clamping mechanism 6.

[0041] The diode in this embodiment includes a fast recovery diode. As a part of a power semiconductor device, the fast recovery diode plays an important role in the fields of photovoltaic power generation, wind power generation, and frequency converter.

[0042] After the chip 5 is placed in the placement groove 8, the chip 5 is clamped in the placement groove 8 by the clamping mechanism 6. When the chip 5 is plastic-sealed, the material of the plastic sealing layer 4 flows to the gap between the clamping mechanism 6, the chip 5 and the lead frame 3. In this way, the chip 5 can be stably installed in the placement groove 8.

[0043] Based on the above design, in this embodiment, by installing the chip 5 in the placement groove 8 and clamping the chip 5 through the clamping mechanism 6, the plastic packaging layer 4 can plastic-seal the lead frame 3, the chip 5 and the clamping mechanism 6 as a whole, thereby improving the stability of the packaging structure and ultimately improving the reliability of the packaging structure.

[0044] In some embodiments, see Figure 2-Figure 3 The lead frame 3 has a receiving cavity 31 in the horizontal direction which is connected to the placement groove 8. The locking mechanism 6 includes a reset spring 62 located in the receiving cavity 31 and connected to the inner wall of the receiving cavity 31, and a limit block 61 connected to the reset spring 62. The limit block 61 can slide horizontally in the receiving cavity 31, and at least part of the limit block 61 is in contact with the top surface of the chip 5.

[0045] When the chip 5 is placed in the placement groove 8, the chip 5 will give the limit block 61 a thrust in the direction of the reset spring 62 (the force can be the force applied by the personnel on the chip 5). The reset spring 62 is compressed under the action of the thrust and drives the limit block 61 to move away from the chip 5 in the accommodating chamber 31. When the chip 5 is completely placed in the placement groove 8, the limit block 61 is no longer subjected to the horizontal thrust of the chip 5. At this time, the reset spring 62 returns to its original position and pushes the limit block 61 in the direction of the chip 5. When the reset spring 62 reaches the original position, the limit block 61 is located above the chip 5 and contacts the top surface of the chip 5. The limit block 61 can limit the position of the chip 5, so that the chip 5 is more stably installed in the placement groove 8. The snap-fit ​​mechanism 6 in this embodiment can make it easier to install the chip 5 in the placement groove 8.

[0046] In some embodiments, see Figure 3-Figure 4 The limiting block 61 includes a limiting portion 611 , a connecting portion 612 , and a sliding portion 613 which are integrally formed in sequence. The limiting portion 611 contacts the top surface of the chip 5 , and the sliding portion 613 is located in the accommodating cavity 31 .

[0047] The diameter of the connecting portion 612 is smaller than the diameters of the limiting portion 611 and the sliding portion 613. The sliding portion 613 is connected to the reset spring 62. The sliding portion 613 can slide in the horizontal direction in the accommodating cavity 31. The limiting portion 611 extends above the chip 5 and contacts the top surface of the chip 5. The limiting block 61 with such a structure can more easily limit the chip 5 in the placement groove 8.

[0048] In some embodiments, please refer again to Figure 3-Figure 4 The limiting portion 611 is provided with a first inclined surface 6111 and a second inclined surface 6112 which are arranged opposite to each other, and the first inclined surface 6111 is in contact with the top surface of the chip 5 .

[0049] When placing the chip 5 in the placement groove 8, a person can apply a vertical force to the chip 5. At this time, the bottom surface of the chip 5 contacts the second inclined surface 6112, and the vertical downward force is transmitted to the second inclined surface 6112, and is decomposed into a horizontal component on the second inclined surface 6112, and the direction of the horizontal component is from the limit block 61 to the direction of the reset spring 62, and the horizontal component is transmitted to the reset spring 62. As the chip 5 continues to move downward, the horizontal component will cause the limit block 61 to slide in the direction of the reset spring 62 in the accommodating cavity 31, and the reset spring 62 is compressed during this process.

[0050] As the chip 5 moves downward, the top surface of the chip 5 will contact the first inclined surface 6111. After the chip 5 contacts the first inclined surface 6111, the horizontal component of the force exerted by the chip 5 on the limiting portion 611 gradually decreases. As the chip 5 continues to move downward, the reset spring 62 gradually returns to its original state. During this process, the limiting block 61 moves away from the reset spring 62 under the elastic force of the reset spring 62. When the chip 5 is completely placed in the placement groove 8, the limiting block 61 is no longer subjected to the horizontal thrust of the chip 5, and the reset spring 62 returns to its original state. At this time, the limiting block 61 is located above the chip 5 and contacts the top surface of the chip 5. The limiting block 61 can limit the position of the chip 5, so that the chip 5 can be more stably installed in the placement groove 8. The engaging mechanism 6 in this embodiment can make it easier to install the chip 5 in the placement groove 8 and can more stably install the chip 5 in the placement groove 8.

[0051] In some embodiments, see Figure 5 The placement groove 8 includes a first groove 81 and a second groove 82 which are connected in sequence from top to bottom. The orthographic projection of the second groove 82 on the plane where the chip 5 is located is located within the orthographic projection of the first groove 81 on the plane where the chip 5 is located. The edge of the chip 5 is located on the step formed by the first groove 81 and the second groove 82.

[0052] There may be other components on the side of the chip 5 facing the bottom of the placement groove 8. If the components on the chip 5 directly contact the bottom of the placement groove 8, the components on the chip 5 may be damaged. In this embodiment, the placement groove 8 is set as a first groove 81 and a second groove 82 of a hollow structure. When the edge of the chip 5 is placed on the step formed by the first groove 81 and the second groove 82, the components on the bottom of the chip 5 are in a suspended state. In this way, the components on the chip 5 do not directly contact the bottom of the first groove 81, so that the components on the chip 5 are not easily damaged.

[0053] In some embodiments, see Figure 1 , Figure 5 , Figure 6-Figure 7 The inner wall of the first groove 81 is also provided with an inclined groove 7 connecting the first groove 81 and the second groove 82 .

[0054] During the process of plastic sealing the chip 5, the material of the plastic sealing layer 4 will flow from the inclined groove 7 into the first groove 81, so that the material of the plastic sealing layer 4 can more easily flow into the gap between the chip 5, the lead frame 3 and the clamping mechanism 6, thereby further improving the firmness of the packaging structure and ultimately further improving the reliability of the packaging structure.

[0055] In some embodiments, please refer again to Figure 1 and Figure 6 The chip 5 includes multiple groups of contacts, each group of contacts includes a first contact 51 and a second contact 52, and the chip 5 also includes a lead 2 electrically connecting the first contact 51 and the second contact 52; the packaging structure also includes a pin 1 arranged on the lead frame 3, and the lead 2 extends to be electrically connected to the pin 1.

[0056] The signal of chip 5 can be transmitted to the outside through lead 2 and pin 1 in sequence. Since lead 2 is in contact with both the first contact 51 and the second contact 52, the contact area between lead 2 and chip 5 is increased, so that chip 5 can achieve a higher surge current and prevent failure caused by terminal overvoltage, thereby improving the quality and reliability of the packaging structure.

[0057] Preferably, the chip 5 is provided with five groups of contacts, and the chip 5 is provided with five leads 2, and the diameter of each lead 2 ranges from 485.3 μm to 515.3 μm, for example, it can be 485.3 μm, 490 μm, 495 μm, 500 μm, 510 μm or 515.3 μm, etc. In this way, the chip 5 can further achieve a higher surge current, prevent failure caused by terminal overvoltage, and further improve the quality and reliability of the packaging structure.

[0058] In some embodiments, please refer again to Figure 1, the width D1 of the orthographic projection of the placement groove 8 on the plane where the chip 5 is located is in the range of 11mm-12mm, for example, the width D1 can be 11mm, 11.2mm, 11.5mm, 11.8mm or 12mm, etc. The length D2 of the orthographic projection of the placement groove 8 on the plane where the chip 5 is located is in the range of 12.5mm-13.5mm, for example, the length D2 can be 12.5mm, 12.7mm, 13mm, 13.3mm or 13.5mm, etc. In this way, the area of ​​the carrier region of the lead frame 3 is appropriately increased, so that the area of ​​the chip 5 mounted on the lead frame 3 can be increased, and the forward surge capacity of the diode packaging structure finally formed is stronger. When the product works under high current conditions, it can withstand the instantaneous impact of the current, and the equipment can work normally.

[0059] In some embodiments, see Figure 8 The packaging structure further includes a heat sink 9 mounted on the lead frame 3. The heat sink 9 can provide a heat dissipation path for the packaging structure, increase the heat dissipation capacity of the chip 5, and thus further improve the reliability of the packaging structure.

[0060] In some embodiments, the present application also provides a PCB board, which includes the diode packaging structure in the present application, and the number of diode packaging structures is 3-4.

[0061] Since the area of ​​the chip 5 in the diode packaging structure is increased, the surge current of a single diode packaging structure is stronger. In the related technology, 6-12 diode packaging structures need to be set on the PCB to meet the requirements. In this embodiment, only 3-4 diode packaging structures are needed to meet the corresponding requirements, thereby reducing related costs.

[0062] In addition, the number of electronic component jacks on the PCB is limited, and the layout structure should be saved as much as possible. The packaging structure of 6-12 diodes in parallel in the related art no longer meets the requirements. The packaging structure of 3-4 diodes in this embodiment just matches the number of sockets on the PCB. Therefore, fewer sockets are used on the PCB, which can save most of the area for other electronic components, thereby saving the area of ​​the PCB.

[0063] In addition, in this embodiment, the number of diode packaging structures used in parallel on the PCB is smaller, and it is not easy to have large parameter differences between products. The equipment is not likely to have problems such as machine explosion when working, ensuring the normal operation of the equipment and the quality of the product. And because the number of diode packaging structures of this packaging structure is smaller, the parameters of the chip 5 are easier to control and are not likely to affect the yield of the product.

[0064] The above are only various implementations of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A diode packaging structure, characterized in that: The packaging structure comprises: A lead frame (3), wherein a placement groove (8) is formed on the lead frame (3); A chip (5), wherein the chip (5) is mounted in the placement groove (8); A clamping mechanism (6), at least a portion of which is installed in the lead frame (3), and the clamping mechanism (6) is used to clamp the chip (5); A plastic encapsulation layer (4), the plastic encapsulation layer (4) encapsulating at least a portion of the lead frame (3), at least a portion of the chip (5) and at least a portion of the locking mechanism (6).

2. The diode packaging structure according to claim 1, characterized in that: The lead frame (3) is provided with a receiving cavity (31) in a horizontal direction and is connected to the placement groove (8); The locking mechanism (6) comprises a return spring (62) located in the accommodating cavity (31) and connected to the inner wall of the accommodating cavity (31), and a limit block (61) connected to the return spring (62); the limit block (61) is capable of sliding horizontally in the accommodating cavity (31), and at least a portion of the limit block (61) is in contact with the top surface of the chip (5).

3. The diode packaging structure according to claim 2, characterized in that: The limiting block (61) comprises a limiting portion (611), a connecting portion (612) and a sliding portion (613) which are integrally formed in sequence, the limiting portion (611) contacts the top surface of the chip (5), and the sliding portion (613) is located in the accommodating cavity (31).

4. The diode packaging structure according to claim 3, characterized in that: The limiting portion (611) is provided with a first inclined surface (6111) and a second inclined surface (6112) which are arranged opposite to each other, and the first inclined surface (6111) is in contact with the top surface of the chip (5).

5. The diode packaging structure according to claim 1, characterized in that: The placement groove (8) comprises a first groove (81) and a second groove (82) which are connected in sequence from top to bottom, the orthographic projection of the second groove (82) on the plane where the chip (5) is located is located within the orthographic projection of the first groove (81) on the plane where the chip (5) is located, and the edge of the chip (5) is located on a step formed by the first groove (81) and the second groove (82).

6. The diode packaging structure according to claim 5, characterized in that: An inclined groove (7) connecting the first groove (81) and the second groove (82) is also formed on the inner wall of the first groove (81).

7. The diode packaging structure according to any one of claims 1 to 6, characterized in that: The chip (5) comprises a plurality of groups of contacts, each group of contacts comprises a first contact (51) and a second contact (52), and the chip (5) further comprises a lead (2) electrically connecting the first contact (51) and the second contact (52); The packaging structure also includes a pin (1) arranged on the lead frame (3), and the lead (2) extends to be electrically connected to the pin (1).

8. The diode packaging structure according to any one of claims 1 to 6, characterized in that: The width of the orthographic projection of the placement groove (8) on the plane where the chip (5) is located is in the range of 11 mm to 12 mm; the length of the orthographic projection of the placement groove (8) on the plane where the chip (5) is located is in the range of 12.5 mm to 13.5 mm.

9. The diode packaging structure according to any one of claims 1 to 6, characterized in that: The packaging structure also includes a heat sink (9) mounted on the lead frame (3).

10. A PCB board, characterized in that: The PCB board includes the diode packaging structure as described in any one of claims 1 to 9, and the number of the diode packaging structures is 3 to 4.

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