Relay control circuit and electronic equipment

By designing filtering and energy storage circuits in the relay control circuit, the state of the relay remains unchanged when the main chip is powered down or reset, the problem of the state of the relay in the prior art is solved and the reliability of the circuit is improved.

CN222581047UActive Publication Date: 2025-03-07TP-LINK
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Patent Information

Application Number
CN202420539359.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-19
Publication Date
2025-03-07
Estimated Expiration
2034-03-19

AI Technical Summary

Technical Problem

When the main chip is powered off and restarted or reset, the state of the relay is prone to change, affecting the normal operation and reliability of the circuit.

Method used

A relay control circuit is designed, including a control circuit, a first filter circuit, a first energy storage circuit, a second filter circuit, a second energy storage circuit, a switching circuit and a driving circuit. Through these circuits, it is ensured that the state of the relay will not change regardless of whether the output port state of the control circuit is in a high resistance state, a high level or a low level.

Benefits of technology

It realizes that the state of the relay remains unchanged when the main chip is powered down and restarted or reset, improving the reliability and stability of the circuit.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model discloses a relay control circuit and electronic equipment, and belongs to the technical field of relays. The control circuit outputs a first PWM signal or a second PWM signal; the first filter circuit outputs a first voltage according to the first PWM signal; the first energy storage circuit is charged according to the first voltage to set the first node at a high level, and maintains the first node at the high level according to the stop of the first voltage; the second filter circuit outputs a second voltage according to the second PWM signal; the second energy storage circuit outputs a switching signal according to the second voltage and maintains the output of the switching signal according to the stop of the second voltage; the switching circuit discharges the first energy storage circuit according to the switching signal so as to set the first node to a low level; the driving circuit outputs a driving signal according to the level of the first node to control the opening or closing of the relay; therefore, when the control circuit breaks down and stops outputting the first PWM signal and the second PWM signal, the state of the relay does not change, and the reliability of the circuit is improved.
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Description

Technical Field

[0001] The present application belongs to the technical field of relays, and in particular, relates to a relay control circuit and electronic equipment. Background Art

[0002] Figure 1 It is a traditional relay control circuit. When the input / output port (IO) of the main chip outputs a high level, the field effect transistor Q27 is turned on and the relay is closed; when the IO port outputs a low level, the field effect transistor Q27 is turned off and the relay is turned off. In this control circuit, the state of the relay is strictly subject to the state of the IO port of the main chip. If the IO state of the main chip is unstable, such as restarting or resetting, the state of the relay will change, affecting the normal operation of the circuit, and the reliability is poor. In order to solve this problem, the existing method is to add an RC delay circuit to the gate of the field effect transistor Q27, but this solution is only applicable to the scenario where the IO state is high impedance or high level when the main chip is reset. If the main chip is powered off and restarted or the IO state is low when the main chip is reset, the state of the relay will still change, affecting the normal operation of the circuit.

[0003] Therefore, there is an urgent need for a relay control circuit to ensure that the state of the relay will not change regardless of whether the output port state of the control circuit (main chip) is a high impedance state, a high level or a low level. Utility Model Content

[0004] The purpose of the present application is to provide a relay control circuit and an electronic device, aiming to solve the problem in the existing relay control circuit that when the control circuit (main chip) is powered off and restarted or the main chip is reset, the state of the relay will change, affecting the normal operation of the circuit.

[0005] The embodiment of the present application provides a relay control circuit connected to a relay, including:

[0006] A control circuit configured to output a first PWM signal or a second PWM signal;

[0007] a first filtering circuit, connected to the control circuit and configured to output a first voltage according to the first PWM signal;

[0008] a first energy storage circuit connected to the first filter circuit and the first node, configured to be charged according to the first voltage to set the first node to a high level, and to maintain the first node at a high level according to the cessation of the first voltage;

[0009] a second filtering circuit, connected to the control circuit and configured to output a second voltage according to the second PWM signal;

[0010] a second energy storage circuit, connected to the second filter circuit, configured to output a switching signal according to the second voltage, and to maintain the output of the switching signal according to the cessation of the second voltage;

[0011] a switch circuit connected to the second energy storage circuit, the first node and the first energy storage circuit, and configured to discharge the first energy storage circuit according to the switch signal to set the first node to a low level;

[0012] The driving circuit is connected to the switch circuit, the first node and the first energy storage circuit, and is configured to output a driving signal according to the level of the first node to control the opening or closing of the relay.

[0013] In one embodiment, the first filter circuit and the second filter circuit are both high-pass filters, wherein a cutoff frequency of the first filter circuit is greater than a cutoff frequency of the second filter circuit.

[0014] In one embodiment, the control circuit includes a microprocessor;

[0015] The first general input and output terminal of the microprocessor serves as the first PWM signal output terminal of the control circuit and the second PWM signal output terminal of the control circuit, and is connected to the first filter circuit and the second filter circuit to output the first PWM signal and the second PWM signal.

[0016] In one of the embodiments, the first filtering circuit includes a first resistor and a first capacitor;

[0017] The first end of the first capacitor serves as a first PWM signal input end of the first filter circuit, and is connected to the control circuit to input the first PWM signal; the second end of the first capacitor and the first end of the first resistor serve together as a first voltage output end of the first filter circuit, and are connected to the first energy storage circuit to output the first voltage; the second end of the first resistor is connected to the power ground.

[0018] In one embodiment, the first energy storage circuit includes a first diode, a second resistor and a second capacitor;

[0019] The anode of the first diode serves as the first voltage input terminal of the first energy storage circuit and is connected to the first filter circuit to input the first voltage; the cathode of the first diode is connected to the first end of the second resistor, and the second end of the second resistor and the first end of the second capacitor are commonly connected to the first node; the second end of the second capacitor is connected to the power ground.

[0020] In one embodiment, the second filtering circuit includes a third resistor and a third capacitor;

[0021] The first end of the third capacitor serves as the second PWM signal input end of the second filtering circuit, and is connected to the control circuit to input the second PWM signal; the second end of the third capacitor and the first end of the third resistor serve together as the second voltage output end of the second filtering circuit, and are connected to the second energy storage circuit to output the second voltage; the second end of the third resistor is connected to the power ground.

[0022] In one embodiment, the second energy storage circuit includes a second diode, a fourth resistor and a fourth capacitor;

[0023] The anode of the second diode serves as the second voltage input terminal of the second energy storage circuit and is connected to the second filter circuit to input the second voltage; the cathode of the second diode is connected to the first end of the fourth resistor; the second end of the fourth resistor and the first end of the fourth capacitor serve together as the switching signal output terminal of the second energy storage circuit and are connected to the switching circuit to output the switching signal; the second end of the fourth capacitor is connected to the power ground.

[0024] In one embodiment, the switch circuit includes a second field effect transistor and a sixth resistor;

[0025] The gate of the second field effect transistor serves as the switching signal input terminal of the switching circuit and is connected to the second energy storage circuit to input the switching signal; the drain of the second field effect transistor is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the first node and the first energy storage circuit; the source of the second field effect transistor is connected to the power ground.

[0026] In one of the embodiments, the driving circuit includes a first field effect transistor and a fifth resistor;

[0027] The gate of the first field effect transistor is connected to the switch circuit, the first node and the first energy storage circuit; the drain of the first field effect transistor and the first end of the fifth resistor serve as the drive signal output end of the drive circuit and are connected to the relay to output the drive signal; the second end of the fifth resistor is connected to the first power supply; and the source of the first field effect transistor is connected to the power ground.

[0028] An embodiment of the present application further provides an electronic device, which includes the above-mentioned relay control circuit.

[0029] Compared with the prior art, the embodiments of the present application have the following beneficial effects: since the first filter circuit maintains the first node at a high level according to the cessation of the first voltage, and the second filter circuit maintains the output of the switch signal according to the cessation of the second voltage, when the control circuit fails and stops outputting the first PWM signal and the second PWM signal, the states of the switch circuit and the drive circuit will not change, and thus the state of the relay will not change, thereby improving the reliability of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical application in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0031] Figure 1 A partial exemplary circuit schematic diagram of a conventional relay control circuit;

[0032] Figure 2 A schematic diagram of a structure of a relay control circuit provided in one embodiment of the present application;

[0033] Figure 3 A partial exemplary circuit schematic diagram of a relay control circuit provided in one embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0035] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0036] It should be understood that the orientation or position relationship indicated by terms such as "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0037] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0038] Figure 2 The structure diagram of the relay control circuit provided by an embodiment of the present application is shown. For the convenience of explanation, only the part related to the present embodiment is shown, which is described in detail as follows:

[0039] The relay control circuit is connected to the relay K1 and includes a control circuit 100 , a first filter circuit 200 , a first energy storage circuit 300 , a second filter circuit 400 , a second energy storage circuit 500 , a switch circuit 600 and a drive circuit 700 .

[0040] The control circuit 100 is configured to output a first PWM signal or a second PWM signal.

[0041] The first filter circuit 200 is connected to the control circuit 100 and is configured to output a first voltage according to a first PWM signal.

[0042] The first energy storage circuit 300 is connected to the first filter circuit 200 and the first node A, and is configured to charge according to the first voltage to set the first node A to a high level, and maintain the first node A at a high level according to the cessation of the first voltage.

[0043] The second filter circuit 400 is connected to the control circuit 100 and is configured to output a second voltage according to the second PWM signal.

[0044] The second energy storage circuit 500 is connected to the second filter circuit 400 and is configured to output a switching signal according to the second voltage and maintain the output of the switching signal according to the cessation of the second voltage.

[0045] The switch circuit 600 is connected to the second energy storage circuit 500, the first node A and the first energy storage circuit 300, and is configured to discharge the first energy storage circuit 300 according to the switch signal to set the first node A to a low level.

[0046] The driving circuit 700 is connected to the switch circuit 600, the first node A and the first energy storage circuit 300, and is configured to output a driving signal according to the level of the first node A to control the opening or closing of the relay K1.

[0047] The first filter circuit 200 is further configured to output a third voltage according to the second PWM signal.

[0048] The first energy storage circuit 300 is further configured to be charged according to a third voltage.

[0049] The second filter circuit 400 is further configured to output a fourth voltage according to the first PWM signal.

[0050] The second energy storage circuit 500 is further configured to stop outputting the switching signal according to the fourth voltage.

[0051] When the control circuit 100 outputs the first PWM signal, the first energy storage circuit 300 is in a high level state, and the second energy storage circuit 500 is in a low level state. When the control circuit 100 fails and stops outputting the first PWM signal, if the output port of the control circuit 100 is at a high level, due to the filtering effect of the first filter circuit 200, the voltage after filtering by the first filter circuit 200 is 0, and the first energy storage circuit 300 maintains a high level; if the output port of the control circuit 100 is at a low level, since the diode in the first energy storage circuit 300 is unidirectionally conducted, the first energy storage circuit 300 will not discharge through the control circuit 100, so no matter whether the output port state of the control circuit 100 is a high impedance state, a high level or a low level, the voltage of the first energy storage circuit 300 will not change (maintain a high level).

[0052] When the control circuit 100 outputs the second PWM signal, the first energy storage circuit 300 is in a low level state, and the second energy storage circuit 500 is in a high level state. When the control circuit 100 fails and stops outputting the second PWM signal, if the output port of the control circuit 100 is at a high level, due to the filtering effect of the second filter circuit 400, the voltage after filtering by the second filter circuit 400 is 0, and the second energy storage circuit 500 maintains a high level output; if the output port of the control circuit 100 is at a low level, since the diode in the second energy storage circuit 500 is unidirectionally conducted, the second energy storage circuit 500 will not discharge through the control circuit 100, so no matter whether the output port state of the control circuit 100 is a high impedance state, a high level or a low level, the second energy storage circuit 500 maintains a high level output, so that the switch circuit 600 discharges the first energy storage circuit 300 according to the high level switch signal, so as to set the first node A to a low level.

[0053] Therefore, when a fault occurs in the control circuit 100, the state of the relay K1 will not change during the period of time when the control circuit 100 is restarted and restored, thereby improving the reliability of the circuit.

[0054] Figure 3 A partial exemplary circuit structure of a relay control circuit provided in an embodiment of the present application is shown. For the sake of convenience, only the part related to the embodiment of the present application is shown, which is described in detail as follows:

[0055] The first filter circuit 200 includes a first resistor R1 and a first capacitor C1.

[0056] The first end of the first capacitor C1 serves as the first PWM signal input end of the first filter circuit 200 and the second PWM signal input end of the first filter circuit 200, and is connected to the control circuit 100 to input the first PWM signal and the second PWM signal; the second end of the first capacitor C1 and the first end of the first resistor R1 serve together as the first voltage output end of the first filter circuit 200, and are connected to the first energy storage circuit 300 to output the first voltage; the second end of the first resistor R1 is connected to the power ground.

[0057] The first resistor R1 and the first capacitor C1 form a first-order RC filter. When the control circuit 100 outputs a high level due to a fault, the first-order RC filter stops conducting, thereby preventing the high level from affecting the voltage of the first energy storage circuit 300 .

[0058] The first energy storage circuit 300 includes a first diode D1 , a second resistor R2 , and a second capacitor C2 .

[0059] The anode of the first diode D1 serves as the first voltage input terminal of the first energy storage circuit 300 and is connected to the first filter circuit 200 to input the first voltage; the cathode of the first diode D1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 and the first end of the second capacitor C2 are commonly connected to the first node A; the second end of the second capacitor C2 is connected to the power ground.

[0060] When the control circuit 100 fails and outputs a low level, the first diode D1 is turned off, which prevents the first energy storage circuit 300 from discharging through the low level output port of the control circuit 100, thereby ensuring the reliability of the circuit.

[0061] The second filtering circuit 400 includes a third resistor R3 and a third capacitor C3.

[0062] The first end of the third capacitor C3 serves as the second PWM signal input end of the second filter circuit 400, and is connected to the control circuit 100 to input the second PWM signal; the second end of the third capacitor C3 and the first end of the third resistor R3 serve together as the second voltage output end of the second filter circuit 400, and are connected to the second energy storage circuit 500 to output the second voltage; the second end of the third resistor R3 is connected to the power ground.

[0063] The third resistor R3 and the third capacitor C3 form a first-order RC filter. When the control circuit 100 outputs a high level due to a fault, the first-order RC filter stops conducting, thereby preventing the high level from affecting the voltage of the second energy storage circuit 500.

[0064] It should be noted that when the control circuit 100 outputs the first PWM signal, the second filtering circuit 400 is also turned on. However, since the voltage of the first PWM signal after filtering by the first-order RC filter is relatively low, it is not enough to charge the second energy storage circuit 500 to be able to output the switching signal, and the switching circuit 600 is disconnected, thereby achieving that when the control circuit 100 outputs the first PWM signal, the first node A is at a high level, the drive circuit 700 outputs a low-level drive signal according to the high level, and the relay K1 is closed; when the control circuit 100 outputs the second PWM signal, the second energy storage circuit 500 outputs a switching signal, the first node A is at a low level, the drive circuit 700 outputs a high-level drive signal according to the low-level signal, and the relay K1 is disconnected; thereby achieving the use of the first PWM signal and the second PWM signal with different frequencies and duty cycles to respectively control the conduction and disconnection of the relay K1.

[0065] The second energy storage circuit 500 includes a second diode D2, a fourth resistor R4 and a fourth capacitor C4.

[0066] The anode of the second diode D2 is connected as the second voltage input terminal of the second energy storage circuit 500, and is connected to the second filter circuit 400 to input the second voltage; the cathode of the second diode D2 is connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 and the first end of the fourth capacitor C4 are used as the switching signal output terminal of the second energy storage circuit 500, and are connected to the switching circuit 600 to output the switching signal; the second end of the fourth capacitor C4 is connected to the power ground.

[0067] When the control circuit 100 fails and outputs a low level, the second diode D2 is turned off, preventing the second energy storage circuit 500 from discharging through the low level output port of the control circuit 100, thereby ensuring the reliability of the circuit. The switch circuit 600 includes a second field effect transistor Q2 and a sixth resistor R6.

[0068] The gate of the second field effect transistor Q2 serves as the switching signal input terminal of the switching circuit 600 and is connected to the second energy storage circuit 500 to input the switching signal; the drain of the second field effect transistor Q2 is connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is connected to the first node A and the first energy storage circuit 300; the source of the second field effect transistor Q2 is connected to the power ground.

[0069] Using a field effect transistor as the switch circuit 600 has a fast response speed and low loss.

[0070] The driving circuit 700 includes a first field effect transistor Q1 and a fifth resistor R5.

[0071] The gate of the first field effect transistor Q1 is connected to the switch circuit 600, the first node A and the first energy storage circuit 300. The drain of the first field effect transistor Q1 and the first end of the fifth resistor R5 serve as the drive signal output end of the drive circuit 700 and are connected to the relay K1 to output the drive signal. The second end of the fifth resistor R5 is connected to the first power supply. The source of the first field effect transistor Q1 is connected to the power ground.

[0072] The field effect tube has low on-resistance and fast switching speed.

[0073] The control circuit 100 includes a microprocessor U1.

[0074] The first general input and output terminal P1.0 of the microprocessor U1 serves as the first PWM signal output terminal and the second PWM signal output terminal of the control circuit 100, and is connected to the first filter circuit 200 and the second filter circuit 400 to output the first PWM signal and the second PWM signal.

[0075] As an example but not a limitation, both the first filter circuit 200 and the second filter circuit 400 are high-pass filters, wherein the cutoff frequency of the first filter circuit 200 is greater than the cutoff frequency of the second filter circuit 400 .

[0076] It should be noted that the capacitance of the first capacitor C1 can be set equal to the capacitance of the third capacitor C3, and the resistance of the first resistor R1 can be set smaller than the resistance of the third resistor R3. For example, the capacitances of the first capacitor C1 and the third capacitor C3 can be set to 1μF, the resistance of the first resistor R1 can be set to 10Ω, and the resistance of the third resistor R3 can be set to 100Ω. Then, since the cut-off frequency of the first-order RC filter is 1 / (2πRC), it can be seen that the cut-off frequency of the first-order filter composed of the first capacitor C1 and the first resistor R1 is greater than the cut-off frequency of the first-order filter composed of the third capacitor C3 and the third resistor R3, thereby achieving that the cut-off frequency of the first filter circuit 200 is greater than the cut-off frequency of the second filter circuit 400.

[0077] By setting the cut-off frequency of the first filter circuit 200 to be greater than the cut-off frequency of the second filter circuit 400 , it is possible to control the opening or closing of the relay K1 using PWM signals with different frequencies and / or duty cycles, thereby simplifying the control logic.

[0078] It should be noted that the lower the duty cycle of the PWM signal, the higher the energy of the low-frequency harmonic component; the higher the duty cycle of the PWM signal, the higher the energy of the high-frequency harmonic component.

[0079] For example, the first PWM signal and the second PWM signal have the same frequency of 10KHz, and the duty cycle of the first PWM signal can be set to 0.9, and the duty cycle of the second PWM signal can be set to 0.1. When the control circuit 100 outputs the first PWM signal, the voltage of the second capacitor C2 is 1.5V, the voltage of the fourth capacitor C4 is 0.5V, the second field effect transistor Q2 is turned off, the first field effect transistor Q1 is turned on, and the relay K1 is turned on; when the control circuit 100 outputs the second PWM signal, since the second field effect transistor Q2 is turned on, the second capacitor C2 is discharged, and the voltage of the second capacitor C2 is finally 0V, the voltage of the fourth capacitor C4 is 2.2V, the second field effect transistor Q2 is turned on, the first field effect transistor Q1 is turned off, and the relay K1 is disconnected.

[0080] For another example, the first PWM signal and the second PWM signal have the same frequency of 20KHz, the duty cycle of the first PWM signal can be set to 0.9, and the duty cycle of the second PWM signal can be set to 0.1. When the control circuit 100 outputs the first PWM signal, the voltage of the second capacitor C2 is 1.3V, the voltage of the fourth capacitor C4 is 0.4V, the second field effect transistor Q2 is cut off, the first field effect transistor Q1 is turned on, and the relay K1 is turned on; when the control circuit 100 outputs the second PWM signal, the voltage of the second capacitor C2 is 0V, the voltage of the fourth capacitor C4 is 3V, the second field effect transistor Q2 is turned on, the first field effect transistor Q1 is cut off, and the relay K1 is disconnected.

[0081] For another example, the first PWM signal and the second PWM signal have the same duty cycle of 0.9, the frequency of the first PWM signal can be set to 20KHz, and the frequency of the second PWM signal can be set to 500Hz. When the control circuit 100 outputs the first PWM signal, the voltage of the second capacitor C2 is 1.3V, the voltage of the fourth capacitor C4 is 0.4V, the second field effect transistor Q2 is cut off, the first field effect transistor Q1 is turned on, and the relay K1 is turned on; when the control circuit 100 outputs the second PWM signal, the voltage of the second capacitor C2 is 0V, the voltage of the fourth capacitor C4 is 2.8V, the second field effect transistor Q2 is turned on, the first field effect transistor Q1 is cut off, and the relay K1 is disconnected.

[0082] For another example, the frequencies and duty cycles of the first PWM signal and the second PWM signal are different. The frequency of the first PWM signal can be set to 20KHz and the duty cycle can be set to 0.9, and the frequency of the second PWM signal can be set to 500Hz and the duty cycle can be set to 0.1. When the control circuit 100 outputs the first PWM signal, the voltage of the second capacitor C2 is 1.3V, the voltage of the fourth capacitor C4 is 0.4V, the second field effect transistor Q2 is cut off, the first field effect transistor Q1 is turned on, and the relay K1 is turned on; when the control circuit 100 outputs the second PWM signal, the voltage of the second capacitor C2 is 0V, the voltage of the fourth capacitor C4 is 3.2V, the second field effect transistor Q2 is turned on, the first field effect transistor Q1 is cut off, and the relay K1 is disconnected.

[0083] The following is a combination of working principles Figure 3 As shown for further explanation:

[0084] If the relay K1 needs to be turned on, during normal operation, the first universal input and output terminal P1.0 of the microprocessor U1 outputs a first PWM signal to the first end of the first capacitor C1, the first capacitor C1 and the first resistor R1 filter the first PWM signal, and output a first voltage from the cathode of the first diode D1 to the first end of the second resistor R2, the second capacitor C2 stores energy according to the first voltage, and sets the first node A to a high level, the first universal input and output terminal P1.0 of the microprocessor U1 also outputs a first PWM signal to the first end of the third capacitor C3, but because the third capacitor C3 and the third resistor R3 form an RC filter, the voltage value output after the first PWM signal is filtered by the third capacitor C3 and the third resistor R3 is relatively low, so the fourth capacitor C4 The energy storage voltage cannot reach the turn-on voltage of the second field effect tube Q2, so the second field effect tube Q2 is cut off, the first field effect tube Q1 is turned on, the drain of the first field effect tube Q1 and the first end of the fifth resistor R5 output a low-level driving signal to the relay K1, and the relay K1 is turned on; when the microprocessor U1 fails, the first general input and output terminal P1.0 of the microprocessor U1 stops outputting the first PWM signal and may present a high-impedance state, a high level or a low level. At this time, due to the existence of the first filtering circuit 200 and the unidirectional conduction characteristic of the first diode D1, the second capacitor C2 cannot be discharged through the first general input and output terminal P1.0 of the microprocessor U1, thereby maintaining the first node A at a high level, the first field effect tube Q1 is continuously turned on, and the relay K1 is continuously turned on.

[0085] If the relay K1 needs to be disconnected, during normal operation, the first general input and output terminal P1.0 of the microprocessor U1 outputs a second PWM signal to the first end of the third capacitor C3, the third capacitor C3 and the third resistor R3 filter the second PWM signal, and output a second voltage from the cathode of the second diode D2 to the first end of the fourth resistor R4, the fourth capacitor C4 stores energy according to the second voltage, and outputs a high-level switching signal from the second end of the fourth resistor R4 and the first end of the fourth capacitor C4 to the gate of the second field effect transistor Q2, the second field effect transistor Q2 is turned on, the second capacitor C2 is discharged, thereby lowering the voltage of the first node A, and the first field effect transistor Q1 is cut off. When the microprocessor U1 fails, the drain of the first field effect tube Q1 and the first end of the fifth resistor R5 output a high-level driving signal to the relay K1, and the relay K1 is turned off; when the microprocessor U1 fails, the first general input and output terminal P1.0 of the microprocessor U1 stops outputting the second PWM signal and may present a high-impedance state, a high level or a low level. At this time, due to the existence of the second filtering circuit 400 and the unidirectional conduction characteristic of the second diode D2, the fourth capacitor C4 cannot be discharged through the first general input and output terminal P1.0 of the microprocessor U1, thereby maintaining the output of the switching signal, the second field effect tube Q2 is continuously turned on, the first field effect tube Q1 is continuously turned off, and the relay K1 remains disconnected.

[0086] An embodiment of the present application also provides an electronic device, which includes the above-mentioned relay control circuit.

[0087] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0088] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A relay control circuit, characterized in that: Connect with relay, including: A control circuit configured to output a first PWM signal or a second PWM signal; a first filtering circuit, connected to the control circuit and configured to output a first voltage according to the first PWM signal; a first energy storage circuit connected to the first filter circuit and the first node, configured to be charged according to the first voltage to set the first node to a high level, and to maintain the first node at a high level according to the cessation of the first voltage; a second filtering circuit, connected to the control circuit and configured to output a second voltage according to the second PWM signal; a second energy storage circuit, connected to the second filter circuit, configured to output a switching signal according to the second voltage, and to maintain the output of the switching signal according to the cessation of the second voltage; a switch circuit connected to the second energy storage circuit, the first node and the first energy storage circuit, and configured to discharge the first energy storage circuit according to the switch signal to set the first node to a low level; The driving circuit is connected to the switch circuit, the first node and the first energy storage circuit, and is configured to output a driving signal according to the level of the first node to control the opening or closing of the relay.

2. The relay control circuit according to claim 1, characterized in that: The first filter circuit and the second filter circuit are both high-pass filters, wherein a cutoff frequency of the first filter circuit is greater than a cutoff frequency of the second filter circuit.

3. The relay control circuit according to any one of claims 1 to 2, characterized in that: The control circuit includes a microprocessor; The first general input and output terminal of the microprocessor serves as the first PWM signal output terminal of the control circuit and the second PWM signal output terminal of the control circuit, and is connected to the first filter circuit and the second filter circuit to output the first PWM signal and the second PWM signal.

4. The relay control circuit according to any one of claims 1 to 2, characterized in that: The first filtering circuit includes a first resistor and a first capacitor; The first end of the first capacitor serves as a first PWM signal input end of the first filter circuit, and is connected to the control circuit to input the first PWM signal; the second end of the first capacitor and the first end of the first resistor serve together as a first voltage output end of the first filter circuit, and are connected to the first energy storage circuit to output the first voltage; the second end of the first resistor is connected to the power ground.

5. The relay control circuit according to any one of claims 1 to 2, characterized in that: The first energy storage circuit includes a first diode, a second resistor and a second capacitor; The anode of the first diode serves as the first voltage input terminal of the first energy storage circuit and is connected to the first filter circuit to input the first voltage; the cathode of the first diode is connected to the first end of the second resistor, and the second end of the second resistor and the first end of the second capacitor are commonly connected to the first node; the second end of the second capacitor is connected to the power ground.

6. The relay control circuit according to any one of claims 1 to 2, characterized in that: The second filtering circuit includes a third resistor and a third capacitor; The first end of the third capacitor serves as the second PWM signal input end of the second filtering circuit, and is connected to the control circuit to input the second PWM signal; the second end of the third capacitor and the first end of the third resistor serve together as the second voltage output end of the second filtering circuit, and are connected to the second energy storage circuit to output the second voltage; the second end of the third resistor is connected to the power ground.

7. The relay control circuit according to any one of claims 1 to 2, characterized in that: The second energy storage circuit includes a second diode, a fourth resistor and a fourth capacitor; The anode of the second diode serves as the second voltage input terminal of the second energy storage circuit and is connected to the second filter circuit to input the second voltage; the cathode of the second diode is connected to the first end of the fourth resistor; the second end of the fourth resistor and the first end of the fourth capacitor serve together as the switching signal output terminal of the second energy storage circuit and are connected to the switching circuit to output the switching signal; the second end of the fourth capacitor is connected to the power ground.

8. The relay control circuit according to any one of claims 1 to 2, characterized in that: The switch circuit includes a second field effect transistor and a sixth resistor; The gate of the second field effect transistor serves as a switch signal input terminal of the switch circuit and is connected to the second energy storage circuit to input the switch signal; The drain of the second field effect transistor is connected to the first end of the sixth resistor, the second end of the sixth resistor is connected to the first node and the first energy storage circuit; the source of the second field effect transistor is connected to the power ground.

9. The relay control circuit according to any one of claims 1 to 2, characterized in that: The driving circuit includes a first field effect transistor and a fifth resistor; The gate of the first field effect transistor is connected to the switch circuit, the first node and the first energy storage circuit, and the drain of the first field effect transistor and the first end of the fifth resistor serve as the driving signal output end of the driving circuit and are connected to the relay to output the driving signal; The second end of the fifth resistor is connected to the first power supply; the source of the first field effect transistor is connected to the power ground.

10. An electronic device, characterized in that: Comprising the relay control circuit as claimed in any one of claims 1 to 9.