Composite stacked packaging module
By adopting a composite stacked package module design in the DrMOS structure, and using the 3D stacking structure of the organic substrate and the Clip interconnection layer, the problem of uneven current distribution in the traditional DrMOS structure is solved, and a more compact and efficient power package is achieved.
Patent Information
- Application Number
- CN202420766510.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-15
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2034-04-15
AI Technical Summary
In the traditional DrMOS structure, the Clip current distribution is uneven and the role of Clip cannot be fully utilized, resulting in complex power design and low efficiency.
The packaging module design with composite stacking is adopted, and the new structure uses a new structure to realize a 3D stacking structure through the organic substrate and the Clip interconnection layer. It adopts a symmetrical design and a thermally conductive material raised structure to improve heat dissipation efficiency.
The compactness and high integration of the package module are achieved, the interconnection path between chips is shortened, the number of parasitic components is reduced, and the uniformity of current distribution and heat dissipation ability are improved.
Smart Images
Figure CN222581165U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a composite stacked packaging module, belonging to the technical field of chip packaging. Background Art
[0002] DrMOS (Driver and MOSFET) technology is an energy-saving technology for server motherboards launched by Intel in 2004. It is an integrated power module that combines the driver and MOSFET into a single chip. Traditional power design requires the selection, matching and layout of the driver and MOSFET separately, while DrMOS integrates these two functions into a compact and highly reliable package, which simplifies power design and provides higher efficiency and performance.
[0003] like Figure 1a and Figure 1b As shown in the figure, a common and widely used DrMOS structure is shown, which consists of a driver chip (Driver) and two power tubes (High side MOSFET <hsmos> / Low side MOSFET <lsmos>) are laid flat on the copper frame, a copper sheet (Clip) is welded above the two power tubes and extended to the copper frame, and the driver chip is interconnected with the frame and power tubes through wire bonding. In this architecture design, the driver chip and HSMOS are generally smaller in size, while the LSMOS is larger in size. HSMOS and LSMOS carry a larger current through the upper Clip, and because the Driver must be placed at the same time, the interconnection between HSMOS and LSMOS cannot be symmetrical, which will cause the Clip current distribution to be uneven and the Clip cannot be fully utilized. Utility Model Content
[0004] The technical problem to be solved by the utility model is to provide a composite stacked packaging module, which adopts a new design structure and combines a double-sided copper-clad ceramic substrate and a PCB board to construct a 3D stacked structure, and has the advantages of high integration, small parasitics and high efficiency.
[0005] In order to solve the above technical problems, the utility model adopts the following technical solutions: the utility model designs a composite stacked packaging module for packaging a driver chip, a high-side MOSFET power tube, and a low-side MOSFET power tube, comprising an organic substrate and a Clip interconnection layer, wherein the organic substrate comprises a top wiring layer, a bottom wiring layer, and at least one wiring layer between the top wiring layer and the bottom wiring layer, the high-side MOSFET power tube and the low-side MOSFET power tube are arranged between the top wiring layer and the bottom wiring layer, and the surfaces where the high-side MOSFET power tube and the low-side MOSFET power tube are respectively located are coplanar with each other, and the high-side MOSFET power tube and the low-side MOSFET power tube are coplanar with each other. Each pin on the high-side MOSFET power tube and each pin on the low-side MOSFET power tube are connected to the corresponding positions of the top wiring layer and the bottom wiring layer through the wiring layers inside the organic substrate respectively; the Clip interconnection layer is arranged on the surface of the top wiring layer and connected to the top wiring layer to realize the connection between the high-side MOSFET power tube and the low-side MOSFET power tube; the driving chip is located above the Clip interconnection layer, and each connection end on the driving chip is connected to the top wiring layer on the organic substrate through each conductive member to realize the connection between the driving chip and the high-side MOSFET power tube and the low-side MOSFET power tube, and each conductive member does not contact the Clip interconnection layer.
[0006] As a preferred technical solution of the utility model: taking the straight line connecting the surface center of the high-side MOSFET power tube and the surface center of the low-side MOSFET power tube as the reference line, in the projection direction perpendicular to the surface of the organic substrate, the projection of the high-side MOSFET power tube, the projection of the low-side MOSFET power tube, and the projection of the Clip interconnection layer are respectively distributed in axisymmetric relation to the reference line.
[0007] As a preferred technical solution of the utility model: the conductive parts connected between the driving chip and the top wiring layer on the organic substrate are distributed outside the edge of the Clip interconnection layer.
[0008] As a preferred technical solution of the utility model: in the projection direction perpendicular to the surface of the organic substrate, there is an overlapping area between the projection of the high-side MOSFET power tube and the projection of the Clip interconnection layer.
[0009] As a preferred technical solution of the utility model: a preset spacing greater than 0 is maintained between the facing surfaces of the driving chip and the Clip interconnection layer.
[0010] As a preferred technical solution of the utility model: resin is filled between the top wiring layer and the bottom wiring layer in the organic substrate to achieve packaging of the high-side MOSFET power tube and the low-side MOSFET power tube.
[0011] As a preferred technical solution of the utility model: a plastic packaging material is filled and wrapped from the upper surface of the top wiring layer in the organic substrate to the upper surface of the driver chip to encapsulate the structure above the upper surface of the top wiring layer.
[0012] As a preferred technical solution of the utility model: it also includes a protruding structure made of heat-conducting material, which is arranged on the surface of the area corresponding to the non-driving chip on the upper surface of the Clip interconnection layer, and the upper surface of the protruding structure passes through the upper surface of the plastic packaging material and is flush with the upper surface of the plastic packaging material.
[0013] As a preferred technical solution of the utility model: the material of the protrusion structure is the same as the material of the Clip interconnection layer.
[0014] The composite stacked packaging module of the utility model adopts the above technical solution and has the following technical effects compared with the prior art:
[0015] The utility model designs a composite stacked packaging module, which is based on an organic substrate, and arranges a high-side MOSFET power tube and a low-side MOSFET power tube between the top wiring layer and the bottom wiring layer thereof, and arranges a Clip interconnection layer on the upper surface of the top wiring layer, and places a driving chip above the top wiring layer of the organic substrate to form a stacked state with the MOSFET power tube, so that the overall structure is compact and the size is smaller, and the interconnection paths between different chips in the design are shorter, the parasitics are small, and the delay is short. In addition, a symmetrical structure design is introduced with respect to the Clip interconnection layer and each MOSFET power tube, so that the applied current is more uniform. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1a It is a 3D schematic diagram of the existing DrMOS structure;
[0017] Figure 1b is a top view schematic diagram of an existing DrMOS structure;
[0018] Figure 2 It is a 3D schematic diagram of the first embodiment of the composite stacked packaging module designed by the utility model;
[0019] Figure 3 It is a cross-sectional schematic diagram of the first embodiment of the composite stacked packaging module designed by the utility model;
[0020] Figure 4 It is a top view schematic diagram of the composite stacked packaging module designed by the utility model with respect to the first embodiment;
[0021] Figure 5 It is a cross-sectional schematic diagram of the second embodiment of the composite stacked packaging module designed by the utility model.
[0022] Among them, 1. driver chip, 2. high-side MOSFET power tube, 3. low-side MOSFET power tube, 4. organic substrate, 4-1. top wiring layer, 4-2. bottom wiring layer, 5. Clip interconnect layer, 6. conductive parts, 7. raised structure, 8. welding layer, 9. resin, 10. plastic packaging material. DETAILED DESCRIPTION
[0023] The specific implementation of the utility model is further described in detail below in conjunction with the accompanying drawings.
[0024] The utility model designs a composite stacked packaging module, which is used to package a driver chip 1, a high-side MOSFET power tube 2, and a low-side MOSFET power tube 3. In practical applications, Figures 2 to 4 As shown, it includes an organic substrate 4 and a Clip interconnection layer 5, wherein the organic substrate 4 includes a top wiring layer 4-1, a bottom wiring layer 4-2, and at least one wiring layer located between the top wiring layer 4-1 and the bottom wiring layer 4-2, the high-side MOSFET power tube 2 and the low-side MOSFET power tube 3 are arranged between the top wiring layer 4-1 and the bottom wiring layer 4-2, and the surfaces where the high-side MOSFET power tube 2 and the low-side MOSFET power tube 3 are respectively located are coplanar with each other, and each pin on the high-side MOSFET power tube 2 and each pin on the low-side MOSFET power tube 3 are respectively connected through each wiring layer inside the organic substrate 4. The top wiring layer 4-1 and the bottom wiring layer 4-2 are connected to the corresponding positions; the Clip interconnection layer 5 is arranged on the surface of the top wiring layer 4-1 through the welding layer 8 and connected to the top wiring layer 4-1, so as to realize the connection between the high-side MOSFET power tube 2 and the low-side MOSFET power tube 3; the driving chip 1 is located above the Clip interconnection layer 5, and each connection end on the driving chip 1 is connected to the top wiring layer 4-1 on the organic substrate 4 through each conductive member 6, so as to realize the connection between the driving chip 1 and the high-side MOSFET power tube 2 and the low-side MOSFET power tube 3, and each conductive member 6 does not contact the Clip interconnection layer 5.
[0025] Regarding the positional relationship between the high-side MOSFET power tube 2, the low-side MOSFET power tube 3, and the Clip interconnect layer 5, as shown in FIG. Figure 2 As shown, taking the straight line between the surface center of the high-side MOSFET power tube 2 and the surface center of the low-side MOSFET power tube 3 as the reference line, in the projection direction perpendicular to the surface of the organic substrate 4, the projection of the high-side MOSFET power tube 2, the projection of the low-side MOSFET power tube 3, and the projection of the Clip interconnection layer 5 are respectively axially symmetrically distributed compared to the reference line, that is, the design presents a symmetrical structure, so that the actual application current of the packaging module is more uniform.
[0026] Regarding the connection between the driver chip 1 and the top wiring layer 4-1, as shown Figure 3 and Figure 4 As shown, the conductive members 6 connecting the driving chip 1 and the top wiring layer 4-1 on the organic substrate 4 are distributed outside the edge of the Clip interconnection layer 5, that is, the conductive members 6 are separated from the Clip interconnection layer 5. In actual applications, the conductive members 6 are, for example, copper pillars.
[0027] Further on the actual design of the above structure, Figure 3 As shown, in the projection direction perpendicular to the surface of the organic substrate 4, there is an overlapping area between the projection of the high-side MOSFET power tube 2 and the projection of the Clip interconnection layer 5. And for the facing surfaces of the driver chip 1 and the Clip interconnection layer 5, a preset spacing greater than 0 is designed to be maintained, and the gap position is filled with a plastic encapsulation material 10 or a resin 9.
[0028] In actual production, in order to improve the stability of the overall structure, the resin 9 is filled between the top wiring layer 4-1 and the bottom wiring layer 4-2 in the organic substrate 4 to achieve the packaging of the high-side MOSFET power tube 2 and the low-side MOSFET power tube 3, and the plastic packaging material 10 is further filled from the upper surface of the top wiring layer 4-1 in the organic substrate 4 to the upper surface of the driver chip 1 to achieve packaging of the structure above the upper surface of the top wiring layer 4-1. In this way, the overall stability of the above-mentioned design structure is improved by the fixed connection between the upper and lower packaging structures.
[0029] In addition, based on Figures 2 to 4 The structure shown in Figure 5 The design shown in the figure also includes a protruding structure 7 made of a thermally conductive material. The protruding structure 7 is arranged on the surface of the area on the upper surface of the Clip interconnection layer 5 corresponding to the non-driving chip 1, and the upper surface of the protruding structure 7 passes through the upper surface of the plastic packaging material 10 and is flush with the upper surface of the plastic packaging material 10. In actual application, the material of the protruding structure 7 is the same as that of the Clip interconnection layer 5, that is, the overall structure realizes double-sided heat dissipation through the upper surface of the protruding structure 7 and the lower surface of the bottom wiring layer 4-2 in the organic substrate 4, thereby effectively improving the heat dissipation capacity of the designed composite stacked packaging module.
[0030] The above technical solution designs a composite stacked packaging module, which is based on an organic substrate 4, and arranges a high-side MOSFET power tube 2 and a low-side MOSFET power tube 3 between its top wiring layer 4-1 and the bottom wiring layer 4-2, and arranges a Clip interconnection layer 5 on the upper surface of the top wiring layer 4-1, and places a driver chip 1 above the top wiring layer 4-1 of the organic substrate 4 to form a stacked state with the MOSFET power tube, so that the overall structure is compact and smaller in size, and the interconnection path between different chips in the design is shorter, the parasitic is small, and the delay is short. In addition, a symmetrical structure design is introduced for the Clip interconnection layer 5 and each MOSFET power tube to make the applied current more uniform.
[0031] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in this field without departing from the purpose of the present invention.< / lsmos> < / hsmos>
Claims
1. A composite stacked packaging module, used for packaging a driver chip (1), a high-side MOSFET power tube (2), and a low-side MOSFET power tube (3), characterized in that: The invention comprises an organic substrate (4) and a Clip interconnection layer (5), wherein the organic substrate (4) comprises a top wiring layer (4-1), a bottom wiring layer (4-2), and at least one wiring layer located between the top wiring layer (4-1) and the bottom wiring layer (4-2); a high-side MOSFET power tube (2) and a low-side MOSFET power tube (3) are arranged between the top wiring layer (4-1) and the bottom wiring layer (4-2); and the surfaces where the high-side MOSFET power tube (2) and the low-side MOSFET power tube (3) are located are coplanar with each other; and each pin on the high-side MOSFET power tube (2) and each pin on the low-side MOSFET power tube (3) are connected to each other through each wiring layer inside the organic substrate (4). The top wiring layer (4-1) and the bottom wiring layer (4-2) are connected to corresponding positions; the Clip interconnection layer (5) is arranged on the surface of the top wiring layer (4-1) and connected to the top wiring layer (4-1), so as to realize the connection between the high-side MOSFET power tube (2) and the low-side MOSFET power tube (3); the driving chip (1) is located above the Clip interconnection layer (5), and each connection end on the driving chip (1) is connected to the top wiring layer (4-1) on the organic substrate (4) through each conductive member (6), so as to realize the connection between the driving chip (1) and the high-side MOSFET power tube (2) and the low-side MOSFET power tube (3), and each conductive member (6) does not contact the Clip interconnection layer (5).
2. A composite stacked packaging module according to claim 1, characterized in that: Taking the straight line connecting the center of the surface of the high-side MOSFET power tube (2) and the center of the surface of the low-side MOSFET power tube (3) as a reference line, in the projection direction perpendicular to the surface of the organic substrate (4), the projection of the high-side MOSFET power tube (2), the projection of the low-side MOSFET power tube (3), and the projection of the Clip interconnection layer (5) are all axially symmetrically distributed relative to the reference line.
3. The composite stacked packaging module according to claim 1, characterized in that: The conductive elements (6) connected between the driving chip (1) and the top wiring layer (4-1) on the organic substrate (4) are distributed outside the edge of the Clip interconnection layer (5).
4. The composite stacked packaging module according to claim 1, characterized in that: In a projection direction perpendicular to the surface of the organic substrate (4), there is an overlapping area between the projection of the high-side MOSFET power tube (2) and the projection of the Clip interconnection layer (5).
5. The composite stacked packaging module according to claim 1, characterized in that: A preset spacing greater than 0 is maintained between the opposing surfaces of the driving chip (1) and the Clip interconnection layer (5).
6. A composite stacked packaging module according to any one of claims 1 to 5, characterized in that: A resin (9) is filled between the top wiring layer (4-1) and the bottom wiring layer (4-2) in the organic substrate (4), thereby achieving packaging of the high-side MOSFET power tube (2) and the low-side MOSFET power tube (3).
7. A composite stacked packaging module according to any one of claims 1 to 5, characterized in that: A plastic encapsulation material (10) is filled and wrapped from the upper surface of the top wiring layer (4-1) in the organic substrate (4) to the upper surface of the driver chip (1), thereby encapsulating the structure above the upper surface of the top wiring layer (4-1).
8. The composite stacked packaging module according to claim 7, characterized in that: It also includes a protruding structure (7) made of a heat-conducting material, the protruding structure (7) being arranged on the surface of the area of the upper surface of the Clip interconnection layer (5) corresponding to the non-driving chip (1), and the upper surface of the protruding structure (7) passing through the upper surface of the plastic encapsulation material (10) and being flush with the upper surface of the plastic encapsulation material (10).
9. The composite stacked packaging module according to claim 8, characterized in that: The material of the protruding structure (7) is the same as the material of the Clip interconnection layer (5).