Driving circuit applied to flyback power supply and flyback power supply

Abstract

The utility model discloses a drive circuit applied to a flyback power supply and the flyback power supply, which are applied to the field of flyback power supplies. When the output pulse signal of the control IC has the minimum pulse width, signals higher than a first threshold value in the pulse signal are filtered out through the low-pass filter circuit, at the moment, the low-pass filter circuit outputs a low-level signal, and meanwhile the first hysteresis circuit correspondingly outputs a level signal opposite to the low-pass filter circuit; when the pulse width is smaller than the maximum pulse width, a high-level signal is output, and at the moment, the high-level signal is converted through the level conversion circuit to obtain a low-level signal, namely, the finally output signal does not have the signal with the minimum pulse width. In conclusion, the problem that in the prior art, when the pulse signal of the constant frequency control IC has the minimum pulse width, the conduction time corresponding to the pulse width is too short, and then normal conduction of the subsequently connected switching tube cannot be supported is solved, the loss of the circuit is integrally reduced, and the reliability of the circuit is improved.

Description

Technical Field

[0001] The utility model relates to the field of flyback power supplies, in particular to a drive circuit and a flyback power supply applied to the flyback power supply. Background Art

[0002] There are two main types of flyback power supply ICs at present, one is variable frequency control IC (integrated circuit) and the other is fixed frequency control IC. Since both flyback power supply ICs can withstand the load themselves, their variable frequency control ICs and fixed frequency control ICs are widely used in power electronics technology.

[0003] In the variable frequency control IC, the IC automatically adjusts the switching frequency according to the load weight, so that the duty cycle of the driven PWM wave is within the appropriate range, ensuring the subsequent connected IGBT (Insulated Gate Bipolar Transistor) or MOSFET

[0004] (Metal-Oxide-SemiconductorField-Effect Transistor, Metal-Oxide-Semiconductor Field-Effect Transistor) and other switching devices can be fully turned on. In the fixed frequency control IC, according to the power principle formula of the flyback power supply IC: Ton = sqrt (2Pout*L / (Vin*Vin*fsw*yita)), it can be known that the turn-on time Ton of the flyback output is related to the output power Pout, input voltage Vin, switching frequency fsw, efficiency yita, and flyback primary inductance L. However, since the primary inductance and efficiency are fixed in the design of the fixed frequency control IC, the pulse signal output by the fixed frequency control IC has a minimum pulse width when the input is high voltage and the output power is small. When the pulse signal of the fixed frequency control IC has a minimum pulse width, the turn-on time corresponding to its pulse width is too short, and thus cannot support the normal conduction of the subsequent connected switch tube (IGBT or MOSFET), which has a negative impact on the reliability and loss of the overall circuit.

[0005] In view of the above-mentioned technology, finding a driving optimization circuit is an urgent problem to be solved by those skilled in the art. Utility Model Content

[0006] The purpose of the utility model is to provide a driving circuit and a flyback power supply for a flyback power supply, which can solve the problem in the prior art that when the pulse signal of the fixed frequency control IC has a minimum pulse width and cannot control the subsequent connected switch tube to be turned on, the reliability and loss of the overall circuit are negatively affected.

[0007] In order to solve the above technical problems, the present application provides a driving circuit applied to a flyback power supply, comprising: a first hysteresis circuit for providing a first threshold and a second threshold, a low-pass filter circuit for filtering out signals above the first threshold, and a level conversion circuit for level signal conversion;

[0008] The input end of the low-pass filter circuit is connected to the output end of the control IC, and the output end of the low-pass filter circuit is connected to the input end of the first hysteresis circuit;

[0009] The output end of the first hysteresis circuit is connected to the input end of the level conversion circuit, and the output end of the level conversion circuit is connected to the subsequent switch tube.

[0010] Preferably, the first hysteresis circuit comprises: a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a first comparator;

[0011] A first end of the first resistor is connected to the first power supply end, and a second end of the first resistor is connected to a first end of the second resistor, a non-inverting input end of the first comparator, and a first end of the third resistor;

[0012] The second end of the second resistor is grounded;

[0013] The inverting input terminal of the first comparator is connected to the output terminal of the low-pass filter circuit as the input terminal of the first hysteresis circuit, and the output terminal of the first comparator is connected to the second terminal of the third resistor and the first terminal of the fourth resistor;

[0014] The second end of the fourth resistor and the first end of the fifth resistor are connected to the input end of the level conversion circuit as the output end of the first hysteresis circuit;

[0015] The second end of the fifth resistor is connected to the second power supply end.

[0016] Preferably, the level conversion circuit comprises: a first triode and a second triode;

[0017] The emitter of the first triode is connected to the second power supply end and the second end of the fifth resistor, the base of the first triode is connected to the second end of the fourth resistor and the first end of the fifth resistor as the input end of the level conversion circuit, and the collector of the first triode and the collector of the second triode are connected to the subsequent switch tube as the output end of the level conversion circuit;

[0018] The base of the second triode is connected to the first end of the fourth resistor through the sixth resistor, and the emitter of the second triode is grounded.

[0019] Preferably, it further comprises: a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor and a second comparator; wherein the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor, the tenth resistor and the second comparator constitute a second hysteresis circuit;

[0020] A first end of the seventh resistor is connected to the first power supply end, and a second end of the seventh resistor is connected to a first end of the eighth resistor, a first end of the ninth resistor, and a non-inverting input end of the second comparator;

[0021] The second end of the eighth resistor is grounded;

[0022] The inverting input terminal of the second comparator is connected to the output terminal of the low-pass filter circuit and the inverting input terminal of the first comparator, and the output terminal of the second comparator is connected to the second terminal of the ninth resistor, the first terminal of the tenth resistor and the first terminal of the sixth resistor;

[0023] The second end of the tenth resistor is connected to the second power supply end.

[0024] Preferably, it also includes: a driving enhancement circuit for amplifying the output current of the level conversion circuit;

[0025] The input end of the driving enhancement circuit is connected to the output end of the level conversion circuit, and the output end of the driving enhancement circuit is connected to the subsequent switch tube.

[0026] Preferably, the driving enhancement circuit comprises: a third transistor and a fourth transistor;

[0027] The collector of the third triode is connected to the second power supply end, the base of the third triode and the base of the fourth triode are connected to the output end of the level conversion circuit as the input end of the driving enhancement circuit, and the emitter of the third triode and the emitter of the fourth triode are connected to the output end of the driving enhancement circuit as the output end of the driving enhancement circuit;

[0028] The collector of the fourth transistor is grounded.

[0029] Preferably, it further comprises: an eleventh resistor;

[0030] A first end of the eleventh resistor is connected to the output end of the level conversion circuit, and a second end of the eleventh resistor is connected to the input end of the driving enhancement circuit.

[0031] Preferably, the low-pass filter circuit comprises: a twelfth resistor and a first capacitor;

[0032] The first end of the twelfth resistor is connected to the output end of the control IC as the input end of the low-pass filter circuit, and the second end of the twelfth resistor and the first end of the first capacitor are connected to the input end of the first hysteresis circuit as the output end of the low-pass filter circuit;

[0033] The second terminal of the first capacitor is grounded.

[0034] In order to solve the above technical problems, the present application also provides a flyback power supply, including a control IC and the above-mentioned drive circuit applied to the flyback power supply.

[0035] The utility model provides a driving circuit for flyback power supply. When the output pulse signal of the control IC has a minimum pulse width, the low-pass filter circuit filters out the signal above the first threshold in the pulse signal to retain the signal below the first threshold. At this time, the low-pass filter circuit outputs a low-level signal. The first hysteresis circuit provides the first threshold and the second threshold respectively, so that after filtering by the low-pass filter circuit, the corresponding output is a level signal opposite to the low-pass filter circuit, that is, a high-level signal is output. At this time, the high-level signal is converted by the level conversion circuit to obtain a low-level signal, that is, the final output signal does not have a signal with a minimum pulse width, so the subsequent connected switch tube does not have the problem that the conduction time corresponding to the pulse width cannot reach the conduction time. In summary, the problem in the prior art that when the pulse signal of the fixed frequency control IC has a minimum pulse width, the conduction time corresponding to the pulse width is too short, and thus the subsequent connected switch tube cannot be normally turned on is solved, and the circuit loss is reduced as a whole and the reliability of the circuit is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present utility model, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 A circuit diagram of a drive circuit applied to a flyback power supply provided in the present application;

[0038] Figure 2 A specific circuit diagram of a driving circuit applied to a flyback power supply provided in the present application;

[0039] Figure 3 A first schematic diagram of voltage high and low levels provided in an embodiment of the present application;

[0040] Figure 4 A second schematic diagram of voltage high and low levels provided in an embodiment of the present application;

[0041] Figure 5 A third schematic diagram of voltage high and low levels provided for an embodiment of the present application. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of them. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the protection scope of the utility model.

[0043] The core of the utility model is to provide a driving circuit and a flyback power supply applied to a flyback power supply.

[0044] In order to enable those skilled in the art to better understand the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0045] Figure 1 A circuit diagram of a driving circuit for a flyback power supply provided in the present application, such as Figure 1 As shown, 1 is a control IC, 2 is a low-pass filter circuit, 3 is a first hysteresis circuit, and 4 is a level conversion circuit. The specific connection relationship is: the input end of the low-pass filter circuit 2 is connected to the output end of the control IC1, and the output end of the low-pass filter circuit 2 is connected to the input end of the first hysteresis circuit 3; the output end of the first hysteresis circuit 3 is connected to the input end of the level conversion circuit 4, and the output end of the level conversion circuit 4 is connected to the subsequent switch tube.

[0046] The working principle of the driving circuit applied to the flyback power supply provided by the present application is as follows: the first hysteresis circuit 3 determines the first threshold value VA and the second threshold value VB according to the internal circuit structure and the parameters of the corresponding electronic device, and the first threshold value VA is greater than the second threshold value VB. The low-pass filter circuit 2 filters the pulse signal output from the control IC1 according to the internal circuit structure and the parameters of the corresponding internal electronic device, and filters out the pulse signal higher than the first threshold value VA provided by the first hysteresis circuit 3 in the pulse signal, and only retains the signal lower than the first threshold value VA, at which time the low-pass filter circuit 2 outputs a low-level signal. When the low-level signal passes through the first hysteresis circuit 3, it corresponds to outputting a level signal opposite to the low-pass filter circuit 2, that is, outputting a high-level signal. At this time, the high level is converted by the level conversion circuit 4 to obtain a final low-level signal, that is, there is no signal with a minimum pulse width in the final low-level signal, that is, there is no signal with a minimum pulse width in the final output signal of the driving circuit applied to the flyback power supply provided by the present application.

[0047] It should be noted that the present application does not limit the specific structures of the first hysteresis circuit 3, the low-pass filter circuit 2 and the level conversion circuit 4, which can be set according to the needs of the user.

[0048] The present embodiment provides a driving circuit for a flyback power supply. When the output pulse signal of the control IC has a minimum pulse width, the low-pass filter circuit filters out the signal above the first threshold in the pulse signal to retain the signal below the first threshold. At this time, the low-pass filter circuit outputs a low-level signal. The first hysteresis circuit provides the first threshold and the second threshold respectively, so that after filtering by the low-pass filter circuit, the corresponding output is a level signal opposite to that of the low-pass filter circuit, that is, a high-level signal is output. At this time, the high-level signal is converted by the level conversion circuit to obtain a low-level signal, that is, the final output signal does not have a signal with a minimum pulse width, so the subsequent connected switch tube does not have the problem that the conduction time corresponding to the pulse width cannot reach the conduction time. In summary, the problem that when the pulse signal of the fixed frequency control IC has a minimum pulse width in the prior art, the conduction time corresponding to the pulse width is too short, and thus cannot support the normal conduction of the subsequent connected switch tube is solved, and the circuit loss is reduced as a whole and the reliability of the circuit is improved.

[0049] Based on the above embodiments, as a preferred embodiment, Figure 2 As shown, the first hysteresis circuit 3 includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a first comparator U1. The specific connection relationship is: the first end of the first resistor R1 is connected to the first power supply end (+5V), the second end of the first resistor R1 is connected to the first end of the second resistor R2, the non-inverting input end of the first comparator U1 and the first end of the third resistor R3; the second end of the second resistor R2 is grounded; the inverting input end of the first comparator U1 is connected to the output end of the low-pass filter circuit 2 as the input end of the first hysteresis circuit 3, and the output end of the first comparator U1 is connected to the second end of the third resistor R3 and the first end of the fourth resistor R4; the second end of the fourth resistor R4 and the first end of the fifth resistor R5 are connected to the input end of the level conversion circuit 4 as the output end of the first hysteresis circuit 3; the second end of the fifth resistor R5 is connected to the second power supply end (+15V). According to the structure of the first hysteresis circuit 3 provided by the present application and the resistance value of the corresponding resistor, the first threshold value VA and the second threshold value VB can be obtained under the threshold value formula, wherein the first threshold value VA is greater than the second threshold value VB. The principle of the first hysteresis circuit 3 is that when the output of the low-pass filter circuit 2 is at a low level, the low-level signal is flipped between high and low levels in the first hysteresis circuit 3, that is, the output signal is a high-level signal.

[0050] It should be noted that the first hysteresis circuit 3 provided in the present application is only one possible implementation method, but is not limited to this implementation method and can be set according to the needs of the user.

[0051] At the same time, the present application does not limit the threshold formula and the resistance parameters of the resistor, etc., and can be debugged by itself according to the requirements for the first threshold VA and the second threshold VB.

[0052] On the basis of the first hysteresis circuit 3 provided in the above embodiment, the level conversion circuit 4 includes: a first transistor Q1 and a second transistor Q2. The specific connection relationship is: the emitter of the first transistor Q1 is connected to the second power supply end (+15V) and the second end of the fifth resistor R5, the base of the first transistor Q1 is connected to the second end of the fourth resistor R4 and the first end of the fifth resistor R5 as the input end of the level conversion circuit 4, the collector of the first transistor Q1 and the collector of the second transistor Q2 are connected to the subsequent switch tube as the output end of the level conversion circuit 4; the base of the second transistor Q2 is connected to the first end of the fourth resistor R4 through the sixth resistor R6, and the emitter of the second transistor Q2 is grounded. The function of the level conversion circuit 4 is to convert the output signal of the first hysteresis circuit 3 into a high-low level, that is, when the first hysteresis circuit 3 outputs a high level, it outputs a low level after passing through the level conversion circuit 4.

[0053] According to the specific structure of the first hysteresis circuit 3 and the level conversion circuit 4 provided by the present application, a channel is formed between the fourth resistor R4 and the sixth resistor R6, and the channel affects the normal operation of the first transistor Q1 and the second transistor Q2 in the subsequent level conversion circuit 4. Therefore, in order to avoid the interference caused by the connection between the fourth resistor R4 and the sixth resistor R6, on the basis of the above circuit structure, the driving circuit applied to the flyback power supply also includes: a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and a second comparator U2. And the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the tenth resistor R10 and the second comparator U2 constitute a second hysteresis circuit. The specific connection relationship is: the first end of the seventh resistor R7 is connected to the first power supply end (+5V), the second end of the seventh resistor R7 is connected to the first end of the eighth resistor R8, the first end of the ninth resistor R9 and the non-inverting input end of the second comparator U2; the second end of the eighth resistor R8 is grounded; the inverting input end of the second comparator U2 is connected to the output end of the low-pass filter circuit 2 and the inverting input end of the first comparator U1, the output end of the second comparator U2 is connected to the second end of the ninth resistor R9, the first end of the tenth resistor R10 and the first end of the sixth resistor R6; the second end of the tenth resistor R10 is connected to the second power supply end (+15V), and the second end of the sixth resistor R6 is connected to the base of the second transistor Q2.

[0054] It should be noted that the first hysteresis circuit 3, the level conversion circuit 4 and the second hysteresis circuit provided in the present application are only one possible implementation method, but are not limited to only this implementation method and can be set according to the needs of the user. As a preferred embodiment, the first comparator U1 and the second comparator U2 adopt an inverse logic structure and an OC gate output comparator.

[0055] In the present embodiment, specific structures of a first hysteresis circuit, a level conversion circuit and a second hysteresis circuit are provided. In the first hysteresis circuit structure, the first threshold value and the second threshold value can be determined according to the resistance value of the first resistor, the resistance value of the second resistor, the resistance value of the third resistor, the resistance value of the fourth resistor, the resistance value of the fifth resistor and the function of the first comparator. In the level conversion structure, the output signal of the first hysteresis circuit is highly flipped between high and low levels according to the first transistor and the second transistor. At the same time, in the second hysteresis circuit structure, the interference of signal transmission is reduced according to the provided sixth resistor, seventh resistor, eighth resistor, ninth resistor, tenth resistor and second comparator, thereby ensuring the accuracy of signal transmission.

[0056] Based on the above embodiments, Figure 2 As shown, after the level conversion circuit 4, a driving enhancement circuit for amplifying the output current of the level conversion circuit 4 needs to be connected. The driving enhancement circuit includes: a third transistor Q3 and a fourth transistor Q4. The connection relationship is: the collector of the third transistor Q3 is connected to the second power supply end (+15V), the base of the third transistor Q3 and the base of the fourth transistor Q4 are connected to the output end of the level conversion circuit 4 as the input end of the driving enhancement circuit, and the emitter of the third transistor Q3 and the emitter of the fourth transistor Q4 are connected to the output end of the driving enhancement circuit as the output end of the driving enhancement circuit; the collector of the fourth transistor Q4 is grounded.

[0057] When the transistor is in the circuit, a resistor is usually connected to the base of the transistor to limit the current and divide the voltage to ensure the normal use of the transistor. Figure 2 As shown, between the level conversion circuit 4 and the driving enhancement circuit, an eleventh resistor R11 is also included. The first end of the eleventh resistor R11 is connected to the output end of the level conversion circuit 4, and the second end of the eleventh resistor R11 is connected to the input end of the driving enhancement circuit. In other words, the first end of the eleventh resistor R11 is connected to the collector of the first transistor Q1 and the collector of the second transistor Q2, and the second end of the eleventh resistor R11 is connected to the base of the third transistor Q3 and the base of the fourth transistor Q4.

[0058] It should be noted that the drive enhancement circuit provided in this application is only one possible implementation method, but is not limited to this implementation method and can be set according to user needs. It should also be noted that the structure of the drive enhancement circuit is related to the structure of the level conversion circuit.

[0059] On the basis of the above embodiments, as a preferred embodiment, the low-pass filter circuit 2 is a filter circuit of RC structure, including: a twelfth resistor R12 and a first capacitor C1. The connection relationship of the circuit is: the first end of the twelfth resistor R12 is connected to the output end of the control IC1 as the input end of the low-pass filter circuit 2, the second end of the twelfth resistor R12 and the first end of the first capacitor C1 are connected to the input end of the first hysteresis circuit 3 as the output end of the low-pass filter circuit 2; the second end of the first capacitor C1 is grounded. The function of the low-pass filter circuit 2 is to filter the pulse signal output by the control IC1, filter out the signal higher than the first threshold VA, and retain the signal lower than the first threshold VA, so that the first hysteresis circuit 3 connected subsequently can flip the high and low levels according to the signal output by the low-pass filter circuit 2.

[0060] It should be noted that this application is only one possible implementation method, but is not limited to this implementation method and can be set according to user needs.

[0061] In summary, the circuit provided by the above embodiment controls the pulse signal output by IC1 in two situations: the first situation: the pulse signal output by IC1 has a minimum pulse width; the second situation: the pulse signal output by IC1 is a normal pulse signal. Therefore, corresponding to different situations, the working principle of the driving circuit applied to the flyback power supply provided by the present application is also divided into two types.

[0062] The first working principle corresponds to the situation where there is a pulse signal with a minimum pulse width in the pulse signal output by the control IC1: the first hysteresis circuit 3 determines the first threshold VA and the second threshold VB according to the internal circuit structure and the parameters of the corresponding electronic device, and the first threshold VA is greater than the second threshold VB. The low-pass filter circuit 2 filters the pulse signal output from the control IC1 according to the internal circuit structure and the parameters of the corresponding internal electronic device, and filters out the pulse signal in the pulse signal that is higher than the first threshold VA provided by the first hysteresis circuit 3, and only retains the signal lower than the first threshold VA. At this time, the low-pass filter circuit 2 outputs a low-level signal. When the low-level signal passes through the first hysteresis circuit 3, it corresponds to outputting a level signal opposite to the low-pass filter circuit 2, that is, outputting a high-level signal. At this time, the high level is converted by the level conversion circuit 4 to obtain the final low-level signal, and the signal is amplified by the drive enhancement circuit. That is, there is no signal with a minimum pulse width in the final low-level signal, that is, there is no signal with a minimum pulse width in the final output signal of the drive circuit applied to the flyback power supply provided by the present application.

[0063] The second working principle corresponds to the situation where the pulse signal output by control IC1 is a normal pulse signal: Figure 3 , Figure 4 and Figure 5As shown, the pulse signal output by the control IC1 is Vin, the pulse signal output by the drive enhancement circuit is Vout, the first threshold is VA, and the second threshold is VB. When the pulse signal output by the control IC1 is a normal pulse signal, the function of the low-pass filter circuit 2 is delay. At the first moment (t0), the normal pulse signal reaches the first threshold VA. At this time, the first comparator U1 and the second comparator U2 are controlled to flip the level at the same time, so that the signal output by the first hysteresis circuit 3 and the second hysteresis circuit is low level, and then the low level is converted to high level through the level conversion circuit 4, and amplified through the drive enhancement circuit, so that the output signal is high level. Among them, the working principles of its level conversion circuit 4 and the driving enhancement circuit are as follows: when the output of the first comparator U1 is a low level, the emitter E and the base B of the first triode Q1 are forward biased, the emitter E and the base B of the first triode Q1 are connected, and the emitter E and the collector C of the first triode Q1 are connected, which leads to the forward bias between the base B and the emitter E of the third triode Q3, the base B and the emitter E of the third triode Q3 are connected, and the collector C and the emitter E of the third triode Q3 are connected; when the output of the second comparator U2 is a low level, the base B and the emitter E of the second triode Q2 are cut off, the collector C and the emitter E of the second triode Q2 are cut off, and at this time, the emitter E and the collector C of the fourth triode Q4 are cut off. That is, when the signals output by the first comparator U1 and the second comparator U2 are both at low levels, the first transistor Q1 and the third transistor Q3 are turned on, and the second transistor Q2 and the fourth transistor Q4 are turned off.

[0064] At the second moment (t1), the voltage Vin output by the control IC1 is still greater than the first threshold VA. At this time, the first hysteresis circuit 3 and the second hysteresis circuit do not flip and still output a low level, ultimately driving the enhancement circuit to output a high level.

[0065] At the third moment (t2), the voltage output by the control IC1 is less than the second threshold value VB. At this time, the first comparator U1 and the second comparator U2 are simultaneously controlled to flip the high and low levels, and the low level is flipped to the high level. At this time, the high level is converted to the low level by the level conversion circuit 4, and amplified by the driving enhancement circuit, so that the output signal is a low level. In this process, since the second threshold value VB is less than the first threshold value VA, the hysteresis loop width Vth is formed according to the first threshold value VA and the second threshold value VB. The hysteresis loop width Vth can be adjusted by adjusting the size of the first threshold value VA or the second threshold value VB, so as to realize the delay compensation of the low-pass filter circuit 2 when inputting a normal pulse, so that the on-time of the output pulse signal is close to the on-time of the control I1C output. Among them, the working principles of its level conversion circuit 4 and the driving enhancement circuit are as follows: when the output of the first comparator U1 is a high level, the emitter E and the base B of the first triode Q1 are reverse biased, the emitter E and the base B of the first triode Q1 are not conductive, and the emitter E and the collector C of the first triode Q1 are not conductive, which leads to the cutoff between the collector C and the emitter E of the third triode Q3; when the output of the second comparator U2 is a high level, the base B and the emitter E of the second triode Q2 are forward biased, the base B and the emitter E of the second triode Q2 are conductive, and the collector C and the emitter E of the second triode Q2 are conductive. At this time, the emitter E and the base B of the fourth triode Q4 are forward biased, the emitter E and the base B of the fourth triode Q4 are conductive, and the emitter E and the collector C of the fourth triode Q4 are conductive. That is, when the signals output by the first comparator U1 and the second comparator U2 are both at high level, the first transistor Q1 and the third transistor Q3 are turned off, and the second transistor Q2 and the fourth transistor Q4 are turned on.

[0066] It can be seen that the driving circuit for flyback power supply provided by this embodiment, when the output pulse signal of the control IC has a minimum pulse width, the signal above the first threshold in the pulse signal is filtered out by the low-pass filter circuit to retain the signal below the first threshold. At this time, the low-pass filter circuit outputs a low-level signal, and the first hysteresis circuit provides the first threshold and the second threshold respectively, so that after filtering by the low-pass filter circuit, the corresponding output is a level signal opposite to that of the low-pass filter circuit, that is, a high-level signal is output. At this time, the high-level signal is converted by the level conversion circuit to obtain a low-level signal, that is, the final output signal does not have a signal with a minimum pulse width, so the subsequent connected switch tube does not have the problem that the conduction time corresponding to the pulse width cannot reach the conduction time. In summary, the problem in the prior art that when the pulse signal of the fixed frequency control IC has a minimum pulse width, the conduction time corresponding to the pulse width is too short, and thus cannot support the normal conduction of the subsequent connected switch tube is solved, and the circuit loss is reduced as a whole and the reliability of the circuit is improved. When the output pulse signal of the control IC is of normal pulse signal width, the low-pass filter circuit can adjust the first threshold and the second threshold to achieve delay compensation for the input normal pulse signal, so that the on-time of the output pulse signal is close to the on-time of the control IC output.

[0067] To solve the above technical problems, the present application also provides a flyback power supply, including the control IC and the drive circuit applied to the flyback power supply described above, and having the same beneficial effects. Its specific embodiment is the same as the embodiment of the drive circuit applied to the flyback power supply described above, and this application will not repeat it.

[0068] The above is a detailed introduction to a drive circuit and a flyback power supply provided by the utility model for use in a flyback power supply. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the utility model, the utility model can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the claims of the utility model.

[0069] It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A driving circuit for a flyback power supply, characterized in that: include: A first hysteresis circuit for providing a first threshold and a second threshold, a low-pass filter circuit for filtering out signals above the first threshold, and a level conversion circuit for level signal conversion; The input end of the low-pass filter circuit is connected to the output end of the control IC, and the output end of the low-pass filter circuit is connected to the input end of the first hysteresis circuit; The output end of the first hysteresis circuit is connected to the input end of the level conversion circuit, and the output end of the level conversion circuit is connected to the subsequent switch tube.

2. The driving circuit for flyback power supply according to claim 1, characterized in that: The first hysteresis circuit comprises: a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a first comparator; The first end of the first resistor is connected to the first power supply end, and the second end of the first resistor is connected to the first end of the second resistor, the non-inverting input end of the first comparator and the first end of the third resistor; The second end of the second resistor is grounded; The inverting input terminal of the first comparator is connected to the output terminal of the low-pass filter circuit as the input terminal of the first hysteresis circuit, and the output terminal of the first comparator is connected to the second terminal of the third resistor and the first terminal of the fourth resistor; The second end of the fourth resistor and the first end of the fifth resistor are connected to the input end of the level conversion circuit as the output end of the first hysteresis circuit; The second end of the fifth resistor is connected to the second power supply end.

3. The driving circuit for flyback power supply according to claim 2, characterized in that: The level conversion circuit comprises: a first triode and a second triode; The emitter of the first transistor is connected to the second power supply end and the second end of the fifth resistor, the base of the first transistor is connected to the second end of the fourth resistor and the first end of the fifth resistor as the input end of the level conversion circuit, and the collector of the first transistor and the collector of the second transistor are connected to the subsequent switch tube as the output end of the level conversion circuit; The base of the second transistor is connected to the first end of the fourth resistor via the sixth resistor, and the emitter of the second transistor is grounded.

4. The driving circuit for flyback power supply according to claim 3, characterized in that: Also includes: a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor and a second comparator; wherein the sixth resistor, the seventh resistor, the eighth resistor, the ninth resistor, the tenth resistor and the second comparator constitute a second hysteresis circuit; The first end of the seventh resistor is connected to the first power supply end, and the second end of the seventh resistor is connected to the first end of the eighth resistor, the first end of the ninth resistor and the non-inverting input end of the second comparator; The second end of the eighth resistor is grounded; The inverting input terminal of the second comparator is connected to the output terminal of the low-pass filter circuit and the inverting input terminal of the first comparator, and the output terminal of the second comparator is connected to the second terminal of the ninth resistor, the first terminal of the tenth resistor and the first terminal of the sixth resistor; The second end of the tenth resistor is connected to the second power supply end.

5. The driving circuit for flyback power supply according to claim 3, characterized in that: Also includes: A drive enhancement circuit for amplifying an output current of the level conversion circuit; The input end of the driving enhancement circuit is connected to the output end of the level conversion circuit, and the output end of the driving enhancement circuit is connected to the subsequent switch tube.

6. The driving circuit for flyback power supply according to claim 5, characterized in that: The driving enhancement circuit comprises: a third triode and a fourth triode; The collector of the third transistor is connected to the second power supply end, the base of the third transistor and the base of the fourth transistor are connected to the output end of the level conversion circuit as the input end of the driving enhancement circuit, and the emitter of the third transistor and the emitter of the fourth transistor are connected to the subsequent switch tube as the output end of the driving enhancement circuit; The collector of the fourth transistor is grounded.

7. The driving circuit for flyback power supply according to claim 5, characterized in that: Also includes: 11th resistor; A first end of the eleventh resistor is connected to the output end of the level conversion circuit, and a second end of the eleventh resistor is connected to the input end of the driving enhancement circuit.

8. The driving circuit for a flyback power supply according to any one of claims 1 to 7, characterized in that: The low-pass filter circuit comprises: a twelfth resistor and a first capacitor; The first end of the twelfth resistor is connected to the output end of the control IC as the input end of the low-pass filter circuit, and the second end of the twelfth resistor and the first end of the first capacitor are connected to the input end of the first hysteresis circuit together as the output end of the low-pass filter circuit; The second terminal of the first capacitor is grounded.

9. A flyback power supply, characterized in that: The invention comprises a control IC and a driving circuit applied to a flyback power supply as described in any one of claims 1 to 8.

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