Strong anti-interference driving circuit

Abstract

The utility model discloses a strong anti-interference driving circuit, which comprises an analog control circuit used for outputting a pwm signal; the push-pull driving circuit is used for dividing one pwm signal output by the analog control circuit into two pwm signals; the driving transformer module is used for changing the voltage to obtain a target positive voltage and a target negative voltage; the isolation driving circuit is used for realizing isolation transmission of the software pwm signal, improving the driving capability of the software pwm signal and obtaining a target positive level and a target negative level; the SiC MOS full-bridge circuit is provided with a negative voltage clamping diode which is used for limiting the voltage on the SiC MOS tube so as to suppress the driving negative crosstalk, and an active Miller clamp is arranged in the isolation driving chip which is externally connected with the SiC MOS tube and is used for suppressing the driving positive crosstalk. Therefore, short circuit and product damage caused by crosstalk are avoided.

Description

Technical Field

[0001] The present application relates to the technical field of SIC MOS driving, and in particular to a strong anti-interference driving circuit. Background Art

[0002] In recent years, SiC power devices have been increasingly widely used in the industrial field and are deeply loved by everyone. With the continuous introduction of new products, a large number of products with higher voltage levels and larger current levels have been launched. The market response to SiC components is very good, but there are still some technical difficulties in the popularization and application of SiC components.

[0003] For example, when SiC MOS is used in high-voltage half-bridge and full-bridge, the traditional driving circuit will generate positive crosstalk and negative crosstalk when the SiC MOS tube is switched on and off. The positive crosstalk will cause the SiC MOS to be mis-turned on, and the negative crosstalk will cause the driving gate to break down, causing damage to the SiC MOS tube. Utility Model Content

[0004] The embodiment of the present application provides a highly anti-interference driving circuit, which effectively solves the problem in the prior art that when the driving circuit is working, the SiC MOS tube generates crosstalk, causing the SiC MOS tube to short-circuit and cause product damage.

[0005] The embodiment of the present application provides a strong anti-interference driving circuit, including: an analog control circuit, including a first chip, the first chip including a first chip output end, the first chip is used to generate a PWM signal and output it from the first chip output end to a push-pull driving circuit; a push-pull driving circuit, including a second chip, the second chip including a second chip input end and a second chip output end, the first chip output end is connected to the second chip input end, and is used to input the PWM signal into the second chip and output it from the second chip output end to obtain a PWM first sub-signal and a PWM second sub-signal; a driving transformer module, including a driving transformer, the driving transformer including a primary side and a secondary side, and the driving transformer has a winding turn number that meets a preset condition. , the second chip output end is connected to the primary side, and is used to transmit the pwm first sub-signal to the drive transformer, and the secondary side outputs a target positive voltage and a target negative voltage; an isolation drive circuit, comprising an isolation drive chip, the isolation drive chip comprises an isolation drive chip input end, an isolation drive chip output end, an isolation drive chip first power supply end, an isolation drive chip second power supply end and an isolation drive chip third power supply end, the secondary side is connected to the isolation drive chip first power supply end and the isolation drive chip second power supply end, so that the target positive voltage and the target negative voltage are transmitted to the isolation drive chip, the software pwm signal is connected to the isolation drive chip input end, and the isolation drive chip output end outputs a target positive level and a target negative level; a SiC MOS full-bridge circuit, comprising a negative voltage clamping diode and a SiC MOS tube, the SiC MOS tube comprises a gate and a source, the gate of the SiC MOS tube is connected to the negative voltage clamping diode, and the SiC MOS tube comprises a first SiC MOS tube, a second SiC MOS tube, a third SiC MOS tube and a fourth SiCMOS tube.

[0006] Furthermore, the analog control circuit includes a first chip, the first chip includes a first chip, the first chip includes an output port inside, and the output port is used to output the pwm signal.

[0007] Furthermore, the second chip input end includes a second chip first input end and a second chip second input end, the second chip output end includes a second chip first output end and a second chip second output end, the first chip output end is connected to the second chip first input end and the second chip second input end, and is used for inputting the PWM signal into the second chip, and outputting a PWM first sub-signal and a PWM second sub-signal from the second chip first output end and the second chip second output end.

[0008] Furthermore, an RC filter circuit is arranged between the push-pull drive circuit and the drive transformer, and the RC filter circuit is used to filter out frequency components in the PWM signal that do not meet preset conditions to obtain an output PWM signal that meets the preset conditions.

[0009] Further, the filter circuit is connected to the primary side of the drive transformer, and is used to input the output PWM signal into the drive transformer, the secondary side of the drive transformer includes a first secondary side port and a second secondary side port, and the voltage between the first secondary side port and the second secondary side port is an initial voltage;

[0010] When the current of the secondary coil of the driving transformer flows counterclockwise, a first initial voltage is obtained, and the first initial voltage value is the same as the initial voltage value; when the current of the secondary coil of the driving transformer flows clockwise, a second initial voltage is obtained, and the second initial voltage value is twice the initial voltage value.

[0011] Furthermore, a first reference ground is connected between the first secondary port and the second secondary port, and a first voltage regulator diode that meets a preset value is connected between the first reference ground and the second secondary port. The first voltage regulator diode is used to stabilize the voltage in the circuit, and the relative voltage between the first reference ground and the first secondary port is obtained as the target positive voltage, and the relative voltage between the first reference ground and the second secondary port is obtained as the target negative voltage.

[0012] Furthermore, the input terminal of the isolation driver chip is connected to the output terminal of a digital signal processor, and the digital signal processor is used to output a software PWM signal.

[0013] Furthermore, the third power supply terminal of the isolation driving chip is connected to an auxiliary power supply, and the auxiliary power supply is used to provide a power supply voltage to the isolation driving chip;

[0014] The first power supply terminal of the isolation driver chip is connected to the second secondary port, and the second power supply terminal of the isolation driver chip is connected to the first secondary port and the second secondary port. The target positive voltage and the target negative voltage are input into the isolation driver chip to increase the amplitude of the high and low levels of the software PWM signal. The output terminal of the isolation driver chip outputs the target positive level and the target negative level.

[0015] Furthermore, the isolation driving chip includes an isolation capacitor in the middle, and the isolation capacitor is used to isolate the power supply.

[0016] Furthermore, the SiC MOS tube includes a gate and a source, and the output end of the isolation driver chip is connected to the gate of the SiCMOS tube, and is used to input the target positive level and the target negative level to drive the SiC MOS tube to work.

[0017] Furthermore, the SiC MOS tube is externally arranged to be connected to the isolation driver chip, and the isolation driver chip is internally provided with an active Miller clamp for suppressing driving forward crosstalk by limiting the voltage, and the gate of the SiC MOS tube is arranged to be connected to a negative voltage clamping diode that meets a preset voltage, and the negative voltage clamping diode is used to suppress driving negative crosstalk by limiting the voltage of the SiC MOS tube.

[0018] In summary, the embodiment of the present application provides a strong anti-interference driving circuit, including: an analog control circuit for outputting a pulse width modulation signal; a push-pull driving circuit for dividing a pulse width modulation signal output by the analog control circuit into two pulse width modulation signals; a driving transformer module for changing the voltage to obtain a target positive voltage and a target negative voltage; an isolation driving circuit for realizing isolated transmission of software pulse width modulation signals, improving the driving ability of software pulse width modulation signals, and obtaining target positive levels and target negative levels; a SIC MOS full-bridge circuit, provided with a negative voltage clamping diode for limiting the voltage on the SiC MOS tube to suppress the driving negative crosstalk, and an active Miller clamp is provided inside the isolation driving chip connected to the outside of the SiC MOS tube for suppressing the driving positive crosstalk. The present application uses a driving transformer to convert sufficient target positive voltage and target negative voltage, so that the isolation driving chip outputs stable positive and negative voltages to drive the SiC MOS tube and suppresses the positive crosstalk while isolating the transmission signal, and uses a negative voltage clamping diode to suppress the negative crosstalk, thereby ensuring the safety of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 It is a module schematic diagram of a strong anti-interference driving circuit provided in an embodiment of the present application;

[0021] Figure 2 is a schematic diagram of an analog control circuit provided in an embodiment of the present application;

[0022] Figure 3 is a schematic diagram of a push-pull driving circuit provided in an embodiment of the present application;

[0023] Figure 4 is a schematic diagram of a drive transformer module provided in an embodiment of the present application;

[0024] Figure 5a , Figure 5b is a schematic diagram of an isolation driving circuit provided in an embodiment of the present application;

[0025] Figure 6 This is a schematic diagram of a SIC MOS full-bridge circuit provided in an embodiment of the present application.

[0026] The reference numerals are as follows:

[0027] U1: first chip; OUT: output of first chip; U6: second chip; INA: first input of second chip; INB: second input of second chip; OUTA: first output of second chip; OUTB: second output of second chip; ENA: enable control interface; M: primary side; N: secondary side; A: first secondary side port; B: second secondary side port; D3: first voltage regulator; U2: first isolation driver chip; U3: second isolation driver chip; U4: third isolation driver chip; U5: fourth isolation driver chip; IN+: positive input of first isolation driver chip; IN-: negative input of first isolation driver chip; OUT+, OUT-: output of isolation driver chip; VEE2: first power supply of isolation driver chip; VCC2: second power supply of isolation driver chip; VCC1: third power supply of isolation driver chip; GND1: ground of isolation driver chip; Q11: first SiC MOS tube; Q12: second SiC MOS tube; Q13: third SiC MOS tube; Q14: fourth SiC MOS tube; G: first gate; S: first source; D117: first negative voltage clamping diode; D120: second negative voltage clamping diode; D118: third negative voltage clamping diode; D119: fourth negative voltage clamping diode. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0029] In order to enable any person skilled in the art to implement and use the present application, the following description is provided. In the following description, details are listed for the purpose of explanation. It should be understood that those of ordinary skill in the art will recognize that the present application can be implemented without using these specific details. In other examples, known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the present application obscure. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in the present application.

[0030] Example

[0031] refer to Figure 1 The embodiment of the present application provides a strong anti-interference driving circuit, including an analog control circuit, a push-pull driving circuit, a driving transformer module, an isolation driving circuit and a SIC MOS full-bridge circuit.

[0032] refer to Figure 2 In an embodiment of the present application, the analog control circuit includes a first chip (U1), and the first chip (U1) includes a first chip output terminal (OUT).

[0033] The first chip (U1) refers to a chip having a pwm signal output function inside.

[0034] Among them, the pwm signal refers to a pulse sequence consisting of a high level (usually indicating logic 1) and a low level (usually indicating logic 0). By adjusting the duration of the high level, the equivalent voltage can be adjusted.

[0035] The first chip (U1) generates a pwm signal and outputs it to the push-pull driving circuit from the output terminal (OUT) of the first chip.

[0036] Among them, the pwm signal input to the push-pull driving circuit is generated by an analog control circuit, because the pwm control of the push-pull driving circuit is simple, and there is a ready-made integrated chip to control it, and closed-loop feedback regulation can be achieved. Using a digital signal processor to generate a pwm signal input to the push-pull driving circuit here will waste software interface resources.

[0037] refer to Figure 3 In an embodiment of the present application, the push-pull drive circuit includes a second chip (U6), the second chip (U6) includes a second chip input terminal and a second chip output terminal, the second chip input terminal includes a second chip first input terminal and a second chip second input terminal input, and the second chip output terminal includes a second chip first output terminal and a second chip second output terminal.

[0038] Among them, the second chip (U6) refers to a chip with two input terminals and two output terminals. The same pwm signal is input from the first input terminal (INA) of the second chip and the second input terminal (INB) of the second chip respectively, and is output from the first output terminal (OUTA) of the second chip and the second output terminal (OUTB) of the second chip, so that the input pwm signal is converted into two pwm signals, that is, the output obtains a first pwm sub-signal and a second pwm sub-signal.

[0039] In some specific embodiments, an RC filter circuit is provided between the push-pull drive circuit and the drive transformer, and the RC filter circuit is used to filter out frequency components in the PWM signal that do not meet preset conditions, so as to obtain an output PWM signal that meets the preset conditions.

[0040] Among them, the RC filtering circuit includes an RC filter, which is composed of a capacitor and a resistor. It can filter out the frequency components in the PWM signal that do not meet the preset conditions and leave the average voltage component. The RC filter will smooth the PWM signal and generate an output signal that is close to the equivalent voltage. The waveform of this output signal will present a smoother curve than the input PWM signal.

[0041] In an embodiment of the present application, a pwm first sub-signal output from the first output terminal (OUTA) of the second chip in the push-pull driving circuit and a pwm second sub-signal output from the second output terminal (OUTB) of the second chip are input into an RC filter. The RC filter removes frequency components in the pwm first signal and the pwm second sub-signal that do not meet preset conditions, leaving components that meet the preset conditions, thereby outputting a pwm first output signal and a pwm second output signal that meet the preset conditions.

[0042] Among them, the second chip (U6) includes an enable control interface (ENA). If the device is to be manually adjusted in position under power-on conditions, the motor must be in a "free" state. Generally, when the driver does not receive an "enable" signal, the motor is in a standby power-on state. At this time, the motor can be placed in a "free" state by controlling the enable control signal.

[0043] In some specific embodiments, the filtering circuit is connected to the primary side of the driving transformer and is used to input the output PWM signal into the driving transformer. The secondary side of the driving transformer includes a first secondary port and a second secondary port, and the voltage between the first secondary port and the second secondary port is an initial voltage. When the current of the secondary coil of the driving transformer flows counterclockwise, a first initial voltage is obtained, and the first initial voltage value is the same as the initial voltage value. When the current of the secondary coil of the driving transformer flows clockwise, a second initial voltage is obtained, and the second initial voltage value is twice the initial voltage value.

[0044] Among them, reference Figure 4The driving transformer includes a primary side (M) and a secondary side (N), and the driving transformer has a number of winding turns that meets preset conditions.

[0045] Among them, the primary side (M) of the driving transformer refers to the input side of the voltage, and the secondary side (N) refers to the output side of the voltage after the voltage is converted by the transformer.

[0046] The RC filter is connected to the primary side (M) of the driving transformer and is used to input the pwm first output signal and the pwm second output signal into the driving transformer.

[0047] The working principle of the drive transformer is based on the principle of magnetic coupling and transformation ratio. It usually consists of one or more windings wound on an iron core or an air core. When the input current passes through one winding, the generated magnetic field is transmitted to other windings through the iron core or air core, thereby realizing the conversion and transmission of electromagnetic energy.

[0048] Among them, the working principle of the driving transformer can include the following steps:

[0049] Input Current: In a drive transformer, the input current flows through one or more windings. This winding is usually called the main winding or input winding.

[0050] Magnetic field generation: When the input current passes through the main winding, a magnetic field is generated around the winding. The strength of this magnetic field depends on the magnitude of the input current.

[0051] Magnetic coupling conduction: Due to the design of the drive transformer, the magnetic field can be conducted to other windings through the iron core or air core. This conduction is achieved through magnetic coupling, and the change of the magnetic field will cause a potential difference between the windings.

[0052] Output voltage and current: After magnetic coupling conduction, a potential difference will be induced in the output winding. According to the turns ratio of the winding, the output voltage and current can be changed accordingly.

[0053] Among them, the pwm signal itself has high and low levels. When the pwm signal is high, current flows through the primary side (M) of the driving transformer, and the secondary side (N) generates current and voltage (the voltage generated here is what we need). At this time, the voltage is stabilized by connecting a voltage regulator; when the pwm signal is high, no current flows through the primary side (M) of the driving transformer, and induction is generated on the secondary side (N), and the capacitor is charged and discharged to maintain voltage stability.

[0054] The secondary side (N) includes a first secondary side port (A) and a second secondary side port (B).

[0055] refer to Figure 4In an embodiment of the present application, a first reference ground is provided between the first secondary port (A) and the second secondary port (B) of the driving transformer, and a first voltage regulator tube (D3) is connected between the first reference ground and the second secondary port (B).

[0056] The first voltage regulator (D3) can stabilize the voltage in the circuit.

[0057] The voltage between the first secondary port (A) and the second secondary port (B) is called the initial voltage. When the current of the secondary coil of the driving transformer flows counterclockwise, the first initial voltage is obtained. The voltage value of the first initial voltage is the same as the voltage value of the initial voltage.

[0058] When the current of the secondary coil of the driving transformer flows clockwise, an initial voltage is superimposed between the first secondary port (A) and the second secondary port (B) of the driving transformer to obtain a second initial voltage. Therefore, the voltage value of the second initial voltage is twice the voltage value of the initial voltage.

[0059] A first reference ground is provided between the first secondary port (A) and the second secondary port (B) of the driving transformer, and a required relative voltage can be obtained according to the first reference ground.

[0060] A first voltage regulator tube (D3) is provided and connected between the first reference ground and the second secondary port (B), and the first voltage regulator tube (D3) can stabilize the voltage within a range that satisfies a preset value.

[0061] For example, if a 3V Zener diode is added between the first reference ground and the second secondary port (B), the first reference ground will have a +3V voltage relative to "-3V", "-3V" will have a -3V voltage relative to the first reference ground, and "+15V" will have a +15V voltage relative to the first reference ground, thereby obtaining the target positive voltage and target negative voltage.

[0062] The target positive voltage is output from the first secondary port (A), and the target negative voltage is output from the second secondary port (B).

[0063] In an embodiment of the present application, a digital signal processor is arranged in front of the isolation driving circuit, and the digital signal processor has a digital signal processor output terminal.

[0064] The digital signal processor can generate a software pwm signal, and the software pwm signal is output from an output terminal of the digital signal processor.

[0065] Among them, the PWM signal input to the isolation drive circuit chooses to use the software PWM signal generated by the digital signal processor because the software PWM signal input here controls the Sic MOS full-bridge circuit, which requires precise control, and the digital signal processor can adjust the frequency, duty cycle and dead zone of the PWM signal according to software settings. These functions are irreplaceable by analog chips, so the software PWM signal input to the isolation drive circuit needs to be generated by a digital signal processor.

[0066] The digital signal processors provided include a first digital signal processor, a second digital signal processor, a third digital signal processor and a fourth digital signal processor.

[0067] The first digital signal processor has a first digital signal processor output terminal, the second digital signal processor has a second digital signal processor output terminal, the third digital signal processor has a third digital signal processor output terminal, and the fourth digital signal processor has a fourth digital signal processor output terminal.

[0068] Among them, the first digital signal processor output end outputs a first software pwm signal, the second digital signal processor output end outputs a second software pwm signal, the third digital signal processor output end outputs a third software pwm signal, and the fourth digital signal processor output end outputs a fourth software pwm signal.

[0069] In some specific embodiments, the third power supply terminal of the isolation driver chip is configured to be connected to an auxiliary power supply, and the auxiliary power supply is used to provide a power supply voltage to the isolation driver chip; the first power supply terminal of the isolation driver chip is connected to the second secondary port, and the second power supply terminal of the isolation driver chip is connected to the first secondary port and the second secondary port. The target positive voltage and the target negative voltage are input into the isolation driver chip to increase the amplitude of the high and low levels of the software PWM signal, and the output terminal of the isolation driver chip outputs the target positive level and the target negative level.

[0070] Among them, reference Figure 5a to Figure 5b An isolation driving chip is provided in the isolation driving circuit, and the isolation driving chip includes a first isolation driving chip (U2), a second isolation driving chip (U3), a third isolation driving chip (U4), and a fourth isolation driving chip (U5).

[0071] Among them, the isolation driver chip refers to a chip that uses specific technical means to introduce an isolation layer in the circuit to achieve electrical isolation between input and output.

[0072] The output signal of the isolation driver chip has the same frequency and duty cycle as the input signal. The software PWM signal is a controllable input signal that provides a signal source for the isolation driver circuit.

[0073] The isolation driving circuit is used to realize the isolation transmission of the input software pwm signal and improve the driving capability of the software pwm signal.

[0074] Among them, the isolated transmission of the software PWM signal is to prevent the impact voltage at the output end of the isolation driver chip from damaging the digital signal processor connected to the input end of the isolation driver chip when a circuit fails.

[0075] Among them, improving the driving capability of the software pwm signal refers to increasing the amplitude of the high and low levels of the input pwm signal.

[0076] Each isolation driver chip has an isolation driver chip input terminal, and the isolation driver chip input terminal includes an isolation driver chip input positive electrode and an isolation driver chip input negative electrode.

[0077] The first isolation driving chip (U2) includes a first isolation driving chip input positive electrode (IN+) and a first isolation driving chip input negative electrode (IN-).

[0078] The first isolation driver chip (U2) and the second isolation driver chip (U3) are connected in parallel, and the output end of the first digital signal processor is connected to the positive input electrode (IN+) of the first isolation driver chip, and the first software pwm signal is transmitted to the first isolation driver chip (U2), and the output end of the second digital signal processor is connected to the negative input electrode (IN-) of the first isolation driver chip, and the second software pwm signal is transmitted to the first isolation driver chip (U2).

[0079] The output end of the second digital signal processor is connected to the negative input terminal (IN-) of the first isolation driver chip, and the second software pwm signal is transmitted to the first isolation driver chip (U2). In the first isolation driver chip (U2), the second software pwm signal can be used as a reference signal.

[0080] The output end of the first digital signal processor is connected to the negative input terminal of the second isolation driver chip, and the first software pwm signal is transmitted to the second isolation driver chip (U3); the output end of the second digital signal processor is connected to the positive input terminal of the second isolation driver chip, and the second software pwm signal is transmitted to the second isolation driver chip (U3).

[0081] The output end of the first digital signal processor is connected to the negative input terminal of the second isolation driver chip, and the first software pwm signal is transmitted to the second isolation driver chip (U3). In the second isolation driver chip (U3), the first software pwm signal can be used as a reference signal.

[0082] Among them, the output end of the third digital signal processor outputs a third software pwm signal, and the output end of the fourth digital signal processor outputs a fourth pwm signal, and the function and connection method are respectively the same as the first software pwm signal and the second software pwm signal.

[0083] Among them, there is an isolation capacitor in the middle of the isolation driver chip, which can isolate the power supply, but the software PWM signal output from the output end of the digital signal processor can be transmitted from the output end of the isolation driver chip to the output end of the isolation driver chip through the capacitor.

[0084] In an embodiment of the present application, the isolation driver chip ground terminal (GND1) in the isolation driver chip is connected to the ground, the third power supply terminal (VCC1) of the isolation driver chip is connected to the external power supply, the first power supply terminal (VEE2) of the isolation driver chip is set to be connected to the second secondary port (B) of the driving transformer so that the target negative voltage corresponding to the second secondary port (B) is transmitted to the isolation driver chip, and the second power supply terminal (VCC2) of the isolation driver chip is connected to the first secondary port (A) and the second secondary port (B) of the driving transformer so that the target positive voltage corresponding to the first secondary port (A) and the target negative voltage corresponding to the second secondary port (B) are transmitted to the isolation driver chip.

[0085] The voltage between the third power supply terminal (VCC1) of the isolation driver chip and the ground terminal (GND1) of the isolation driver chip refers to the power supply voltage used to supply power to the isolation driver chip.

[0086] Among them, the voltage between the first power supply terminal (VEE2) of the isolation driver chip and the second power supply terminal (VCC2) of the isolation driver chip refers to the voltage used to increase the amplitude of the high and low levels of the software pwm signal input to the isolation driver chip so as to obtain the target positive level and the target negative level.

[0087] The amplitudes of the target positive level and the target negative level are determined by the voltage between the first power supply terminal (VEE2) of the isolation driver chip and the second power supply terminal (VCC2) of the isolation driver chip.

[0088] refer to Figure 6 In an embodiment of the present application, the SIC MOS full-bridge circuit includes a first negative voltage clamping diode (D117), a second negative voltage clamping diode (D120), a third negative voltage clamping diode (D118), a fourth negative voltage clamping diode (D119), a first SiC MOS transistor (Q11), a second SiC MOS transistor (Q12), a third SiC MOS transistor (Q13) and a fourth SiCMOS transistor (Q14).

[0089] In an embodiment of the present application, the external setting of the first SiC MOS tube (Q11) used in the SIC MOS full-bridge circuit is connected to the first isolation driver chip (U2), the external setting of the second SiC MOS tube (Q12) is connected to the second isolation driver chip (U3), the external setting of the third SiC MOS tube (Q13) is connected to the third isolation driver chip (U4), and the external setting of the fourth SiCMOS tube (Q14) is connected to the fourth isolation driver chip (U5). The first isolation driver chip (U2), the second isolation driver chip (U3), the third isolation driver chip (U4), and the fourth isolation driver chip (U5) all have active Miller clamps.

[0090] The first negative voltage clamping diode (D117) is connected to the first gate (G) of the first SiC MOS transistor.

[0091] The first negative voltage clamping diode (D117) can be used to limit the negative voltage to suppress the negative crosstalk of the driver.

[0092] In the SIC MOS full-bridge circuit, the driving positive crosstalk and the driving negative crosstalk are interferences at the driving signal of the SiC MOS tube, which are generated by the upper and lower SiC MOS tube switches. For example, when the first SiC MOS tube (Q11) and the second SiC MOS tube (Q12) are both disconnected, if the second SiC MOS tube (Q12) is turned on, the first SiC MOS tube (Q11) remains disconnected, and at the moment when the second SiC MOS tube (Q12) is turned on from disconnection, the driving signal input to the first SiC MOS tube (Q11) will be generated with driving positive crosstalk; if the second SiC MOS tube (Q12) is turned off again, the first SiC MOS tube (Q11) continues to remain disconnected, and at the moment when the second SiC MOS tube (Q12) is turned on from conduction to disconnection, the driving signal input to the first SiC MOS tube (Q11) will be generated with driving negative crosstalk.

[0093] A capacitor and a pull-down resistor are provided and connected between the source and the gate.

[0094] Among them, the function of the capacitor is energy storage and filtering, and the function of the pull-down resistor is to limit the current.

[0095] The above is a detailed introduction to a strong anti-interference driving circuit provided in an embodiment of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A strong anti-interference driving circuit, characterized in that: include: The analog control circuit comprises a first chip, wherein the first chip comprises a first chip output terminal, and the first chip is used to generate a pwm signal and output the signal from the first chip output terminal to a push-pull driving circuit; A push-pull driving circuit, comprising a second chip, wherein the second chip comprises a second chip input terminal and a second chip output terminal, wherein the first chip output terminal is connected to the second chip input terminal, and is used to input the PWM signal into the second chip, and output the PWM signal from the second chip output terminal, so as to obtain a PWM first sub-signal and a PWM second sub-signal; A driving transformer module, comprising a driving transformer, the driving transformer comprising a primary side and a secondary side, the driving transformer having a winding turn number that meets a preset condition, the second chip output end being connected to the primary side, for transmitting the PWM first sub-signal to the driving transformer, and the secondary side outputting a target positive voltage and a target negative voltage; An isolation driving circuit comprises an isolation driving chip, wherein the isolation driving chip comprises an isolation driving chip input terminal, an isolation driving chip output terminal, a first power supply terminal of the isolation driving chip, a second power supply terminal of the isolation driving chip and a third power supply terminal of the isolation driving chip, wherein the secondary side is connected to the first power supply terminal of the isolation driving chip and the second power supply terminal of the isolation driving chip, so that the target positive voltage and the target negative voltage are transmitted to the isolation driving chip, a software pwm signal is connected to the isolation driving chip input terminal, and the isolation driving chip output terminal outputs a target positive level and a target negative level; A SiC MOS full-bridge circuit comprises a negative voltage clamping diode and a SiC MOS tube, wherein the SiC MOS tube comprises a gate and a source, the gate of the SiC MOS tube is connected to the negative voltage clamping diode, and the SiC MOS tube comprises a first SiC MOS tube, a second SiC MOS tube, a third SiC MOS tube and a fourth SiC MOS tube.

2. The strong anti-interference driving circuit according to claim 1 is characterized in that: The analog control circuit comprises a first chip, the first chip comprises an output port inside, and the output port is used to output the pwm signal.

3. The strong anti-interference driving circuit according to claim 2 is characterized in that: The second chip input end includes the second chip first input end and the second chip second input end, the second chip output end includes the second chip first output end and the second chip second output end, the first chip output end is connected to the second chip first input end and the second chip second input end, and is used for inputting the PWM signal into the second chip, and outputting the PWM first sub-signal and the PWM second sub-signal from the second chip first output end and the second chip second output end.

4. The strong anti-interference driving circuit according to claim 3 is characterized in that: An RC filter circuit is arranged between the push-pull drive circuit and the drive transformer, and the RC filter circuit is used to filter out frequency components in the PWM signal that do not meet preset conditions to obtain an output PWM signal that meets the preset conditions.

5. The strong anti-interference driving circuit according to claim 4 is characterized in that: The filter circuit is connected to the primary side of the drive transformer, and is used to input the output PWM signal into the drive transformer. The secondary side of the drive transformer includes a first secondary port and a second secondary port, and the voltage between the first secondary port and the second secondary port is an initial voltage. When the current of the secondary coil of the driving transformer flows counterclockwise, a first initial voltage is obtained, and the first initial voltage value is the same as the initial voltage value; When the current of the secondary coil of the driving transformer flows clockwise, a second initial voltage is obtained, and the second initial voltage value is twice the initial voltage value.

6. The strong anti-interference driving circuit according to claim 5, characterized in that: A first reference ground is connected between the first secondary port and the second secondary port, and a first voltage regulator tube that meets a preset value is connected between the first reference ground and the second secondary port. The first voltage regulator tube is used to stabilize the voltage in the circuit, and the relative voltage between the first reference ground and the first secondary port is obtained as the target positive voltage, and the relative voltage between the first reference ground and the second secondary port is obtained as the target negative voltage.

7. The strong anti-interference driving circuit according to claim 1 is characterized in that: The input end of the isolation driving chip is connected to the output end of the digital signal processor, and the digital signal processor is used to output a software PWM signal.

8. The strong anti-interference driving circuit according to claim 5, characterized in that: The third power supply terminal of the isolation driving chip is arranged to be connected to an auxiliary power supply, and the auxiliary power supply is used to provide a power supply voltage to the isolation driving chip; The first power supply terminal of the isolation driver chip is connected to the second secondary port, and the second power supply terminal of the isolation driver chip is connected to the first secondary port and the second secondary port. The target positive voltage and the target negative voltage are input into the isolation driver chip to increase the amplitude of the high and low levels of the software PWM signal. The output terminal of the isolation driver chip outputs the target positive level and the target negative level.

9. The strong anti-interference driving circuit according to claim 1, characterized in that: The isolation driving chip includes an isolation capacitor in the middle, and the isolation capacitor is used to isolate the power supply.

10. The strong anti-interference driving circuit according to claim 8, characterized in that: The SiC MOS tube includes a gate and a source, and the output end of the isolation driver chip is connected to the gate of the SiC MOS tube, and is used to input the target positive level and the target negative level to drive the SiC MOS tube to work.

11. The strong anti-interference driving circuit according to claim 10, characterized in that: The SiC MOS tube is externally connected to the isolation driver chip, and the isolation driver chip is internally provided with an active Miller clamp for suppressing driving forward crosstalk by limiting the voltage. The gate of the SiC MOS tube is connected to a negative voltage clamping diode that meets a preset voltage, and the negative voltage clamping diode is used to suppress driving negative crosstalk by limiting the voltage of the SiC MOS tube.

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