Electronic package
By stacking electronic components in the semiconductor package and forming a step-like structure, the electrical connection between the conductive parts and the line structure is solved, and the problem of difficult to reduce the volume of the package and poor heat dissipation efficiency is achieved, thereby achieving height reduction and improved heat dissipation performance.
Patent Information
- Application Number
- CN202421575171.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-06-27
- Filing Date
- 2024-07-04
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2034-07-04
AI Technical Summary
The existing semiconductor packages need to leave space to accommodate metal wires, making it difficult to shrink their volume, which cannot meet the high density and efficient heat dissipation needs of electronic products.
By stacking the first electronic component with the second electronic component and/or the third electronic component in the electronic package, the working surface of the second electronic component/third electronic component is exposed to the inside and partially, and electrically connected to the first line structure through the second conductive member and/or the third conductive member, saving the height of the package.
The height of the electronic package is significantly reduced and the heat dissipation efficiency of the package is improved by shortening the heat conduction path.
Smart Images
Figure CN222762974U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a semiconductor device, in particular to an electronic package with a plurality of electronic components stacked thereon. Background Art
[0002] In recent years, due to the booming development of portable electronic products, various related products have also shown a trend towards high density, high performance, light, thin, short and small. For this reason, the semiconductor industry has also developed various integrated multifunctional packaging methods to meet the requirements of light, thin, short and high density of electronic products. With the evolution of technology, semiconductor products and technologies have begun to move towards heterogeneous integration, and for this reason, 3D multi-chip packaging structures and technologies have gradually emerged.
[0003] However, Figure 1 As shown, in the structure of the existing semiconductor package 1, a plurality of chips 101, 102, 103 are stacked on a circuit structure 110, wherein the chips 102, 103 located on the upper layer and the circuit structure 110 located on the bottom side and the chips are electrically connected to each other through metal wires such as gold wires 104. However, since the packaging layer 120 must leave space at the top to accommodate the gold wires 104, it is difficult to reduce the volume of the semiconductor package 1, which cannot meet the development trend of current electronic products. Moreover, the larger volume also causes the heat generated inside to pass through a longer path to be conducted to the surface of the semiconductor package 1 during operation, resulting in poor heat dissipation efficiency.
[0004] Therefore, how to overcome the above-mentioned problems of the prior art has become a topic that needs to be solved urgently. Utility Model Content
[0005] In view of the various deficiencies of the above-mentioned prior art, the utility model provides an electronic package, comprising: a first circuit structure, having a first surface and a second surface opposite to each other and at least one first circuit layer; an electronic component group, having a first side and a second side opposite to each other and containing a first electronic component and a second electronic component, the first electronic component being located on the first side and having a first active surface and a first inactive surface opposite to each other, and the first electronic component being connected to the first surface of the first circuit structure with the first active surface and being electrically connected to the first surface via a plurality of first conductive members, the second electronic component having a second active surface and a second inactive surface opposite to each other, and the second active surface being connected to the first inactive surface of the first electronic component with the second active surface protruding from the outer side of the first electronic component, and the portion of the second active surface protruding from the first electronic component being electrically connected to the first surface via at least one second conductive member; and a packaging layer, which covers the electronic component group and defines a first packaging surface and a second packaging surface opposite to each other, and the second packaging surface is connected to the first surface of the first circuit structure.
[0006] The utility model also provides a method for manufacturing an electronic package, comprising: providing a carrier; placing an electronic component group on the carrier, the electronic component group having a first side and a second side opposite to each other and containing a first electronic component and a second electronic component, the first electronic component being located on the first side and having a first active surface and a first inactive surface opposite to each other, the second electronic component having a second active surface and a second inactive surface opposite to each other, so that the first electronic component is superimposed on the second active surface of the second electronic component with the first inactive surface but partially exposing the second active surface, and the electronic component group is superimposed on the carrier with the second side; arranging a plurality of first conductive members on the first active surface, and protruding from the second active surface to the second conductive member; At least one second conductive element is disposed on a portion of an electronic component; a packaging layer is formed to cover the electronic component group, the packaging layer defines a first packaging surface and a second packaging surface opposite to each other, the first packaging surface is connected to the carrier, and the unconnected ends of the first conductive elements and the second conductive elements are exposed on the second packaging surface; a first circuit structure is formed on the packaging layer, the first circuit structure has a first surface and a second surface opposite to each other and includes at least one first circuit layer, so that the first circuit structure is placed with the first surface on the first and second packaging surfaces of the packaging layer of the electronic component group and is electrically connected to the first active surface and the second active surface respectively through the first conductive elements and the second conductive elements; and the carrier is removed.
[0007] In the aforementioned electronic package and its manufacturing method, each of the first conductive elements is a conductive bump.
[0008] In the aforementioned electronic package and its manufacturing method, the second conductive element is a conductive bump or a conductive wire.
[0009] In the aforementioned electronic package and its manufacturing method, the second side of the electronic component group is coplanar with the first packaging surface.
[0010] In the aforementioned electronic package and its manufacturing method, a dielectric layer is further disposed on the second side of the electronic component group and the first packaging surface.
[0011] In the aforementioned electronic package and its manufacturing method, a second circuit structure is further provided on the second side of the electronic component group and the first packaging surface.
[0012] In the aforementioned electronic package and its manufacturing method, the second circuit structure includes at least one redistribution layer.
[0013] In the aforementioned electronic package and its manufacturing method, the electronic component group also includes a third electronic component, which has a third active surface and a third inactive surface relative to each other, and the third active surface is connected to the second inactive surface of the second electronic component, and a portion of the third active surface protrudes from the outside of the second electronic component. The portion of the third active surface protruding from the second electronic component is electrically connected to the second active surface and / or the first surface via at least one third conductive member.
[0014] In the aforementioned electronic package and the manufacturing method thereof, the third conductive element is a conductive bump or a conductive wire.
[0015] As can be seen from the above, the electronic package of the utility model saves space of the electronic package in its height direction by making the second active surface / third active surface of the second electronic component / third electronic component face the interior of the electronic package and partially exposed when the first electronic component and the second electronic component and / or the third electronic component are stacked, and then forming a second conductive member and / or a third conductive member between the portion of the second / third active surface exposed toward the interior of the electronic package and the first circuit structure to save space of the electronic package in its height direction, thereby significantly reducing the height of the electronic package and improving its heat dissipation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.
[0017] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing an electronic package of the present invention.
[0018] Figure 2E-1 for Figure 2E A cross-sectional schematic diagram of an embodiment of an electronic package is shown.
[0019] Figure 2F It is a cross-sectional schematic diagram of an embodiment of the first embodiment of the electronic package of the present invention.
[0020] Figure 2G It is a cross-sectional schematic diagram of another embodiment of the first embodiment of the electronic package of the utility model.
[0021] FIG. 3A to FIG. 3E It is a cross-sectional schematic diagram of a second embodiment of a method for manufacturing an electronic package of the present invention.
[0022] Figure 3F It is a cross-sectional schematic diagram of an embodiment of the second embodiment of the electronic package of the present invention.
[0023] Main component symbols
[0024] 1 Semiconductor Package
[0025] 101,102,103 Chip
[0026] 104 Gold Thread
[0027] 110 Line Structure
[0028] 120,30 Encapsulation layer
[0029] 2,2',2”,3,3' Electronic enclosures
[0030] 10 First Line Structure
[0031] 10a Side 1
[0032] 10b Side 2
[0033] 11 First circuit layer
[0034] 20,20' Electronic components group
[0035] 20a,20a' First side
[0036] 20b,20b' Second side
[0037] 21 First Electronic Components
[0038] 21a First working surface
[0039] 21b First non-active surface
[0040] 21c First conductive member
[0041] 22 Second electronic component
[0042] 22a Second working surface
[0043] 22b Second non-active surface
[0044] 22c Second conductive member
[0045] 22s solder ball
[0046] 22p connection pad
[0047] 23 Third electronic components
[0048] 23p connection pad
[0049] 23a Third working surface
[0050] 23b Third non-active surface
[0051] 23c Third conductive member
[0052] 24 Chip film
[0053] 25 Adhesive layer
[0054] 30a First packaging surface
[0055] 30b Second packaging surface
[0056] 31 Epoxy resin
[0057] 40 Dielectric layer
[0058] 60 Second Line Structure
[0059] 60c Fourth conductive member
[0060] 61 Second circuit layer
[0061] 70 Carrier board. DETAILED DESCRIPTION
[0062] The following describes the implementation methods of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.
[0063] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical content disclosed in this application. At the same time, the terms such as "upper", "first", "second", "third", "one", etc. cited in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of this application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of this application without substantially changing the technical content.
[0064] FIG. 2A to FIG. 2E It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing an electronic package of the present invention.
[0065] like Figure 2A As shown, first, a carrier 70 is provided. The carrier 70 can be a semiconductor material such as silicon or glass, or a plate of any other suitable material.
[0066] Then, an electronic component set 20 is disposed on the carrier 70. The electronic component set 20 has a first side 20a and a second side 20b opposite to each other, and includes a first electronic component 21 and a second electronic component 22. The first electronic component 21 is located on the first side 20a of the electronic component set 20, and has a first active surface 21a and a first inactive surface 21b opposite to each other, and the first active surface 21a is located on the first side 20a of the electronic component set 20. The first electronic component 21 can be an active component, such as a semiconductor chip, or a passive component, such as a resistor, a capacitor or an inductor. In this embodiment, a semiconductor chip is used as an example.
[0067] The second electronic component 22 can also be an active component or a passive component, and has a second active surface 22a and a second inactive surface 22b opposite to each other, wherein the first electronic component 21 is stacked with its first inactive surface 21b on the second active surface 22a of the second electronic component 22 via an adhesive material such as a die attach film (DAF) 24, but a portion of the second active surface 22a is exposed. Since the electronic component set 20 in this embodiment only contains one first electronic component 21 and one second electronic component 22, the second inactive surface 22b of the second electronic component 22 is located at the second side 20b of the electronic component set 20 and connected to the carrier 70.
[0068] like Figure 2B As shown, a plurality of first conductive members 21c are arranged on the first active surface 21a of the first electronic component 21, and at least one second conductive member 22c is arranged on the second active surface 22a of the second electronic component 22 that is exposed from the side of the first electronic component 21. The plurality of first conductive members 21c may be conductive bumps, such as solder balls or copper bumps, and the second conductive member 22c may be conductive bumps such as conductive columns or solder balls, or may also be conductive wires. In the present embodiment, the first conductive member 21c may be conductive bumps in the form of solder balls, and the second conductive member 22c may be conductive wires electrically connected to the second active surface 22a by wire bonding technology, such as gold wires, as an example.
[0069] like Figure 2CAs shown, the electronic component set 20 is coated with a packaging colloid or a molding compound such as a dry film or epoxy resin to form a packaging layer 30, and the packaging layer 30 defines a first packaging surface 30a and a second packaging surface 30b opposite to each other. The first packaging surface 30a corresponds to the second side 20b of the electronic component set 20 and is connected to the carrier 70, and the second inactive surface 22b of the second electronic component 22 is coplanar with the first packaging surface 30a, and one end of each of the first conductive element 21c and the second conductive element 22c is exposed on the second packaging surface 30b.
[0070] like Figure 2D As shown, a first circuit structure 10 is formed on the packaging layer 30. The first circuit structure 10 is defined with a first surface 10a and a second surface 10b opposite to each other and includes at least one first circuit layer 11. The first circuit structure 10 is placed on the first side 20a of the electronic component group 20 and the second packaging surface 30b of the packaging layer 30 with the first surface 10a and is electrically connected to the first electronic component 21 and the second electronic component 22 through the first conductive members 21c and the second conductive members 22c, respectively.
[0071] like Figure 2E As shown, the electronic package 2 of this embodiment can be obtained by removing the carrier 70 .
[0072] Figure 2E-1 for Figure 2E A cross-sectional view of an embodiment of an electronic package shown in FIG. Figure 2E The difference of the method shown is that a connection pad 22p is provided on the surface of the second electronic component 22 to connect the second conductive member 22c in the form of a conductive column through a solder ball 22s. In addition, epoxy resin 31 can be filled between the first active surface 21a of the first electronic component 21 and the first circuit structure 10. The epoxy resin 31 is first filled between the first active surface 21a of the first electronic component 21 and the first circuit structure 10 before forming the encapsulation layer 30.
[0073] like Figure 2F As shown, in one embodiment, a dielectric layer 40 may be further disposed on the second side 20b of the electronic component group 20 of the electronic package 2', that is, the second inactive surface 22b of the second electronic component 22 in this embodiment, and the first packaging surface 30a, and an adhesive layer 25 such as epoxy resin may be disposed on the second inactive surface 22b of the second electronic component 22 as needed to connect the dielectric layer 40. The material of the dielectric layer 40 may be, for example, a dielectric material such as polyimide (PI), but is not limited thereto.
[0074] In addition, if Figure 2G As shown, in another variation of the embodiment, a second circuit structure 60 may be further disposed on the second side 20b of the electronic component group 20 of the electronic package 2″, that is, the second inactive surface 22b of the second electronic component 22 in this embodiment, and the first packaging surface 30a, and an adhesive layer 25 of a material such as epoxy resin may be disposed on the second inactive surface 22b of the second electronic component 22 as needed to connect the second circuit structure 60. The second circuit structure 60 contains a second circuit layer 61, and the second circuit layer 61 is a redistribution layer, and the second circuit layer 61 may be electrically connected to the first circuit structure 10 through one or more fourth conductive members 60c. Similarly, the fourth conductive member 60c may also be a conductive wire such as a gold wire, or a conductive bump such as a conductive column, and Figure 2G In the embodiment shown, the second conductive member 22c and the fourth conductive member 60c are both conductive bumps in the form of conductive columns as an example, wherein the surface of the second electronic component 22 is provided with a connection pad 22p to connect the conductive column as the second conductive member 22c. In addition, in this variant embodiment, epoxy resin 31 may be filled between the first active surface 21a of the first electronic component 21 and the first circuit structure 10. The epoxy resin 31 is first filled between the first active surface 21a of the first electronic component 21 and the first circuit structure 10 before forming the encapsulation layer 30.
[0075] FIG. 3A to FIG. 3E The schematic cross-sectional view of the second embodiment of the method for making the electronic package of the utility model. The main difference between this embodiment and the aforementioned first embodiment is that the electronic component group 20' of the electronic package 3 in this embodiment also includes a third electronic component 23 having a third active surface 23a and a third inactive surface 23b relative to each other. The third electronic component 23 is connected to the second inactive surface 22b of the second electronic component 22 by its third active surface 23a, and a portion of the third active surface 23a is exposed on the outer side of the second electronic component 22. The portion of the third active surface 23a protruding from the second electronic component 22 is electrically connected to the first surface 10a of the first circuit structure 10 and / or the second active surface 22a of the second electronic component 22 through at least one third conductive member 23c. It should be noted that the electrical connection between the third active surface 23a of the third electronic component 23 and the first surface 10a of the first circuit structure 10 can be a direct connection (such as through a conductive member such as Figure 2G conductive column), or Figure 3E As shown, the second active surface 22a of the second electronic element 22 is electrically connected through the third conductive member 23c such as a gold wire, and then an indirect electrical connection with the first surface 10a of the first circuit structure 10 is achieved through the second conductive member 22c between the second active surface 22a and the first surface 10a.
[0076] Since the third electronic component 23 is connected to the second inactive surface 22b of the second electronic component 22, in other words, the third electronic component 23 is located at the second side 20b' of the electronic component set 20' in this embodiment, and the third inactive surface 23b of the third electronic component 23 is also located at the second side 20b' away from the first side 20a' of the electronic component set 20', so when the electronic component set 20' is placed on the carrier 70, the third inactive surface 23b of the third electronic component 23 is in contact with the carrier 70. The first packaging surface 30a of the packaging layer 30 also corresponds to the third inactive surface 23b of the third electronic component 23.
[0077] Similar to the second conductive element 22c, the third conductive element 23c may also be a conductive bump or a conductive wire. In this embodiment, the third conductive element 23c in the form of a conductive wire is also used as an example.
[0078] Except for the parts related to the third electronic component 23 and / or the third conductive element 23 c , the manufacturing methods of the rest of the present embodiment are the same as those of the first embodiment, and thus will not be repeated here.
[0079] in addition, Figure 3F It is a cross-sectional schematic diagram of an embodiment of the second embodiment of the electronic package of the utility model. In this embodiment, a second circuit structure 60 is further arranged on the second side 20b' of the electronic component group 20' of the electronic package 3' provided, and the second circuit layer 61 (for example, a redistribution layer) in the second circuit structure 60 can be electrically connected to the first circuit layer 11 in the first circuit structure 10 through one or more fourth conductive members 60c. In this embodiment, the second conductive member 22c, the third conductive member 23c and the fourth conductive member 60c are all conductive columns, and the second conductive member 22c and the third conductive member 23c are electrically connected to the second electronic component 22 and the third electronic component 23 respectively via a connection pad 22p provided on the surface of the second electronic component 22 and a connection pad 23p provided on the surface of the third electronic component 23. Basically, in addition to the third electronic component 23 and the third conductive member 23c and the connection pad 23p, Figure 3F The structure of the electronic package 3' shown in FIG. Figure 2G The electronic package 2" shown in FIG. 1 is almost identical or at least similar, so it will not be repeated here.
[0080] The utility model also illustrates an electronic package 2. The electronic package 2 includes: a first circuit structure 10, having a first surface 10a and a second surface 10b opposite to each other and at least one first circuit layer 11; an electronic component group 20, having a first side 20a and a second side 20b opposite to each other and including a first electronic component 21 and a second electronic component 22, wherein the first electronic component 21 is located on the first side 20a and has a first active surface 21a and a first inactive surface 21b opposite to each other, and the first electronic component 21 is connected to the first surface 10a of the first circuit structure 10 with the first active surface 21a and is electrically connected to the first surface 10a via a plurality of first conductive members 21c, and the second electronic component 22 is electrically connected to the first surface 10a via a plurality of first conductive members 21c. 2 has a second active surface 22a and a second inactive surface 22b opposite to each other, and the second active surface 22a is connected to the first inactive surface 21b of the first electronic component 21 by the second active surface 22a so that a portion of the second active surface 22a protrudes from the outside of the first electronic component 21, and the portion of the second active surface 22a protruding from the first electronic component 21 is electrically connected to the first surface 10a via at least one second conductive member 22c; and a packaging layer 30, covering the electronic component assembly 20 and defining a first packaging surface 30a and a second packaging surface 30b opposite to each other, and the second packaging surface 30b is connected to the first surface 10a of the first circuit structure 10.
[0081] In some embodiments, each of the first conductive elements 21 c is a conductive bump.
[0082] In some embodiments, the second conductive element 22c is a conductive bump or a conductive wire.
[0083] In some embodiments, the second side 20 b of the electronic component assembly 20 is coplanar with the first packaging surface 30 a .
[0084] In some embodiments, a dielectric layer 40 is further disposed on the second side 20 b and the first packaging surface 30 a of the electronic component assembly 20 .
[0085] In some embodiments, a second circuit structure 60 is further disposed on the second side 20 b and the first packaging surface 30 a of the electronic component assembly 20 .
[0086] In some embodiments, the second circuit structure 60 includes at least one redistribution layer.
[0087] In another embodiment, the electronic component set 20' further includes a third electronic component 23, which has a third active surface 23a and a third inactive surface 23b opposite to each other, and the third active surface 23a is connected to the second inactive surface 22b of the second electronic component 22, and a portion of the third active surface 23a protrudes from the outside of the second electronic component 22, and the portion of the third active surface 23a protruding from the second electronic component 22 is electrically connected to the second active surface 22a and / or the first surface 10a via at least one third conductive member 23c.
[0088] In some embodiments, the third conductive element 23c is a conductive bump or a conductive wire.
[0089] In summary, the electronic package and its manufacturing method of the utility model form a stepped structure by making the second active surface / third active surface of the second electronic component / third electronic component face the interior of the electronic package and partially exposed when stacking the first electronic component and the second electronic component and / or the third electronic component, and then forming a second conductive member and / or a third conductive member between the exposed portion of the second active surface / third active surface facing the interior of the electronic package and the first circuit structure to save space of the electronic package in its height direction, thereby significantly reducing the height of the electronic package. In addition, since the height of the electronic package is reduced, the path for the heat energy generated inside the package during operation to propagate to its surface is shortened, thereby also improving the heat dissipation efficiency of the electronic package.
[0090] The above embodiments are only used to illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present application. Therefore, the scope of protection of the present application should be as set forth in the claims.
Claims
1. An electronic package, characterized in that: include: The first circuit structure has a first surface and a second surface opposite to each other and at least one first circuit layer; An electronic component set having a first side and a second side opposite to each other and including a first electronic component and a second electronic component, wherein the first electronic component is located on the first side and has a first active surface and a first inactive surface opposite to each other, and the first electronic component is connected to the first surface of the first circuit structure with the first active surface and is electrically connected to the first surface via a plurality of first conductive members, and the second electronic component has a second active surface and a second inactive surface opposite to each other and is connected to the first inactive surface of the first electronic component with the second active surface protruding from the outer side of the first electronic component, and the portion of the second active surface protruding from the first electronic component is electrically connected to the first surface via at least one second conductive member; as well as The packaging layer covers the electronic component group and defines a first packaging surface and a second packaging surface opposite to each other. The second packaging surface is connected to the first surface of the first circuit structure.
2. The electronic package according to claim 1, wherein: Each of the first conductive elements is a conductive bump.
3. The electronic package according to claim 1, wherein: The second conductive element is a conductive bump or a conductive wire.
4. The electronic package according to claim 1, wherein: The second side of the electronic component assembly is coplanar with the first packaging surface.
5. The electronic package according to claim 1, wherein: A dielectric layer is also disposed on the second side of the electronic component assembly and the first packaging surface.
6. The electronic package according to claim 1, wherein: A second circuit structure is also disposed on the second side of the electronic component assembly and the first packaging surface.
7. The electronic package according to claim 6, wherein: The second circuit structure includes at least one redistribution layer.
8. The electronic package according to claim 1, wherein: The electronic component group also includes a third electronic component, which has a third active surface and a third inactive surface relative to each other, and the third active surface is connected to the second inactive surface of the second electronic component, and a portion of the third active surface protrudes from the outside of the second electronic component. The portion of the third active surface protruding from the second electronic component is electrically connected to the second active surface and / or the first surface via at least one third conductive member.
9. The electronic package according to claim 8, wherein: The third conductive element is a conductive bump or a conductive wire.