Circuit board

Abstract

The utility model relates to the technical field of circuit boards, and discloses a circuit board, which comprises a prepreg layer. The first copper foil layer is arranged on one side of the prepreg layer along the first direction; one side, deviating from the prepreg layer, of the first copper foil layer is provided with a target end surface, the first copper foil layer is etched from the target end surface along a first direction to form at least a first circuit and a second circuit, and the first circuit and the second circuit are arranged at intervals along a second direction and form a first gap; the first gap is filled with the resin layer; one side, deviating from the prepreg layer, of the resin layer is flush with a target end surface; the second copper foil layer covers the target end face; the second copper foil layer is etched in the first direction to form at least a third circuit and a fourth circuit; the third line and the fourth line are arranged at intervals along the second direction; the third circuit and / or the fourth circuit at least partially cover the resin layer. According to the circuit board provided by the utility model, the overall etching spacing of the circuit board can be reduced, the mounting requirements of small devices are met, and the precise mounting of the ultra-thick copper circuit board is realized.

Description

TECHNICAL FIELD

[0001] The utility model relates to a circuit board technical field, concretely relates to a circuit board. BACKGROUND

[0002] The circuit board (PCB) is an indispensable part in electronic equipment, mainly used to connect and support various electronic components, to ensure that they can transmit electrical signals.

[0003] In the prior art, the etching interval of the PCB copper foil of 90um (2.5 ounces or more) needs to be more than 0.25mm, and the pin interval of the existing passive device, such as the SMD resistor and the capacitor package, is generally within 0.2mm, so that the thickening of the PCB board to 2.5 ounces or more will cause the etching interval of the circuit to be mismatched with the soldering pin interval of the small device, thereby affecting the mounting. If the existing process is used to etch the circuit, the increase of the PCB copper thickness will be greatly restricted under the requirement of mounting the small device. SUMMARY

[0004] Therefore, the utility model provides a circuit board to solve the problem that the etching interval of the PCB copper foil is too large and cannot meet the mounting requirement of the small device.

[0005] The circuit board provided by the utility model comprises:

[0006] A prepreg layer;

[0007] A first copper foil layer is arranged on one side of the prepreg layer along a first direction; the side of the first copper foil layer away from the prepreg layer has a target end face, the first copper foil layer is etched along the first direction from the target end face to form at least a first circuit and a second circuit, and the first circuit and the second circuit are arranged at intervals along a second direction and form a first gap;

[0008] A resin layer is filled in the first gap; the side of the resin layer away from the prepreg layer is flush with the target end face;

[0009] A second copper foil layer covers the target end face; the second copper foil layer is etched along the first direction to form at least a third circuit and a fourth circuit; and the third circuit and the fourth circuit are arranged at intervals along the second direction;

[0010] The third circuit and / or the fourth circuit at least partially covers the resin layer.

[0011] Beneficial effects: the circuit board provided by the utility model, the first copper foil layer forms at least first circuit and second circuit after etching, the first circuit and the second circuit are arranged along the second direction Q and form a first gap, the first gap is filled flat by the resin layer, and then a second copper foil layer is arranged on the target end face, and at least third circuit and fourth circuit are formed on the second copper foil layer by etching, the third circuit and the fourth circuit are arranged along the second direction Q, and the third circuit and / or the fourth circuit at least partially covers the resin layer, so that the overall etching pitch of the circuit board is reduced, the mounting demand of small devices is met, and precise mounting of the super-thick copper circuit board is realized.

[0012] In an alternative embodiment, the size H2 of the second copper foil layer along the first direction is smaller than the size H1 of the first copper foil layer along the first direction.

[0013] Beneficial effects:

[0014] In an alternative embodiment, the third circuit and the fourth circuit are arranged along the second direction Q and form a second gap;

[0015] The orthographic projection of the second gap on the prepreg layer is located within the orthographic projection of the first gap on the prepreg layer;

[0016] And / or, along the second direction Q, the size W2 of the orthographic projection of the second gap on the prepreg layer is smaller than the size W1 of the orthographic projection of the first gap on the prepreg layer.

[0017] Beneficial effects: in the first circuit board structure, along the first direction Z, the orthographic projection of the second gap on the prepreg layer is located within the orthographic projection of the first gap on the prepreg layer, and / or, along the second direction Q, the size W2 of the orthographic projection of the second gap on the prepreg layer is smaller than the size W1 of the orthographic projection of the first gap on the prepreg layer, so that the overall etching pitch of the circuit board is reduced, the mounting demand of small devices is met, and precise mounting of the super-thick copper circuit board is realized.

[0018] In an alternative embodiment, W1 is greater than or equal to 0.25 mm, and W2 satisfies 0 < W2 ≤ 0.2 mm.

[0019] Beneficial effects: for the first copper foil layer with W1 greater than or equal to 0.25 mm, the first gap is filled flat by the resin layer, and then a second copper foil layer is arranged on the target end face, and at least third circuit and fourth circuit arranged at intervals are formed on the second copper foil layer by etching, so that the size W2 of the orthographic projection of the second gap on the prepreg layer is smaller than the size W1 of the orthographic projection of the first gap on the prepreg layer, thereby reducing the etching pitch of the circuit board from W1 to W2, meeting the mounting demand of small devices, realizing precise mounting of the super-thick copper circuit board, and further enabling the board thickness of the circuit board to be greater than or equal to 2.5 ounces.

[0020] In an alternative embodiment, 0.05mm≤W2≤0.2mm.

[0021] Beneficial effects: W2 by meeting 0.05mm≤W2≤0.2mm, on the one hand, can effectively reduce the overall etching pitch of the circuit board, meet the mounting requirements of small devices, realize the precise mounting of the ultra-thick copper circuit board, on the other hand, can reduce the etching difficulty, improve the consistency of the etching line width, and on the other hand, can reduce the risk of short circuit.

[0022] In an alternative embodiment, the second copper foil layer is etched along the first direction to form at least a third line and a fourth line and a fifth line therebetween;

[0023] The fifth line is spaced apart from the third line along the second direction and forms a third gap; the fifth line is spaced apart from the fourth line along the second direction and forms a fourth gap;

[0024] The third line and the fourth line at least partially cover the resin layer, and the orthographic projection of the fifth line on the prepreg layer is located within the orthographic projection of the resin layer on the prepreg layer.

[0025] Beneficial effects: In the second circuit board structure, along the first direction Z, the orthographic projection of the fifth line on the prepreg layer is completely located within the orthographic projection of the resin layer on the prepreg layer, and the third line and the fourth line at least partially cover the resin layer, on the one hand, which can reduce the overall etching pitch of the circuit board, meet the mounting requirements of small devices, realize the precise mounting of the ultra-thick copper circuit board, on the other hand, since the size H2 of the second copper foil layer along the first direction Z is smaller than the size H1 of the first copper foil layer along the first direction Z, by etching the third line and the fourth line while forming the fifth line between the third line and the fourth line, the copper foil layer is thinner, the line width and the line spacing are smaller, and the occupied space is smaller, thereby improving the space utilization of the circuit board.

[0026] In an alternative embodiment, the orthographic projections of the third gap and the fourth gap on the prepreg layer are both located within the orthographic projection of the first gap on the prepreg layer;

[0027] And / or, along the second direction, the orthographic projection size W3 of the third gap on the prepreg layer and the orthographic projection size W4 of the fourth gap on the prepreg layer are both smaller than the orthographic projection size W1 of the first gap on the prepreg layer.

[0028] Beneficial effects: Through such design, not only can the overall etching pitch of the circuit board be reduced, the mounting requirements of small devices be met, and the precise mounting of the ultra-thick copper circuit board be realized, but also the copper foil layer can be made thinner, the line width and the line spacing can be made smaller, and the occupied space can be made smaller, thereby improving the space utilization of the circuit board.

[0029] In an alternative embodiment, W1 is greater than or equal to 0.25 mm; W3 satisfies 0 < W3 < 0.1 mm, and / or, W4 satisfies 0 < W4 < 0.1 mm.

[0030] Beneficial effects: by etching the third and fourth lines and the fifth line between the two on the second copper foil layer, W3 satisfies 0 < W3 < 0.1 mm, and / or, W4 satisfies 0 < W4 < 0.1 mm, not only can greatly reduce the etching pitch of the circuit board, meet the mounting needs of small devices, realize the precise mounting of the ultra-thick copper circuit board, but also can make the board thickness of the circuit board can be made to be more than 2.5 ounces, and can realize the thinner copper foil layer wiring, smaller line width and line spacing, smaller space occupation, thereby improving the space utilization of the circuit board.

[0031] In an alternative embodiment, W3 satisfies 0.05 mm < W3 < 0.1 mm, and / or, W4 satisfies 0.05 mm < W4 < 0.1 mm.

[0032] Beneficial effects: by W3 satisfying 0.05 mm < W3 < 0.1 mm, and / or, W4 satisfying 0.05 mm < W4 < 0.1 mm, on the one hand, the overall etching pitch of the circuit board can be effectively reduced, the mounting needs of small devices can be met, and the precise mounting of the ultra-thick copper circuit board can be realized, on the other hand, the etching difficulty can be reduced, and the consistency of the etching line width can be improved, and on the other hand, the risk of short circuit can be reduced.

[0033] In an alternative embodiment, the second copper foil layer is an electroplated layer.

[0034] Beneficial effects: in the process, the first gap is first filled by the resin layer, then the second copper foil layer is formed on the target end face by electroplating, and then the third and fourth lines arranged at intervals are etched on the second copper foil layer, so that the third and / or fourth lines at least partially cover the resin layer, thereby reducing the overall etching pitch of the circuit board, meeting the mounting needs of small devices, and realizing the precise mounting of the ultra-thick copper circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or prior art description. Obviously, the drawings described below are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0036] Figure 1 It is a sectional view of the prepreg layer and the first copper foil layer of the circuit board according to an embodiment of the present application along the first direction;

[0037] Figure 2 For Figure 1 Cross-sectional view of the first gap after filling the resin layer;

[0038] Figure 3 Cross-sectional view of the first circuit board of the embodiment of the utility model;

[0039] Figure 4 For Figure 3 Local enlarged schematic view of A in the middle;

[0040] Figure 5 Cross-sectional view of the second circuit board of the embodiment of the utility model;

[0041] Figure 6 For Figure 5 Local enlarged schematic view of B in the middle.

[0042] Explanation of reference signs:

[0043] 10, prepreg layer;

[0044] 20, first copper foil layer; 200, target end face; 201, first gap; 21, first circuit; 22, second circuit;

[0045] 30, resin layer;

[0046] 40, second copper foil layer; 401, second gap; 402, third gap; 403, fourth gap; 41, third circuit; 42, fourth circuit; 43, fifth circuit;

[0047] Z - first direction; Q - second direction. DETAILED DESCRIPTION

[0048] To make the purpose, technical scheme and advantages of the embodiment of the utility model more clear, the technical scheme in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model, obviously, the described embodiment is a part of the embodiment of the utility model, rather than all the embodiments. Based on the embodiment in the utility model, all other embodiments obtained by the person skilled in the art without creative labor are within the protection scope of the utility model.

[0049] The embodiment of the utility model will be described below in conjunction with Figures 1 to 6 .

[0050] According to the embodiment of the utility model, a circuit board is provided, which comprises:

[0051] Prepreg layer 10;

[0052] First copper foil layer 20, which is arranged on one side of the prepreg layer 10 along the first direction Z; please seeFigure 1 As shown, the first copper foil layer 20 has a target end face 200 on the side opposite to the prepreg layer 10. The first copper foil layer 20 is etched along the first direction Z to form at least a first line 21 and a second line 22. The first line 21 and the second line 22 are spaced apart along the second direction Q to form a first gap 201.

[0053] Resin layer 30, please refer to Figure 2 As shown, it is filled in the first gap 201; the side of the resin layer 30 facing away from the prepreg layer 10 is flush with the target end face 200;

[0054] Second copper foil layer 40, please refer to Figure 3 and Figure 5 As shown, it covers the target end face 200; the second copper foil layer 40 is etched along the first direction Z to form at least a third line 41 and a fourth line 42; the third line 41 and the fourth line 42 are spaced apart along the second direction Q;

[0055] The third line 41 and / or the fourth line 42 are at least partially covered by the resin layer 30.

[0056] It should be noted that, in this text, "first direction Z" refers to the thickness direction of the first copper foil layer 20 and the second copper foil layer 40; "second direction Q" refers to any direction on a plane perpendicular to the thickness direction of the first copper foil layer 20 and the second copper foil layer 40. For example, the second direction Q can be the transverse or longitudinal direction of the first copper foil layer 20 and the second copper foil layer 40. The prepreg layer (PP) can be a semi-cured sheet made of resin-impregnated fiberglass cloth or other reinforcing materials, which can be fully cured under heat and pressure, thereby bonding the different copper foil layers together and providing mechanical strength and electrical insulation properties.

[0057] The circuit board provided by this utility model has a first copper foil layer 20 etched to form at least a first line 21 and a second line 22. The first line 21 and the second line 22 are spaced apart along the second direction Q to form a first gap 201. The first gap 201 is filled by a resin layer 30. A second copper foil layer 40 is provided on the target end face 200, and then at least a third line 41 and a fourth line 42 are etched on the second copper foil layer 40. The third line 41 and the fourth line 42 are spaced apart along the second direction Q. The third line 41 and / or the fourth line 42 at least partially cover the resin layer 30, thereby reducing the overall etching spacing of the circuit board, meeting the mounting requirements of small components, and realizing the precision mounting of ultra-thick copper circuit boards.

[0058] In some embodiments, see Figure 3 As shown, the dimension H2 of the second copper foil layer 40 along the first direction Z is smaller than the dimension H1 of the first copper foil layer 20 along the first direction Z.

[0059] The size H2 of the second copper foil layer 40 along the first direction Z is smaller than the size H1 of the first copper foil layer 20 along the first direction Z. Not only is it easier to control the width and uniformity of the circuit in the process of etching the at least third circuit 41 and fourth circuit 42 on the second copper foil layer 40, but also the thinner copper foil layer enables the spacing between the third circuit 41 and fourth circuit 42 to be smaller, and it is easier to reduce the overall etching pitch of the circuit board to meet the mounting requirements of small devices and achieve precise mounting of the ultra-thick copper circuit board.

[0060] In some embodiments, please refer to Figure 1 and Figure 3 It is shown that the third circuit 41 and fourth circuit 42 are spaced apart along the second direction Q and form a second gap 401;

[0061] The orthographic projection of the second gap 401 on the prepreg layer 10 is located within the orthographic projection of the first gap 201 on the prepreg layer 10;

[0062] and / or, please refer to Figure 4 It is shown that along the second direction Q, the size W2 of the orthographic projection of the second gap 401 on the prepreg layer 10 is smaller than the size W1 of the orthographic projection of the first gap 201 on the prepreg layer 10.

[0063] It should be noted that, Figure 3 and Figure 4 A first circuit board structure of an embodiment of the present application is shown, wherein the third circuit 41 and fourth circuit 42 are directly spaced apart along the second direction Q to form a second gap 401. In the first circuit board structure, along the first direction Z, the orthographic projection of the second gap 401 on the prepreg layer 10 is located within the orthographic projection of the first gap 201 on the prepreg layer 10, and / or, please refer to Figure 4 It is shown that along the second direction Q, the size W2 of the orthographic projection of the second gap 401 on the prepreg layer 10 is smaller than the size W1 of the orthographic projection of the first gap 201 on the prepreg layer 10, thereby reducing the overall etching pitch of the circuit board to meet the mounting requirements of small devices and achieve precise mounting of the ultra-thick copper circuit board.

[0064] In some embodiments, please refer to Figure 1 It is shown that W1≥0.25mm; please refer to Figure 4 It is shown that W2 satisfies 0

[0065] It should be noted that for the first copper foil layer 20 with W1≥0.25mm, the first gap 201 is filled by the resin layer 30, and the second copper foil layer 40 is arranged on the target end face 200, and then the third line 41 and the fourth line 42 are etched on the second copper foil layer 40 to form a spaced arrangement, so that the size W2 of the second gap 401 on the prepreg layer 10 is smaller than the size W1 of the first gap 201 on the prepreg layer 10, thereby reducing the etching pitch of the circuit board from W1 to W2, meeting the mounting requirements of small devices, realizing precise mounting of the ultra-thick copper circuit board, and thus the thickness of the circuit board can be made to be more than 2.5 ounces.

[0066] In some embodiments, 0.05mm≤W2≤0.2mm.

[0067] It should be noted that the value of W2 cannot be too large, otherwise it is difficult to effectively reduce the overall etching pitch of the circuit board, and it is difficult to meet the mounting requirements of small devices, therefore, W2 needs to satisfy W2≤0.2mm; the value of W2 cannot be too small, otherwise it not only increases the difficulty of etching, but also reduces the consistency of etching line width, and also increases the risk of short circuit, therefore, W2 also needs to satisfy W2≥0.05mm.

[0068] W2 satisfies 0.05mm≤W2≤0.2mm, on the one hand, it can effectively reduce the overall etching pitch of the circuit board, meet the mounting requirements of small devices, realize precise mounting of the ultra-thick copper circuit board, on the other hand, it can reduce the difficulty of etching, improve the consistency of etching line width, and on the other hand, it can reduce the risk of short circuit.

[0069] Preferably, 0.15mm≤W2≤0.2mm.

[0070] In some embodiments, please refer to Figure 5 As shown in the figure, the second copper foil layer 40 is etched along the first direction Z to form at least the third line 41 and the fourth line 42 and the fifth line 43 therebetween;

[0071] Please refer to Figure 6 As shown in the figure, the fifth line 43 and the third line 41 are spaced apart along the second direction Q and form a third gap 402; the fifth line 43 and the fourth line 42 are spaced apart along the second direction Q and form a fourth gap 403;

[0072] The third line 41 and the fourth line 42 at least partially cover the resin layer 30, and the orthogonal projection of the fifth line 43 on the prepreg layer 10 is located within the orthogonal projection of the resin layer 30 on the prepreg layer 10.

[0073] It should be noted that, Figure 5 and Figure 6The structure of the second circuit board is shown in the embodiment of the utility model, wherein, the fifth circuit 43 is arranged between the third circuit 41 and the fourth circuit 42 and is spaced apart from the third circuit 41 along the second direction Q and forms a third gap 402; the fifth circuit 43 is spaced apart from the fourth circuit 42 along the second direction Q and forms a fourth gap 403. In the second circuit board structure, along the first direction Z, the orthographic projection of the fifth circuit 43 on the prepreg layer 10 is completely located in the orthographic projection of the resin layer 30 on the prepreg layer 10, and the third circuit 41 and the fourth circuit 42 at least partially cover the resin layer 30, on the one hand, the overall etching pitch of the circuit board can be reduced to meet the mounting requirements of small devices and realize the precise mounting of the super-thick copper circuit board, on the other hand, since the size H2 of the second copper foil layer 40 along the first direction Z is smaller than the size H1 of the first copper foil layer 20 along the first direction Z, the fifth circuit 43 is formed between the third circuit 41 and the fourth circuit 42 at the same time of etching to form the third circuit 41 and the fourth circuit 42, so that the copper foil layer is thinned, the circuit width and the line spacing are smaller, and the occupied space is smaller, thereby improving the space utilization of the circuit board.

[0074] In some embodiments, please refer to Figure 5 and Figure 6 It is shown that the orthographic projection of the third gap 402 and the fourth gap 403 on the prepreg layer 10 is located in the orthographic projection of the first gap 201 on the prepreg layer 10;

[0075] and / or, please refer to Figure 1 and Figure 6 It is shown that along the second direction Q, the orthographic projection size W3 of the third gap 402 on the prepreg layer 10 and the orthographic projection size W4 of the fourth gap 403 on the prepreg layer 10 are both smaller than the orthographic projection size W1 of the first gap 201 on the prepreg layer 10.

[0076] Through such design, not only the overall etching pitch of the circuit board can be reduced to meet the mounting requirements of small devices and realize the precise mounting of the super-thick copper circuit board, but also the copper foil layer can be thinned, the circuit width and the line spacing are smaller, and the occupied space is smaller, thereby improving the space utilization of the circuit board.

[0077] In some embodiments, please refer to Figure 1 It is shown that W1 is greater than or equal to 0.25mm; please refer to Figure 6 It is shown that W3 satisfies 0 < W3 ≤ 0.1mm, and / or, W4 satisfies 0 < W4 ≤ 0.1mm.

[0078] It should be noted that for the first copper foil layer 20 with W1≥0.25mm, the first gap 201 is filled by the resin layer 30, and the third gap 402 and the fourth gap 403 are located in the orthographic projection of the first gap 201 on the prepreg layer 10 by setting the second copper foil layer 40 on the target end face 200, and then etching the third line 41 and the fourth line 42 and the fifth line 43 between the two on the second copper foil layer 40, and / or the orthographic projection of the fifth line 43 on the prepreg layer 10 is located in the orthographic projection of the resin layer 30 on the prepreg layer 10, which not only greatly reduces the etching pitch of the circuit board, meets the mounting requirements of small devices, realizes the precise mounting of the ultra-thick copper circuit board, and further enables the board thickness of the circuit board to be more than 2.5 ounces, but also realizes thinner copper foil layer wiring, smaller line width and line spacing, and smaller space occupation, thereby improving the space utilization of the circuit board.

[0079] In some embodiments, W3 satisfies 0.05mm≤W3≤0.1mm, and / or W4 satisfies 0.05mm≤W4≤0.1mm.

[0080] It should be noted that the values of W3 and W4 cannot be too large, otherwise not only it is difficult to effectively reduce the overall etching pitch of the circuit board, which cannot meet the mounting requirements of small devices, but also it is easy to cause the width of the fifth line 43 to be too small, which increases the etching difficulty and reduces the consistency of the etching line width, therefore, W3 satisfies W3≤0.1mm, and W4 satisfies W4≤0.1mm; the values of W3 and W4 cannot be too small, otherwise it not only increases the etching difficulty, but also reduces the consistency of the etching line width, and also increases the risk of short circuit, therefore, W3 also satisfies W3≥0.05mm, and W4 also satisfies W4≥0.05mm.

[0081] By satisfying 0.05mm≤W3≤0.1mm and / or 0.05mm≤W4≤0.1mm, on the one hand, the overall etching pitch of the circuit board can be effectively reduced, which meets the mounting requirements of small devices and realizes the precise mounting of the ultra-thick copper circuit board, on the other hand, the etching difficulty can be reduced, and the consistency of the etching line width can be improved, and on the other hand, the risk of short circuit can be reduced.

[0082] In some embodiments, the second copper foil layer 40 is an electroplated layer.

[0083] In the process, first, the first gap 201 is filled by the resin layer 30, and then the second copper foil layer 40 is formed on the target end face 200 by electroplating, and then the third line 41 and the fourth line 42 are etched on the second copper foil layer 40 to be arranged at intervals, so that the third line 41 and / or the fourth line 42 at least partially covers the resin layer 30, thereby reducing the overall etching pitch of the circuit board, meeting the mounting requirements of small devices, and realizing the precise mounting of the super-thick copper circuit board.

[0084] Although the embodiments of the present application are described in conjunction with the drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A wiring board, characterized by, The application relates to a prepreg layer (10); a first copper foil layer (20) arranged on one side of the prepreg layer (10) along a first direction (Z); the first copper foil layer (20) has a target end face (200) on the side away from the prepreg layer (10); the first copper foil layer (20) is etched along the first direction (Z) to form at least a first line (21) and a second line (22); the first line (21) and the second line (22) are arranged at intervals along a second direction (Q) and form a first gap (201); a resin layer (30) filled in the first gap (201); the side of the resin layer (30) away from the prepreg layer (10) is flush with the target end face (200); a second copper foil layer (40) covering the target end face (200); the second copper foil layer (40) is etched along the first direction (Z) to form at least a third line (41) and a fourth line (42); the third line (41) and the fourth line (42) are arranged at intervals along the second direction (Q); and the third line (41) and / or the fourth line (42) at least partially cover the resin layer (30). The size H2 of the second copper foil layer (40) along the first direction (Z) is smaller than the size H1 of the first copper foil layer (20) along the first direction (Z). The third line (41) and the fourth line (42) are arranged at intervals along the second direction (Q) and form a second gap (401); the orthogonal projection of the second gap (401) on the prepreg layer (10) is located in the orthogonal projection of the first gap (201) on the prepreg layer (10); and / or along the second direction (Q), the size W2 of the orthogonal projection of the second gap (401) on the prepreg layer (10) is smaller than the size W1 of the orthogonal projection of the first gap (201) on the prepreg layer (10). W1 is greater than or equal to 0.25 mm; and W2 satisfies 0 < W2 < 0.2 mm. 0.05 mm < W2 < 0.2 mm. The second copper foil layer (40) is etched along the first direction (Z) to form at least a third line (41), a fourth line (42) and a fifth line (43) between the third line (41) and the fourth line (42); the fifth line (43) is arranged at intervals along the second direction (Q) from the third line (41) and forms a third gap (402); the fifth line (43) is arranged at intervals along the second direction (Q) from the fourth line (42) and forms a fourth gap (403); the third line (41) and the fourth line (42) at least partially cover the resin layer (30); and the orthogonal projection of the fifth line (43) on the prepreg layer (10) is located in the orthogonal projection of the resin layer (30) on the prepreg layer (10).

2. The circuit board according to claim 1, characterized by The orthogonal projections of the third gap (402) and the fourth gap (403) on the prepreg layer (10) are both located in the orthogonal projection of the first gap (201) on the prepreg layer (10).

3. The circuit board according to claim 2, wherein ​ ​ ​ 4. The circuit board according to claim 3, wherein ​ 5. The circuit board according to claim 4, wherein ​ 6. The circuit board of claim 2, wherein ​ ​ ​ 7. The circuit board according to claim 6, wherein ​ And / or, along the second direction (Q), the third gap (402) has a normal projection size W3 on the prepreg layer (10) and the fourth gap (403) has a normal projection size W4 on the prepreg layer (10), both of which are smaller than the normal projection size W1 of the first gap (201) on the prepreg layer (10).

8. The circuit board according to claim 7, wherein W1≥0.25mm; W3 satisfies 0 9. The circuit board according to claim 8, wherein W3 satisfies 0.05mm≤W3≤0.1mm, and / or, W4 satisfies 0.05mm≤W4≤0.1mm.

10. The circuit board according to any one of claims 1 to 9, characterized by, The second copper foil layer (40) is an electroplated layer.

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