Pre-charging circuit and multipath battery energy storage system
By employing a combination design of DC bus, current limiting circuit and bypass switch in a multi-channel battery energy storage system, the problems of numerous pre-charging circuits and the susceptibility of bus electrical bursts are solved, achieving space saving, cost reduction and improved reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- FOXESS CO LTD
- Filing Date
- 2025-04-30
- Publication Date
- 2026-04-21
AI Technical Summary
In multi-channel battery energy storage systems, existing pre-charging circuits are numerous, occupy a large space, are costly, and have low reliability. At the same time, the bus capacitors are prone to explosion during inverter bridge arm short-circuit faults, posing a safety risk.
The system employs a combination design of DC bus, first to third pre-charge circuits, bus capacitor, bridge arm, bidirectional switch and control circuit. The control circuit disconnects the bypass switch when the voltage difference reaches a threshold, and the current limiting circuit prevents overvoltage of the bus capacitor, thereby reducing the number of pre-charge circuits and improving system reliability.
The number of pre-charging circuits is reduced, which lowers the space and cost, improves the reliability of the system, and prevents the bus capacitor from bursting after a short circuit fault in the inverter arm, thus ensuring system safety.
Smart Images

Figure CN224153989U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronics, and more particularly to a pre-charging circuit and a multi-channel battery energy storage system. Background Technology
[0002] Photovoltaic energy storage systems convert solar energy into electrical energy through photovoltaic arrays, and then store it in battery packs via inverters and battery management systems. They are widely used in distributed generation, microgrids, and energy storage power stations. With increasing demand for energy storage, systems need to connect multiple battery packs to improve storage capacity and flexibility. However, as the number of battery packs connected to the system increases, the number of pre-charging circuits required also increases.
[0003] like Figure 1 As shown, the photovoltaic energy storage system includes bus capacitors C01 and C02, upper bridge arm switch T01, lower bridge arm switch T04, bidirectional switch 3, rectifier bridge 2, and switch group 1. The first terminal of bus capacitor C01 is connected to the first terminal of upper bridge arm switch T01 and the positive terminal of the DC bus. The second terminal of bus capacitor C01 is connected to the first terminal of bus capacitor C02. The second terminal of bus capacitor C02 is connected to the negative terminal of the DC bus and the second terminal of lower bridge arm switch T02. The second terminal of upper bridge arm switch T01 is connected to the first terminal of lower bridge arm switch T02. Bidirectional switch 3 is connected between the second terminal of bus capacitor C01 and the second terminal of upper bridge arm switch T01. Bidirectional switch 3 includes switches T03 and T02 connected in series. The positive terminal of the DC bus is connected to the positive terminals of multiple battery packs BAT1, BAT2, ..., BATN respectively. The negative terminal of the DC bus is connected to the negative terminal of the first battery pack BAT1 through the first pre-charge circuit. The negative terminal of the DC bus is connected to the negative terminal of the second battery pack BAT2 through the second pre-charge circuit, and so on. The negative terminal of the DC bus is connected to the negative terminal of the Nth battery pack BATN through the Nth pre-charge circuit. The first pre-charge circuit includes a first current-limiting resistor PTC1 and a first bypass switch K01 connected in parallel. The second pre-charge circuit includes a second current-limiting resistor PTC2 and a second bypass switch K02 connected in parallel. The Nth pre-charge circuit includes an Nth current-limiting resistor PTCN and an Nth bypass switch K0N connected in parallel. The first end of the upper bridge arm switch T01 is connected to the first output end of the rectifier bridge 2 through the first AC current limiting resistor PTC21, and the second end of the lower bridge arm switch T04 is connected to the second output end of the rectifier bridge 2 through the second AC current limiting resistor PTC22. The first input end and the second input end of the rectifier bridge 2 are connected to the power grid through switch group 1.
[0004] When the system is powered on, the bus capacitors C01 and C02 can be charged through multiple battery packs BAT1, BAT2, ..., BATN, or through the power grid. When the multiple battery packs BAT1, BAT2, ..., BATN are charging the bus capacitors C01 and C02, the first bypass switch K01 in the first pre-charging circuit, the second bypass switch K02 in the second pre-charging circuit, ..., and the Nth bypass switch K0N in the Nth pre-charging circuit can all be opened. The first battery pack BAT1, the second battery pack BAT2, ..., and the Nth battery pack BATN then charge the bus capacitors C01 and C02 through the first current-limiting resistor PTC1, the second current-limiting resistor PTC2, ..., and the Nth current-limiting resistor PTCN, respectively. When the bus capacitors C01 and C02 are charged through the grid, the control switch group 1 is closed, and the grid charges the bus capacitors C01 and C02 through the rectifier bridge 2, the first AC current limiting resistor PTC21 and the second AC current limiting resistor PTC22.
[0005] It is evident that each battery pack requires a pre-charging circuit, and the two output terminals of the rectifier bridge also require corresponding AC current-limiting resistors. This increases the number of pre-charging circuits, occupies more space, increases costs, and also reduces the reliability of the system.
[0006] Furthermore, when a short-circuit fault occurs in the upper half of the inverter bridge arm (composed of upper bridge arm switch T01 and bidirectional switch 3), the bus capacitor C02 experiences the voltage between the positive and negative terminals of the DC bus, i.e., the DC bus voltage. This overvoltage will cause the bus capacitor C02 to over-voltage, leading to its explosion. Similarly, when a short-circuit fault occurs in the lower half of the inverter bridge arm (composed of lower bridge arm switch T04 and bidirectional switch 3), the bus capacitor C01 experiences the voltage between the positive and negative terminals of the DC bus, i.e., the DC bus voltage. This overvoltage will also cause the bus capacitor C01 to over-voltage, leading to its explosion. Therefore, a short-circuit fault in either the upper or lower half of the inverter bridge arm will cause overvoltage in either bus capacitor C01 or bus capacitor C02, potentially leading to their explosion. This will have a significant impact on the system, posing a safety risk.
[0007] To meet the requirements of photovoltaic energy storage systems with multiple battery banks, such as fewer pre-charging circuits, smaller footprint, lower cost, higher reliability, and prevention of bus capacitor explosion after a short circuit in the upper or lower inverter arm, the industry urgently needs to develop a new type of pre-charging circuit for multi-battery energy storage systems. Utility Model Content
[0008] This application provides a pre-charging circuit and a multi-battery energy storage system, which solves the technical problems of a large number of pre-charging circuits, large space occupation, high cost and reduced reliability in photovoltaic energy storage systems connected to multiple battery packs, as well as the explosion of the corresponding bus capacitor after a short circuit in the upper or lower half of the inverter bridge arm.
[0009] A first aspect of this application provides a pre-charging circuit suitable for a multi-channel battery energy storage system, the pre-charging circuit comprising:
[0010] DC bus, used to receive DC voltage output from multiple battery packs;
[0011] The first pre-charging circuit includes a first current limiting circuit and a first bypass switch connected in parallel.
[0012] The first bus capacitor is connected in series with the first current limiting circuit and then connected between the positive terminal of the DC bus and the midpoint of the bus.
[0013] The second pre-charging circuit includes a second current limiting circuit and a second bypass switch connected in parallel.
[0014] The second bus capacitor is connected in series with the second current limiting circuit and then connected between the midpoint of the bus and the negative terminal of the DC bus.
[0015] At least one bridge arm is connected between the positive end of the DC bus and the negative end of the DC bus;
[0016] The third pre-charging circuit includes a third current limiting circuit and a third bypass switch connected in parallel, wherein the first end of the third current limiting circuit is connected to the midpoint of the bus.
[0017] At least one bidirectional switch is connected between the second terminal of the third current-limiting circuit and the midpoint of the at least one bridge arm; and
[0018] The control circuit is used to control the first bypass switch, the second bypass switch, and the third bypass switch to disconnect when the absolute value of the voltage difference between the voltage of the first bus capacitor and the voltage of the second bus capacitor reaches a voltage difference threshold, so that the first bus capacitor or the second bus capacitor discharges through the third current limiting circuit to prevent the first bus capacitor or the second bus capacitor from overvoltage.
[0019] Preferably, the pre-charging circuit further includes a rectifier bridge and an AC switch assembly;
[0020] The input terminal of the AC switch group is used to receive the grid voltage, the output terminal of the AC switch group is connected to the input terminal of the rectifier bridge, and the output terminal of the rectifier bridge is connected between the positive terminal and the negative terminal of the DC bus.
[0021] Preferably, when the multi-channel battery energy storage system is powered on, the control circuit is used to control the AC switch group to close and the first bypass switch and the second bypass switch to open, so that the grid voltage charges the first bus capacitor and the second bus capacitor through the AC switch group, the rectifier bridge, the first current limiting circuit and the second current limiting circuit.
[0022] Preferably, when the multi-channel battery energy storage system is powered on, the control circuit is used to control both the first bypass switch and the second bypass switch to be disconnected, so that the DC voltage charges the first bus capacitor and the second bus capacitor through the first current limiting circuit and the second current limiting circuit.
[0023] Preferably, the control circuit is used to control the first bypass switch and the second bypass switch to close when the sum of the voltage of the first bus capacitor and the voltage of the second bus capacitor reaches a preset voltage.
[0024] Preferably, the third current limiting circuit is a positive temperature coefficient resistor, a power wire-wound resistor, or a fuse; the first current limiting circuit and the second current limiting circuit are fixed resistors or positive temperature coefficient resistors.
[0025] Preferably, the third pre-charging circuit further includes a fuse, which is connected in series with the third bypass switch and then in parallel with the third current limiting circuit.
[0026] Preferably, the pre-charging circuit further includes a voltage equalization circuit for balancing the voltage of the first bus capacitor and the voltage of the second bus capacitor; the first end of the voltage equalization circuit is connected to the positive end of the DC bus, the second end of the voltage equalization circuit is connected to the negative end of the DC bus, and the third end of the voltage equalization circuit is connected to the midpoint of the bus.
[0027] Preferably, the voltage equalization circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first switch, and a second switch; the first ends of the first resistor and the third resistor are connected to the first end of the voltage equalization circuit; the first end of the fourth resistor is connected to the second end of the third resistor, the control end of the first switch, and the control end of the second switch; the first end of the first switch is connected to the second end of the first resistor; the second end of the first switch is connected to the second end of the second switch and the third end of the voltage equalization circuit; the first end of the second switch is connected to the first end of the second resistor; and the second end of the second resistor and the first end of the fourth resistor are connected to the second end of the voltage equalization circuit.
[0028] Preferably, the pre-charging circuit further includes a first discharge circuit and a second discharge circuit;
[0029] The first discharge circuit is connected between the positive terminal of the DC bus and the first terminal of the third current limiting circuit, and is used to discharge the first bus capacitor when the voltage of the first bus capacitor is greater than the first voltage threshold.
[0030] The second discharge circuit is connected between the first terminal of the third current limiting circuit and the negative terminal of the DC bus, and is used to discharge the second bus capacitor when the voltage of the second bus capacitor is greater than the second voltage threshold.
[0031] A second aspect of this application provides a multi-channel battery energy storage system, comprising:
[0032] A multi-channel battery pack, wherein the positive terminals of each battery pack are connected together, and the negative terminals of each battery pack are connected together;
[0033] As described above in the pre-charging circuit, the positive terminal of the multi-channel battery pack is connected to the positive terminal of the DC bus in the pre-charging circuit, and the negative terminal of the multi-channel battery pack is connected to the negative terminal of the DC bus in the pre-charging circuit.
[0034] The beneficial effects of the embodiments of this application include at least the following:
[0035] The pre-charging circuit provided in this application is applicable to multi-channel battery energy storage systems. It includes a DC bus, a first pre-charging circuit with a first current-limiting circuit and a first bypass switch, a first bus capacitor, a second pre-charging circuit with a second current-limiting circuit and a second bypass switch, a second bus capacitor, at least one bridge arm, a third pre-charging circuit with a third current-limiting circuit and a third bypass switch, at least one bidirectional switch, and a control circuit. The first current-limiting circuit and the first bus capacitor, connected in series, are connected in series with the second current-limiting circuit and the second bus capacitor between the positive and negative terminals of the DC bus. At least one bridge arm is connected between the positive and negative terminals of the DC bus. The first end of the third current-limiting circuit is connected to the midpoint of the bus, and the second end of the third current-limiting circuit is connected to the midpoint of at least one bridge arm via at least one bidirectional switch. The control circuit is used to disconnect the first bypass switch, the second bypass switch, and the third bypass switch when the absolute value of the voltage difference between the voltage of the first bus capacitor and the voltage of the second bus capacitor reaches a voltage difference threshold. This allows the first bus capacitor or the second bus capacitor to discharge through the third current limiting circuit, preventing overvoltage in either the first bus capacitor or the second bus capacitor. This application only requires three pre-charging circuits, reducing the number of pre-charging circuits, reducing space occupation, lowering costs, and improving reliability. Furthermore, it can prevent the first bus capacitor or the second bus capacitor from exploding due to overvoltage after a short-circuit fault in the upper or lower inverter bridge arm, ensuring system safety. Attached Figure Description
[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0037] Figure 1 This is a schematic diagram of the structure of an existing multi-channel battery energy storage system;
[0038] Figure 2 A schematic diagram of a pre-charging circuit for a multi-channel battery energy storage system provided in this application embodiment;
[0039] Figure 3 A schematic diagram of another pre-charging circuit for a multi-channel battery energy storage system provided in this application embodiment;
[0040] Figure 4 This is a schematic diagram of another pre-charging circuit for a multi-channel battery energy storage system provided in an embodiment of this application. Detailed Implementation
[0041] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0042] The various embodiments or implementation methods described in this specification are presented in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
[0043] Generally speaking, terms should be understood at least in part by their use in context. For example, at least in part, depending on the context, the term "at least one" as used in the text can be used to describe any feature, structure, or characteristic of the singular meaning, or a combination of features, structures, or characteristics of the plural meaning. Similarly, at least in part, depending on the context, terms such as "a" or "the" can also be understood to convey either singular or plural usage.
[0044] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0045] It should be noted that the terms "first, second, and third" used in the embodiments of this application are merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this disclosure described herein can be implemented in an order other than that illustrated or described herein.
[0046] In one embodiment of this utility model, a pre-charging circuit is provided, which is suitable for multi-channel battery energy storage systems. The multi-channel battery energy storage system is used to store and manage electrical energy, and typically includes multiple battery packs connected in parallel, i.e., the positive terminals of each battery pack are connected together, and the negative terminals of each battery pack are connected together, with a DC voltage provided between the positive and negative terminals of the multiple battery packs. This energy storage system is widely used in renewable energy, data centers, industrial equipment, and electric vehicles.
[0047] Figure 2 This is a schematic diagram of a pre-charging circuit for a multi-channel battery energy storage system, provided as an embodiment of this application. Figure 2 As shown, the pre-charge circuit includes a DC bus, a first pre-charge circuit, a first bus capacitor C1, a second pre-charge circuit, a second bus capacitor C2, at least one bridge arm, a third pre-charge circuit, at least one bidirectional switch 17, and a control circuit 18.
[0048] The DC bus includes a positive terminal Vbus+ and a negative terminal Vbus-. The positive terminal Vbus+ is connected to the positive terminal of the multi-channel battery pack, and the negative terminal Vbus- is connected to the negative terminal of the multi-channel battery pack. The DC bus is used to receive the DC voltage output from the multi-channel battery packs BAT1, BAT2, ..., BATN.
[0049] The first pre-charging circuit includes a first current-limiting circuit 12 and a first bypass switch K1 connected in parallel. Specifically, the first terminal of the first current-limiting circuit 12 is connected to the first terminal of the first bypass switch K1, and the second terminal of the first current-limiting circuit 12 is connected to the second terminal of the first bypass switch K1. The first bypass switch K1 can be a relay contact or a controllable switch, such as a MOSFET, transistor, or IGBT.
[0050] The first bus capacitor C1 is connected in series with the first current limiting circuit 12 between the positive terminal Vbus+ of the DC bus and the bus midpoint o. Specifically, the first terminal of the first current limiting circuit 12 is connected to the positive terminal Vbus+ of the DC bus, the second terminal of the first current limiting circuit 12 is connected to the first terminal of the first bus capacitor C1, and the second terminal of the first bus capacitor C1 is connected to the bus midpoint o. In some embodiments, the first terminal of the first bus capacitor C1 is connected to the positive terminal Vbus+ of the DC bus, the second terminal of the first bus capacitor C1 is connected to the first terminal of the first current limiting circuit 12, and the second terminal of the first current limiting circuit 12 is connected to the bus midpoint o.
[0051] The second pre-charging circuit includes a second current-limiting circuit 13 and a second bypass switch K2 connected in parallel. Specifically, the first terminal of the second current-limiting circuit 13 is connected to the first terminal of the second bypass switch K2, and the second terminal of the second current-limiting circuit 13 is connected to the second terminal of the second bypass switch K2. The second bypass switch K2 can be a relay contact or a controllable switch, such as a MOSFET, transistor, or IGBT.
[0052] The first current-limiting resistor 12 and the second current-limiting circuit 13 can be fixed resistors with large resistance values or positive temperature coefficient resistors, used to limit the current charging the first bus capacitor C1 and the second bus capacitor C2.
[0053] The second bus capacitor C2 is connected in series with the second current limiting circuit 13 between the midpoint o of the bus and the negative terminal Vbus- of the DC bus. Specifically, the first terminal of the second bus capacitor C2 is connected to the midpoint o of the bus, the second terminal of the second bus capacitor C2 is connected to the first terminal of the second current limiting circuit 13, and the second terminal of the second current limiting circuit 13 is connected to the negative terminal Vbus- of the DC bus. In some embodiments, the first terminal of the second current limiting circuit 13 is connected to the midpoint o of the bus, the second terminal of the second current limiting circuit 13 is connected to the first terminal of the second bus capacitor C2, and the second terminal of the second bus capacitor C2 is connected to the negative terminal Vbus- of the DC bus.
[0054] The at least one bridge arm is connected between the positive terminal Vbus+ and the negative terminal Vbus- of the DC bus. The number of the at least one bridge arm can be one, and the bridge arm includes an upper switch T1 and a lower switch T4. The first end of the upper switch T1 is connected to the positive terminal Vbus+ of the DC bus, the first end of the lower switch T4 is connected to the second end of the upper switch T1, and the second end of the lower switch T4 is connected to the negative terminal Vbus- of the DC bus. In some embodiments, the number of the at least one bridge arm can be three, and each bridge arm includes an upper switch and a lower switch connected in series, and the upper and lower switches are connected in series between the positive terminal Vbus+ and the negative terminal Vbus- of the DC bus.
[0055] The third pre-charging circuit includes a third current-limiting circuit 14 and a third bypass switch K3 connected in parallel. The first terminal of the third current-limiting circuit 14 is connected to the midpoint o of the bus. Specifically, the first terminal of the third current-limiting circuit 14 is connected to the first terminal of the third bypass switch K3, and the second terminal of the third current-limiting circuit 14 is connected to the second terminal of the third bypass switch K3. The third current-limiting circuit can be an overcurrent or overpower protection device or apparatus such as a positive temperature coefficient resistor, a power wire-wound resistor, or a fuse. The third bypass switch K3 can be a relay contact or a controllable switch, such as a MOSFET, a transistor, or an IGBT.
[0056] The at least one bidirectional switch 17 is connected between the second terminal of the third current limiting circuit 14 and the midpoint of the at least one bridge arm. The number of the at least one bidirectional switch 17 is the same as the number of the at least one bridge arm. When there is one bridge arm, there is also one at least one bidirectional switch 17. The first terminal of the bidirectional switch 17 is connected to the second terminal of the third current limiting circuit 14, and the second terminal of the bidirectional switch 17 is connected to the connection point of the upper and lower switches in the bridge arm. When there are three bridge arms, there are also three at least one bidirectional switch 17. The first terminal of each bidirectional switch 17 is connected to the second terminal of the third current limiting circuit 14, and the second terminal of each bidirectional switch 17 is connected to the connection point of the upper and lower switches in the corresponding bridge arm. The bidirectional switch 17 includes power switches T2 and T3. The first terminal of power switch T3 is connected to the connection point of the upper and lower switches in the corresponding bridge arm, the second terminal of power switch T3 is connected to the second terminal of power switch T2, and the first terminal of power switch T2 is connected to the second terminal of the third current limiting circuit 14. Power switches T2 and T3 can be MOSFETs. The first terminal of power switches T2 and T3 is the drain of the MOSFET, the second terminal of power switches T2 and T3 is the source, and the control terminal of power switches T2 and T3 is the base.
[0057] The third pre-charging circuit, the at least one bidirectional switch, and the at least one bridge arm constitute the topology of the inverter.
[0058] The control circuit 18 is used to control the first bypass switch K1, the second bypass switch K2 and the third bypass switch K3 to disconnect when the absolute value of the voltage difference between the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2 reaches the voltage difference threshold, so that the first bus capacitor or the second bus capacitor discharges through the third current limiting circuit to prevent the first bus capacitor or the second bus capacitor from overvoltage. Specifically, when the voltage difference between the first bus capacitor C1 (Uc1) and the second bus capacitor C2 (Uc2) reaches the voltage difference threshold, the third current limiting circuit 14 withstands the voltage of the second bus capacitor C2. The positive terminal Vbus+ of the DC bus charges the first bus capacitor C1 through the first current limiting circuit 12, the third current limiting circuit 14, the bidirectional switch 17, and the lower switch of the bridge arm, while the second bus capacitor C2 discharges through the second current limiting circuit 13, the third current limiting circuit 14, the bidirectional switch 17, and the lower switch of the bridge arm to prevent overvoltage of the first bus capacitor C1 and / or the second bus capacitor C2. When the voltage difference between the voltage Uc2 of the upper switch C2 of the bridge arm and the voltage Uc1 of the first bus capacitor C1 reaches the voltage difference threshold, the third current limiting circuit 14 withstands the voltage of the first bus capacitor C1. The positive terminal Vbus+ of the DC bus charges the second bus capacitor C2 through the upper switch of the bridge arm, the bidirectional switch 17, the third current limiting circuit 14, and the second current limiting circuit 13, while the first bus capacitor C1 discharges through the first current limiting circuit 12, the upper switch of the bridge arm, the bidirectional switch 17, and the third current limiting circuit 14 to prevent overvoltage of the first bus capacitor C1 and / or the second bus capacitor C2.
[0059] In some embodiments, the pre-charging circuit may include a capacitor voltage sampling circuit for acquiring the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2. The capacitor voltage sampling circuit and the control circuit 18 may be independent circuits. Alternatively, the capacitor voltage sampling circuit may be integrated into the control circuit 18. The capacitor voltage sampling circuit can acquire the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2 using multiple voltage divider resistors. No specific circuit structure is limited here. In some embodiments, the voltages across the first bus capacitor C1 and the second bus capacitor C2 are acquired using voltage divider resistors to obtain the sum of the voltages of the first bus capacitor C1 and the second bus capacitor C2, Uc1 + Uc2.
[0060] Specifically, when a short-circuit fault occurs in the at least one upper switch T1 in the bridge arm and the at least one bidirectional switch 17, the positive terminal Vbus+ of the DC bus charges the second bus capacitor C2 through the at least one upper switch T1 in the bridge arm, the at least one bidirectional switch 17, the third pre-charging circuit, and the second bypass switch K2, thereby increasing the voltage Uc2 of the second bus capacitor C2 and decreasing the voltage Uc1 of the first bus capacitor C1. When the voltage difference between the voltage Uc2 of the second bus capacitor C2 and the voltage Uc1 of the first bus capacitor C1 reaches a voltage difference threshold, such as 30V or 50V, the control circuit 18 controls the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 to open, so that the positive terminal Vbus+ of the DC bus continues to charge the second bus capacitor C2 through the at least one upper switch T1 in the bridge arm, the at least one bidirectional switch 17, the third current limiting circuit 14, and the second current limiting circuit 13. The third current-limiting circuit 14 bears the voltage Uc1 of the first bus capacitor C1, causing a large current to flow through it, generating heat and increasing its resistance to infinity. The second and third current-limiting circuits 13 and 14 limit the charging current to the second bus capacitor C2 to below mA, preventing overvoltage and thus avoiding its explosion.
[0061] When a short-circuit fault occurs in at least one bridge arm lower switch T4 and the bidirectional switch 17, the positive terminal Vbus+ of the DC bus charges the first bus capacitor C1 through the first bypass switch K1, the third pre-charging circuit, the at least one bidirectional switch 17, and the at least one bridge arm lower switch T4, causing the voltage Uc1 of the first bus capacitor C1 to increase and the voltage Uc2 of the second bus capacitor C2 to decrease. When the voltage difference between the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2 reaches a voltage difference threshold, such as 30V or 50V, the control circuit 18 controls the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 to open, so that the positive terminal Vbus+ of the DC bus continues to charge the first bus capacitor C1 through the first current limiting circuit 12, the third current limiting circuit 14, the at least one bidirectional switch 17, and the at least one bridge arm lower switch T4. The third current-limiting circuit 14 bears the voltage Uc2 of the second bus capacitor C2, causing a large current to flow through it, generating heat and increasing its resistance to infinity. The first current-limiting circuit 12 and the third current-limiting circuit 14 limit the charging current to the first bus capacitor C1 to below mA, preventing overvoltage and thus avoiding its explosion.
[0062] In this embodiment, when the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 are relay contacts, such as normally closed contacts, the control circuit 18 outputs control signals KS1, KS2, and KS3 when the absolute value of the voltage difference between the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2 reaches the voltage difference threshold. This controls the coils of the corresponding relays to be energized, thereby causing the normally closed contacts to open, i.e., the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 to be disconnected.
[0063] In some embodiments, when the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 are controllable switches, such as MOS or transistors, the control circuit 18 outputs control signals KS1, KS2, and KS3 when the absolute value of the voltage difference between the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2 reaches the voltage difference threshold, so as to control the corresponding first bypass K1, second bypass switch K2, and third bypass switch K3 to be disconnected respectively.
[0064] In this embodiment, when a short circuit fault occurs in the upper switch T1 and the at least one bidirectional switch 17 in at least one bridge arm, or a short circuit fault occurs in the lower switch T4 and the bidirectional switch 17 in at least one bridge arm, the control circuit 18 controls the first bypass switch, the second bypass switch, and the third bypass switch to disconnect when the voltage difference between the voltage of the second bus capacitor and the voltage of the first bus capacitor reaches a voltage difference threshold or the voltage difference between the voltage of the first bus capacitor and the voltage of the second bus capacitor reaches a voltage difference threshold. The third current limiting circuit bears the voltage of the first bus capacitor, so that the first bus capacitor discharges through the third current limiting circuit and the second bus capacitor is charged through the third current limiting circuit, to prevent overvoltage of the first bus capacitor and / or the second bus capacitor. Alternatively, the third current limiting circuit bears the voltage of the second bus capacitor, so that the second bus capacitor discharges through the third current limiting circuit and the first bus capacitor is charged through the third current limiting circuit, to prevent overvoltage of the first bus capacitor and / or the second bus capacitor, avoid the first bus capacitor or the second bus capacitor from bursting, and improve the safety of the system.
[0065] Continue to refer to Figure 2The pre-charging circuit further includes a rectifier bridge 16 and an AC switch group 15. The input terminal of the AC switch group 15 is used to receive the grid voltage Grid, and the output terminal of the AC switch group 15 is connected to the input terminal of the rectifier bridge 16. The output terminal of the rectifier bridge 16 is connected between the positive terminal Vbus+ and the negative terminal Vbus- of the DC bus. The AC switch group 15 includes four AC switches, wherein the AC switches can be contactor contacts.
[0066] When the multi-channel battery energy storage system is powered on, the control circuit 18 controls the AC switch group 15 to close and the first bypass switch K1 and the second bypass switch K2 to open, so that the grid voltage charges the first bus capacitor C1 and the second bus capacitor C2 through the AC switch group 15, the rectifier bridge 16, the first current limiting circuit 12, and the second current limiting circuit 13. This application can charge the first bus capacitor C1 and the second bus capacitor C2 using the grid voltage of the AC power grid.
[0067] When the multi-channel battery energy storage system is powered on, the control circuit 18 controls both the first bypass switch K1 and the second bypass switch K2 to be disconnected, so that the DC voltage charges the first bus capacitor C1 and the second bus capacitor C2 through the first current limiting circuit 12 and the second current limiting circuit 13. This application can charge the first bus capacitor C1 and the second bus capacitor C2 through multiple battery packs BAT1, BAT2, ..., BATN.
[0068] This application can charge the first bus capacitor C1 and the second bus capacitor C2 using multiple battery packs BAT1, BAT2, ..., BATN through the first and second pre-charging circuits. Alternatively, it can charge the first bus capacitor C1 and the second bus capacitor C2 using the grid voltage. Therefore, it requires fewer pre-charging circuits, occupies less space, has lower cost, and offers higher reliability.
[0069] Furthermore, the control circuit 18 is used to control the first bypass switch K1 and the second bypass switch K2 to close when the sum of the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2, Uc1+Uc2, reaches a preset voltage, so that the DC voltage continues to charge the first bus capacitor C1 and the second bus capacitor C2 through the first bypass switch K1 and the second bypass switch K2.
[0070] Furthermore, the control circuit 18 is used to control the third bypass switch K3 to close when the sum of the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2, Uc1+Uc2, reaches a preset voltage.
[0071] When the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 are relay contacts, such as normally closed contacts, the control circuit 18 outputs control signals KS1 and KS2 when the sum of the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2, Uc1 + Uc2, reaches a preset voltage. This outputs control signals KS1 and KS2 to de-energize the coils of the corresponding relays, thereby closing the normally closed contacts, i.e., closing the first bypass switch K1 and the second bypass switch K2. When the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 are controllable switches, such as MOSFETs or transistors, the control circuit 18 outputs control signals KS1 and KS2 when the sum of the voltage Uc1 of the first bus capacitor C1 and the voltage Uc2 of the second bus capacitor C2, Uc1 + Uc2, reaches a preset voltage. This outputs control signals KS1 and KS2 to close the corresponding first bypass switch K1 and the second bypass switch K2.
[0072] In this embodiment, when the sum of the voltages Uc1 and Uc2 of the first bus capacitor C1 and the second bus capacitor C2 reaches a preset voltage, the control circuit 18 controls the first bypass switch K1, the second bypass switch K2, and the third bypass switch K3 to close, and continues to charge the first bus capacitor C1 and the second bus capacitor C2 through the first current limiting circuit and the second current limiting circuit. After the first bus capacitor C1 and the second bus capacitor C2 have completed pre-charging, the multi-channel battery energy storage system enters the normal operation mode, and converts the voltage between the positive and negative terminals of the DC bus into AC power to supply the grid by controlling the upper and lower switches of at least one bridge arm and the at least one bidirectional switch.
[0073] Furthermore, the third pre-charging circuit also includes a fuse F, which is connected in series with the third bypass switch K3 and then in parallel with the third current limiting circuit 14. The fuse F is used to withstand a large current and disconnect when the third bypass switch K3 needs to be disconnected but is not, ensuring that the branch where the third bypass switch of the third pre-charging circuit is located is reliably disconnected, thereby improving the safety of the system.
[0074] Continue to refer to Figure 2 When the voltage of the first bus capacitor C1 is not equal to the voltage of the second bus capacitor C2, it is necessary to balance the voltage of the first bus capacitor C1 and the voltage of the second bus capacitor C2.
[0075] The pre-charging circuit further includes a voltage equalization circuit 11, used to equalize the voltage of the first bus capacitor C1 and the voltage of the second bus capacitor C2; the first terminal of the voltage equalization circuit 11 is connected to the positive terminal Vbus+ of the DC bus, the second terminal of the voltage equalization circuit 11 is connected to the negative terminal Vbus- of the DC bus, and the third terminal of the voltage equalization circuit 11 is connected to the midpoint o of the bus, used to equalize the voltage of the first bus capacitor C1 and the voltage of the second bus capacitor C2, so that the voltage of the first bus capacitor C1 and the voltage of the second bus capacitor C2 are equal or nearly equal.
[0076] Figure 3 This is a schematic diagram of another pre-charging circuit for a multi-channel battery energy storage system provided in an embodiment of this application. Figure 3 The pre-charge circuit is shown. Figure 2 The difference in the pre-charging circuit shown lies in the specific details of the voltage equalization circuit 11, the first current limiting circuit 12, the second current limiting circuit 13, and the third current limiting circuit 14. Other identical parts in the pre-charging circuit will not be described again here.
[0077] like Figure 3 As shown, the voltage equalization circuit 11 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first switch Q1, and a second switch Q2. The first ends of the first resistor R1 and the third resistor R3 are connected to the first end of the voltage equalization circuit 11. The first end of the fourth resistor R4 is connected to the second end of the third resistor R3, the control end of the first switch Q1, and the control end of the second switch Q2. The first end of the first switch Q1 is connected to the second end of the first resistor R1. The second end of the first switch Q1 is connected to the second end of the second switch Q2 and the third end of the voltage equalization circuit 11. The first end of the second switch Q2 is connected to the first end of the second resistor R2. The second ends of the second resistor R2 and the second ends of the fourth resistor R4 are connected to the second end of the voltage equalization circuit 11. When the voltage of the second bus capacitor C2 is less than the voltage of the first bus capacitor C1, the voltage at the connection point A of the third resistor R3 and the fourth resistor R4 is greater than the voltage at the midpoint o of the bus. At this time, the first switch Q1 is turned on and the second switch Q2 is turned off. The first bus capacitor C1 discharges through the first resistor R1 and the first switch Q1 and charges the second bus capacitor C2, so that the voltage of the first bus capacitor C1 is equal to or nearly equal to the voltage of the second bus capacitor C2.
[0078] When the voltage of the second bus capacitor C2 is greater than the voltage of the first bus capacitor C1, the voltage at the connection point A of the third resistor R3 and the fourth resistor R4 is less than the voltage at the midpoint o of the bus. At this time, the first switch Q1 is turned off and the second switch Q2 is turned on. The second bus capacitor C2 discharges through the second switch Q2 and the second resistor R2 and charges the first bus capacitor C1, so that the voltage of the first bus capacitor C1 is equal to or nearly equal to the voltage of the second bus capacitor C2.
[0079] The first current-limiting circuit can be a positive temperature coefficient resistor R5, the second current-limiting circuit can be a positive temperature coefficient resistor R6, and the third current-limiting circuit can be a positive temperature coefficient resistor R7.
[0080] Figure 4 This is a schematic diagram of another pre-charging circuit for a multi-channel battery energy storage system provided in an embodiment of this application. Figure 4 The first discharge circuit and the second discharge circuit in the pre-charge circuit shown are related to Figure 2 The voltage equalization circuit in the pre-charge circuit shown is different; other identical parts will not be described again here.
[0081] like Figure 4 As shown, when a short circuit fault occurs in the upper switch T1 and the at least one bidirectional switch 17 in at least one bridge arm, or when a short circuit fault occurs in the lower switch T4 and the bidirectional switch 17 in at least one bridge arm, the voltage of the first bus capacitor and the voltage of the second bus capacitor are not the same, and there is a certain voltage difference. The pre-charging circuit also includes a first discharge circuit 111 and a second discharge circuit 112, used to discharge the bus capacitor whose voltage exceeds the equalization value between the voltage of the first bus capacitor and the voltage of the second bus capacitor.
[0082] The first discharge circuit 111 is connected between the positive terminal Vbus+ of the DC bus and the first terminal of the third current limiting circuit, and is used to discharge the first bus capacitor C1 when the voltage of the first bus capacitor C1 is greater than a first voltage threshold. The first discharge circuit 111 includes a first discharge resistor and a first discharge switch. When the voltage of the first bus capacitor is greater than a first preset discharge voltage, the control circuit controls the first discharge switch to close to discharge the first bus capacitor. When the voltage of the first bus capacitor reaches an equalization value, such as half of the DC voltage, the control circuit controls the first discharge switch to open. It should be noted that while discharging the first bus capacitor, the second bus capacitor is charged.
[0083] The second discharge circuit 112 is connected between the first terminal of the third current-limiting circuit and the negative terminal Vbus- of the DC bus, and is used to discharge the second bus capacitor C2 when the voltage of the second bus capacitor C2 is greater than a second voltage threshold. The second discharge circuit 112 includes a second discharge resistor and a second discharge switch. When the voltage of the second bus capacitor is greater than a second preset discharge voltage, the control circuit controls the second discharge switch to close to discharge the second bus capacitor. When the voltage of the second bus capacitor reaches an equalization value, such as half of the DC voltage, the control circuit controls the second discharge switch to open. It should be noted that while discharging the second bus capacitor, the first bus capacitor is also charged.
[0084] The first discharge circuit 111 and the second discharge circuit 112 can effectively discharge bus capacitors that exceed the equalization voltage value and charge bus capacitors that are below the equalization voltage value, which helps to improve the stability of the system and extend the life of the capacitors.
[0085] In some embodiments, when a short-circuit fault occurs in the upper switch T1 and the at least one bidirectional switch 17 of the at least one bridge arm, and the lower switch T4 of the bridge arm is in an impedance state, the second bus capacitor C2 can be discharged through the third pre-charging circuit, the bidirectional switch, and the lower switch T4. When a short-circuit fault occurs in the lower switch T4 and the bidirectional switch 17 of the at least one bridge arm, and the upper switch T1 of the bridge arm is in an impedance state, the first bus capacitor C1 can be discharged through the upper switch T1, the bidirectional switch 17, and the third pre-charging circuit.
[0086] The pre-charging circuit of this application only requires three pre-charging paths, reducing the number of pre-charging paths, reducing space occupation, lowering costs, and improving reliability. At the same time, after a short circuit fault occurs in the upper switch T1 and the at least one bidirectional switch 17 in the at least one bridge arm, or a short circuit fault occurs in the lower switch T4 and the bidirectional switch 17 in the at least one bridge arm, it can avoid the explosion caused by overvoltage of the first bus capacitor or the second bus capacitor, thus ensuring system safety.
[0087] This application also provides a multi-channel battery energy storage system, including:
[0088] A multi-channel battery pack, wherein the positive terminals of each battery pack are connected together, and the negative terminals of each battery pack are connected together;
[0089] As described above in the pre-charging circuit, the positive terminal of the multi-channel battery pack is connected to the positive terminal of the DC bus in the pre-charging circuit, and the negative terminal of the multi-channel battery pack is connected to the negative terminal of the DC bus in the pre-charging circuit. The pre-charging circuit is described as follows: Figures 2 to 4 The content mentioned above will not be repeated here.
[0090] The multi-channel battery energy storage system of this application only requires three pre-charging circuits, reducing the number of pre-charging circuits, reducing space occupation, lowering costs, and improving reliability. At the same time, after a short circuit fault occurs in the upper switch T1 and the at least one bidirectional switch 17 in the at least one bridge arm, or in the lower switch T4 and the bidirectional switch 17 in the at least one bridge arm, it can avoid the explosion caused by overvoltage of the first bus capacitor or the second bus capacitor, thus ensuring system safety.
[0091] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.
Claims
1. A pre-charge circuit suitable for use in a multi-path battery energy storage system, characterized by, The pre-charging circuit comprises: a DC bus for receiving DC voltage output by a plurality of battery packs; a first pre-charging circuit comprising a first current-limiting circuit and a first bypass switch connected in parallel; a first bus capacitor connected between a positive terminal of the DC bus and a bus midpoint in series with the first current-limiting circuit; a second pre-charging circuit comprising a second current-limiting circuit and a second bypass switch connected in parallel; a second bus capacitor connected between the bus midpoint and a negative terminal of the DC bus in series with the second current-limiting circuit; at least one bridge arm connected between the positive terminal of the DC bus and the negative terminal of the DC bus; a third pre-charging circuit comprising a third current-limiting circuit and a third bypass switch connected in parallel, a first end of the third current-limiting circuit being connected to the bus midpoint; at least one bidirectional switch connected between a second end of the third current-limiting circuit and a midpoint of the at least one bridge arm; and a control circuit configured to control the first bypass switch, the second bypass switch, and the third bypass switch to be turned off when an absolute value of a voltage difference between a voltage of the first bus capacitor and a voltage of the second bus capacitor reaches a voltage difference threshold, so that the first bus capacitor or the second bus capacitor is discharged through the third current-limiting circuit to prevent overvoltage of the first bus capacitor or the second bus capacitor.
2. The pre-charge circuit of claim 1, wherein, The pre-charging circuit further comprises a rectifier bridge and an AC switch group; an input end of the AC switch group is configured to receive a grid voltage, an output end of the AC switch group is connected to an input end of the rectifier bridge, and an output end of the rectifier bridge is connected between the positive terminal of the DC bus and the negative terminal of the DC bus.
3. The pre-charge circuit of claim 2, wherein, When the multi-battery energy storage system is powered on, the control circuit is configured to control the AC switch group to be closed and the first bypass switch and the second bypass switch to be both turned off, so that the grid voltage charges the first bus capacitor and the second bus capacitor through the AC switch group, the rectifier bridge, the first current-limiting circuit, and the second current-limiting circuit.
4. The pre-charge circuit of claim 1, wherein, When the multi-battery energy storage system is powered on, the control circuit is configured to control the first bypass switch and the second bypass switch to be both turned off, so that the DC voltage charges the first bus capacitor and the second bus capacitor through the first current-limiting circuit and the second current-limiting circuit.
5. The pre-charge circuit of claim 3 or 4, wherein, The control circuit is configured to control the first bypass switch and the second bypass switch to be turned on when a sum of the voltage of the first bus capacitor and the voltage of the second bus capacitor reaches a preset voltage.
6. The pre-charge circuit of claim 1, wherein, The third current-limiting circuit is a positive temperature coefficient resistor, a power wire-wound resistor, or a fuse; and the first current-limiting circuit and the second current-limiting circuit are fixed resistors or positive temperature coefficient resistors.
7. The pre-charge circuit of claim 1, wherein, The third pre-charging circuit further comprises a fuse connected in parallel with the third current-limiting circuit in series with the third bypass switch.
8. The pre-charge circuit of claim 1, wherein, The pre-charging circuit further comprises a voltage equalization circuit for equalizing the voltage of the first bus capacitor and the voltage of the second bus capacitor; a first end of the voltage equalization circuit is connected to the positive end of the DC bus, a second end of the voltage equalization circuit is connected to the negative end of the DC bus, and a third end of the voltage equalization circuit is connected to the bus midpoint.
9. The pre-charge circuit of claim 8, wherein, The voltage equalization circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first switch and a second switch; a first end of the first resistor and the third resistor is connected to the first end of the voltage equalization circuit, a first end of the fourth resistor is connected to the second end of the third resistor, the control end of the first switch and the control end of the second switch respectively, a first end of the first switch is connected to the second end of the first resistor, a second end of the first switch is connected to the second end of the second switch and the third end of the voltage equalization circuit respectively, a first end of the second switch is connected to the first end of the second resistor, and a second end of the second resistor and a second end of the fourth resistor are connected to the second end of the voltage equalization circuit.
10. The pre-charge circuit of claim 1, wherein, The pre-charging circuit further comprises a first discharge circuit and a second discharge circuit; The first discharge circuit is connected between the positive end of the DC bus and the first end of the third current limiting circuit, and is used for discharging the first bus capacitor when the voltage of the first bus capacitor is greater than a first voltage threshold; The second discharge circuit is connected between the first end of the third current limiting circuit and the negative end of the DC bus, and is used for discharging the second bus capacitor when the voltage of the second bus capacitor is greater than a second voltage threshold.
11. A multiple path battery energy storage system, characterized by, Comprise: A plurality of battery groups, the positive poles of each of the battery groups are connected, and the negative poles of each of the battery groups are connected; The pre-charging circuit according to any one of claims 1 to 10, wherein the positive poles of the plurality of battery groups are connected to the positive end of the DC bus in the pre-charging circuit, and the negative poles of the plurality of battery groups are connected to the negative end of the DC bus in the pre-charging circuit.