Overload protection circuit of power module

Abstract

The utility model relates to the technical field of power modules, in particular to an overload protection circuit of a power module, which comprises a main control chip, the power module, a sampling circuit and a protection circuit which are electrically connected in sequence, the sampling circuit comprises a voltage dividing unit, a filtering unit, an isolating unit and an amplifying unit which are electrically connected in sequence, and the amplifying unit outputs a detection value. The protection circuit outputs an over-current signal based on the detection value and the set value, the over-current signal is output into the main control chip, and the main control chip judges the state of the power module according to the over-current signal. According to the utility model, the sampling circuit accurately detects the working state of the power module, the protection circuit compares an accurate detection value with a set value, and once the detection value exceeds the set value, the protection circuit can rapidly output an overcurrent signal and perform self-locking until the main control chip sends a reset signal or a key S is manually pressed down, so that the whole circuit structure is compact and reasonable in design; all the units are clear in division of labor and work cooperatively, cost is low, and practicability is higher.

Description

Technical Field

[0001] This utility model relates to the field of power module technology, and more specifically, to an overload protection circuit for power modules. Background Technology

[0002] In modern electronic equipment and power systems, power modules are key components and are widely used in many fields such as industrial automation, new energy vehicles, and smart grids. They undertake the important tasks of power conversion and power amplification, and their operational stability and reliability are directly related to the performance and safety of the entire system.

[0003] However, the actual operating environment is extremely complex, and power modules often face the risk of overload. On the one hand, sudden load changes are common in industrial production scenarios, such as the starting and stopping of motors and the frequent opening and closing of large equipment, which can lead to a significant increase in instantaneous current, causing the power module to bear a load beyond its rated range. On the other hand, circuit faults, such as short circuits and poor grounding, can also cause the operating current of the power module to rise abnormally. If the overload situation is not handled in a timely and effective manner, the semiconductor devices inside the power module will degrade due to overheating, and long-term accumulation will cause permanent damage, which will lead to system failure, production stoppage, equipment damage, and even endanger personnel safety.

[0004] While some advanced protection circuits incorporate electronic detection and control technologies, they suffer from complex circuit structures and high costs. These complex circuits not only increase the difficulty of design and debugging but also raise product costs, limiting their adoption in cost-sensitive application scenarios. Utility Model Content

[0005] The purpose of this invention is to provide an overload protection circuit for power modules to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, this utility model provides the following technical solution:

[0007] The overload protection circuit of the power module includes a main control chip, a power module, a sampling circuit, and a protection circuit connected in sequence. The sampling circuit includes a voltage divider unit, a filter unit, an isolation unit, and an amplification unit connected in sequence. The amplification unit outputs a detection value. The protection circuit outputs an overcurrent signal based on the detection value and a set value. The overcurrent signal is output to the main control chip, and the main control chip determines the state of the power module based on the overcurrent signal.

[0008] Preferably, the voltage divider unit includes resistor R1 and resistor R2. Resistor R1 is connected in series in one end of the collector line of the power module (2). The second end of resistor R1 is connected to the collector of the power module (2). The first end of resistor R2 is connected to the second end of resistor R1. The second end of resistor R2 is grounded.

[0009] Preferably, the filter unit includes a resistor R3 and a capacitor C1. The first end of the resistor R3 is connected to the second end of the resistor R1, the second end of the resistor R3 is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is grounded.

[0010] Preferably, the isolation unit includes a voltage follower U1, with the non-inverting input of the voltage follower U1 connected to the second terminal of the resistor R3, and the inverting input of the voltage follower U1 connected to the output of the voltage follower U1.

[0011] Preferably, the amplification unit includes resistors R4, R5, and R6, and operational amplifier U2. The first end of resistor R4 is connected to the output of voltage follower U1, the second end of resistor R4 is connected to the non-inverting input of operational amplifier U2, the first end of resistor R5 is connected to the inverting input of operational amplifier U2, the second end of resistor R5 is connected to the output of operational amplifier U2, the first end of resistor R6 is connected to the inverting input of operational amplifier U2, the second end of resistor R6 is grounded, and operational amplifier U2 outputs the detected value.

[0012] Preferably, the protection circuit includes a power supply VCC, resistors R7 and R8, a voltage comparator U3, resistor R9, a NAND gate U4, resistors R10 and R11, transistors Q1 and Q2, resistor R12, capacitor C2, resistors R13 and R14, transistor Q3, button S, resistors R15, R16, and R17. Transistors Q1, Q2, and Q3 are all NPN transistors. The first terminal of resistor R7 is connected to the power supply VCC, and the second terminal of resistor R7 is connected to the non-inverting input of voltage comparator U3. The first terminal of resistor R8... Connect the second terminal of resistor R7 to the ground. Connect the second terminal of resistor R8 to the output of voltage comparator U3. Connect the inverting input of voltage comparator U3 to the output of operational amplifier U2. Connect the output of voltage comparator U3 to one input of NAND gate U4. The non-inverting and inverting inputs of voltage comparator U3 are used to input the set value and the detected value, respectively. Connect the first terminal of resistor R9 to power supply VCC. Connect the second terminal of resistor R9 to the output of voltage comparator U3. Connect the first terminal of resistor R10 to power supply VCC. Connect the second terminal of resistor R10 to the collector of transistor Q2. Connect the emitter of transistor Q2 to ground. Connect the first terminal of resistor R11 to power supply VCC. Connect the NAND gate U4 to the ground. The other input terminal of resistor 4 is connected to the first terminal of resistor R11, which is connected to the input port of the main control chip. Resistor R11 outputs an overcurrent signal. The second terminal of resistor R11 is connected to the collector of transistor Q1, with the emitter of transistor Q1 grounded. The base of transistor Q1 is connected to the second terminal of resistor R10. The output terminal of NAND gate U4 is connected to the second terminal of resistor R10. The first terminal of resistor R12 is connected to the base of transistor Q1, and the second terminal of resistor R12 is grounded. The first terminal of capacitor C2 is connected to the first terminal of resistor R12, and the second terminal of capacitor C2 is grounded. The first terminal of resistor R13 is connected to the output terminal of the main control chip. The circuit consists of: resistor R13 (second terminal connected to the base of transistor Q3), resistor R14 (first terminal connected to the base of transistor Q3), resistor R14 (second terminal connected to the emitter of transistor Q3), transistor Q3 (collector connected to power supply VCC), transistor Q3 (emitter connected to the first terminal of resistor R17), resistor R17 (second terminal grounded), button S (first terminal connected to the collector of transistor Q3), button S (second terminal connected to the emitter of transistor Q3), resistor R15 (first terminal connected to the second terminal of button S), resistor R15 (second terminal connected to the base of transistor Q2), and resistor R16 (first terminal connected to the second terminal of resistor R15), resistor R16 (second terminal grounded).

[0013] Compared with the prior art, the beneficial effects of this utility model are:

[0014] This utility model uses a sampling circuit consisting of a voltage divider unit, a filter unit, an isolation unit, and an amplification unit arranged in sequence to accurately detect the operating status of the power module. The protection circuit compares the accurate detected value with the set value. Once the detected value exceeds the set value, it can quickly output an overcurrent signal and self-lock until the main control chip sends a reset signal or the button S is pressed manually. The overall circuit structure is compact and reasonable, with each unit having a clear division of labor and working in concert. The electronic components used in the circuit, such as resistors, capacitors, transistors, and operational amplifiers, are all common general-purpose components, resulting in lower cost and greater practicality. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall structure of the utility model;

[0016] Figure 2 This is a circuit diagram of the sampling circuit in the utility model.

[0017] Figure 3 This is a circuit diagram of the protection circuit in the utility model.

[0018] In the picture:

[0019] 1. Main control chip;

[0020] 2. Power module;

[0021] 3. Sampling circuit;

[0022] 4. Protection circuit. Detailed Implementation

[0023] The technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0024] Please see Figures 1-3 The present invention provides the following technical solution:

[0025] The overload protection circuit of the power module includes a main control chip 1, a power module 2, a sampling circuit 3, and a protection circuit 4 connected in sequence. The sampling circuit 3 includes a voltage divider unit, a filter unit, an isolation unit, and an amplification unit connected in sequence. The amplification unit outputs a detection value. The protection circuit 4 outputs an overcurrent signal based on the detection value and a set value. The overcurrent signal is output to the main control chip 1. The main control chip 1 determines the state of the power module 2 based on the overcurrent signal. The main control chip 1 uses a common microprocessor. In this utility model, the power module 2 is only referred to as an IGBT power module. A suitable power module 2 can be selected according to the actual use.

[0026] In this embodiment, please refer to Figure 2 The voltage divider unit includes resistors R1 and R2. Resistor R1 is connected in series in one end of the collector circuit of power module 2, and the second end of resistor R1 is connected to the collector of power module 2. The first end of resistor R2 is connected to the second end of resistor R1, and the second end of resistor R2 is grounded. This voltage divider operation makes it easier for subsequent circuits to process the signal, while also preventing excessive voltage from damaging subsequent circuits.

[0027] Further, please refer to Figure 2 The filtering unit includes a resistor R3 and a capacitor C1. The first terminal of resistor R3 is connected to the second terminal of resistor R1, and the second terminal of resistor R3 is connected to the first terminal of capacitor C1. The second terminal of capacitor C1 is grounded. Resistor R3 and capacitor C1 constitute an RC filter circuit, the main function of which is to filter out noise and interference signals in the output signal of the voltage divider unit. Since there are various electromagnetic interferences in actual circuits, these interference signals may affect the accuracy of detection. Through the RC filter circuit, the signal can be made more stable and smooth, providing a more reliable input signal for subsequent isolation and amplification processing.

[0028] Specifically, please refer to Figure 2 The isolation unit includes a voltage follower U1. The non-inverting input of the voltage follower U1 is connected to the second terminal of the resistor R3, and the inverting input of the voltage follower U1 is connected to the output terminal of the voltage follower U1. The voltage follower U1 has the characteristics of high input impedance and low output impedance. It can isolate the signal output by the filter unit, avoid the subsequent amplification unit from affecting the front-end circuit, and at the same time enhance the signal driving capability, ensure that the signal is not distorted during transmission, and enable the amplification unit to receive a stable and reliable input signal.

[0029] Further, please refer to Figure 2The amplification unit includes resistors R4, R5, and R6, and operational amplifier U2. The first terminal of resistor R4 is connected to the output of voltage follower U1, and the second terminal of resistor R4 is connected to the non-inverting input of operational amplifier U2. The first terminal of resistor R5 is connected to the inverting input of operational amplifier U2, and the second terminal of resistor R5 is connected to the output of operational amplifier U2. The first terminal of resistor R6 is connected to the inverting input of operational amplifier U2, and the second terminal of resistor R6 is grounded. Operational amplifier U2 outputs the detected value. Operational amplifier U2, together with resistors R4, R5, and R6, constitutes an amplification circuit. By appropriately setting the resistance values ​​of resistors R5 and R6, the input signal can be amplified to achieve a suitable amplitude, facilitating comparison and judgment by subsequent protection circuits. Operational amplifier U2 outputs the detected value.

[0030] In addition, please see Figure 3Protection circuit 4 includes power supply VCC, resistors R7 and R8, voltage comparator U3, resistor R9, NAND gate U4, resistors R10 and R11, transistors Q1 and Q2, resistor R12, capacitor C2, resistors R13 and R14, transistor Q3, button S, resistors R15, R16, and R17. Transistors Q1, Q2, and Q3 are all NPN transistors. The first terminal of resistor R7 is connected to power supply VCC, and the second terminal of resistor R7 is connected to the non-inverting input of voltage comparator U3. The first terminal of resistor R8 is connected to the second terminal of resistor R7, and the second terminal of resistor R8 is grounded. The inverting input of U3 is connected to the output of operational amplifier U2. The output of voltage comparator U3 is connected to one input of NAND gate U4. The non-inverting and inverting inputs of voltage comparator U3 are respectively used to input the set value and the detected value. The first terminal of resistor R9 is connected to power supply VCC, and the second terminal of resistor R9 is connected to the output of voltage comparator U3. The first terminal of resistor R10 is connected to power supply VCC, and the second terminal of resistor R10 is connected to the collector of transistor Q2. The emitter of transistor Q2 is grounded. The first terminal of resistor R11 is connected to power supply VCC, and the other input of NAND gate U4 is connected to the first terminal of resistor R11. The first terminal of resistor R11 is connected to the input port of main control chip 1. The first terminal outputs an overcurrent signal. The second terminal of resistor R11 is connected to the collector of transistor Q1, the emitter of transistor Q1 is grounded, the base of transistor Q1 is connected to the second terminal of resistor R10, the output of NAND gate U4 is connected to the second terminal of resistor R10, the first terminal of resistor R12 is connected to the base of transistor Q1, the second terminal of resistor R12 is grounded, the first terminal of capacitor C2 is connected to the first terminal of resistor R12, the second terminal of capacitor C2 is grounded, the first terminal of resistor R13 is connected to the output port of main control chip 1, the second terminal of resistor R13 is connected to the base of transistor Q3, the first terminal of resistor R14 is connected to the base of transistor Q3, the second terminal of resistor R14 is connected to the emitter of transistor Q3, and the collector of transistor Q3 is connected to the... The source is VCC. The emitter of transistor Q3 is connected to the first terminal of resistor R17, and the second terminal of resistor R17 is grounded. The first terminal of button S is connected to the collector of transistor Q3, and the second terminal of button S is connected to the emitter of transistor Q3. The first terminal of resistor R15 is connected to the second terminal of button S, and the second terminal of resistor R15 is connected to the base of transistor Q2. The first terminal of resistor R16 is connected to the second terminal of resistor R15, and the second terminal of resistor R16 is grounded. When the detected value exceeds the set value, voltage comparator U3 outputs a high-level signal, and the corresponding overcurrent signal is high-level; conversely, voltage comparator U3 outputs a low-level signal, and the corresponding overcurrent signal is low-level, thereby determining the abnormal condition of power module 2.

[0031] Finally, it should be noted that the process algorithms and programs involved in the operation of the main control chip 1 controlling the power module 2 and processing the protection circuit 4 to output data in this embodiment are not within the protection scope of this utility model, and the process algorithms and programs involved can be obtained by those skilled in the art through conventional technology. Therefore, they are only used by those skilled in the art to understand the electronic circuit connection relationship of the display circuit in this embodiment.

[0032] When the power module overload protection circuit of this utility model is in use, when the power module 2 is working, the voltage divider unit in the sampling circuit 3 divides the voltage of the collector of the power module 2, and then the filtering unit filters out the interference signal. The isolation unit plays an isolation role, and the amplification unit can amplify the signal output by the isolation unit and output the detection value.

[0033] The non-inverting input and inverting input of voltage comparator U3 are connected to the set value and the detected value, respectively. The set value is determined by resistors R7 and R8. When power module 2 is working normally, the set value is greater than the detected value, voltage comparator U3 outputs a high level, NAND gate U4 outputs a low level, transistor Q3 is cut off, and the first end of resistor R11 is connected to power supply VCC. At this time, the overcurrent signal is high, indicating that power module 2 is working normally.

[0034] When power module 2 is malfunctioning, the set value is less than the detected value. Voltage comparator U3 outputs a low level, NAND gate U4 outputs a high level, transistor Q3 is turned on, the first end of resistor R11 is pulled low and latched. When the main control chip 1 receives an overcurrent signal at a low level, it shuts down power module 2 according to the internal program of the main control chip 1.

[0035] After troubleshooting the power module 2, manually press button S or the main control chip 1 outputs a high-level reset signal to resistor R13. Transistor Q3 will turn on, transistor Q2 will turn on, and transistor Q1 will turn off again. The overcurrent signal will then become high again, indicating that the fault has been eliminated.

[0036] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed utility model. The scope of protection of this utility model is defined by the appended claims and their equivalents.

Claims

1. An overload protection circuit for a power module, comprising a main control chip (1), a power module (2), a sampling circuit (3), and a protection circuit (4) connected in sequence, characterized in that: The sampling circuit (3) includes a voltage divider unit, a filter unit, an isolation unit and an amplification unit connected in sequence. The amplification unit outputs a detection value. The protection circuit (4) outputs an overcurrent signal based on the detection value and the set value. The overcurrent signal is output to the main control chip (1). The main control chip (1) determines the status of the power module (2) based on the overcurrent signal.

2. The overload protection circuit for the power module according to claim 1, characterized in that: The voltage divider unit includes resistor R1 and resistor R2. Resistor R1 is connected in series in one end of the collector line of the power module (2). The second end of resistor R1 is connected to the collector of the power module (2). The first end of resistor R2 is connected to the second end of resistor R1. The second end of resistor R2 is grounded.

3. The overload protection circuit for the power module according to claim 2, characterized in that: The filter unit includes a resistor R3 and a capacitor C1. The first end of the resistor R3 is connected to the second end of the resistor R1, the second end of the resistor R3 is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is grounded.

4. The overload protection circuit for the power module according to claim 3, characterized in that: The isolation unit includes a voltage follower U1, with the non-inverting input terminal of the voltage follower U1 connected to the second terminal of the resistor R3, and the inverting input terminal of the voltage follower U1 connected to the output terminal of the voltage follower U1.

5. The overload protection circuit for the power module according to claim 4, characterized in that: The amplification unit includes resistors R4, R5, and R6, and operational amplifier U2. The first end of resistor R4 is connected to the output of voltage follower U1, and the second end of resistor R4 is connected to the non-inverting input of operational amplifier U2. The first end of resistor R5 is connected to the inverting input of operational amplifier U2, and the second end of resistor R5 is connected to the output of operational amplifier U2. The first end of resistor R6 is connected to the inverting input of operational amplifier U2, and the second end of resistor R6 is grounded. Operational amplifier U2 outputs the detected value.

6. The overload protection circuit for the power module according to claim 5, characterized in that: The protection circuit (4) includes power supply VCC, resistors R7 and R8, voltage comparator U3, resistor R9, NAND gate U4, resistors R10 and R11, transistors Q1 and Q2, resistor R12, capacitor C2, resistors R13 and R14, transistor Q3, button S, resistors R15, R16, and R17. Transistors Q1, Q2, and Q3 are all NPN transistors. The first end of resistor R7 is connected to power supply VCC, and the second end of resistor R7 is connected to the non-inverting input of voltage comparator U3. The first end of resistor R8 is connected to resistor R17. The second terminal of resistor R7 is connected to ground. The inverting input of voltage comparator U3 is connected to the output of operational amplifier U2. The output of voltage comparator U3 is connected to one input of NAND gate U4. The non-inverting and inverting inputs of voltage comparator U3 are used to input the set value and the detected value, respectively. The first terminal of resistor R9 is connected to power supply VCC. The second terminal of resistor R9 is connected to the output of voltage comparator U3. The first terminal of resistor R10 is connected to power supply VCC. The second terminal of resistor R10 is connected to the collector of transistor Q2. The emitter of transistor Q2 is grounded. The first terminal of resistor R11 is connected to power supply VCC. The other terminal of NAND gate U4... One input terminal is connected to the first terminal of resistor R11, the first terminal of resistor R11 is connected to the input port of the main control chip (1), the first terminal of resistor R11 outputs an overcurrent signal, the second terminal of resistor R11 is connected to the collector of transistor Q1, the emitter of transistor Q1 is grounded, the base of transistor Q1 is connected to the second terminal of resistor R10, the output terminal of NAND gate U4 is connected to the second terminal of resistor R10, the first terminal of resistor R12 is connected to the base of transistor Q1, the second terminal of resistor R12 is grounded, the first terminal of capacitor C2 is connected to the first terminal of resistor R12, the second terminal of capacitor C2 is grounded, and the first terminal of resistor R13 is connected to the output of the main control chip (1). The connection is as follows: The second terminal of resistor R13 is connected to the base of transistor Q3; the first terminal of resistor R14 is connected to the base of transistor Q3; the second terminal of resistor R14 is connected to the emitter of transistor Q3; the collector of transistor Q3 is connected to power supply VCC; the emitter of transistor Q3 is connected to the first terminal of resistor R17; the second terminal of resistor R17 is grounded; the first terminal of button S is connected to the collector of transistor Q3; the second terminal of button S is connected to the emitter of transistor Q3; the first terminal of resistor R15 is connected to the second terminal of button S; the second terminal of resistor R15 is connected to the base of transistor Q2; the first terminal of resistor R16 is connected to the second terminal of resistor R15; the second terminal of resistor R16 is grounded.

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