Light-emitting nitride semiconductor devices and indicator device using one

Abstract

Light-emitting nitride semiconductor device (10; 20; 30) comprising: a semiconductor laminate (SS) comprising a semiconductor layer of a first conductivity type (120) with a protruding section and a lattice buffer layer (130) arranged on the protruding section of the semiconductor layer of the first conductivity type (120) and comprising InGaN layers and GaN layers stacked alternately, wherein the semiconductor laminate (SS) has a first surface (SS1) provided by the semiconductor layer of the first conductivity type (120) and a second surface (SS2) opposite the first surface (SS1), wherein both the first surface (SS1) and the second surface (SS2) extend in a horizontal direction, wherein the semiconductor laminate (SS) has a body section (MA; MAA; MAB) having a columnar shape, wherein the body section (MA; MAA;MAB) comprises the protruding section of the semiconductor layer of the first conductivity type (120) and the lattice buffer layer (130) and extends from the second surface (SS2) in a vertical direction; ; an insulating layer (170) formed as a single layer and covering the second surface (SS2), a side surface of the body section (MA; MAAA; MAB) and a section of an upper surface (130S) of the grid buffer layer (130), wherein the insulating layer (170) has an opening (171) on the upper surface (130S) of the body section (MA; MAA; MAB), the opening (171) exposing a section of the grid buffer layer (130); and a light-emitting structure (ES) that has: a semiconductor layer of a second conductivity type (140) arranged on the section of the lattice buffer layer (130) exposed through the opening (171), wherein the semiconductor layer of the second conductivity type (140) is a selective growth on the lattice buffer layer (130) and has a side surface (140SS) inclined with respect to the top surface (130S) of the body section (MA; MAA; MAB), an active layer (150) covering the semiconductor layer of the second conductivity type (140) and in direct contact with the insulating layer (170), and a semiconductor layer of a third conductivity type (160) covering the active layer (150) and in direct contact with the insulating layer (170), wherein the active layer (150) and the third conductivity type semiconductor layer (160) are conformally stacked on a surface of the second conductivity type semiconductor layer (140), and wherein a section (170C) of the insulating layer (170) covering the upper surface (130S) of the grid buffer layer (130) is exposed from the semiconductor layer of the third conductivity type (160).

Description

BACKGROUND

[0001] Exemplary embodiments of the present disclosure relate to a light-emitting nitride semiconductor device and a display device that uses such a device.

[0002] Light-emitting semiconductor diodes (LEDs) have been used as light sources for lighting devices and as light sources for various electronic products. In particular, semiconductor LEDs are frequently used as light sources for the display panels of various devices such as televisions, mobile phones, PCs, laptops, and PDAs (Personal Digital Assistants).

[0003] Prior art display devices contain display fields that primarily consist of a liquid crystal display (LCD) and a backlight. More recently, however, display devices have been developed that do not require a separate backlight and use LEDs as individual pixels. Such display devices can not only be compact but also exhibit relatively high luminance and greater luminous efficiency compared to prior art LCD displays. Furthermore, since the aspect ratio of a screen can be freely changed and implemented to provide a large area, such display devices can be deployed as large displays of various types.

[0004] US 2019 / 0088820A1 describes light-emitting devices formed by selective epitaxial growth in mask openings on a planar semiconductor surface, enabling improved light extraction and electrical isolation through faceted sidewalls and special layer structures.

[0005] The publication EP 1 536 488 B1 describes a light-emitting device in which an n-type GaN layer is grown on a sapphire substrate, etched using a hexagonal mask, and formed into a prism. Subsequently, an active layer and a p-type GaN layer are applied, and p- and n-electrodes are formed, resulting in a light-emitting structure. SUMMARY

[0006] The invention relates to light-emitting nitride semiconductor devices with reduced manufacturing costs, which can be easily miniaturized, and a display device that uses such a device. Such light-emitting nitride semiconductor devices with reduced manufacturing costs, which can be easily miniaturized, and a display device with such a device are specified by independent claims 1, 11, and 14. Further embodiments are the subject of the dependent claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The above and other aspects, features and advantages of certain exemplary embodiments will be better understood from the following detailed description in conjunction with the accompanying drawings, in which: Fig. 1 a schematic perspective view of a light-emitting nitride semiconductor device according to an exemplary embodiment; Fig. 2 a lateral cross-sectional view along line II' of Fig. 1 is; and Fig. 3 and Fig. Four modified examples of a light-emitting nitride semiconductor device according to an exemplary embodiment are: Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9, Fig. 10, Fig. 11 and Fig. The 12 views schematically depict a main manufacturing process of the light-emitting nitride semiconductor device. Fig. 2. illustrate; Fig. 13, Fig. 14, Fig. 15 and Fig. Sixteen views are shown schematically illustrating a main manufacturing process of the light-emitting nitride semiconductor device. Fig. 2. illustrate; Fig. 17 a schematic perspective view of a display device according to an exemplary embodiment which uses a light-emitting nitride semiconductor device; Fig. 18 is a top view showing an enlarged section “A” of Fig. 17 shows; and Fig. 19 a lateral cross-sectional view along line II-II' of Fig. 18. DETAILED DESCRIPTION

[0008] Exemplary embodiments are described below with reference to the attached drawings.

[0009] A light-emitting nitride semiconductor device according to an exemplary embodiment is described with reference to Fig. 1 and Fig. 2 described. Fig. Figure 1 is a schematic perspective view of a light-emitting nitride semiconductor device according to an exemplary embodiment, and Fig. Figure 2 is a lateral cross-sectional view along line II' of Fig. 1.

[0010] Referring to Fig. 1 and Fig. 2 a light-emitting nitride semiconductor device 10 according to an exemplary embodiment can include a substrate 110, a semiconductor laminate SS, an insulating layer 170, a light-emitting structure ES, a first electrode 180 and a second electrode 190.

[0011] Substrate 110 is a growth substrate for growing a nitride semiconductor layer. Substrate 110 can be made of sapphire, Si, SiC, MgAl₂O₄, MgO, LiAlO₂, LiGaO₂, GaN, AlN, a metallic material, and the like. Sapphire, frequently used as a substrate for growing nitride semiconductors, is a crystal with electrically insulating properties and hexa-rhombo-R3c symmetry, with lattice constants of 1.3001 nm along the C-axis and 0.4758 nm along the A-axis, and with a C(0001) plane, an A(11-20) plane, and an R(1-102) plane. In this case, the C plane is primarily used as the substrate for nitride growth because it is relatively easy to grow a thin nitride layer on it, and it is stable at high temperatures. However, depending on the exemplary embodiment, the substrate 110 can be removed after the nitride semiconductor layer has grown.

[0012] The semiconductor laminate SS can comprise a semiconductor layer of the first conductivity type 120 and a lattice buffer layer 130, stacked successively on the substrate 110. A central region of the semiconductor laminate SS can have a projecting body section MA. A first surface SS1 of the semiconductor laminate SS can be provided as a surface in contact with the substrate 110, and the body section MA can be arranged on a second surface SS2, which is oriented in a direction opposite to the first surface SS1. In some embodiments, the first semiconductor layer of the first conductivity type 120 can comprise a first surface SS1 below and a second surface SS2 above, with SS2 facing the first surface SS1 (see Fig. 2) In some embodiments, the first surface SS1 and the second surface SS2 can each extend in a horizontal direction, as shown in Fig. 2 shown. In some embodiments, the semiconductor laminate SS can extend with the body section MA in a vertical direction (see e.g. Fig. 2).

[0013] The body section MA can have the side surface of a cylindrical column or a polygonal column. In an exemplary embodiment, a case is described in which the body section MA has a cylindrical column-shaped side surface. The body section MA can have a structure in which a lattice buffer layer 130 is arranged on the semiconductor layer of the first conductivity type 120. The lattice buffer layer 130 can be arranged on the semiconductor layer of the first conductivity type 120, from which a peripheral region 110A has been removed to prevent a compressive stress of the semiconductor layer of the first conductivity type 120 from acting on the semiconductor layer of the second conductivity type 140. An upper surface 130S of the body section MA can have a planar surface.

[0014] The semiconductor layer of the first conductivity type 120 can be an n-type semiconductor layer acting as a buffer layer and can be formed from a nitride semiconductor. The first semiconductor layer of the first conductivity type 120 can have a smaller lattice constant than the substrate 110 and can be a nitride semiconductor crystal with a larger lattice constant than the lattice buffer layer 130. The semiconductor layer of the first conductivity type 120 can be Al x In y Ga 1-x-yN (0≤x,y≤1, x+y<1). The lattice constant of the semiconductor layer of the first conductivity type 120 can, for example, be 0.3189 nm.

[0015] The lattice buffer layer 130 can be a buffer layer to compensate for a difference in the lattice constants between the semiconductor layer of the first conductivity type 120 and a light-emitting structure ES. The lattice buffer layer 130 can have a superlattice structure in which two or more layers with different compositions are stacked alternately. For example, the lattice buffer layer 130 can be an Al x1 In y1 Ga 1-x1-y1 N / Al x2 In y2 Ga 1-x2-y2N (0≤x1,x2,y1,y2≤1, x1≠x2 or y1≠y2, x1+y1≤1, x2+y2≤1) superlattice layer. More precisely, the lattice buffer layer 130 can be an InGaN / GaN superlattice layer. The lattice buffer layer 130 can adopt a superlattice structure so that stresses between the semiconductor layer of the first conductivity type 120 and the semiconductor layer of the second conductivity type 140 of the light-emitting structure ES can be effectively relieved. The light-emitting structure ES arranged above the semiconductor laminate SS can contain an active layer 150 that emits red light. For this purpose, the active layer 150 can consist of InGaN, for example, In 0,35 Ga 0,65 N. If the active layer 150 from In 0,35 Ga 0,65Since the lattice constant of the active layer 150 is 0.3311 nm, it is very difficult to form the active layer 150 directly on the semiconductor layer of the first conductivity type 120. In an exemplary embodiment, the lattice buffer layer 130 and the semiconductor layer 140 of the second conductivity type can be arranged between the semiconductor layer 120 of the first conductivity type and the active layer 150 to reduce the difference in lattice constants between the semiconductor layer 120 of the first conductivity type and the active layer 150. The thickness T of the lattice buffer layer 130 should be sufficient to prevent the voltage from being transferred to the semiconductor layer of the first conductivity type 120.In an exemplary embodiment, the grid buffer layer 130 can be designed to have a thickness T of at least 1 / 10 or more of the width W of the semiconductor layer of the first conductivity type 120.

[0016] The insulating layer 170 can be arranged on the second surface SS2 of the semiconductor laminate SS. The insulating layer 170 can be made of silicon dioxide (SiO2) or silicon nitride (SiNx). The insulating layer 170 can be arranged to completely cover the second surface SS2, but openings may be present in some areas. In an exemplary embodiment, the insulating layer 170 can include a first region 170A covering an upper surface of the semiconductor layer of the first conductivity type 120, a second region 170B covering a side surface of the semiconductor layer of the first conductivity type 120 and a side surface of the body section MA, and a third region 170C covering an upper surface 130S of the body section MA. Furthermore, an opening 171 can be formed in the third region 170C of the insulating layer 170.Since a bottom surface of the opening 171 corresponds to the top surface 130S of the body section MA, the lattice buffer layer 130 can be arranged on the bottom surface of the opening 171. The insulating layer 170 can be used as a mask to delimit the area in which the lattice buffer layer 130 of the body section MA is grown. That is, the lattice buffer layer 130 can be selectively grown only in the opening 171 of the insulating layer 170. Accordingly, the lattice buffer layer 130 can be selectively grown over the body section MA through the opening 171 to form the semiconductor layer of the second conductivity type 140. Furthermore, the opening 171 can determine an initial crystal form of the semiconductor layer of the second conductivity type 140 that is grown over the lattice buffer layer 130.

[0017] Furthermore, the insulating layer 170 can be arranged to surround the side surface of the grid buffer layer 130, acting as a support element to prevent the upper surface 130S of the grid buffer layer 130 from becoming excessively expanded during a process in which the grid of the grid buffer layer 130 aligns the semiconductor layer of the first conductivity type 120 and the semiconductor layer of the second conductivity type 140. For this purpose, the insulating layer 170 can be formed with a thickness sufficient to effect selective growth of the semiconductor layer of the second conductivity type 140. In an exemplary embodiment, the insulating layer 170 can be formed with a thickness of 9 nm to 11 nm.

[0018] A light-emitting structure ES can be arranged above the semiconductor laminate SS. The light-emitting structure can have a structure in which the semiconductor layer of the second conductivity type 140, the active layer 150, and the semiconductor layer of the third conductivity type 160 are stacked sequentially. The semiconductor layers 140 and 160 of the second and third conductivity types, respectively, can be n-type and p-type semiconductor layers and can be formed from nitride semiconductors. Accordingly, in an exemplary embodiment, the semiconductor layers 140 and 160 of the second and third conductivity types can be made from a nitride semiconductor, e.g., GaN, with an Al x In y Ga (1-x-y)The N-composition formula (here 0≤x<1, 0≤y<1 and 0≤x+y<1) can be used, without being limited to it. The semiconductor layer of the second conductivity type 140 can consist of a material having the same composition as the semiconductor layer of the first conductivity type 120.

[0019] The semiconductor layer 140 of the second conductivity type can be formed by selectively growing the lattice buffer layer 130 through the opening 171 of the insulating layer 170. The semiconductor layer 140 of the second conductivity type can have the shape of a hexagonal column, and each of its side faces 140SS can be formed as an inclined surface. At least one section of the side faces 140SS of the semiconductor layer of the second conductivity type 140 can be a crystal plane that is formed naturally in the process of selectively growing the lattice buffer layer 130. For example, if the semiconductor layer 140 of the second conductivity type is formed from GaN, the side face 140SS of the semiconductor layer 140 of the second conductivity type can be a semipolar surface and have an inclination angle θ of 55° to 65° with respect to the top surface 130S of the body section MA.The side surface 140SS of the second conductivity type semiconductor layer 140 can be arranged to be in contact with the third area 170C of the insulating layer 170, which is located above the body section MA. That is, the second conductivity type semiconductor layer 140 can be configured so that it does not deviate from the upper surface 130S of the body section MA while covering the opening 171 of the insulating layer 170.

[0020] The active layer 150 and the third conductivity type semiconductor layer 160 can be conformally stacked on a surface of the second conductivity type semiconductor layer 140. Accordingly, a side surface 150SS of the active layer 150 and a side surface 160SS of the third conductivity type semiconductor layer 160 can be configured as a semipolar surface, in the same way as the side surface 140SS of the second conductivity type semiconductor layer 140. Furthermore, the side surface 150SS of the active layer 150 and the side surface 160SS of the third conductivity type semiconductor layer 160 can be arranged to be in contact with the third region 170C of the insulating layer 170. Accordingly, the third conductivity type semiconductor layer 160 can be configured so that it does not deviate from the top surface 130S of the body section MA.

[0021] The active layer 150 can have a multiple quantum well (MQW) structure, in which a quantum well layer and a quantum barrier layer are stacked alternately on top of each other. For example, the quantum well layer and the quantum barrier layer can be made of In x Al y Ga 1-x-y N(0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be configured with different compositions. In an exemplary embodiment, the quantum well layer and the quantum barrier layer can each be described by the composition formula In x Ga (1-x) N or In y Ga (1-y)N (0 < x < 1, 0 < y < 1, y < x). The structure of the active layer 150 need not be restricted to a multi-quantum well structure, but can also have a single-quantum well structure. As mentioned above, it is known that it is very difficult to emit red light with the InGaN-based active layer 150, mainly because the difference in lattice constants between the GaN that forms the third conductivity type semiconductor layer and the InGaN that forms the active layer is very large, making lattice matching difficult. If the composition of the InGaN-based active layer 150 for the emission of red light In 0,35 Ga 0,65In InGaN, the lattice constant can reach 0.3311 nm, while the lattice constant of GaN is 0.3189 nm. Accordingly, it was very difficult to emit red light with the InGaN-based active layer 150. In an exemplary embodiment, the InGaN-based active layer can emit red light by reducing the difference in lattice constants between the semiconductor layer of the first conductivity type 120 and the active layer 150 by placing the lattice buffer layer 130 and the semiconductor layer of the second conductivity type 140 between the semiconductor layer of the first conductivity type 120 and the active layer 150. Accordingly, the light-emitting structure ES according to an exemplary embodiment can emit red light in the range of 600 nm to 700 nm without a separate wavelength conversion material.

[0022] First and second electrodes 180 and 190, respectively, can be arranged on the semiconductor layer of the first conductivity type 120 or the semiconductor layer of the third conductivity type 160. The first and second electrodes 180 and 190 can serve to supply the semiconductor layers of the first and third conductivity types 120 and 160 with external power and can be provided in such a way that they each form an ohmic connection with the semiconductor layers of the first and third conductivity types 120 and 160.

[0023] The first and second electrodes 180 and 190 can be formed as a single layer or as a multilayer structure of a conductive material exhibiting ohmic connection properties with the semiconductor layers of the first and third conductivity types 120 and 160, respectively. The first and second electrodes 180 and 190 can be formed, for example, by a deposition or sputtering process from one or more materials such as Au, Ag, Cu, Zn, Al, In, Ti, Si, Ge, Sn, Mg, Ta, Cr, W, Ru, Rh, Ir, Ni, Pd, Pt, and transparent conductive oxide (TCO).

[0024] In the light-emitting nitride semiconductor device 10 of this configuration, the lattice buffer layer 130 can be arranged on the semiconductor layer of the first conductivity type 120, and the lattice buffer layer 130 can be formed in a protruding column shape, thereby realizing an InGaN-based active layer that emits red light. Since such a light-emitting semiconductor device with an InGaN-based active layer can be fabricated by depositing it on a 200 nm to 300 mm wafer, it can be manufactured at a lower cost compared to a conventional red-light-emitting semiconductor device based on AlInGaP or a light-emitting semiconductor device using a red phosphor.Furthermore, a light-emitting semiconductor device with an InGaN-based active layer can fabricate an ultra-fine light-emitting semiconductor device with a very narrow width compared to a conventional red light-emitting semiconductor device based on AlInGaP or a light-emitting semiconductor device using a red phosphor. Therefore, it is possible to fabricate a high-resolution display of 5000 PPI or more using such a device.

[0025] Fig. 3 and Fig. Figure 4 shows modified examples where the shape of the body segment has been changed. Structures other than the body segment are the same as those in the exemplary embodiments described above, so a detailed description of these structures is omitted.

[0026] A light-emitting nitride semiconductor device 20 of Fig. Figure 3 illustrates a case in which a body section MAA has a hexagonal column shape. Each face of the body section MAA can be arranged to correspond to a crystal plane of the lattice buffer layer and the first-type conductivity semiconductor layer that form the body section MAA. A light-emitting nitride semiconductor device 30 of Fig. Figure 4 illustrates a case in which a body section MAB has a square column shape.

[0027] Next, a manufacturing process for the light-emitting nitride semiconductor device 10 will be described. Fig. 2 with reference to Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9, Fig. 10, Fig. 11 to Fig. 12 described. Fig. 5, Fig. 6, Fig. 7, Fig. 8, Fig. 9, Fig. 10, Fig. 11 to Fig. 12 are views that schematically depict a main manufacturing process of the light-emitting nitride semiconductor device of Fig. Figure 2 shows the process described later, which can be carried out at the wafer level.

[0028] First, with reference to Fig. 5, a semiconductor layer of the first conductivity type 120 is formed on a substrate 110.

[0029] Substrate 110 is a substrate for semiconductor growth and can be provided in wafer form. The growth substrate GS can utilize insulating, conductive, and semiconductor materials such as sapphire, SiC, MgAl₂O₄, MgO, LiAlO₂, LiGaO₂, GaN, and the like. The semiconductor layer of the first conductivity type 120 can be formed by growing it on a top surface 110S of substrate 110. The semiconductor layer of the first conductivity type 120 can be formed from a semiconductor layer doped with n-type defects and can be an n-type nitride semiconductor layer.

[0030] Next, with reference to Fig. 6, a semiconductor laminate SS containing a lattice buffer layer 130 is formed on the upper surface 120S of the first conductivity-type semiconductor layer 120. First and second mask layers 131 and 132 can be stacked successively on the semiconductor laminate SS.

[0031] The grid buffer layer 130 can be arranged to reduce a difference in grid constants, to be described later, between the semiconductor layer of the second conductivity type 140 and the semiconductor layer of the first conductivity type 120. The thickness T of the grid buffer layer 130 can be such that it is sufficiently thick to attenuate the voltage transmission of the semiconductor layer of the first conductivity type 120. In an exemplary embodiment, the grid buffer layer 130 can be configured to have a thickness T of at least 1 / 10 or more of the width W of the semiconductor layer of the first conductivity type 120.

[0032] The first and second mask layers 131 and 132 can be formed from insulating materials with different etch selectivities. For example, the first mask layer 131 can be made of silicon dioxide (SiO2) and the second mask layer 132 of silicon nitride (SiN). x) and conversely, the first mask layer 131 can consist of silicon nitride (SiN x ) and the second mask layer 132 consists of silicon oxide (SiO2).

[0033] Next, with reference to Fig. 7, a body section MA, which protrudes from the semiconductor layer of the first conductivity type 120, is formed by dry etching E1 of the peripheral area 110A of the semiconductor laminate SS.

[0034] Next, with reference to Fig. 8. The first mask layer 131 is wet-etched E2 to form a depression area R in the peripheral region of the first mask layer 131. If the first mask layer 131 consists of silicon dioxide (SiO2), a wet etching process can also be carried out using an etching solution containing hydrofluoric acid. If the first mask layer 131 consists of silicon nitride (SiN2), the first mask layer 131 is wet-etched using a wet etching process with a hydrofluoric acid solution. xThe process can also be carried out with a phosphoric acid-containing etching solution. Consequently, the second mask layer 132 cannot be etched, and only the first mask layer 131 can be selectively etched.

[0035] Next, with reference to Fig. 9, an insulating layer 170 is formed such that it completely covers a second surface SS2 of the semiconductor laminate SS.

[0036] The insulating layer 170 can be formed from an insulating material exhibiting an etch selectivity different from that of the first mask layer 131. The insulating layer 170 can be formed from the same material as the second mask layer 132, but is not limited to this. If the insulating layer 170 is formed from a material with a different etch selectivity than the first mask layer 132, it can be formed from a different material than the second mask layer 132. The insulating layer 170 can be formed up to the recessed area R so that it touches the first mask layer 131. The insulating layer 170 can be formed to have a lesser thickness than the first mask layer 131 so as not to obstruct the recessed area R. Accordingly, in a subsequent process, a wet etching solution can be injected through the recessed area R to lift the second mask layer 132.

[0037] Next, with reference to Fig. 9 and Fig. 10, the second mask layer 132 is lifted off by injecting a wet etching solution into the recessed area R in order to etch E3 of the first mask layer 131. If the first mask layer 131 is silicon dioxide (SiO2), then the wet etching process can be carried out with a hydrofluoric acid-containing etching solution. Furthermore, the process can be carried out with a phosphoric acid-containing etching solution if the first mask layer 131 is made of silicon nitride (SiN₂). x ). Accordingly, the first mask layer 131 can be etched away and removed, and the second mask layer 132 can be lifted off. In this process, the opening 171 can be formed by self-alignment in a region of the insulating layer 170 that corresponds to the upper section of the grid buffer layer 130.

[0038] Next, with reference to Fig. 11, a semiconductor layer of the second conductivity type 140 is formed by selective growth of the lattice buffer layer 130 through the opening 171. In a process of selective growth of the lattice buffer layer 130, an inclined side surface 140SS of the semiconductor layer of the second conductivity type 140 can be formed naturally.

[0039] Next, with reference to Fig. 12, an active layer 150 and a semiconductor layer of the third conductivity type 160 are conformally formed on the semiconductor layer of the second conductivity type 140. Furthermore, an opening 172, through which the semiconductor layer of the first conductivity type 120 is exposed to a base surface, can be formed in a region of the insulating layer 170. In a subsequent process, a second electrode 180 can be formed in the opening 172. The light-emitting nitride semiconductor device 20 can then be constructed from Fig. 2. can be produced by disassembling it into units of individual devices.

[0040] Next, a manufacturing process for the light-emitting nitride semiconductor device 10 will be described. Fig. 2 with reference to Fig. 13, Fig. 14, Fig. 15 to Fig. 16 described. Fig. 13, Fig. 14, Fig. 15 to Fig. Figure 16 shows schematically a main manufacturing process of the light-emitting nitride semiconductor device of Fig. 2 illustrate. Since the procedure before Fig. 13 is the same as that of Fig. In contrast to the exemplary embodiment described above, section 5, its description is omitted. Fig. In the exemplary embodiment described above, the difference is that the first mask layer 131 and the second mask layer 132 are not formed on the grid buffer layer 130. This is described in detail below.

[0041] Referring to Fig. 13 A lattice buffer layer 130 can be formed on the semiconductor layer of the first conductivity type 120.

[0042] Next, with reference to Fig. 14, a body section MA, which protrudes from the semiconductor layer of the first conductivity type 120, is formed by dry etching E4 of a peripheral area of ​​the semiconductor laminate SS.

[0043] Next, with reference to Fig. 15, an insulating layer 170 is formed such that it completely covers the second surface SS2 of the semiconductor laminate SS. Next, referring to Fig. 16, an area of ​​the insulating layer 170 corresponding to the upper section of the grid buffer layer 130 is etched to form an opening 171. Since the subsequent procedure is the same as the procedure according to Fig. 11 of the exemplary embodiment described above, a detailed description of which is omitted.

[0044] A display device according to an exemplary embodiment is described with reference to the Fig. 17, Fig. 18 to Fig. 19 described. Fig. Figure 17 is a schematic perspective view of a display device that uses a light-emitting nitride semiconductor device according to an exemplary embodiment. Fig. 18 is a top view showing an enlarged section “A” of Fig. 17 shows, and Fig. Figure 19 is a lateral cross-sectional view along line II-II' of Fig. 18.

[0045] Referring to Fig. 17. According to an exemplary embodiment, a display device 1 can comprise a first substrate structure 100, consisting of an array of the light-emitting nitride semiconductor device, and a second substrate structure 300, which is arranged below the first substrate structure 100 and contains a control circuit. A protective layer 400 can be arranged on an upper surface of the first substrate structure 100, and a connecting layer 200 can be arranged between the first substrate structure 100 and the second substrate structure 300. The display device 1 can have a square substrate shape or another suitable shape. The first substrate structure 100 can be understood as a display field, and the second substrate structure 300 can be understood as a display field control unit for controlling the display field.The display device 1 according to an exemplary embodiment can be an ultra-miniaturized display with ultra-high resolution, which is used in a headset for virtual reality or augmented reality.

[0046] Referring to Fig. 18 The first substrate structure 100 can contain a pixel area 2 and a molded part area 3 surrounding the pixel area 2. A plurality of pixels P can be arranged in the pixel area 2 such that they form a column and a row. A plurality of pixels P according to an exemplary embodiment are in Fig. Figure 17 is shown to form a rectangular field of 15 × 15, but the number of columns and rows can be implemented in any suitable number (e.g., 1024 × 768, 1920 × 1080, 3840 × 2160, 7680 × 4320) and can be arranged in various shapes other than a square. The plurality of pixels P can be interconnected. That is, the plurality of pixels P do not need to be manufactured separately but can be completely manufactured at once in the same process. The plurality of pixels P according to an exemplary embodiment can be manufactured to have a pixel density of 5000 pixels per inch (PPI) or more.

[0047] The molded part area 3 can be arranged around the pixel area 2. The molded part area 3 can contain a black matrix. For example, the black matrix can be located in a peripheral area of ​​the first substrate structure 100 to serve as a guide line defining an area in which a plurality of pixels P are arranged. The black matrix is ​​not limited to black and can also have other colors, such as white or green, depending on the purpose and use of the product, and a transparent matrix can also be used if required.

[0048] Fig. Figure 19 shows a cross-sectional structure of a [structure] in Fig. 18 pixels P shown along II-II'. Referring to Fig. 18 and Fig. 19 Each pixel P can contain a first to third subpixel SP1, SP2, and SP3 configured to emit light of different colors. The first to third subpixels SP1, SP2, and SP3 contained in each pixel P can be provided as an adjacent structure. The first to third subpixels SP1, SP2, and SP3 can be configured to provide different colors so that a color image can be displayed on a display device 1. For example, the first to third subpixels SP1, SP2, and SP3 are provided as subpixels emitting red (R), green (G), and blue (G) light, respectively. In one exemplary embodiment, a form is shown in which three subpixels, each emitting RGB light, are contained in a pixel P; however, embodiments are not limited thereto, and four or more subpixels can also be contained.Furthermore, the arrangement of the subpixels can be modified in various ways, although an example has been described in which three subpixels are arranged next to each other.

[0049] Referring to Fig. 18 and Fig. 19. A pixel P can contain a first substrate structure 100 and a second substrate structure 300, which are stacked vertically in an upward and downward direction. The first substrate structure 100 and the second substrate structure 300 can be connected (or bonded) to each other by a bonding layer 200 (or adhesive layer). A protective layer 400 can be applied above the first substrate structure 100. The first substrate structure 100 and the second substrate structure 300 can be integrated at the wafer level by a wafer bonding process, such as fusion bonding.

[0050] The first to third light-emitting nitride semiconductor devices 10R, 10G, and 10B can be arranged on the first substrate structure 100. The first to third light-emitting nitride semiconductor devices 10R, 10G, and 10B of an exemplary embodiment each have the same structure as the light-emitting nitride semiconductor device 10 of Fig. 2, but there is a difference in that the substrate 110 of Fig. 2 is removed. The specific structure of the light-emitting nitride semiconductor device 10 is described with reference to Fig. 2 described. Other structures are the same as those of the light-emitting nitride semiconductor device 10 described above, so a detailed description of them is omitted.

[0051] The first to third light-emitting nitride semiconductor devices 10R, 10G and 10B can include a first and a second electrode 180' and 190' respectively for power supply.

[0052] The first substrate structure 100 can include a molded section 101 that exposes the first and second electrodes 180' and 190' while enclosing the lower surfaces of the first to third light-emitting nitride semiconductor devices 10R, 10G, and 10B. The molded section 101 can contain light-reflecting particles for reflecting light. Titanium dioxide (TiO2) or aluminum oxide (Al2O3) can be used as light-reflecting particles, and the embodiments are not limited to these.

[0053] A protective layer 400 can be arranged above the first substrate structure 100.

[0054] Below the first substrate structure 100, a bonding layer 200 (or adhesive layer) can be arranged for connecting or bonding the first substrate structure 100 to the second substrate structure 300. The bonding layer 200 can contain an insulating bonding layer 210 and conductive bonding layers 210N and 210P.

[0055] The insulating interconnect layer 210 can connect the first substrate structure 100 and the second substrate structure 300. The insulating interconnect layer 210 can be made of a material with the same composition as the molded section 101 of the first substrate structure 100. The conductive interconnect layers 210N and 210P can connect the first and second electrodes 180' and 190' of the second substrate structure 300 to the electrodes of the second substrate structure 300 and can be made of a conductive material with the same composition as the second electrodes 180' and 190'. Accordingly, the first substrate structure 100 and the second substrate structure 300 can be connected to each other via the interconnect layer 200 to form an integrated unit.

[0056] The second substrate structure 300 can contain a driver circuit that includes a plurality of TFT cells for controlling the first to third light-emitting nitride semiconductor devices 10R, 10G, and 10B of the first substrate structure 100. The plurality of TFT cells can form a TFT circuit for controlling the driver of the plurality of pixels P. The plurality of TFT cells can be connected to the first to third light-emitting nitride semiconductor devices 10R, 10G, and 10B via the conductive interconnect layers 210N and 210P of interconnect layer 200, so that they correspond to these devices. The plurality of TFT cells can contain a semiconductor layer formed by implanting defects into a semiconductor substrate.For example, the semiconductor layer that makes up the majority of TFT cells can contain a semiconductor oxide, polysilicon, a silicon-based semiconductor, indium gallium zinc oxide, or a semiconductor compound such as silicon germanium.

[0057] As outlined above, according to an exemplary embodiment, a light-emitting nitride semiconductor device and a display device using such a device can have the effect of reducing the time required for their manufacture, and of making a light-emitting component using the nitride semiconductor device and the display device easily miniaturized.

[0058] Various advantages and effects of embodiments of the present disclosure are not limited to the above description.

Claims

[1] Light-emitting nitride semiconductor device (10; 20; 30) comprising: a semiconductor laminate (SS) comprising a semiconductor layer of a first conductivity type (120) with a protruding section and a lattice buffer layer (130) arranged on the protruding section of the semiconductor layer of the first conductivity type (120) and comprising InGaN layers and GaN layers stacked alternately, wherein the semiconductor laminate (SS) has a first surface (SS1) provided by the semiconductor layer of the first conductivity type (120) and a second surface (SS2) opposite the first surface (SS1), wherein both the first surface (SS1) and the second surface (SS2) extend in a horizontal direction, wherein the semiconductor laminate (SS) has a body section (MA; MAA; MAB) having a columnar shape, wherein the body section (MA; MAA;MAB) comprises the protruding section of the semiconductor layer of the first conductivity type (120) and the lattice buffer layer (130) and extends from the second surface (SS2) in a vertical direction; an insulating layer (170) formed as a single layer and covering the second surface (SS2), a side surface of the body section (MA; MAAA; MAB) and a section of an upper surface (130S) of the grid buffer layer (130), wherein the insulating layer (170) has an opening (171) on the upper surface (130S) of the body section (MA; MAA; MAB), the opening (171) exposing a section of the grid buffer layer (130); and a light-emitting structure (ES) that has: a semiconductor layer of a second conductivity type (140) arranged on the section of the lattice buffer layer (130) exposed through the opening (171), wherein the semiconductor layer of the second conductivity type (140) is a selective growth on the lattice buffer layer (130) and has a side surface (140SS) inclined with respect to the top surface (130S) of the body section (MA; MAA; MAB), an active layer (150) covering the semiconductor layer of the second conductivity type (140) and in direct contact with the insulating layer (170), and a semiconductor layer of a third conductivity type (160) covering the active layer (150) and in direct contact with the insulating layer (170), wherein the active layer (150) and the third conductivity type semiconductor layer (160) are conformally stacked on a surface of the second conductivity type semiconductor layer (140), and wherein a section (170C) of the insulating layer (170) covering the upper surface (130S) of the grid buffer layer (130) is exposed from the semiconductor layer of the third conductivity type (160). [2] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 1, wherein the active layer (150) is configured to emit red light with a wavelength of 600 nm to 700 nm. [3] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 1 or 2, wherein the semiconductor layer of the third conductivity type (160) is in contact with the insulating layer (170) only within a region (170C) that overlaps the upper surface (130S) of the body section (MA; MAA; MAB). [4] Light-emitting nitride semiconductor device (10; 20; 30) according to any one of claims 1 to 3, wherein the semiconductor layer of the first conductivity type (120) contains a material having the same composition as the semiconductor layer of the second conductivity type (140). [5] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 4, wherein the semiconductor layer of the first conductivity type (120) and the semiconductor layer of the second conductivity type (140) contain n-GaN, wherein the active layer (150) contains InGaN, and wherein the semiconductor layer of the third conductivity type (160) contains p-GaN. [6] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 5, wherein the side surface (140SS) of the semiconductor layer of the second conductivity type (140) is a semipolar surface. [7] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 5 or 6, wherein the side surface (140SS) of the semiconductor layer of the second conductivity type (140) has an inclination angle of 55° to 65° with respect to the upper surface (130S) of the body section (MA; MAA; MAB). [8] Light-emitting nitride semiconductor device (10; 20; 30) according to any one of claims 1 to 7, wherein the body section (MA; MAA; MAB), viewed in a vertical direction from the second surface (SS2), is arranged in a center of the semiconductor laminate (SS). [9] Light-emitting nitride semiconductor device (10; 20; 30) according to any one of claims 1 to 8, wherein the body section (MA; MAA; MAB) has the form of a cylindrical column or a polygonal column. [10] Light-emitting nitride semiconductor device (20) according to any one of claims 1 to 9, wherein the body section (MAA) has the shape of a hexagonal column and each side face of the hexagonal column is a crystal plane of the lattice buffer layer (130). [11] Light-emitting nitride semiconductor device (10; 20; 30) comprising: a semiconductor laminate (SS) with a body section (MA; MAA; MAB) having a column-like shape projecting from a central area, wherein the body section (MA; MAA; MAB) has a semiconductor layer of a first conductivity type (120) and a lattice buffer layer (130) arranged on the semiconductor layer of the first conductivity type (120); an insulating layer (170) formed as a single layer and covering an upper surface (SS2) of the semiconductor laminate (SS) where the semiconductor layer of the first conductivity type (120) is exposed, a side surface of the body section (MA; MAA; MAB) and a section of an upper surface (130S) of the lattice buffer layer (130), wherein the insulating layer (170) has an opening (171) on the upper surface (130S) of the body section (MA; MAA; MAB), the opening (171) exposing a section of the lattice buffer layer (130); and a light-emitting structure (ES) that has: a semiconductor layer of a second conductivity type (140) arranged on the section of the lattice buffer layer (130) exposed through the opening (171), wherein the semiconductor layer of the second conductivity type (140) is a selective growth on the lattice buffer layer (130) and has a side surface (140SS) inclined with respect to the top surface (130S) of the body section (MA; MAA; MAB), an active layer (150) covering the semiconductor layer of the second conductivity type (140) and contacting the insulating layer (170), and a semiconductor layer of a third conductivity type (160) covering the active layer (150) and contacting the insulating layer (170), wherein the active layer (150) is configured to emit red light in a wavelength range of 600 nm to 700 nm, wherein the active layer (150) and the third conductivity type semiconductor layer (160) are conformally stacked on a surface of the second conductivity type semiconductor layer (140), wherein a section (170C) of the insulating layer (170) covering the upper surface (130S) of the lattice buffer layer (130) is exposed from the semiconductor layer of the third conductivity type (160), and wherein the insulating layer (170) covering the section on the top of the grid buffer layer (130) is in direct contact with: i) a p-type semiconductor layer of the light-emitting structure (ES), wherein the p-type semiconductor layer is the third conductivity type semiconductor layer (160), ii) the active layer (150), and iii) an n-type semiconductor layer of the light-emitting structure (ES), wherein the n-type semiconductor layer is the second conductivity type semiconductor layer (140). [12] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 11, wherein the semiconductor layer of the first conductivity type (120) and the semiconductor layer of the second conductivity type (140) contain n-GaN, wherein the active layer (150) contains InGaN, wherein the semiconductor layer of the third conductivity type (160) contains p-GaN, and wherein the side surface (140SS) of the semiconductor layer of the second conductivity type (140) is a semipolar surface. [13] Light-emitting nitride semiconductor device (10; 20; 30) according to claim 11 or 12, wherein an InGaN layer and a GaN layer are stacked alternately in the grid buffer layer (130). [14] Display device (1) comprising: a display field (100) comprising a printed circuit board and a plurality of pixels arranged in rows and columns on the printed circuit board; and a display field control unit (300) configured to control the display field (100), where each pixel (P) has a plurality of pixels: a plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B), wherein the plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B) form a plurality of subpixels (SP1, SP2, SP3) of each pixel (P), wherein each light-emitting nitride semiconductor device (10R, 10G, 10B) of the plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B) comprises: a semiconductor laminate (SS) comprising a semiconductor layer of a first conductivity type (120) with a protruding section and a lattice buffer layer (130) arranged on the protruding section of the semiconductor layer of the first conductivity type (120) and comprising InGaN layers and GaN layers stacked alternately, wherein the semiconductor laminate (SS) has a first surface (SS1) provided by the semiconductor layer of the first conductivity type (120) and a second surface (SS2) opposite the first surface (SS1), wherein both the first surface (SS1) and the second surface (SS2) extend in a horizontal direction, wherein the semiconductor laminate (SS) has a body section (MA; MAA; MAB) having a columnar shape, wherein the body section (MA; MAA;MAB) comprises the protruding section of the semiconductor layer of the first conductivity type (120) and the lattice buffer layer (130) and extends from the second surface (SS2) in a vertical direction; an insulating layer (170), which is designed as a single layer, covers the second surface (SS2), a side surface of the body section (MA; MAA; MAB) and a section of an upper surface (130S) of the grid buffer layer (130), wherein the insulating layer (170) has an opening (171) that exposes a section of the grid buffer layer (130); and a light-emitting structure (ES) that has: a semiconductor layer of a second conductivity type (140) arranged on the section of the lattice buffer layer (130) exposed through the opening (171), wherein the semiconductor layer of the second conductivity type (140) is a selective growth on the lattice buffer layer (130) and has a side surface (140SS) inclined with respect to the top surface (130S) of the body section (MA; MAA; MAB), an active layer (150) covering the semiconductor layer of the second conductivity type (140) and in direct contact with the insulating layer (170), and a semiconductor layer of a third conductivity type (160) covering the active layer (150) and in direct contact with the insulating layer (170), wherein the active layer (150) and the semiconductor layer of the third conductivity type (160) are conformally stacked on a surface of the semiconductor layer of the second conductivity type (140), and a section (170C) of the insulating layer (170) covering the top surface (130S) of the lattice buffer layer (130) is exposed by the semiconductor layer of the third conductivity type (160); a molded section (101) that surrounds each side face of the plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B) such that the plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B) are coupled; and a first electrode (180; 180') and a second electrode (190; 190') connected to the semiconductor layer of the first conductivity type (120) and the semiconductor layer of the third conductivity type (160), respectively, wherein the first electrode (180; 180') and the second electrode (190; 190') pass through the molded section (101). [15] Display device (1) according to claim 14, wherein the plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B) comprises a first light-emitting nitride semiconductor device (10R), a second light-emitting nitride semiconductor device (10G) and a third light-emitting nitride semiconductor device (10B), which form each pixel (P), and wherein the first light-emitting nitride semiconductor device (10R) has a first active layer (150), the second light-emitting nitride semiconductor device (10G) has a second active layer (150), and the third light-emitting nitride semiconductor device (10B) has a third active layer (150), and wherein each of the first active layer (150), the second active layer (150) and the third active layer (150) is configured to emit light of a different wavelength. [16] Display device (1) according to claim 15, wherein the first active layer (150), the second active layer (150) and the third active layer (150) emit red light, green light and blue light respectively. [17] Display device (1) according to one of claims 14 to 16, wherein the plurality of light-emitting nitride semiconductor devices (10R, 10G, 10B) are spaced apart from each other. [18] Display device (1) according to any one of claims 14 to 17, wherein the grid buffer layer (130) has a thickness of at least 1 / 10 of the width of a subpixel of the plurality of subpixels (SP1, SP2, SP3). [19] Display device (1) according to any one of claims 14 to 18, wherein the plurality of pixels has a density of at least 5000 pixels per inch (PPI).

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