Electronic devices with vents and related methods

By integrating vent openings in the encapsulation material of electronic devices, the issues of solder voids and warpage during soldering are mitigated, improving the reliability and integrity of soldered connections.

DE102022116039B4Active Publication Date: 2025-08-14INFINEON TECHNOLOGIES AG
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
DE102022116039
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-06-28
Publication Date
2025-08-14
Estimated Expiration
2042-06-28

AI Technical Summary

Technical Problem

Existing methods of soldering electronic devices to circuit boards often result in solder voids (solder arches) and component warpage due to CTE mismatches.

Method used

Incorporating vent openings in the encapsulation material of electronic devices to provide outgassing paths during soldering, reducing solder voids and warpage by allowing gases to escape.

Benefits of technology

Reduces solder voids and warpage, enhancing the reliability and integrity of soldered connections by providing a continuous gas path through the device.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

Electronic device comprising: a solderable surface (2); at least one surface opening (4) arranged in the solderable surface (2); an encapsulation material (6) that encapsulates at least one electronic component (8) of the electronic device; and at least one vent opening (10) arranged in a region of the surface opening (4) and extending through the encapsulation material (6), wherein the at least one vent opening (10) is designed to provide an outgassing path (30) when the electronic device is soldered to a circuit board (26).
Need to check novelty before this filing date? Find Prior Art

Description

Technical area

[0001] The present disclosure relates to electronic devices having vents. Furthermore, the present disclosure relates to methods for manufacturing such electronic devices and methods for soldering such electronic devices to a circuit board. background

[0002] Electronic devices can be mounted on printed circuit boards using various techniques. For example, an electronic device can be soldered to a printed circuit board using a soldering process. This can lead to two undesirable effects: First, solder voids can form, and / or second, warpage of one or more device components can occur due to CTE mismatches. Manufacturers of electronic devices are constantly striving to improve their products. In particular, it may be desirable to provide electronic devices with reduced solder voids and lower warpage. In this context, it may further be desirable to provide methods for manufacturing such electronic devices and methods for soldering such electronic devices to a printed circuit board.

[0003] The document US 2022 / 0148934 A1 relates to a linear spacer for spacing a carrier of a package.

[0004] The document US 2019 / 0189797 A1 relates to a thin-profile power semiconductor package having oppositely mounted dies and no internal bond wires.

[0005] The document US 2018 / 0166366 A1 relates to semiconductor devices with exposed opposing die pads.

[0006] The document US 2014 / 0061883 A1 relates to lead frames, air cavity packages and electronic devices with offset vent holes and related manufacturing methods. Brief description

[0007] One aspect of the present disclosure relates to an electronic device. The electronic device comprises a solderable surface and at least one surface opening disposed in the solderable surface. The electronic device further comprises an encapsulant material encapsulating at least one electronic component of the electronic device and at least one vent disposed in a region of the surface opening and extending through the encapsulant material. The at least one vent is configured to provide an outgassing path when the electronic device is soldered to a circuit board.

[0008] One aspect of the present disclosure relates to a method for soldering an electronic device to a circuit board. The method comprises disposing solder material on a circuit board. The method further comprises disposing an electronic device according to the preceding aspect above the circuit board, wherein the at least one vent opening is disposed above the solder material. The method further comprises performing a soldering operation, wherein the at least one vent opening provides an outgassing path for gases generated by the solder material during the soldering operation.

[0009] One aspect of the present disclosure relates to a method for manufacturing an electronic device. The method comprises providing an opening in a solderable surface of the electronic device. The method further comprises encapsulating at least one electronic component of the electronic device in an encapsulation material. The method further comprises forming at least one vent opening in a region of the surface opening, wherein the at least one vent opening extends through the encapsulation material. The at least one vent opening is configured to provide an outgassing path when the electronic device is soldered to a circuit board. Short description of the drawings

[0010] The accompanying drawings are included to provide a further understanding of aspects. The drawings illustrate aspects and, together with the description, serve to explain the principles of the aspects. Other aspects and many of the intended advantages of aspects will be more readily appreciated as they become better understood by reference to the following detailed description. The elements in the drawings are not necessarily to scale with respect to one another. Like reference characters may designate corresponding similar parts. Fig. 1 schematically illustrates a cross-sectional side view of an electronic device 100 according to the disclosure. Fig. 2 contains the Fig. 2A and Fig. 2B, which illustrate a top perspective view and a bottom perspective view, respectively, of an electronic device 200 according to the disclosure. Fig. 3 contains the Fig. 3A and Fig. 3B, which illustrate a top perspective view and a bottom perspective view, respectively, of an electronic device 300 according to the disclosure. Fig. 4 illustrates a flowchart of a method for soldering an electronic device to a circuit board according to the disclosure. Fig. 5 contains the Fig. 5A and Fig. 5B, which illustrate cross-sectional side views of exemplary acts of methods for soldering electronic devices 500A and 500B to a circuit board according to the disclosure. Fig. 6 illustrates a flowchart of a method of manufacturing an electronic device according to the disclosure. Fig. 7 contains the Fig. 7A to 7C, which illustrate simulation results for void concentrations in different scenarios. Detailed description

[0011] In the following detailed description, reference is made to the accompanying drawings, in which, for the purpose of illustration, certain aspects in which the disclosure may be practiced are shown. In this context, directional terminology such as "top," "bottom," "front," "back," etc., may be used with reference to the orientation of the described figures. Since the components of the described devices can be positioned in a number of different orientations, the directional terminology is for the purpose of illustration and is not limiting. Other aspects may be utilized and structural or logical changes may be made without departing from the concept of the present disclosure. Therefore, the following detailed description should not be taken in a limiting sense.

[0012] Fig. 1 illustrates an electronic device 100 according to the disclosure. The electronic device 100 is described in a general manner to qualitatively describe aspects of the disclosure. It should be understood that the electronic device 100 may include other aspects. For example, the electronic device 100 may be expanded to include any of the aspects described in connection with other more detailed examples according to the disclosure.

[0013] The electronic device 100 may have a solderable surface 2 and at least one surface opening 4 arranged in the solderable surface 2. For illustrative purposes, a central axis of the surface opening 4 is indicated by a vertical dot-dashed line. Furthermore, the electronic device 100 may include an encapsulation material 6 that encapsulates at least one electronic component 8 of the electronic device 100. At least one vent opening 10 may be arranged in a region of the surface opening 4 and may extend through the encapsulation material 6.

[0014] The electronic device 200 of the Fig. 2A and Fig. 2B can be seen as a more detailed version of the electronic device 100 of the Fig. 1. In the example of the Fig. 2, the solderable surface 2 may be part of a chip carrier 12. The chip carrier 12 may not be limited to a specific carrier type. In the example of Fig. 2, the chip carrier 12 may correspond to or include a leadframe having one or more die pads 14 and one or more leads (or pins) 16. In further examples, the chip carrier 12 may correspond to or include at least one of a laminate, a molded interconnect substrate, a ceramic substrate, a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Bonding or Active Metal Brazing) substrate, etc. In the non-limiting example of Fig. 2, the leadframe may include an exemplary number of four diepads 14 and numerous connection leads 16 arranged at opposite side surfaces of the encapsulation material 6. The leadframe may, for example, be made of metals and / or metal alloys, in particular at least one of copper, copper alloys, nickel, iron-nickel, etc. In further examples (not illustrated), the chip carrier 12 may correspond to or include a laminate and / or a substrate. The laminate and / or substrate may, for example, be made of an electrically insulating material, such as a ceramic material, wherein solderable material may be applied to the periphery of the electrically insulating material.

[0015] The solderable surface 2 can be arranged at a periphery of the electronic device 200. In the example of Fig. 2, the solderable surface 2 may form or correspond to the underside of the electronic device 200. In this context, the solderable surface 2 may be designed for soldering the electronic device 200 to a printed circuit board (not illustrated). In the example of Fig. 2, the electronic device 200 may correspond to a surface-mounted device.

[0016] Electronic components of the electronic device 200 can be arranged above a surface of the chip carrier 12 opposite the solderable surface 2. In particular, the electronic components can be mounted on one or more of the die pads 14. The electronic components can be covered by the encapsulation material 6 and can thus be visible to a viewer of the Fig. 2. It should be noted that the electronic components do not have to be limited to a specific component type. For example, the electronic components may include one or more semiconductor chips (or semiconductor dies), so the electronic device 200 may also be referred to as a semiconductor device.

[0017] The semiconductor chips of the electronic device 200 may be made of an elemental semiconductor material (e.g., Si) and / or a wide bandgap semiconductor material or a compound semiconductor material (e.g., SiC, GaN, SiGe, GaAs). In particular, one or more of the semiconductor chips may correspond to power semiconductor components and may therefore be referred to as power semiconductor chips. In this context, the term "power semiconductor chip" may refer to a semiconductor chip that has at least one of the two properties of high-voltage blocking or high current-carrying capacity. A power semiconductor chip may be designed for high currents with a maximum current value of a few amperes, such as 10 A, or a maximum current value of up to or exceeding 100 A. Similarly, the voltages associated with such current values ​​may have values ​​from a few volts to a few tens or hundreds of volts.

[0018] The encapsulation material 6 can form a housing of the electronic device 200, so that the electronic device 200 can also be referred to as an electronic package or semiconductor package. In particular, the electronic device 200 can be referred to as a carrier-based power package or carrier-based power module. In the illustrated case, the solderable surface 2 and a surface of the encapsulation material 6 can be arranged in a common plane, for example. In the non-limiting example of Fig. 2, the electronic device 200 may in particular correspond to a DPAK package or XDPAK package.

[0019] The encapsulation material 6 may contain at least one of an epoxy, a filled epoxy, a glass fiber filled epoxy, an imide, a thermoplastic, a thermosetting polymer, a polymer blend, a laminate, etc. Various techniques may be used to encapsulate the components of the assembly with the encapsulation material 6, for example at least one of compression molding, injection molding, powder molding, liquid molding, map molding, lamination, etc. During or at the end of a molding process, ejector pins may be applied, which may result in small depressions 34 on top of the encapsulation material 6.The connecting conductors 16 may protrude at least partially from the encapsulation material 6 so that encapsulated electronic components of the electronic device 200 may be electrically accessible from outside the encapsulation material 6.

[0020] The one or more surface openings 4 may divide the chip carrier 12 into a plurality of mounting surfaces on which the electronic components of the electronic device 200 may be arranged. In the example of Fig. 2, the surface openings 4 may divide the lead frame into a plurality of diepads 14. In the illustrated case, the surface openings 4 may be cross-shaped and divide the lead frame into four diepads 14. The surface openings 4 may have at least one elongated surface slot. In the specific example of Fig. 2, the electronic device 200 may include two elongated surface slots extending substantially in the x-direction and one comparatively longer elongated surface slot extending substantially in the y-direction.

[0021] The vent openings 10 of the electronic device 200 may include one or more substantially circular vent holes. A diameter of the vent holes may be less than about 50.0 mm, or less than about 40.0 mm, or less than about 30.0 mm, or less than about 20.0 mm, or less than about 10.0 mm, or even less than about 5.0 mm. In the example of Fig. 2, the electronic device 200 may have an exemplary number of eight vent openings 10. Two vent holes 10 may be arranged in regions of each of the two elongated surface slots 4 that extend in the x-direction. Furthermore, four vent holes 10 may be arranged in a region of the comparatively longer elongated surface slot 4 that extends in the y-direction.

[0022] Fig. 2 shows exemplary distances between the vent holes 10. A distance between directly adjacent vent holes 10 can, for example, be in a range from approximately 5.0 mm to approximately 10.0 mm, e.g., approximately 7.5 mm. Furthermore, a distance between the outermost vent holes 10 in the y-direction can be in a range from approximately 20.0 mm to approximately 25.0 mm, e.g., 22.5 mm. In this context, it should be noted that the specified dimensions are in no way restrictive. Furthermore, it is understood that the values ​​specified above regarding the number of vent holes 10, the positions of the vent holes 10, and the distances between the vent holes 10 can differ in further examples.

[0023] The vent holes 10 may extend completely through the encapsulation material 6 from the solderable surface 2 to the top surface of the electronic device 200. In particular, the vent holes 10 may extend exclusively through the encapsulation material 6, so that internal components of the electronic device 200 do not cross the vent holes 10 and thus cannot be exposed from the encapsulation material 6. For example, the vent holes 10 should be avoided from intersecting bond wires that electrically couple electronic components arranged on different die pads 14, such as semiconductor chips. In this context, the size and location of the vent holes 10 may be limited by the geometry of the chip carrier 12 and the location of the electronic components arranged thereon.

[0024] The vent holes 10 may be configured to provide a continuous gas connection extending through the electronic device 200 from the solderable surface 2 to a peripheral surface of the electronic device 200. That is, the vent holes 10 may be filled with nothing but ambient air. Due to such a continuous gas channel extending through the electronic device 200, the vent holes 10 may be configured to provide one or more outgassing paths 30 when the electronic device 200 is soldered to a printed circuit board. Fig. 2A, exemplary outgassing paths 30 are indicated by arrows extending substantially in the z-direction. Note that methods for soldering an electronic device to a circuit board according to the disclosure are described below.

[0025] The electronic device 300 of the Fig. 3A and Fig. 3B may illustrate some or all of the features of the electronic device 200 of the Fig. 2A and Fig. 2B. In contrast to the Fig. 2, the ventilation openings 10 in the Fig. 3 may have a different shape. Here, the vent openings 10 may form elongated vent slots that may extend substantially parallel to the elongated surface slots 4. In comparison to the circular vent openings 10 of the Fig. 2, the elongated ventilation slots 10 of the Fig. 3 have a larger volume and can therefore provide improved outgassing performance. The vent slots 10 of the Fig. 3 can be connected to the ventilation holes 10 of the Fig. 2 at least in terms of their arrangement. Here too, it should be noted that the number and location of the Fig. 3 are exemplary and may vary in other examples of electronic devices according to the disclosure.

[0026] Fig. Figure 4 illustrates a flowchart of a method for soldering an electronic device to a circuit board according to the disclosure. The electronic device may, for example, be similar to any of the electronic devices 100 to 300 described in connection with the Fig. 1 to 3. The procedure of Fig. Figure 4 is described in a general manner to qualitatively describe aspects of the disclosure. The method may be expanded by any of the aspects described in connection with other examples.

[0027] At 18, a solder material may be disposed on a circuit board. In a more specific case, the solder material may be divided by at least one channel. At 20, an electronic device according to the disclosure may be disposed over the circuit board. Here, at least one vent may be disposed over the solder material. In the more specific case, the at least one vent may be disposed over the at least one channel that divides the solder material. At 22, a soldering operation may be performed. In one example, the solder material may include a solder paste, and the soldering operation may include a reflow soldering operation. During the soldering operation, the at least one vent may provide an outgassing path for gases generated by the solder material.

[0028] The Fig. 5A and Fig. 5B illustrate exemplary actions that may be performed in a method for soldering electronic devices 500A and 500B to a circuit board according to the disclosure. For example, the actions of Fig. 5A and Fig. 5B in the proceedings of Fig. 4. The electronic devices 500A and 500B of the Fig. 5A and Fig. 5B may include some or all of the features of previously described electronic devices according to the disclosure. For example, each of the electronic devices 500A and 500B may at least partially resemble the electronic device 200 of the Fig. 2 be similar.

[0029] In an action that the Fig. 5A, a solder material 24 may have been arranged over one or more contact pads 32 of a printed circuit board 26. For example, the solder material 24 may have been applied to the printed circuit board 26 based on a stencil printing process, wherein a stencil thickness may, for example, be in a range from approximately 100 µm to approximately 150 µm, for example 130 µm. The solder material 24 may in particular contain or correspond to a solder paste, which may contain a mixture of powdered solder and a flux. Due to the stencil shape, the solder material 24 may be divided by one or more channels 28. In a further action, which the Fig. 5A, the electronic device 500A may have been attached to the solder material 24, wherein the vent opening 10 may have been arranged over the channel 28 such that the vent opening 10 and the channel 28 may at least partially overlap as viewed in the z-direction.

[0030] In the Fig. 5A, a footprint of the vent opening 10 may be arranged entirely within a footprint of the surface opening 4 when viewed in the z-direction. In further examples, the footprint of the vent opening 10 may be extended in the x-direction and / or the y-direction. Such an extension may result in an increased volume of the vent opening 10 and may thus provide improved outgassing performance. In this context, however, it should be ensured that an enlargement of the vent opening 10 in the x- and / or y-direction does not necessarily extend too far beyond the diepad 14, which may result in a loss of valuable diepad area to an unacceptable extent. As can be seen from the Fig. As can be further seen in Figure 5A, the encapsulation material 6 can be arranged at least partially within the surface opening 4 of the die pad 14. In particular, the encapsulation material 6 can be arranged at least partially between the solderable surface 2 and the vent opening 10.

[0031] In the Fig. 5A, a soldering process can be applied to the assembly, in particular a reflow soldering process. During this process, the solder paste 24 can melt into a molten state, creating permanent solder connections that electrically connect the die pads 14 to the contact pads 32 of the printed circuit board 26. During the (reflow) soldering process, gases can be generated by the solder material 24. The gases can escape into the environment via the channel 28 and the vent opening 10. Fig. 5A, exemplary outgassing paths 30 for the gases are indicated by arrows extending from the solder material 24 to the vent opening 10.

[0032] The exemplary action of the Fig. 5B can be the action of Fig. 5A at least partially similar, so that in connection with the Fig. 5A also apply to the example of Fig. 5B can apply. In contrast to Fig. 5A the solder material 24 must be in the Fig. 5B (or at least the illustrated portion thereof) does not necessarily include channels arranged below the vent opening 10. That is, the solder material 24 does not necessarily have to have a specific patterning, such as that provided by a selective stencil printing process. Rather, the solder material 24 may be applied evenly and may extend continuously below the vent opening 10. Similar to the Fig. 5A, gases generated during a soldering operation can escape into the environment via the vent opening 10.

[0033] Fig. 6 shows a flowchart of a method for manufacturing an electronic device according to the disclosure. The method is described in a general manner to qualitatively describe aspects of the disclosure. The method may be extended to include any of the aspects described in connection with other examples according to the disclosure. For example, the method may be used for manufacturing one of the devices described in connection with the Fig. 1 to 3 described electronic devices 100 to 300 may be used.

[0034] At 38, an opening may be provided in a solderable surface of the electronic device. At 40, at least one electronic component of the electronic device may be encapsulated in an encapsulant material. At 42, at least one vent opening may be formed in a region of the surface opening, wherein the at least one vent opening extends through the encapsulant material.

[0035] Fig. 7 contains the Fig. 7A to 7C, which illustrate simulation results for void concentrations in different scenarios. Fig. 7A to 7C show bottom views of electronic devices 700A to 700C soldered to a circuit board (not illustrated). During a soldering process, multiple solder cavities 36 may have formed in the solder material 24. In this context, a total void ratio may be specified as a ratio of the volume of all voids in the solder material 24 to the total volume of the solder material 24. Furthermore, a maximum single void ratio may be specified as a ratio of the volume of the largest void in the solder material 24 to the total volume of the solder material 24.

[0036] The electronic device 700A of the Fig. 7A does not include surface openings and vents as described in connection with electronic devices according to the disclosure. This means that substantially the entire bottom side of the chip carrier of the electronic device 700A may be closed. As can be seen from the Fig. 7A, a large solder cavity 36 having a maximum volume among the plurality of solder cavities 36 may be formed above the center of the bottom surface of the electronic device 700A. Such a large solder cavity 36 may be caused, in particular, by an occurring warpage of the electronic device 700A. In the scenario of Fig. 7A, simulations performed can provide void concentration values ​​of about 0.12 (or about 12%) for the maximum single void ratio and about 0.42 (or about 42%) for the total void ratio.

[0037] The electronic device 700B of the Fig. 7B can, for example, the electronic device 200 of the Fig. 2. That is, the electronic device 700B may have surface openings 4 and substantially circular vent holes 10. As can be seen from the Fig. As can be seen in Figure 7B, the large central solder cavity of the Fig. 7A can be avoided. In the scenario of Fig. 7B, simulations performed can provide void concentration values ​​of about 0.042 (or about 4.2%) for the maximum single void ratio and about 0.17 (or about 17%) for the total void ratio. A comparison between these values ​​and the simulation results of the Fig. Figure 7A shows that the use of vent holes 10 can improve outgassing performance, thereby reducing both void concentration values. In this context, the integration of vent holes 10 can help reduce the warpage of the electronic device (or package), so that fewer package strains can occur. Due to the reduced warpage, the bond line thickness can become more uniform.

[0038] The electronic device 700C of the Fig. 7C can, for example, the electronic device 300 of the Fig. 3. That is, the electronic device 700C may have surface openings 4 and elongated vent slots 10. Similar to the Fig. 7B, a large central solder cavity can be avoided. In the scenario of Fig. 7C, simulations performed can provide exemplary void concentration values ​​of about 0.04 (or about 4.0%) for the maximum single void ratio and about 0.141 (or about 14.1%) for the total void ratio. A comparison of these values ​​with the results of the Fig. Figure 7B shows that vent slots can provide additional benefits over substantially circular vent holes. Examples

[0039] In the following, electronic devices, methods for soldering an electronic device to a circuit board, and methods for manufacturing an electronic device are explained using examples.

[0040] Example 1 is an electronic device comprising: a solderable surface; at least one surface opening disposed in the solderable surface; an encapsulant material encapsulating at least one electronic component of the electronic device; and at least one vent disposed in a region of the surface opening and extending through the encapsulant material.

[0041] Example 2 is an electronic device according to Example 1, wherein the solderable surface is part of a chip carrier and the at least one electronic component is arranged over a surface of the chip carrier opposite the solderable surface.

[0042] Example 3 is an electronic device according to Example 1 or 2, wherein the solderable surface is arranged at a periphery of the electronic device.

[0043] Example 4 is an electronic device according to any one of the preceding examples, wherein the solderable surface is configured for soldering the electronic device to a circuit board.

[0044] Example 5 is an electronic device according to any one of the preceding examples, wherein the vent opening provides a continuous gas connection through the electronic device from the solderable surface to a peripheral surface of the electronic device.

[0045] Example 6 is an electronic device according to any one of the preceding examples, wherein the at least one vent is configured to provide an outgassing path when the electronic device is soldered to a circuit board.

[0046] Example 7 is an electronic device according to any of the preceding examples, wherein the at least one surface opening comprises at least one elongated surface slot.

[0047] Example 8 is an electronic device according to any one of Examples 2 to 7, wherein the at least one surface opening divides the chip carrier into a plurality of mounting surfaces and the at least one electronic component is arranged on one or more of the plurality of mounting surfaces.

[0048] Example 9 is an electronic device according to any one of Examples 2 to 8, wherein the chip carrier comprises a lead frame and the at least one surface opening divides the lead frame into a plurality of die pads.

[0049] Example 10 is an electronic device according to Example 9, wherein the at least one surface opening is cross-shaped and divides the lead frame into four die pads.

[0050] Example 11 is an electronic device according to any of the preceding examples, wherein the at least one vent opening comprises at least one elongated vent slot.

[0051] Example 12 is an electronic device according to any of the preceding examples, wherein the at least one vent opening comprises at least one substantially circular vent hole.

[0052] Example 13 is an electronic device according to any one of the preceding examples, wherein in a plan view of the solderable surface, a base area of ​​the at least one vent opening is arranged entirely within a base area of ​​the at least one surface opening.

[0053] Example 14 is an electronic device according to any of the preceding examples, wherein the encapsulation material is at least partially disposed within the at least one surface opening.

[0054] Example 15 is an electronic device according to any one of the preceding examples, wherein the encapsulation material is at least partially disposed between the solderable surface and the at least one vent opening.

[0055] Example 16 is an electronic device according to any one of the preceding examples, wherein the at least one vent opening extends exclusively through the encapsulation material.

[0056] Example 17 is an electronic device according to any one of the preceding examples, wherein the solderable surface and a surface of the encapsulation material are arranged in a common plane.

[0057] Example 18 is an electronic device according to any of the preceding examples, wherein the electronic device is a surface mount device.

[0058] Example 19 is a method of soldering an electronic device to a circuit board, the method comprising: disposing solder material on a circuit board; disposing an electronic device according to any one of the preceding examples over the circuit board, wherein the at least one vent is disposed over the solder material; and performing a soldering operation, wherein the at least one vent provides an outgassing path for gases generated by the solder material during the soldering operation.

[0059] Example 20 is a method according to Example 19, wherein: the solder material is divided by at least one channel, and the at least one vent opening is arranged above the at least one channel.

[0060] Example 21 is a method according to Example 19 or 20, wherein the solder material comprises a solder paste and the soldering operation comprises a reflow soldering operation.

[0061] Example 22 is a method of manufacturing an electronic device, the method comprising: providing an opening in a solderable surface of the electronic device; encapsulating at least one electronic component of the electronic device in an encapsulant material; and forming at least one vent opening in a region of the surface opening, wherein the at least one vent opening extends through the encapsulant material.

[0062] As used in this description, the terms "connected," "coupled," "electrically connected," and / or "electrically coupled" do not necessarily imply that elements must be directly connected or coupled to each other. Intermediate elements may be provided between the "connected," "coupled," "electrically connected," or "electrically coupled" elements.

[0063] Furthermore, the word "over", used in relation to, for example, a material layer formed or arranged "over" a surface of an object, may be used herein to mean that the material layer may be arranged "directly on", for example, in direct contact with the implied surface (e.g., formed, deposited, etc.). The word "over", used in relation to, for example, a material layer formed or arranged "over" a surface, may also be used herein to mean that the material layer may be arranged "indirectly" on the implied surface (e.g., formed, deposited, etc.), with, for example, one or more additional layers arranged between the implied surface and the material layer.

[0064] To the extent that the terms "have," "include," "comprise," "with," or variations thereof are used in either the detailed description or the claims, these terms are intended to be inclusive in a manner similar to the term "comprise." That is, as used herein, the terms "have," "include," "comprise," "with," "comprise," and the like are open-ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles "a," "an," and "the" are intended to include both the plural and singular, unless the context dictates otherwise.

[0065] Furthermore, the word "exemplary" is used herein to serve as an example, instance, or illustration. Any aspect or design described herein as "exemplary" is not necessarily to be construed as being advantageous over other aspects or designs. Rather, the use of the word exemplary is intended to concretely illustrate concepts. As used in this application, the term "or" is intended to mean an inclusive "or" and not an exclusive "or." That is, unless otherwise stated or clear from context, "X uses A or B" is intended to mean one of the naturally inclusive permutations. That is, if X uses A; X uses B; or X uses both A and B, then "X uses A or B" is satisfied under one of the foregoing circumstances.Furthermore, as used in this application and the appended claims, the articles "a" and "an" can generally be interpreted to mean "one or more" unless otherwise indicated or clear from the context to be directed to a single form. Furthermore, at least one of A and B, or the like, generally means A or B, or both A and B.

[0066] Devices and methods of manufacturing devices are described herein. Comments made in connection with a described device may also apply to a corresponding method, and vice versa. For example, if a particular component of a device is described, a corresponding method of manufacturing the device may include an act of providing the component in a suitable manner, even if that act is not explicitly described or illustrated in the figures.

Claims

[1] Electronic device comprising: a solderable surface (2); at least one surface opening (4) arranged in the solderable surface (2); an encapsulation material (6) that encapsulates at least one electronic component (8) of the electronic device; and at least one vent opening (10) arranged in a region of the surface opening (4) and extending through the encapsulation material (6), wherein the at least one vent opening (10) is designed to provide an outgassing path (30) when the electronic device is soldered to a circuit board (26). [2] Electronic device according to claim 1, wherein the solderable surface (2) is part of a chip carrier (12) and the at least one electronic component (8) is arranged above a surface of the chip carrier (12) opposite the solderable surface (2). [3] An electronic device according to claim 1 or 2, wherein the solderable surface (2) is arranged at a periphery of the electronic device. [4] Electronic device according to one of the preceding claims, wherein the solderable surface (2) is designed for soldering the electronic device to a circuit board (26). [5] An electronic device according to any preceding claim, wherein the vent opening (10) provides a continuous gas connection through the electronic device from the solderable surface (2) to a peripheral surface of the electronic device. [6] Electronic device according to one of the preceding claims, wherein the at least one surface opening (4) comprises at least one elongated surface slot. [7] Electronic device according to one of claims 2 to 6, wherein the at least one surface opening (4) divides the chip carrier (12) into a plurality of mounting surfaces and the at least one electronic component (8) is arranged on one or more of the plurality of mounting surfaces. [8] Electronic device according to one of claims 2 to 7, wherein the chip carrier (12) comprises a lead frame and the at least one surface opening (4) divides the lead frame into a plurality of die pads (14). [9] Electronic device according to claim 8, wherein the at least one surface opening (4) is cross-shaped and divides the lead frame into four die pads (14). [10] Electronic device according to one of the preceding claims, wherein the at least one vent opening (10) comprises at least one elongated vent slot. [11] Electronic device according to one of the preceding claims, wherein the at least one vent opening (10) comprises at least one substantially circular vent hole. [12] Electronic device according to one of the preceding claims, wherein in a plan view of the solderable surface (2) a base area of ​​the at least one vent opening (10) is arranged entirely within a base area of ​​the at least one surface opening (4). [13] Electronic device according to one of the preceding claims, wherein the encapsulation material (6) is at least partially arranged in the at least one surface opening (4). [14] Electronic device according to one of the preceding claims, wherein the encapsulation material (6) is arranged at least partially between the solderable surface (2) and the at least one vent opening (10). [15] Electronic device according to one of the preceding claims, wherein the at least one vent opening (10) extends exclusively through the encapsulation material (6). [16] Electronic device according to one of the preceding claims, wherein the solderable surface (2) and a surface of the encapsulation material (6) are arranged in a common plane. [17] An electronic device according to any preceding claim, wherein the electronic device is a surface mount device. [18] A method of soldering an electronic device to a printed circuit board, the method comprising: Arranging solder material (24) on a circuit board (26); Arranging an electronic device according to one of the preceding claims over the circuit board (26), wherein the at least one vent opening (10) is arranged over the solder material (24); and Carrying out a soldering operation, wherein the at least one vent opening (10) provides an outgassing path (30) for gases generated by the solder material (24) during the soldering operation. [19] The method of claim 18, wherein: the solder material (24) is divided by at least one channel (28), and the at least one vent opening (10) is arranged above the at least one channel (28). [20] The method of claim 18 or 19, wherein the solder material (24) comprises a solder paste and the soldering operation comprises a reflow soldering operation. [21] A method of manufacturing an electronic device, the method comprising: Providing an opening (4) in a solderable surface (2) of the electronic device; Encapsulating at least one electronic component (8) of the electronic device in an encapsulation material (6); and Forming at least one vent opening (10) in a region of the surface opening (4), wherein the at least one vent opening (10) extends through the encapsulation material (6), wherein the at least one vent opening (10) is designed to provide an outgassing path (30) when the electronic device is soldered to a circuit board (26).

Citation Information

Patent Citations

  • Leadframes, air-cavity packages, and electronic devices with offset vent holes, and methods of their manufacture

    US20140061883A1

  • Semiconductor devices including exposed opposing die pads

    US20180166366A1

  • Thin Profile Power Semiconductor Device Package Having Face-To-Face Mounted Dice And No Internal Bondwires

    US20190189797A1

  • Linear spacer for spacing a carrier of a package

    US20220148934A1