METHOD FOR MANUFACTURING AN OPTOELECTRONIC COMPONENT AND OPTOELECTRONIC COMPONENT

DE102023116146A1Inactive Publication Date: 2024-12-24AMS OSRAM INT GMBH

Patent Information

Application Number
DE102023116146
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-06-20
Publication Date
2024-12-24
Estimated Expiration
Not applicable · inactive patent

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Abstract

A method for fabricating an optoelectronic device comprises steps for providing a substrate with an optoelectronic semiconductor chip arranged on a top side of the substrate, wherein the optoelectronic semiconductor chip has a front, a back and side flanks, the back of the optoelectronic semiconductor chip being oriented towards the top side of the substrate, for arranging a photostructurable first material on the top side of the substrate, wherein the optoelectronic semiconductor chip is embedded in the first material, and for photostructuring the first material such that a frame covering the side flanks of the optoelectronic semiconductor chip remains.
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Description

[0001] The present invention relates to a method for producing an optoelectronic component and to an optoelectronic component.

[0002] Various methods for producing optoelectronic components with optoelectronic semiconductor chips are known in the prior art.

[0003] One object of the present invention is to provide a method for producing an optoelectronic component. A further object of the present invention is to provide an optoelectronic component. These objects are achieved by a method for producing an optoelectronic component and by an optoelectronic component having the features of the independent claims. Various developments are specified in the dependent claims.

[0004] A method for producing an optoelectronic component comprises steps of providing a carrier with an optoelectronic semiconductor chip arranged on a top side of the carrier, wherein the optoelectronic semiconductor chip has a front side, a back side and side flanks, wherein the back side of the optoelectronic semiconductor chip is oriented towards the top side of the carrier, of arranging a photostructurable first material on the top side of the carrier, wherein the optoelectronic semiconductor chip is embedded in the first material, and of photostructuring the first material such that a frame covering the side flanks of the optoelectronic semiconductor chip remains.

[0005] In an optoelectronic component manufactured using this method, light emitted at the side edges of the optoelectronic semiconductor chip can exit the optoelectronic component through the frame and thus be utilized. The frame can direct the light to a front side of the optoelectronic component. This advantageously increases the efficiency of the optoelectronic component.

[0006] In one embodiment of the method, the first material is a silicone-organic glass. Advantageously, the first material is photo-structureable and exhibits favorable mechanical properties and high durability.

[0007] In one embodiment of the method, all edges of the optoelectronic semiconductor chip are shorter than 100 µm. The optoelectronic semiconductor chip can be designed, for example, as a micro-LED chip. Advantageously, the method enables the formation of the frame covering the side flanks of the optoelectronic semiconductor chip even with an optoelectronic semiconductor chip with such small external dimensions.

[0008] In one embodiment of the method, photostructuring the first material comprises exposing a portion of the upper side of the carrier adjacent to the frame. This also exposes the frame and can thus, for example, be separated from adjacent frames. This also makes it possible to subsequently embed the frame formed by photostructuring the first material in an embedding material.

[0009] In one embodiment of the method, this comprises further steps of embedding the optoelectronic semiconductor chip and the frame in an embedding material and of removing a part of the embedding material arranged above the front side of the optoelectronic semiconductor chip.

[0010] In an optoelectronic component manufactured using this method, the frame formed from the first material is arranged between the side flanks of the optoelectronic semiconductor chip and the embedding material. This allows light emitted at the side flanks of the optoelectronic semiconductor chip to exit the optoelectronic component through the frame and thus be utilized. An optical interface is formed in the contact region between the frame and the embedding material, which can assist in the discharge of light emitted at the side flanks of the optoelectronic semiconductor chip from the optoelectronic component. This advantageously increases the efficiency of the optoelectronic component.

[0011] In one embodiment of the method, the embedding material is a silicone-organic glass. In this case, the embedding material can also be photopatternable.

[0012] In one embodiment of the method, the embedding material has a higher refractive index than the first material. This advantageously supports the extraction of light emitted at the side edges of the optoelectronic semiconductor chip through the frame from the optoelectronic component.

[0013] In one embodiment of the method, the embedding material comprises filler particles. The filler particles can, for example, be reflective filler particles, which allows particularly effective removal of light emitted at the side edges of the optoelectronic semiconductor chip from the optoelectronic component. However, the filler particles can also be, for example, absorbing filler particles, which advantageously allows the optoelectronic component obtainable by the method to have a particularly high contrast.

[0014] In one embodiment of the method, the photostructuring of the first material is carried out in such a way that the front side of the optoelectronic semiconductor chip remains covered by the first material. Advantageously, this makes photostructuring of the first material particularly easy to perform.

[0015] In one embodiment of the method, the portion of the embedding material arranged above the front side of the optoelectronic semiconductor chip is removed by photostructuring. This advantageously enables particularly flexible structuring of the embedding material.

[0016] In one embodiment of the method, the first material is a positive resist and the embedding material is a negative resist, or the first material is a negative resist and the embedding material is a positive resist. Advantageously, the use of two such complementary materials enables dual photostructuring in two consecutive steps.

[0017] In one embodiment of the method, a portion of the first material is also removed together with the portion of the embedding material arranged above the front side of the optoelectronic semiconductor chip. Advantageously, the removal of the portion of the embedding material arranged above the front side of the optoelectronic semiconductor chip can be carried out particularly easily in this variant. The joint removal of a portion of the embedding material and a portion of the first material enables, for example, planarization of a top side of the optoelectronic component obtainable by the method.

[0018] In one embodiment of the method, the portion of the embedding material arranged above the front side of the optoelectronic semiconductor chip is removed by plasma etching. This advantageously allows the method to be carried out particularly simply and cost-effectively.

[0019] In one embodiment of the method, a portion of the first material arranged above the front side of the optoelectronic semiconductor chip is removed together with the portion of the embedding material arranged above the front side of the optoelectronic semiconductor chip to expose the front side of the optoelectronic semiconductor chip. This advantageously makes the front side of the optoelectronic semiconductor chip accessible for further process steps.

[0020] In one embodiment of the method, an electrical contact area of ​​the optoelectronic semiconductor chip is formed on the front side of the optoelectronic semiconductor chip. A second electrical contact area of ​​the optoelectronic semiconductor chip can, in this case, be arranged, for example, on the back side of the optoelectronic semiconductor chip.

[0021] In one embodiment of the method, it comprises a further step of arranging an electrically conductive material on the front side of the optoelectronic semiconductor chip. This advantageously enables electrical contact to be made with an electrical contact surface formed on the front side of the optoelectronic semiconductor chip.

[0022] In one embodiment of the method, the removal of the part of the embedding material arranged above the front side of the optoelectronic semiconductor chip is carried out such that the front side of the optoelectronic semiconductor chip remains covered by the first material. The first material arranged on the front side of the optoelectronic semiconductor chip can advantageously support the coupling out of light generated by the optoelectronic semiconductor chip at the front side of the optoelectronic semiconductor chip.

[0023] An optoelectronic component comprises a carrier and an optoelectronic semiconductor chip arranged on a top side of the carrier. The optoelectronic semiconductor chip has a front side, a back side, and side flanks. The back side of the optoelectronic semiconductor chip is oriented toward the top side of the carrier. The side flanks are covered by a frame comprising a first material.

[0024] Advantageously, the frame of this optoelectronic component allows the light emitted at the side edges of the optoelectronic semiconductor chip to be coupled out through the frame to the outside of the optoelectronic component. This allows the light emitted at the side edges of the optoelectronic semiconductor chip to be utilized, which advantageously allows the optoelectronic component to exhibit high efficiency.

[0025] In one embodiment of the optoelectronic component, the frame is embedded in an embedding material. This creates an optical interface in the contact area between the frame and the embedding material, which can guide light entering the frame to the outside of the optoelectronic component by reflection.

[0026] In one embodiment of the optoelectronic component, no embedding material is arranged over the front side of the optoelectronic semiconductor chip. This advantageously prevents absorption of light generated by the optoelectronic semiconductor chip by the embedding material.

[0027] In one embodiment of the optoelectronic component, the front side of the optoelectronic semiconductor chip is not covered by the first material. This advantageously makes it possible to electrically contact the electrical contact area formed on the front side of the optoelectronic semiconductor chip.

[0028] In another embodiment of the optoelectronic component, the front side of the optoelectronic semiconductor chip is covered by the first material. This can advantageously support the coupling out of light at the front side of the optoelectronic semiconductor chip.

[0029] The above-described properties, features and advantages of this invention, as well as the manner in which they are achieved, will become clearer and more clearly understood in connection with the following description of the embodiments, which are explained in more detail in connection with the drawings. In each case, in a schematic representation Fig. 1 a sectional side view of optoelectronic semiconductor chips arranged on an upper side of a carrier, which are embedded in a photostructurable first material; Fig. 2 exposing sections of the photostructurable first material; Fig. 3 the first material photostructured after development in such a way that frames covering the side flanks of the optoelectronic semiconductor chips remain; Fig. 4 the optoelectronic semiconductor chips and the frames after embedding in an embedding material; Fig. 5 a processing stage achieved after removal of part of the embedding material; Fig. 6 an optoelectronic component obtained after arranging an electrically conductive material on the front sides of the optoelectronic semiconductor chips; Fig. 7 a sectional side view of semiconductor chips arranged on the top side of the carrier and embedded in the first material according to an alternative embodiment; Fig. 8 exposing sections of the first material; Fig. 9 frames remaining by photostructuring the first material, which cover the side flanks of the optoelectronic semiconductor chips; Fig. 10 the optoelectronic semiconductor chips and the frames after embedding in an embedding material; Fig. 11 shows a variant of the optoelectronic component obtained by removing part of the embedding material; Fig. 12 an exposure of sections of the embedding material in a further variant of the manufacturing process; Fig. 13 a variant of the optoelectronic component obtained by developing the exposed embedding material; Fig. 14 shows a further variant of the manufacturing method, in which a further semiconductor chip is additionally arranged on the upper side of the carrier, during the exposure of sections of the first material; Fig. 15 the frames remaining on the side flanks of the optoelectronic semiconductor chips due to the development of the first material; Fig. 16 the optoelectronic semiconductor chips, the further semiconductor chip and the frames arranged on the side flanks of the optoelectronic semiconductor chips after embedding in an embedding material; Fig. 17 a processing status obtained by removing a part of the embedding material; and Fig. 18 shows a variant of the optoelectronic component obtained after arranging an electrically conductive material on the front sides of the optoelectronic semiconductor chips.

[0030] Fig. 1 shows a schematic sectional side view of a carrier 100 with a substantially flat upper side 101. The carrier 100 can also be referred to as a substrate and can be, for example, a ceramic carrier, a printed circuit board, or another type of carrier. The carrier 100 can also be formed as a semiconductor chip or a semiconductor wafer and have integrated electronic circuits. The upper side 101 of the carrier 100 has one or more electrically conductive sections that form contact areas.

[0031] Several optoelectronic semiconductor chips 200 are arranged on the upper side 101 of the carrier 100. In the example of Fig. 1, three optoelectronic semiconductor chips 200 are shown. However, only one optoelectronic semiconductor chip 200 or any other number of optoelectronic semiconductor chips 200 may be provided. The optoelectronic semiconductor chips 200 may, for example, be arranged in a regular matrix arrangement.

[0032] Each optoelectronic semiconductor chip 200 has a front side 201, a rear side 202 opposite the front side 201, and side flanks 203 oriented perpendicular to the front side 201 and the rear side 202. In Fig. 1, the front side 201 and the back side 202 of each optoelectronic semiconductor chip 200 each have an electrical contact area 210 of the optoelectronic semiconductor chip 200.

[0033] The optoelectronic semiconductor chips 200 are designed to emit electromagnetic radiation, for example, visible light. The optoelectronic semiconductor chips 200 can be designed, for example, as light-emitting diode (LED) chips. In particular, the optoelectronic semiconductor chips 200 can be designed, for example, as micro-LED chips. In this case, the edge lengths of the front side 201 and the back side 202 can be, for example, shorter than 100 µm and, for example, in the range between 5 µm and 100 µm. A height of the optoelectronic semiconductor chips 200 measured perpendicular to the front side 201 and the back side 202 can, for example, be less than 10 µm and, for example, in the range between 2 µm and 4 µm.

[0034] The optoelectronic semiconductor chips 200 are arranged on the top side 101 of the carrier 100 such that the rear sides 202 of the optoelectronic semiconductor chips 200 are oriented toward the top side 101 of the carrier 100. The optoelectronic semiconductor chips 200 are each attached by means of an electrically conductive connecting material 150, which in each case establishes an electrically conductive connection between an electrically conductive portion of the top side 101 of the carrier 100 and the electrical contact area 210 of the optoelectronic semiconductor chip 200 formed on the rear side 202. The connecting material 150 can be, for example, a solder or an electrically conductive adhesive.

[0035] After the optoelectronic semiconductor chips 200 have been attached, a first material 300 has been arranged on the top side 101 of the carrier 100, so that the optoelectronic semiconductor chips 200 have been embedded in the first material 300. The first material 300 can be applied, for example, by spin-coating. The applied layer of the first material 300 is so thick that the front sides 201 of the optoelectronic semiconductor chips 200 are also covered by the first material 300. The thickness of the layer of the first material 300 does not have to be the same over all sections of the top side 101 of the carrier 100. For example, the top side of the layer of the first material 300 is in Fig. 1 schematically illustrated example above the optoelectronic semiconductor chips 200 is higher than in areas between the optoelectronic semiconductor chips 200.

[0036] The first material 300 is a photostructurable material. The first material 300 can be, for example, a silicon organic glass (SOG) or a spin-on glass. It is expedient if the first material 300 has a high transparency for electromagnetic radiation that can be generated by the optoelectronic semiconductor chips 200. The photostructurable first material 300 can be designed as a positive resist or as a negative resist.

[0037] Fig. 2 shows a schematic sectional side view of one of the representations of the Fig. 1 temporally subsequent processing step. A shadow mask 170 has been arranged over the first material 300. The shadow mask 170 has transparent sections 175, which in the example shown are each arranged above the optoelectronic semiconductor chips 200 embedded in the first material 300.

[0038] By means of light 180 and the shadow mask 170, regions 310 of the first material 300 are exposed. In this example, the exposed regions 310 comprise the sections of the first material 300 arranged above the front sides 201 of the optoelectronic semiconductor chips 200 as well as sections of the first material 300 adjacent to the side flanks 203 of the optoelectronic semiconductor chips 200. Sections of the first material 300 further away from the side flanks 203 of the optoelectronic semiconductor chips 200, between the optoelectronic semiconductor chips 200, remain unexposed. The first material 300 is designed as a negative resist in the example shown. If the first material 300 were a positive resist, a Fig. 2 complementary exposure of the first material 300.

[0039] Fig. 3 shows a schematic sectional side view of one of the representations of the Fig. 2 subsequent processing stage. Through a development process, the first material 300 has been removed except for the exposed areas 310.

[0040] The Fig. The exposure and subsequent development illustrated in Figure 2 can be collectively referred to as photostructuring of the first material 300. The photostructuring is carried out in such a way that the remaining exposed regions 310 of the first material 300 form a frame 320 for each optoelectronic semiconductor chip 200, which frame covers the side flanks 203 of the respective optoelectronic semiconductor chip 200. In Fig. In the example shown in Figure 3, the remaining exposed regions 310 of the first material 300 also comprise, for each optoelectronic semiconductor chip 200, a front-side part 330 that covers the front side 201 of the respective optoelectronic semiconductor chip 200. The front-side part 330 and the frame 320 are connected to one another for each optoelectronic semiconductor chip 200. Between the optoelectronic semiconductor chips 200, the first material 300 has been completely removed by development such that sections 110 of the top side 101 of the carrier 100 located between the optoelectronic semiconductor chips 200 have been exposed. The frames 320 of the first material 300 assigned to the individual optoelectronic semiconductor chips 200 are thus physically separated from one another.

[0041] In an alternative variant of the method, the first material 300 can be exposed such that the exposed region 310 of each optoelectronic semiconductor chip 200 comprises only the frame 320 and not the front-side part 330 of the first material 300. In this case, the parts of the first material 300 arranged above the front sides 201 of the optoelectronic semiconductor chips 200 are removed during development. However, this variant requires a more complex design of the shadow mask 170 and a more precise alignment of the shadow mask 170 to the optoelectronic semiconductor chips 200.

[0042] In Fig. In the example shown in Figure 3, the frames 320 covering the side flanks 203 of the optoelectronic semiconductor chips 200 are configured such that a wall thickness of the frames 320, measured perpendicular to the side flanks 203, increases for each optoelectronic semiconductor chip 200 in the direction from the rear side 202 to the front side 201. Such a design of the frame 320 enables particularly effective transmission of electromagnetic radiation emitted at the side flanks 203 of the optoelectronic semiconductor chips 200 in the direction away from the carrier 100. However, other geometries of the frames 320 are also possible, for example, a wall thickness that is constant over the entire height of the side flanks 203.

[0043] The 320 frames can also be called fillets.

[0044] Starting from Fig. 3, processing steps can still be carried out to electrically contact the electrical contact surfaces 210 formed on the front sides 201 of the optoelectronic semiconductor chips 200. If the front sides 201, as in the example of Fig. 3, are covered by the front-side part 330 of the first material 300, the front-side part 330 can be removed beforehand in order to expose the front sides 201 and the electrical contact surfaces 210 of the optoelectronic semiconductor chips 200 formed on the front sides 201.

[0045] In other variants of the procedure, the Fig. 3, the processing steps described below follow.

[0046] Fig. 4 shows a processing state after the optoelectronic semiconductor chips 200 and the frames 320, as well as the front-side parts 330 of the first material 300, have been embedded in an embedding material 400. For this purpose, the embedding material 400 has been applied to the top side 101 of the carrier 100 in sufficient thickness, for example, by spin-coating or by a casting process. The embedding material 400 covers the previously exposed sections 110 of the top side 101 of the carrier 100. The frames 320 are completely covered by the embedding material 400. The front-side parts 330 of the first material 300 arranged on the front sides 201 of the optoelectronic semiconductor chips 200 are also covered by a part 410 of the embedding material 400.

[0047] Fig. 5 shows a schematic sectional side view of one of the representations of the Fig. 4 chronologically subsequent processing stage. The parts 410 of the embedding material 400 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 have been removed. This can be done, for example, by a planarization process, for example, by plasma etching.

[0048] Together with the parts 410 of the embedding material 400 arranged over the front sides 201 of the optoelectronic semiconductor chips 200, the front-side parts 330 of the first material 300 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 have also been removed. The front-side parts 330 of the first material 300 have been removed so completely that the front sides 201 of the optoelectronic semiconductor chips 200 have been exposed. It is expedient if an upper side of the remaining parts of the embedding material 400 between the optoelectronic semiconductor chips 200 ends approximately flush with the front sides 201 of the optoelectronic semiconductor chips 200.

[0049] Fig. 6 shows a schematic sectional side view of one of the representations of the Fig. 5 chronologically subsequent processing stage. An electrically conductive material 500 has been arranged on the front sides 201 of the optoelectronic semiconductor chips 200 in order to electrically contact the electrical contact areas 210 of the optoelectronic semiconductor chips 200 formed on the front sides 201. The optoelectronic semiconductor chips 200 can each be individually contacted. The electrically conductive material 500 can also short-circuit the electrical contact areas 210 on the front sides 201 of all optoelectronic semiconductor chips 200 to one another. The electrically conductive material 500 can also extend onto the embedding material 400 and over the sections of the frames 320 formed by the first material 300 that are exposed around the front sides 201 of the optoelectronic semiconductor chips 200.

[0050] The electrically conductive material 500 may comprise, for example, ITO.

[0051] In Fig. At the processing stage shown in Figure 6, the production of the optoelectronic component 10 may be completed. However, further processing steps may also be performed.

[0052] Various variants of the method described above for manufacturing the optoelectronic component 10 are described below. These variants each have significant similarities with the method described above. The following description therefore focuses on the differences between the method variants. Furthermore, the above description of the method also applies to the subsequent variants.

[0053] Based on the Fig. 7 to 11, a method variant is described in which the optoelectronic semiconductor chips 200 are designed as flip chips. This means that both electrical contact surfaces 210 are arranged on the rear sides 202 of the optoelectronic semiconductor chips 200, and no contacting is required via the front sides 201 of the optoelectronic semiconductor chips 200. The electrical contact surfaces 210 are in the Fig. 7 are connected to electrically conductive sections on the upper side 101 of the carrier 100 by means of a connecting material 150. Otherwise, the processing station shown in Fig. 7 shown processing status to the Fig. 1.

[0054] Fig. Figure 8 shows a schematic sectional side view of one of the representations of the Fig. 7 subsequent processing step, which represents the representation of the Fig. 2. In this case, the areas 310 of the first material 300 are exposed by means of the shadow mask 170 and the light 180.

[0055] Fig. 9 shows a schematic sectional side view of one of the representations of the Fig. 8 temporally subsequent processing stage after developing and removing the unexposed parts of the first material 300. The Fig. The processing status shown in Figure 9 corresponds to that of Fig. 3.

[0056] In Fig. 9, the production of the optoelectronic component 10 can be completed. In particular, in this variant, the front sides 201 of the optoelectronic semiconductor chips 200 can remain covered by the front-side parts 330 of the first material 300, since no electrical contacting of the front sides 201 of the optoelectronic semiconductor chips 200 is necessary. The front-side parts 330 of the first material 300 covering the front sides 201 of the optoelectronic semiconductor chips 200 can support the coupling out of electromagnetic radiation from the optoelectronic semiconductor chips 200.

[0057] However, further processing steps can also be carried out with this process variant. Fig. 10 shows a schematic sectional side view of one of the representations of the Fig. 9 subsequent processing status, which corresponds to the Fig. 4. The optoelectronic semiconductor chips 200 and the frames 320 have been embedded in the embedding material 400.

[0058] Fig. 11 shows a schematic sectional side view of one of the representations of the Fig. 10 temporally subsequent processing stage. The parts of the embedding material 400 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 have been removed, for example to the Fig. 5. In this case, the front-side parts 330 of the first material 300 arranged above the front sides of the optoelectronic semiconductor chips 200 may also have been at least partially removed. In the Fig. In the example shown in Figure 11, however, the front-side parts 330 of the first material 300 have not been completely removed, so that the front sides 201 of the optoelectronic semiconductor chips 200 are still covered by at least parts of the front-side parts 330 of the first material 300. Alternatively, the removal of the front-side parts 330 of the first material 300 could also be complete.

[0059] In Fig. At the processing stage shown in Figure 11, the production of the optoelectronic component 10 may be completed. Optionally, however, further processing steps may also be performed.

[0060] Based on the Fig. 12 and Fig. 13, a further variant of the procedure is described below. This variant corresponds to the Fig. 10 shows the processing status of the last-described variant. However, in this variant, the subsequent removal of the parts 410 of the embedding material 400 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 is carried out by further photostructuring, in contrast to the last variant.

[0061] For this purpose, the embedding material 400 in this variant is designed as a resist system complementary to the first material 300. Thus, if the first material 300 is a negative resist, as in the examples shown, the embedding material 400 is a positive resist. If the first material 300 were a positive resist, the embedding material 400 would be a negative resist.

[0062] In Fig. In the processing step shown in Figure 12, a shadow mask 170 with transparent sections 175 is arranged over the embedding material 400, and the embedding material 400 is exposed to light 180. If the embedding material 400 is formed as a positive resist, as in the example shown, the transparent sections 175 of the shadow mask 170 are located over the front sides 201 of the optoelectronic semiconductor chips 200.

[0063] Fig. 13 shows a schematic sectional side view of one of the representations of the Fig. 12 temporally subsequent processing stage after developing the exposed embedding material 400. During development of the embedding material, the parts 410 of the embedding material 400 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 have been removed. The front-side parts 330 of the first material 300 covering the front sides 201 of the optoelectronic semiconductor chips 200 have not been removed.

[0064] In Fig. At the processing stage shown in Figure 13, the production of the optoelectronic component 10 may be complete. However, optional further processing steps may also follow.

[0065] Fig. 14 shows a schematic sectional side view of one of the representations of the Fig. 2 corresponding processing status during the execution of another variant of the manufacturing process. This variant differs from the one based on the Fig. 1 to 6 in that, in addition to the optoelectronic semiconductor chips 200, a further semiconductor chip 600 is arranged on the upper side 101 of the carrier 100 and electrically contacted. The further semiconductor chip 600 can be, for example, a protective diode or a sensor chip, such as a pressure sensor or a temperature sensor. Of course, several further semiconductor chips 600 can also be provided.

[0066] The further semiconductor chip 600 has been embedded together with the optoelectronic semiconductor chips 200 in the first material 300. The Fig. The shadow mask 170 used in the processing step shown in Figure 14 has no transparent section 175 above the further semiconductor chip 600, so that no exposure of the first material 300 takes place in the region of the further semiconductor chip 600.

[0067] Fig. 15 shows a schematic sectional side view of one of the representations of the Fig. 14 subsequent processing status, which corresponds to the Fig. 3. In the area of ​​the further semiconductor chip 600, the first material 300 has been completely removed, so that the further semiconductor chip 600 has been completely exposed.

[0068] Fig. 16 shows one of the representations of the Fig. 15 subsequent processing status, which corresponds to the Fig. 4. The further semiconductor chip 600 has been embedded in the embedding material 400 together with the optoelectronic semiconductor chips 200 and the frame 320. The further semiconductor chip 600 has been completely covered by the embedding material 400.

[0069] Fig. 17 shows a schematic sectional side view of one of the representations of the Fig. 16 subsequent processing status, which corresponds to the Fig. 5. The parts 410 of the embedding material 400 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 have been removed. In the process, the parts 330 of the first material 300 arranged over the front sides 201 of the optoelectronic semiconductor chips 200 were also removed, exposing the front sides 201 of the optoelectronic semiconductor chips 200.

[0070] In Fig. In the example shown in Figure 17, the further semiconductor chip 600 was not exposed, but remains covered by a portion of the embedding material 400. This may be expedient if the further semiconductor chip 600 is not intended to be visible from the outside. However, if the further semiconductor chip 600 is a sensor chip, it may also be expedient to remove the embedding material 400 in the region of the further semiconductor chip 600 to such an extent that at least a top side of the further semiconductor chip 600 is exposed.

[0071] Fig. 18 shows a schematic sectional side view of one of the representations of the Fig. 17 subsequent processing status, which corresponds to the Fig. 6. By arranging the electrically conductive material 500 on the front sides 201 of the optoelectronic semiconductor chips 200, the electrical contact surfaces 210 formed on the front sides 201 of the optoelectronic semiconductor chips 200 have been electrically contacted. This completes the production of the optoelectronic component 10. Optionally, however, further processing steps can also be performed.

[0072] Of course, further semiconductor chips 600 can also be used in the Fig. The process variants described in paragraphs 7 to 13 are provided for.

[0073] The invention has been illustrated and described in detail using the preferred embodiments. However, the invention is not limited to the disclosed examples. Other variations may be devised by those skilled in the art. LIST OF REFERENCE SYMBOLS 10 optoelectronic component 100 carriers 101 Top Section 110 150 connecting material 170 Shadow Mask 175 transparent section 180 light 200 optoelectronic semiconductor chips 201 Front 202 back 203 side flank 210 electrical contact surface 300 first material 310 exposed area 320 frames 330 front part 400 embedding material 410 covering part 500 electrically conductive material 600 additional semiconductor chips

Claims

[1] Method for producing an optoelectronic component (10) comprising the following steps: - providing a carrier (100) with an optoelectronic semiconductor chip (200) arranged on a top side (101) of the carrier (100), wherein the optoelectronic semiconductor chip (200) has a front side (201), a back side (202) and side flanks (203), wherein the back side (202) of the optoelectronic semiconductor chip (200) is oriented towards the top side (101) of the carrier (100); - arranging a photostructurable first material (300) on the upper side (101) of the carrier (100), wherein the optoelectronic semiconductor chip (200) is embedded in the first material (300); - photostructuring the first material (300) such that a frame (320) covering the side flanks (203) of the optoelectronic semiconductor chip (200) remains. [2] The method of claim 1, wherein the first material (300) is a silicon organic glass. [3] Method according to one of the preceding claims, wherein all edges of the optoelectronic semiconductor chip (200) are shorter than 100 µm. [4] Method according to one of the preceding claims, wherein photostructuring the first material (300) comprises exposing a portion (110) of the upper side (101) of the carrier (100) adjacent to the frame (320). [5] Method according to one of the preceding claims, wherein the method comprises the following further steps: - embedding the optoelectronic semiconductor chip (200) and the frame (320) in an embedding material (400); - removing a part (410) of the embedding material (400) arranged above the front side (201) of the optoelectronic semiconductor chip (200). [6] The method of claim 5, wherein the embedding material (400) is a silicone organic glass. [7] Method according to one of claims 5 and 6, wherein the embedding material (400) has a higher refractive index than the first material (300). [8] Method according to one of claims 5 to 7, wherein the photostructuring of the first material (300) is carried out in such a way that the front side (201) of the optoelectronic semiconductor chip (200) remains covered by the first material (300). [9] Method according to claim 8, wherein the removal of the part (410) of the embedding material (400) arranged over the front side (201) of the optoelectronic semiconductor chip (200) is carried out by photostructuring. [10] The method of claim 9, wherein the first material (300) is a positive resist and the embedding material (400) is a negative resist, or the first material (300) is a negative resist and the embedding material (400) is a positive resist. [11] Method according to claim 8, wherein a part (330) of the first material (300) is also removed together with the part (410) of the embedding material (400) arranged over the front side (201) of the optoelectronic semiconductor chip (200). [12] Method according to claim 11, wherein the removal of the part (410) of the embedding material (400) arranged over the front side (201) of the optoelectronic semiconductor chip (200) is carried out by plasma etching. [13] Method according to one of claims 11 and 12, wherein, together with the part (410) of the embedding material (400) arranged over the front side (201) of the optoelectronic semiconductor chip (200), a part (330) of the first material (300) arranged over the front side (201) of the optoelectronic semiconductor chip (200) is removed in order to expose the front side (201) of the optoelectronic semiconductor chip (200). [14] Method according to claim 13, wherein an electrical contact surface (210) of the optoelectronic semiconductor chip (200) is formed on the front side (201) of the optoelectronic semiconductor chip (200). [15] A method according to claim 14, wherein the method comprises the following further step: - Arranging an electrically conductive material (500) on the front side (201) of the optoelectronic semiconductor chip (200). [16] Method according to one of claims 8 to 12, wherein the removal of the part (410) of the embedding material (400) arranged over the front side (201) of the optoelectronic semiconductor chip (200) is carried out such that the front side (201) of the optoelectronic semiconductor chip (200) remains covered by the first material (300). [17] Optoelectronic component (10) with a carrier and an optoelectronic semiconductor chip (200) arranged on an upper side (101) of the carrier (100), wherein the optoelectronic semiconductor chip (200) has a front side (201), a back side (202) and side flanks (203), wherein the rear side (202) of the optoelectronic semiconductor chip (200) is oriented towards the top side (101) of the carrier (100), wherein the side flanks (203) are covered by a frame (320) comprising a first material (300). [18] Optoelectronic component (10) according to claim 17, wherein the frame (320) is embedded in an embedding material (400). [19] Optoelectronic component (10) according to one of claims 17 and 18, wherein the front side (201) of the optoelectronic semiconductor chip (200) is not covered by the first material (300). [20] Optoelectronic component (10) according to one of claims 17 and 18, wherein the front side (201) of the optoelectronic semiconductor chip (200) is covered by the first material (300).

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