Method for producing an AlN buffer layer for vertical GaN devices and a vertical GaN device

Abstract

Method (100) for producing an AlN buffer layer for vertical GaN devices, comprising the steps of: • Providing (110) an engineered substrate having a poly-AIN core, • Applying (120) a silicon layer to the engineered substrate using an SOI process, • producing (130) a first AIN layer on the silicon layer by means of a PVD process, and • Creating (150) an AlGaN / GaN layer stack using an MOCVD process.

Description

The invention relates to a method for manufacturing an AlN buffer layer for vertical GaN devices and a vertical GaN device.Prior ArtFor the production of vertical GaN components, for example, engineered substrates consisting of a polyaluminum nitride wafer are used as substrate core with further enveloping layers, the so-called engineered layers, and a thin silicon layer bonded thereon, which serves as starting layer for the epitaxial layers. The edge of the silicon layer and defects, so-called voids, in the silicon layer are crystallographically undefined and represent a weak point in thermal processes at high temperatures, since delamination of the AlGaN / GaN stack can occur at these points after a high-temperature process, in particular when p-doped regions are activated.The object of the invention is to overcome this drawback.Disclosure of the InventionThe method according to the invention for producing an AlN buffer layer for vertical GaN components comprises providing an engineered substrate having a poly-AlN core and applying a silicon layer to the engineered substrate by means of a SOl process. The method further includes creating the AIN buffer layer on the silicon layer using a PVD process and creating an AlGaN / GaN layer stack on the AlN buffer layer using a MOCVD process.The advantage here is that defects in the silicon layer are covered, so that the entire GaN component has improved temperature stability during the production process. Delamination of the AlGaN / GaN layer stack from the silicon layer is prevented during high process temperatures, for example when activating a p-doping such as magnesium.In one development, a further AlN layer is produced on the AlN buffer layer by means of MOCVD process.It is advantageous here that the crystal quality of the GaN layer is improved since a greater AlN layer thickness can be deposited, as a result of which the layer stress in the AlN is reduced.In a further configuration, the PVD process has a temperature greater than 600° C.The advantage here is that defects in the Si(111) layer can be better covered, in particular the end of the Si(111) layer at the wafer edge and Si(111) defects in the center of the wafer. This improves the separation between the silicon in the Si (111) layer and the gallium from the GaN layer, and the temperature stability increases.In one development, the PVD process has a pressure of greater than 3 mTorr.It is advantageous here that the layer stress is tensilly biased in order to compensate for the compressive stress of the GaN layer and thus to enable a greater thickness of the GaN layer with the same wafer curvature.The vertical GaN device according to the invention comprises an AlN buffer layer which has been produced by a method according to the invention.Further advantages result from the following description of exemplary embodiments or the dependent patent claims.Brief Description of the DrawingsThe present invention is explained below with reference to preferred embodiments and attached drawings. The following are shown: FIG. 1 shows the method according to the invention for producing an AIN buffer layer for vertical GaN components, FIG. 2 shows the intermediate product of the vertical GaN component with an AlN buffer layer after carrying out the method according to the invention, and FIG. 3 shows the intermediate product of the vertical GaN component with an AlN buffer layer and a further AlN layer after carrying out the method according to the invention.FIG. 1 shows the method 100 according to the invention for producing an AlN buffer layer for vertical GaN components. The method 100 starts with a step 110 in which an engineered substrate having a poly-AlN core is provided. In a following step 120, a silicon layer is applied to the engineered substrate by means of SOI processes. The silicon layer comprises, for example, 13 layers which overall have a layer thickness between 300 nm and 500 nm. In a following step 130, the AlN buffer layer is produced on the silicon layer with the aid of a PVD process. The abbreviation PVD stands for Physical Vapor Deposition. The use of the PVD process leads to isotropic growth of the AlN buffer layer and, if defects are present in the silicon layer, to very good defect coverage. The PVD process has a temperature greater than 600° C. and a pressure greater than 3 mTorr. In a following step 150, an AlGaN / GaN layer stack is produced on the AlN buffer layer with the aid of an MOCVD process. The abbreviation MOCVD stands for Metal-Organic Chemical Vapor Deposition. The MOCVD process results in crystalline growth of the individual layers.In an optional step 140 performed between steps 130 and 150, a further AlN layer is formed on the AlN buffer layer by means of a MOCVD process. Alternatively, steps 140 and 150 may be performed by a single MOCVD process.FIG. 2 shows the intermediate product 200 of the vertical component with an AlN buffer layer 204 after carrying out the method according to the invention. The intermediate product 200 comprises an engineered substrate having a poly-AlN core 201 surrounded by engineered layers 202. A thin silicon layer 203 is applied to one side of the engineered layers 202, which thin silicon layer acts as a starting layer for the overlying epitaxial layers. The silicon layer 203 is shown enlarged in order to show defect sites, so-called defects or arches. These are the regions on the side of the engineered layer 202 on which no silicon is disposed. An AlN buffer layer 204 is disposed on the silicon layer 203. It covers the silicon layer 203 together with defects. An AlGaN layer 205 is disposed on the AIN buffer layer 204. A GaN layer 206 is disposed on the AlGaN layer 205. The AlGaN layer 205 and the GaN layer 206 form the AlGaN / GaN layer stack.FIG. 3 shows the intermediate product 300 of the vertical component having an AlN buffer layer 204 and a further AlN layer 207 after carrying out the method according to the invention, in which the optional step 140 was carried out. Reference numerals of Fig. 3 identical to those of Fig. 2 designate the same features.The invention is applied, for example, in vertical GaN power transistors. These are used in electrical drive trains of electric or hybrid vehicles, for example in DC / DC converters and inverters, and in vehicle charging devices.

Claims

Method (100) for producing an AIN buffer layer for vertical GaN components, comprising the steps: • providing (110) an engineered substrate which has a poly-AIN core, • applying (120) a silicon layer to the engineered substrate by means of SOI process, • generating (130) the AIN buffer layer on the silicon layer by means of PVD process, and • generating (150) an AlGaN / GaN layer stack on the AIN buffer layer by means of MOCVD process.Method (100) according to Claim 1, characterized in that a further AlN layer is produced on the AlN buffer layer by means of a MOCVD process.Method (100) according to either of Claims 1 and 2, characterized in that the PVD process has a temperature of greater than 600°C.Method (100) according to one of the preceding claims, characterized in that the PVD process has a pressure of greater than 3 mTorr.A vertical GaN device having an AlN buffer layer fabricated by a method according to any one of claims 1 to 4.

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