Voltage generation circuit

Abstract

A voltage generating circuit comprises a voltage input terminal to which an input voltage is applied, a voltage output terminal from which an output voltage is output, a first resistor having a first terminal electrically connected to the voltage input terminal and a second terminal electrically connected to the voltage output terminal, a second resistor having a third terminal electrically connected to the second terminal and a fourth terminal, a first capacitor electrically connected to the first terminal or the second terminal, and a first circuit electrically connected to the first terminal or the second terminal comprising a charging circuit configured to charge the first capacitor.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a voltage generation circuit. STATE OF THE ART

[0002] In related technology, a voltage generation circuit is known that generates a predetermined voltage. This voltage generation circuit is a differential amplification device known from patent literature 1. In the differential amplification device, a supply voltage Vcc is stabilized by a series connection of a resistor 2 and a resistor 3, and a voltage across the resistor 3 is stabilized by a capacitor 4. QUOTE LIST PATENT LITERATURE

[0003] Patent Literature 1: JPH01-200708A SUMMARY OF THE INVENTION

[0004] In the differential amplification device described in patent literature 1, it is difficult to quickly stabilize the output voltage while simultaneously reducing noise when the output voltage is generated using a capacitor, and there is a need for improvement.

[0005] The present disclosure relates to a voltage generation circuit in which an output voltage can be rapidly stabilized while simultaneously reducing noise, even when the output voltage is generated using a capacitor.

[0006] One aspect of the present disclosure is a voltage generating circuit comprising: a voltage input terminal to which an input voltage is applied; a voltage output terminal from which an output voltage is output; a first resistor having a first terminal electrically connected to the voltage input terminal and a second terminal electrically connected to the voltage output terminal; a second resistor having a third terminal electrically connected to the second terminal and a fourth terminal; a first capacitor electrically connected to the first or the second terminal; and a first circuit electrically connected to the first or the second terminal comprising a charging circuit configured to charge the first capacitor.

[0007] According to the present disclosure, an output voltage can be quickly stabilized while simultaneously reducing noise, even when the output voltage is generated using a capacitor. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a diagram showing a configuration of a voltage generation circuit according to a comparative example; Fig. 2A is a diagram showing a change in input voltage and a change in voltage at point A of the voltage generation circuit according to the comparison example; Fig. 2B is a diagram showing a current flow from a resistor R20 to a capacitor C20 of the voltage generation circuit according to the comparison example; Fig. 2C is a diagram showing a relationship between the gain and frequency of the voltage generation circuit according to the comparison example; Fig. Figure 3A is a diagram showing a first example of a configuration of a voltage generation circuit according to an embodiment of the present disclosure; Fig. 3B is a diagram showing a second example of the configuration of the voltage generation circuit; Fig. Figure 4 is a diagram showing voltages at respective points in the voltage generation circuit; Fig. 5A is a diagram showing a voltage at a voltage input terminal and a voltage at a voltage output terminal of the voltage generation circuit according to the comparison example; Fig. Figure 5B is a diagram showing an amplitude spectrum of the voltage at the voltage input terminal and an amplitude spectrum of the voltage at the voltage output terminal of the voltage generation circuit according to the comparison example; Fig. Figure 6A is a diagram showing a comparison between a voltage at a voltage input terminal and a voltage at a voltage output terminal of the voltage generation circuit according to the embodiment; Fig. Figure 6B is a diagram showing an amplitude spectrum of the voltage at the voltage input terminal and an amplitude spectrum of the voltage at the voltage output terminal of the voltage generation circuit according to the embodiment; Fig. Figure 7 is a diagram showing a configuration of a voltage generation circuit in a case where a FET is used as a transistor; Fig. Figure 8 is a diagram showing a case in which the voltage generation circuit includes a bias supply circuit and an auxiliary circuit; Fig. Figure 9 is a diagram showing a change in voltage at point A of the voltage generation circuit according to the comparative example in a case where capacitor C20 has a capacitance value of 220 µF, and a change in voltage at point A of the voltage generation circuit according to the embodiment in a case where capacitor C1 has a capacitance value of 2200 µF; Fig. Figure 10 is a diagram comparing information regarding a resistor R3; Fig. Figure 11 is a diagram showing a property of a charging current from resistor R3 to capacitor C1; Fig. Figure 12 is a diagram showing a charging waveform and an equivalent rectangular waveform of the charging current of capacitor C1; Fig. Figure 13 is a diagram showing a charging waveform and an equivalent square waveform of capacitor C1 until the charging current reaches 0.5 Ip; Fig. Table 14 shows a relationship between an output voltage / input voltage and a reduction coefficient; Fig. 15A is a diagram showing a dead voltage; Fig. 15B is a diagram showing a time Toffon for restarting a power supply; Fig. Figure 16 is a diagram showing the output voltage in a case where a positive voltage is output from a positive power supply in the voltage generation circuit; Fig. Figure 17A is a diagram showing a configuration of the voltage generation circuit in a case where a negative voltage is output from a negative power supply in the voltage generation circuit; Fig. Figure 17B is a diagram showing the output voltage of the voltage generating circuit in the case where the negative voltage is output from the negative power supply to the voltage generating circuit; Fig. Figure 18A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit, acting as a dual power supply circuit, outputs the positive voltage; Fig. Figure 18B is a diagram showing the output voltage of the voltage generation circuit in the case where the voltage generation circuit, acting as a dual power supply circuit, outputs the positive voltage; Fig. Figure 19A is a diagram showing a configuration of the voltage generation circuit in the other case, in which the voltage generation circuit, acting as a dual power supply circuit, outputs the positive voltage; Fig. Figure 19B is a diagram showing the output voltage of the voltage generation circuit in the further case where the voltage generation circuit, acting as a dual power supply circuit, outputs the positive voltage; Fig. 20A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit, acting as a negative power supply circuit, outputs the negative voltage; Fig. Figure 20B is a diagram showing the output voltage of the voltage generating circuit in the case where the voltage generating circuit, acting as a negative power supply circuit, outputs the negative voltage; Fig. 21A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit, acting as a dual power supply circuit, outputs the negative voltage; Fig. Figure 21B is a diagram showing the output voltage of the voltage generation circuit in the case where the voltage generation circuit, acting as a dual power supply circuit, outputs the negative voltage; Fig. 22A is a diagram showing a configuration of the voltage generation circuit in a case where safety at the time of a failure in the voltage generation circuit is further improved; Fig. Figure 22B is a diagram showing the output voltage of the voltage generation circuit in the case where safety at the time of a failure in the voltage generation circuit is further improved; Fig. Figure 23A is a diagram showing configurations of the voltage generation circuit and a peripheral circuit thereof in a case where the voltage generation circuit is applied to a regulator output; Fig. Figure 23B is a diagram showing voltages and currents at respective positions of the voltage generation circuit and its peripheral circuitry in the case where the voltage generation circuit is applied to the regulator output; Fig. Figure 24A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes an operational amplifier terminal protection circuit; Fig. Figure 24B is a diagram showing the output voltage of the voltage generation circuit in the case where the voltage generation circuit includes the operational amplifier terminal protection circuit; Fig. Figure 25A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes a microcomputer-controlled reset circuit; Fig. Figure 25B is a diagram showing the voltages at the respective positions of the voltage generation circuit in the case where the voltage generation circuit includes the microcomputer-controlled reset circuit; Fig. Figure 26A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes an automatic reset circuit; Fig. Figure 26B is a diagram showing the voltages at the respective positions of the voltage generation circuit in the case where the voltage generation circuit includes the automatic reset circuit; Fig. 27A is a diagram showing a state in which a power supply is switched off in a case where the voltage generation circuit includes the automatic reset circuit, and a diagram showing a circuit in which part of the voltage generation circuit is extracted; Fig. Figure 27B is a diagram showing the state in which the power supply is switched off in the case where the voltage generation circuit includes the automatic reset circuit, and a diagram showing the voltages and currents at the respective positions of the voltage generation circuit; Fig. Figure 28 is a diagram showing a state in which the power supply is switched on in the case where the voltage generation circuit includes the automatic reset circuit, and a diagram showing the voltages and currents at the respective positions of the voltage generation circuit; Fig. Figure 29A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes a microcomputer-controlled discharge circuit; Fig. Figure 29B is a diagram showing the voltages at the respective positions of the voltage generation circuit in the case where the voltage generation circuit includes the microcomputer-controlled discharge circuit; Fig. 30A is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes an automatic discharge circuit; Fig. Figure 30B is a diagram showing the voltages at the respective positions of the voltage generation circuit in the case where the voltage generation circuit includes the automatic discharge circuit; Fig. Figure 31 is a diagram showing a configuration of the voltage generation circuit in another case, in which the voltage generation circuit includes the automatic discharge circuit; Fig. Figure 32 is a diagram showing the voltages at the respective positions of the voltage generation circuit in another case where the voltage generation circuit includes the automatic discharge circuit; Fig. Figure 33 is a diagram showing a configuration of a voltage generation circuit in a case where the voltage generation circuit includes the microcomputer-controlled reset circuit; Fig. Figure 34 is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes the microcomputer-controlled discharge circuit; Fig. Figure 35 is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes a microcomputer-controlled discharge circuit; Fig. Figure 36 is a diagram showing a configuration of the voltage generation circuit in a case where the voltage generation circuit includes an automatic discharge circuit; Fig. Figure 37 is a diagram showing a configuration of the voltage generation circuit in another case, in which the voltage generation circuit includes an automatic discharge circuit; Fig. Figure 38 is a diagram showing an input voltage in a case where the voltage generation circuit includes an automatic discharge circuit K7A, and an input voltage in a case where the voltage generation circuit includes an automatic discharge circuit K7B; and Fig. Figure 39 is a diagram showing an output voltage Vout in the case where the voltage generation circuit includes the automatic discharge circuit K7A, the output voltage Vout in the case where the voltage generation circuit includes the automatic discharge circuit K7B, and the output voltage Vout in a case where the voltage generation circuit does not include an automatic discharge circuit. DESCRIPTION OF EXECUTION FORMS

[0008] In the following, embodiments that specifically disclose a voltage generation circuit according to the present disclosure are described in detail, with reference to the drawings. However, unnecessarily detailed descriptions may be omitted. For example, detailed descriptions of known facts and redundant descriptions of essentially identical configurations may be omitted. This serves to avoid unnecessary redundancies in the following description and to facilitate understanding by a person skilled in the art. It should be noted that the accompanying drawings and the following description are intended to provide a person skilled in the art with a complete understanding of the present disclosure and not to limit the subject matter described in the claims. (Knowledge as the basis of the present revelation)

[0009] Fig. Figure 1 is a diagram showing a configuration of a voltage generation circuit 1X as a comparison example. Fig. 2A is a diagram showing a change in input voltage and a change in voltage at point A of the voltage generation circuit 1X. Fig. 2B is a diagram showing a current flowing from a resistor R20 to a capacitor C20 of the voltage generating circuit 1X. Fig. 2C is a diagram showing a relationship between the gain and frequency of the voltage generation circuit 1X.

[0010] The voltage generation circuit 1X comprises a resistor R20, a resistor R21, and a capacitor C20. Resistor R20 has two terminals, tR201 and tR202. Resistor R21 has two terminals, tR211 and tR212. Capacitor C20 has two terminals, tC201 and tC202. Terminals tR202, tR211, and tC201 are connected at point A. For example, the input voltage Vin is 8 V. The resistance values ​​of resistor R20 and resistor R21 are equal, for example, 4.7 kΩ. In this case, the input voltage Vin is divided by the resistance values ​​of resistor R20 and resistor R21, resulting in an output voltage Vout of 4 V.

[0011] As in Fig. As shown in Figure 2A, the voltage at point A in the voltage generation circuit 1X corresponds to the output voltage Vout and changes more smoothly than the input voltage Vin. This is because an electrical charge is supplied to capacitor C20 via resistor R20, and, as shown in Figure 2A, the voltage changes more smoothly than the input voltage Vin. Fig. Figure 2B shows that the supply of a current I10 from a power supply to capacitor C20 is limited by resistor R20. To shorten the time t required for the voltage at point A to stabilize, it is desirable to decrease the capacitance of capacitor C20 and the resistance value of resistor R20. This is because t = CR. On the other hand, as shown in Fig. As shown in Figure 2C, the gain in the voltage generation circuit 1X decreases in a range where the frequency is greater than the cutoff frequency fc. To reduce noise, i.e., the gain in the voltage generation circuit 1X, it is therefore desirable to increase the capacitance of capacitor C20 or the resistance of resistor R20, since the cutoff frequency fc is preferably small. This is because fc = 1 / 2πCR. That is, there is a dilemma: reducing noise increases the time t required for the voltage to stabilize at point A, while reducing the time t required for the voltage to stabilize at point A increases the noise.

[0012] The following embodiment describes a voltage generation circuit in which an output voltage can be quickly stabilized while simultaneously reducing noise, even when the output voltage is generated using a capacitor. (Form of execution)

[0013] Fig. Figure 3A is a diagram showing a first example of a configuration of a voltage generating circuit 1 according to the embodiment of the present disclosure. Fig. Figure 3B is a diagram showing a second example of the configuration of voltage generation circuit 1.

[0014] As in Fig. As shown in Figure 3A, voltage generation circuit 1 comprises a voltage divider circuit K0 and an auxiliary circuit K1. The voltage divider circuit K0 has the same configuration as voltage generation circuit 1X.

[0015] Specifically, the voltage divider circuit K0 comprises a voltage input terminal Vin, a voltage output terminal Vout, a resistor R1, a resistor R2, and a capacitor C1. The voltage input terminal Vin is the terminal to which an input voltage is applied. The voltage output terminal Vout is the terminal to which an output voltage is output. Resistor R1 comprises a terminal tR11 and a terminal tR12. Resistor R1 is an example of a first resistor. Resistor R2 comprises a terminal tR21 and a terminal tR22. Resistor R2 is an example of a second resistor. Capacitor C1 comprises a terminal tC11 and a terminal tC12. Capacitor C1 is an example of a first capacitor.

[0016] Terminal tR11 is electrically connected to the voltage input terminal Vin. Terminal tR11 is an example of a first connection. Terminal tR12 is electrically connected to terminal tR21, terminal tC11, and the voltage output terminal Vout. Terminal tR12 is an example of a second connection. Terminal tR21 is electrically connected to terminal tR12, terminal tC11, and the voltage output terminal Vout. Terminal tR22 is electrically connected to ground potential. Terminal tC11 is electrically connected to terminal tR21 and the voltage output terminal Vout. Terminal tC12 is electrically connected to ground potential. A junction between resistor R1 and resistor R2 is point A.

[0017] The auxiliary circuit K1 is a circuit added to the voltage divider circuit K0. The auxiliary circuit K1 is an example of a first circuit. The auxiliary circuit K1 includes at least one charging circuit KA. The auxiliary circuit K1 may also include a stopping circuit KB. The charging circuit KA is a circuit that charges the capacitor C1. The stopping circuit KB is a circuit that stops the charging of the charging circuit KA.

[0018] The charging circuit KA comprises a resistor R4, a resistor R5, an operational amplifier IC1, a transistor Q1, and a resistor R3. Resistor R3 is an example of a fifth resistor. Transistor Q1 is an example of a first transistor. Transistor Q1 is, for example, an NPN bipolar transistor. The operational amplifier IC1 comprises an inverting input terminal IC1-, a non-inverting input terminal IC1+, and an output terminal IC1out. Transistor Q1 comprises a base terminal Q1b, a collector terminal Q1c, and an emitter terminal Q1e. The base terminal Q1b is an example of a first control terminal. The collector terminal Q1c is an example of a first non-control terminal. The emitter terminal Q1e is an example of a second non-control terminal. Resistor R3 comprises a terminal tR31 and a terminal tR32. Terminal tR31 is an example of a ninth terminal.Terminal tR32 is an example of a tenth terminal. The inverting input terminal IC1-, terminal tR32, terminal tR12, terminal tR21, terminal tC11, and the voltage output terminal Vout are electrically connected. The base terminal Q1b and the output terminal IC1 out are electrically connected. The collector terminal Q1c, a power supply terminal of operational amplifier IC1, and the voltage input terminal Vin are electrically connected. The emitter terminal Q1e and terminal tR31 are electrically connected.

[0019] The stop circuit KB comprises a resistor R4, a resistor R5, a resistor R6, and a transistor Q2. Resistor R4 is an example of a third resistor. Resistor R5 is an example of a fourth resistor. Resistor R6 is an example of a sixth resistor. Transistor Q2 is an example of a second transistor. Transistor Q2 is, for example, a PNP bipolar transistor. Resistor R4 comprises a terminal tR41 and a terminal tR42. Terminal tR41 is an example of a fifth terminal. Terminal tR42 is an example of a sixth terminal. Resistor R5 comprises a terminal tR51 and a terminal tR52. Terminal tR51 is an example of a seventh terminal. Terminal tR52 is an example of an eighth terminal. Resistor R6 comprises a terminal tR61 and a terminal tR62. Terminal tR61 is an example of an eleventh terminal.The tR62 connection is an example of a twelfth connection. Transistor Q2 comprises a base connection Q2b, a collector connection Q2c, and an emitter connection Q2e. The base connection Q2b is an example of a second control connection. The collector connection Q2c is an example of a third non-control connection. The emitter connection Q2e is an example of a fourth non-control connection.

[0020] Terminal tR41 and the voltage input terminal Vin are electrically connected. Terminal tR42, terminal tR51, terminal tR61, and the non-inverting input terminal IC1+ are electrically connected. A connection point between resistor R4, resistor R5, the non-inverting input terminal IC1+, and the like is point B. Terminal tR52 is electrically connected to ground. The base terminal Q2b, the output terminal IC1out, and the base terminal Q1b are electrically connected. The collector terminal Q2c is electrically connected to ground. The emitter terminal Q2e is electrically connected to terminal tR62.

[0021] In Fig. For example, in 3A, the resistance value of resistor R1 is 4.7 kΩ. The resistance value of resistor R2 is 4.7 kΩ. The resistance value of resistor R3 is 200 kΩ. The resistance value of resistor R4 is 4.7 kΩ. The resistance value of resistor R5 is 4.7 kΩ. The resistance value of resistor R6 is 4.7 kΩ. The capacitance value of capacitor C1 is 220 µF. The specific resistance and capacitance values ​​of these elements are examples. If the same elements are shown in other drawings, the resistance and capacitance values ​​of the same elements can be set to the same values ​​as these resistance and capacitance values ​​or to other values ​​within a range provided for in the embodiment.

[0022] The voltage generation circuit 1 in Fig. 3B additionally includes a voltage follower in the voltage generation circuit 1 in Fig. 3A. The voltage follower is a circuit that adjusts a power supply output to a low-impedance output. The voltage follower includes an operational amplifier IC2. The operational amplifier IC2 comprises an inverting input terminal IC2-, a non-inverting input terminal IC2+, and an output terminal IC2out. The inverting input terminal IC2-, the output terminal IC2out, and the voltage output terminal Vout are electrically connected. The non-inverting input terminal IC2+, terminal tC11, terminal tR12, terminal tR21, terminal tR32, and the inverting input terminal IC1- are electrically connected.

[0023] Next, the operation of voltage generation circuit 1 will be described. Fig. 3A is described. In this example, a voltage of 8 V is applied to the voltage input terminal Vin.

[0024] Fig. Figure 4 is a diagram showing the voltages at the respective points in the voltage generation circuit 1. Time points (1) to (5) in Fig. 4 indicates the times of the processes described below (1) to (5).

[0025] First, the ratio (resistance value of resistor R1):(resistance value of resistor R2) = (resistance value of resistor R4):(resistance value of resistor R5) is adjusted so that the voltage at point A and the voltage at point B are equal. Here, (resistance value of resistor R1):(resistance value of resistor R2) = (resistance value of resistor R4):(resistance value of resistor R5) = 1:1. (1) As in Fig. As shown in Figure 4, when an input voltage of 8 V is applied to the voltage input terminal Vin, the voltage at point B is immediately stabilized, for example to 4 V. This is because the voltage at point B is not affected by capacitor C1. (2) Next, the operational amplifier IC1 compares a voltage VA, which is the voltage at point A, with a voltage VB, which is the voltage at point B. Since the voltage VB at point B is greater than the voltage VA at point A, the operational amplifier IC1 outputs a high voltage, for example, a voltage of 8 V. When the output voltage of the operational amplifier IC1 is high, transistor Q2 is switched off. (3) Then transistor Q1 is switched on, and an electrical charge is supplied to capacitor C1 via resistor R3. In this case, the voltage at point A rises rapidly because the resistance of resistor R3 decreases.

[0030] As the voltage at point A rises, the voltage output from the voltage output terminal Vout also rises. (4) When the voltage at point A increases and the voltage VA at point A becomes greater than the voltage VB at point B, the operational amplifier IC1 outputs a low voltage, for example a voltage of 0 V, from the output terminal IC1out. As a result, transistor Q1 is switched off, and no electrical charge is supplied to capacitor C1. (5) Transistor Q2 is switched on when the low voltage output from IC1 out is applied to the base Q2b of transistor Q2. Consequently, point B is electrically connected to ground via resistor R6 and transistor Q2, and therefore the voltage VB at point B decreases. Thus, a state can easily be maintained in which the voltage VA at point A is greater than the voltage VB at point B. During this period, the charging circuit KA does not operate.

[0026] This means that operational amplifier IC1 compares a non-inverting input voltage applied to the non-inverting input terminal IC1+ with an inverting input voltage applied to the inverting input terminal IC1-. The non-inverting input voltage is the voltage at the non-inverting input terminal IC1+. The inverting input voltage is the voltage at the inverting input terminal IC1-. Operational amplifier IC1 outputs a turn-on voltage from the output terminal IC1out to turn on transistor Q1 when the non-inverting input voltage is less than the inverting input voltage. Operational amplifier IC1 outputs a turn-off voltage from the output terminal IC1out to turn off transistor Q1 when the non-inverting input voltage is greater than the inverting input voltage.

[0027] Even if the voltage VA at point A and the voltage VB at point B are once stabilized in a state where the voltage VA at point A is greater than the voltage VB at point B, the voltage at the voltage input terminal Vin can fluctuate due to external noise, a connected device, or the like. For example, if the input voltage Vin fluctuates, as shown in (6), the voltage VA at point A and the voltage VB at point B can also fluctuate. The voltage VB at point B is more likely to fluctuate than the voltage VA at point A due to the influence of the fluctuation in the input voltage Vin. Because capacitor C1 is electrically connected to point A, the voltage VA at point A fluctuates relatively less.Therefore, the ratio between the voltage VA at point A and the voltage VB at point B is more likely to change due to fluctuations in the input voltage Vin, and the output voltage of operational amplifier IC1 can change frequently. Consequently, the output voltage Vout can fluctuate. Since the voltage generation circuit 1 in the present embodiment includes the stop circuit KB, the state in which the voltage VA at point A is greater than the voltage VB at point B can be easily maintained. Accordingly, in the voltage generation circuit 1, once the voltage at the voltage output terminal Vout has stabilized at a desired voltage, for example, 4 V, the voltage at the voltage output terminal Vout can be kept stable. This sequence of operations is similar to that of the voltage generation circuit 1 in [reference]. Fig. 3B.

[0028] Next, the behavior of voltage generation circuit 1 will be described.

[0029] Fig. 5A is a diagram showing a voltage at a voltage input terminal Vin and a voltage at a voltage output terminal Vout of the voltage generating circuit 1X. Fig. 5B is a diagram showing an amplitude spectrum of the voltage at the voltage input terminal Vin and an amplitude spectrum of the voltage at the voltage output terminal Vout of the voltage generating circuit 1X. Fig. 6A is a diagram showing the voltage at the voltage input terminal Vin and the voltage at the voltage output terminal Vout of voltage generation circuit 1. Fig. Figure 6B is a diagram showing an amplitude spectrum of the voltage at the voltage input terminal Vin and an amplitude spectrum of the voltage at the voltage output terminal Vout of the voltage generating circuit 1.

[0030] As in Fig. As shown in 5A, it takes some time in the voltage generation circuit 1X for the voltage at the voltage output terminal Vout to stabilize. Here, for example, it takes about 1.8 seconds for the voltage to stabilize. On the other hand, as shown in Fig. Figure 6A shows that in voltage generation circuit 1, the voltage at the voltage output terminal Vout stabilizes quickly. Here, the time required to stabilize the voltage is, for example, about 40 milliseconds. On the other hand, as shown in the Fig. 5B and Fig. Figure 6B shows that in voltage generation circuit 1X and voltage generation circuit 1, there is almost no change in the amplitude spectrum of each voltage. That is, there is almost no change in the amount of noise contained in the voltage at the voltage input terminal Vin and at the voltage output terminal Vout. Therefore, in voltage generation circuit 1, the voltage at the voltage output terminal Vout can be quickly stabilized while effectively reducing the noise.

[0031] Fig. Figure 7 is a diagram showing a configuration of a voltage generation circuit in a case where a FET is used as a transistor.

[0032] As in Fig. As shown in 7, transistor Q1 and transistor Q2 can be used in voltage generation circuit 1. Fig. 3A will be replaced by FETs, i.e., field-effect transistors. FET is an abbreviation for field-effect transistor.

[0033] Transistor Q1 can be replaced by transistor U1, such that the base terminal Q1b, collector terminal Q1c, and emitter terminal Q1e of transistor Q1 each correspond to a gate terminal U1g, a drain terminal U1d, and a source terminal U1s of transistor U1, which is a FET. Transistor U1 is, for example, an N-channel FET. Transistor Q2 can be replaced by transistor U2, such that the base terminal Q2b, collector terminal Q2c, and emitter terminal Q2e of transistor Q2 each correspond to a gate terminal U2g, a drain terminal U2d, and a source terminal U2s of transistor U2, which is a FET. Transistor U2 is, for example, a P-channel FET. Similarly, transistors Q1 and Q2 in voltage generation circuit 1 in Fig. 3B is replaced by transistor U1 and transistor U2, which are both FETs.

[0034] Next, a case is described in which the voltage generation circuit 1 includes a bias supply circuit K2 instead of the voltage divider circuit K0.

[0035] Fig. Figure 8 is a diagram showing a case in which the voltage generation circuit 1 includes the bias supply circuit K2 and an additional circuit K1A. Fig. Components 8 are the same as those of voltage generating circuit 1 shown in other drawings, designated with the same reference numerals, and their descriptions are omitted or simplified. Voltage generating circuit 1, which includes the bias supply circuit K2, is also referred to as voltage generating circuit 1B.

[0036] The bias supply circuit K2 comprises resistor R7, resistor R8, capacitor C2, resistor R9, resistor R10, and operational amplifier IC2. Resistor R7 has two terminals, tR71 and tR72. Resistor R8 has two terminals, tR81 and tR82. Capacitor C2 has two terminals, tC21 and tC22. Resistor R9 has two terminals, tR91 and tR92. Resistor R10 has two terminals, tR101 and tR102. Operational amplifier IC2 has an inverting input terminal, IC2-, a non-inverting input terminal, and an output terminal, IC2out.

[0037] Terminal tR71, terminal tC21, and the voltage input terminal Vin are electrically connected. Terminal tR72, terminal tR81, and the non-inverting input terminal IC2+ are electrically connected. Terminal tR82 is electrically connected to ground. Terminal tC22 and terminal tR91 are electrically connected. A connection point between terminal tC22 and terminal tR91 is a point called noise2. Terminal tR92, terminal tR101, and the inverting input terminal IC2- are electrically connected. Terminal tR102, the output terminal IC2out, the voltage output terminal Vout, and the inverting input terminal IC1- are electrically connected.

[0038] The additional circuit K1A in Fig. In addition to the components of the auxiliary circuit K1, part 8 includes a resistor R12 and a resistor Rm. Resistor R12 has two terminals: tR121 and tR122. Resistor Rm has two terminals: tRm1 and tRm2. Terminals tR121, tR91, tC22, and noise2 are electrically connected. Terminal tR122 and the collector terminal of Q1c are electrically connected. Terminal tRm1 and the base terminal are electrically connected. Terminal tRm2, output terminal IC1out, and the base terminal of Q2b are electrically connected.

[0039] Fig. Figure 8 shows a case where transistors Q1 and Q2 are both bipolar transistors. In this case, resistor Rm is provided to limit the current between the base terminal of transistor Q1 and the output terminal IC1out of operational amplifier IC1. Transistors Q1 and Q2 can be replaced by FET transistors. In this case, the resistor Rm is provided to limit the current between the base terminal of transistor Q1 and the output terminal IC1out of operational amplifier IC1. Fig. The 8 shown resistors Rm are omitted.

[0040] In Fig. For example, the resistance value of resistor R4 is 4.7 kΩ. The resistance value of resistor R5 is 4.7 kΩ. The resistance value of resistor R6 is 4.7 kΩ. The resistance value of resistor R7 is 10 kΩ. The resistance value of resistor R8 is 10 kΩ. The resistance value of resistor R9 is 4.7 kΩ. The resistance value of resistor R10 is 4.7 kΩ. The resistance value of resistor Rm is 10 kΩ. The resistance value of resistor R12 is 200 Ω. The capacitance value of capacitor C1 is 220 µF. The specific resistance and capacitance values ​​of these components are examples.If the same elements are shown in other drawings, the resistance values ​​and capacitance values ​​of the same elements can be set to the same values ​​as these resistance values ​​and capacitance value, or to other values ​​within a range provided for in the embodiment.

[0041] The effects of the present embodiment are described with reference to Fig. 9 described. Fig. Figure 9 is a diagram showing a change in voltage at point A of voltage generating circuit 1X in a case where capacitor C20 has a capacitance value of 2200 µF, and a change in voltage at point A of voltage generating circuit 1 in a case where capacitor C1 has a capacitance value of 2200 µF.

[0042] As in Fig. As shown in Figure 9, in voltage generation circuit 1X, for example, it takes 20 seconds or longer for the voltage to stabilize. On the other hand, Figure 9 shows... Fig. 9, that the output voltage in the voltage generation circuit 1 stabilizes quickly.

[0043] Next, methods for developing constants of the respective circuit elements of the voltage generation circuit 1 are described. 1. Resistor R1, resistor R2 and capacitor C1

[0044] First, the constants of resistor R1, resistor R2, and capacitor C1 are described. Let Vin (V) be the input voltage applied to the voltage input terminal Vin, Vo (V) the output voltage output from the voltage output terminal Vout, and fc (Hz) a cutoff frequency of a low-pass filter comprising resistor R1, resistor R2, and capacitor C1. Then the following relationship formula holds. In the following, the names of the resistors are also used as their resistance values ​​in the formula, and the name of the capacitor is also used as its capacitance value in the formula. Vo=R2R1+R2Vin(V) fc=12π⋅C1⋅R1(Hz)

[0045] When the cutoff frequency fc is set to a lower frequency, the noise reduction effect achieved by voltage generation circuit 1 is significant. That is, increasing the values ​​of resistor R1 and capacitor C1 increases the noise reduction effect, but also increases the time required for the output voltage Vout to stabilize. Furthermore, voltage generation circuit 1 is easily affected by external radiation noise when a resistor value is large, and the component sizes increase with a large capacitor value. Therefore, it is desirable to set the resistance values ​​of resistors R1 and R2 to between 330 Ω and 10 kΩ, and the capacitance of capacitor C1 to between 100 µF and 2200 µF. 2. Transistor Q1 and resistor R3

[0046] Next, the constants of transistor Q1 and resistor R3 will be described. Fig. Figure 10 is a diagram that compares information about the resistor R3. Fig. Figure 10 shows comparisons of times required for the output voltage of the voltage generating circuit 1 to stabilize the inrush currents flowing through the capacitor C1 when the transistor Q1 is switched on, and the loads on the transistor Q1 according to the magnitude of the constant of the resistor R3. Fig. Figure 11 is a diagram showing a property of a charging current from resistor R3 to capacitor C1. Fig. Figure 12 is a diagram showing a charging waveform and an equivalent rectangular waveform of the charging current of capacitor C1.

[0047] As in Fig. As shown in Figure 10, in voltage generation circuit 1, the rise in output voltage Vout is accelerated when the inrush current flowing into capacitor C1 at the moment transistor Q1 is switched on is increased; that is, the start-up time can be shortened. The inrush current is Fig. 11 is shown by a peak value Ip. On the other hand, the load exerted on transistor Q1 and resistor R3 increases as the inrush current increases. The load includes, for example, a thermal load. As in Fig. As shown in Figure 11, the charging current for capacitor C1 reaches a maximum value equal to the inrush current at the moment transistor Q1 is switched on, and becomes the peak value Ip. The peak value Ip is calculated, for example, as follows. [Math. 2] Ip=VinR3(A)

[0048] This means it is necessary to determine the constant of resistance R3, taking into account the resistance of resistor R1, transistor Q1, capacitor C1, and so on. If an electric charge is first supplied from resistor R3 to capacitor C1, a current waveform is obtained, as shown in Fig. Shown in Figure 11. This current waveform is a waveform of the charging current and is called the charging waveform. As shown in Fig. As shown in Figure 12, if the charging current is a predetermined permissible current, the charging waveform can be replaced by the equivalent rectangular waveform, which is determined by the peak value Ip and a time constant τ and is used to calculate a permissible current and power. The time constant τ specifies the duration of the charging process. The time constant τ is calculated, for example, as follows. τ=C1⋅R3(s)

[0049] Next, taking into account a permissible current of transistor Q1, the peak value Ip is determined and the constant of resistor R3 is determined.

[0050] If transistor Q1, for example, is a transistor with a size of approximately 2 mm 2 If the input voltage Vin is approximately 8 V, then the permissible current for a pulse of 100 ms or less is 80 mA. If, in addition, a power reduction of 50% is taken into account in a case where the operating environment is a high-temperature environment or similar, then the permissible current for a pulse of 100 ms or less is 40 mA. From the above, it follows that the constant of resistance R3, for which the peak value Ip is 40 mA, is calculated using formula (1) with 200 Ω.

[0051] Next, the size of the component is determined based on the power consumed by resistor R3.

[0052] A calculation to determine a power P based on the equivalent rectangular waveform in Fig. For example, equation (3) can be expressed using formula (3). If formula (3) is modified based on formulas (1) and (2), formula (4) is obtained. Therefore, the power P can be calculated based on the input voltage Vin and the capacitance value of capacitor C1, independent of the value of resistor R3. [Math. 3] P=12Ip2⋅τ⋅R3(W) P=12Vin2⋅C2(W)

[0053] Therefore, if the input voltage Vin is 8 V and the capacitance of capacitor C2 is 220 µF, the power P dissipated by resistor R3 according to formula (4) is 0.00704 W. If resistor R3 is a general-purpose thick-film chip resistor, the rated power of resistor R3 with a size of 1005 is 0.1 W, and therefore it can be determined that there is no problem.

[0054] When a current i(t) flows through a 1-Ω resistor, the current can be expressed, for example, by the following equation. I=Ip⋅τ(A)

[0055] Even when a current i(t) flows through a 1-Ω resistor, the power P can be expressed, for example, by the following equation. P=12Ip2⋅τ(W)

[0056] When investigating the permissible current, a different method can be considered to determine it more accurately. In the calculation described above, the calculation is performed using an equivalent square waveform in a case where the supply of electric charge to capacitor C1 is carried out for an infinite time. In voltage generation circuit 1, the supply of electric charge to capacitor C1 is stopped when a set output voltage Vout is reached; therefore, it is preferable to perform the calculation using the equivalent square waveform for a finite time.If a time obtained by multiplying the time constant τ by a ratio between the output voltage Vout and the input voltage Vin is considered the charging duration, the peak value Ip and the duration can be used for more accurate current and power calculations. In the example described above, the output voltage Vout is 4 V and the input voltage Vin is 8 V, so Vo / Vin is 0.5, and the current value can be considered half that. That is, although the resistance value of resistor R3 is set to 200 Ω for a target current of 40 mA, the resistance value of resistor R3 can be set to 100 Ω for a target current of 80 mA. Furthermore, the power can be calculated based on formula (5), and a calculation more suited to a real-world situation is possible. [Math. 5] P=12Vin2⋅C2⋅(1−(VoutVin)2)(W)

[0057] An example of calculating current and power using an equivalent rectangular waveform for a finite time is given with reference to Fig. 13 described. Fig. Figure 13 is a diagram showing a charging waveform and an equivalent square waveform of capacitor C1. In a Fig. In the example shown in 13, the supply of electric charge to capacitor C1 in voltage generation circuit 1 is stopped when the current reaches 0.5 Ip. Therefore, the current is then 0.

[0058] If a current i(t) up to 0.5 Ip flows through a 1-Ω resistor, the current can be expressed, for example, by the following equation. I=Ip⋅τ⋅(1−0.5)(A)

[0059] If a current i(t) up to 0.5 Ip flows through a 1-Ω resistor, the power P can be expressed, for example, by the following equation. P=12Ip2⋅τ⋅(1−(0.5)2)(W)

[0060] Next, a relationship between the output voltage / input voltage and a reduction coefficient K is described.

[0061] The reduction coefficient K is (1 - (Vout / Vin) 2 ) described in formula (5). In other words, the reduction coefficient K takes on a value of 0 or more and 1 or less. That is, if the reduction coefficient K decreases, the degree of reduction increases and the power P decreases.

[0062] Fig. Figure 14 is a table showing the relationship between the output voltage / input voltage and the reduction coefficient K.

[0063] As can be seen from the relationship between the output voltage / input voltage and the reduction coefficient K in Fig. As can be seen in Figure 14, the reduction rate increases when the output voltage Vout is close to the input voltage Vin. Even if the output voltage Vout is, for example, half the input voltage Vin, it can be assumed that the power P used for consumption can be reduced by 75%. 3. Resistor R4, resistor R5 and resistor R6

[0064] Next, resistors R4, R5, and R6 will be described.

[0065] Fig. 15A is a diagram showing a dead voltage. Fig. 15B is a diagram showing a time Toffon for restarting a power supply.

[0066] Resistors R4 and R5 generate a reference voltage Vref to stop the supply of electrical charge to capacitor C1 when the output voltage Vout of voltage generation circuit 1 reaches a predetermined voltage after the power supply is switched on. The voltage obtained by dividing a power supply voltage, i.e., the input voltage Vin, by the resistance of resistor R4 and the resistance of resistor R5 is called the reference voltage Vref. An example of a relational formula for the reference voltage Vref is shown in equation (6). [Math. 7] Vref=R5R4+R5⋅Vin(V)

[0067] Considering that current always flows through resistors R4 and R5, it is advantageous to set their resistance values ​​within a range of 1 kΩ to 33 kΩ. Furthermore, resistor R6 is a resistor that introduces a dead voltage V. L This is designed to prevent the supply of electrical charge to capacitor C1 from restarting after the current supply to capacitor C1 has ceased due to a temporary fluctuation in the input voltage Vin. The temporary fluctuation in the input voltage Vin is in Fig. 15A is shown. It is preferred that the dead voltage V L is calculated based on an assumed fluctuation range ΔVin of the input voltage Vin and the time Toffon for switching the power supply back on.

[0068] As described above, the fluctuation of the input voltage Vin occurs due to external noise or similar factors. Furthermore, it is assumed that the power supply will be switched back on in a case where the application of the input voltage Vin to the voltage generation circuit 1 is temporarily interrupted and then reapplied. A relationship between the dead voltage V L and the fluctuation range Δvin can be expressed, for example, by formula (7). [Math. 8] VL=R5R4+R5⋅ΔVin(V)

[0069] If a dead voltage V L ' determined by adding a margin to the calculated dead voltage VL, the resistance value of resistor R6 can be expressed, for example, by the following formula (8). [Math. 9] R6=1Vref−1Vin1Vref−V'L−1Vref⋅R9(Ω)

[0070] Here it is necessary to determine the time Toffon for restarting the power supply based on the calculated dead voltage V. L ' to be taken into account. A multitude of examples of the time Toffon is in Fig. 15B shown. The time Toffon is preferably small.

[0071] If the dead voltage V in the voltage generation circuit 1 L By increasing the voltage, a malfunction caused by a fluctuation in the power supply, i.e., a fluctuation in the input voltage Vin, can be prevented. On the other hand, in voltage generation circuit 1, after the power supply is switched off, the power supply cannot be switched on again until the output voltage Vout has increased by the dead voltage V. L ' has decreased. A hint for switching the power supply back on can be expressed, for example, by the following formula (9). [Math. 10] TOffon=R2⋅C1⋅lnVrefVref−V'L(s)

[0072] For example, if the capacitance value of capacitor C1 is 220 uF, the constant of resistor R2 is 4.7 kΩ, and the reference voltage Vref is 4 V, the time Toffon in a case where the dead voltage V L '1.34 V corresponds, in other words, to a time Toffon1 of 0.42 s. In this context, the time Toffon in a case where the dead voltage V is L '2.68 V, which is twice 1.34 V, in other words, a time Toffon2 of 1.146 s, which is 2.73 times the time Toffon1 = 0.42 s. That is, it is evident that the time Toffon increases when the dead voltage V L ' is increased. 4. Transistor Q2

[0073] In voltage generation circuit 1, transistor Q2 is driven by an output signal from operational amplifier IC1 to induce a current through resistor R6, thereby changing the reference voltage Vref. Since the current flowing through resistor R6 becomes a collector current of transistor Q2 at this point, it is advantageous to select transistor Q2 based on the current flowing through resistor R6. Because the PNP bipolar transistor is used in a switching circuit, transistor Q2 is assumed to have a low on-resistance, and the current is calculated. For example, the current flowing through resistor R6 when transistor Q2 is on is expressed by formula (10). [Math. 11] IR6=Vref−VLR6(A)

[0074] For example, if the reference voltage Vref is 4 V, the dead voltage V LGiven a voltage of 1.34 V and a resistance value of resistor R6 of 4.7 kΩ, a current I flows through resistor R6. R6 calculated with 0.566 mA. Therefore, it is preferable to select transistor Q2 based on a nominal value of the collector current of transistor Q2. 5. Operational amplifier IC1

[0075] Operational amplifier IC1 compares the output voltage Vout, i.e., the voltage at point A, with the reference voltage Vref, i.e., the voltage at point B. Operational amplifier IC1 provides a positive output, i.e., it outputs a high voltage when the output voltage Vout is lower, and a 0-V output, i.e., it outputs a low voltage when the output voltage Vout is higher. Operational amplifier IC1 supplies a base current to transistor Q1 and controls the voltage so that transistor Q1 can operate in saturation during the positive output. In this case, operational amplifier IC1 is selected that can supply a current of 1 / hfe with respect to the peak value Ip of the charging waveform, which is used when resistor R3 is sized for the collector current flowing through transistor Q1. For a transistor Q1 with a size of approximately 2 mm 2Because hfe is 300, a current of Ip / hfe is approximately 133 µA. Here, hfe is a current gain factor at the time when an emitter is grounded.

[0076] Furthermore, operational amplifier IC1 draws a base current from transistor Q2 when it provides a 0V output. Similarly, for transistor Q2, operational amplifier IC1 is selected that can draw a current of 1 / hfe relative to the collector current of transistor Q2. For a transistor Q2 with a size of approximately 2 mm 2 and with an hfe of 300, the current I R6 The current flowing through resistor R6 is approximately 1.9 µA. For example, a general-purpose voltage feedback operational amplifier can be selected as operational amplifier IC1.

[0077] If, however, the input voltage Vin is quickly removed, i.e., not applied to the inverting input terminal IC-, the potential of the inverting input terminal IC1- of the operational amplifier IC1 will be greater than that of the power supply terminal of the operational amplifier IC1 due to the electrical charge remaining in capacitor C1. Therefore, it is necessary to select the operational amplifier IC1 with a specific power rating. If the absolute power rating of the operational amplifier IC1 is exceeded, either the rapid removal of the input voltage Vin can be prevented, or a Schottky barrier diode can be inserted. Details regarding the Schottky barrier diode will be described later. <Modifikation der Spannungserzeugungsschaltung>

[0078] Next, an arrangement circuit is described that serves as a modification of voltage generation circuit 1. This arrangement circuit can be applied to voltage generation circuit 1B.

[0079] First, a positive voltage output from a positive power supply is described.

[0080] Fig. Figure 16 is a diagram showing the output voltage Vout in a case where the positive voltage is supplied by the positive power supply to voltage generating circuit 1. Voltage generating circuit 1 is, for example, voltage generating circuit 1 in Fig. 3A. In Fig. In figure 16, a horizontal axis represents time and a vertical axis represents the voltage value.

[0081] In Fig. Section 16 compares a case in which the additional circuit K1 is provided with a case in which the additional circuit K1 is not provided. With reference to Fig. 16. The output voltage Vout in the voltage generation circuit 1, which includes the additional circuit K1, can be stabilized quickly compared to a voltage generation circuit that does not include the additional circuit K1.

[0082] In voltage generation circuit 1, the operational amplifier IC1 can be replaced by a comparator. The operational amplifier IC1 amplifies the difference between an input at the non-inverting input terminal IC1+ and an input at the inverting input terminal IC1-. When the voltage applied to the non-inverting input terminal IC1+ and the voltage applied to the inverting input terminal IC1- are equal, the operational amplifier IC1 outputs a voltage of 0 V. In this context, the comparator compares the voltage input at the non-inverting input terminal IC1+ with the voltage input at the inverting input terminal IC1- and outputs a high or low voltage. Even when the comparator is used instead of the operational amplifier IC1 in voltage generation circuit 1, a Fig. 16 results shown were achieved.

[0083] Next, a negative voltage output from a negative power supply will be described.

[0084] A case in which a negative voltage is output from the negative power supply in the voltage generation circuit 1 is described with reference to the Fig. 17A and Fig. 17B described. Fig. Figure 17A is a diagram showing a configuration of voltage generation circuit 1. Fig. 17A are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 17B is a diagram showing the output voltage Vout. Fig. In 17B, the horizontal axis represents time, and the vertical axis represents the voltage value.

[0085] In Fig. For example, with 17A, the input voltage Vin is -8 V and the output voltage Vout is -4 V. Even in this case, the output voltage Vout in voltage generation circuit 1, which includes the additional circuit K1, can be stabilized quickly compared to the voltage generation circuit that does not include the additional circuit K1.

[0086] Next, a first example of a positive voltage output in a dual power supply circuit will be described.

[0087] The Fig. 18A and Fig. Figures 18B each represent a diagram showing a case in which the voltage generating circuit 1, acting as a dual power supply circuit, outputs the positive voltage. Fig. Figure 18A is a diagram showing a configuration of voltage generation circuit 1. Fig. 18A are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 18B is a diagram showing the output voltage Vout. Fig. In 18B, a horizontal axis represents time and a vertical axis represents the voltage value.

[0088] In voltage generation circuit 1, for example, a voltage of 8 V is applied as the input voltage Vin for the positive voltage, a voltage of, for example, -8 V is applied as the input voltage V- for the negative voltage, and a voltage of, for example, 4 V is output as the output voltage Vout. Even in this case, the output voltage Vout in voltage generation circuit 1 can be stabilized more quickly compared to the voltage generation circuit without the additional circuit K1.

[0089] Next, a second example of the positive voltage output in the dual power supply circuit will be described.

[0090] Another case, in which the voltage generation circuit 1, which serves as a dual power supply circuit, outputs the positive voltage, is described with reference to the Fig. 19A and Fig. 19B described. Fig. Figure 19A is a diagram showing a configuration of voltage generation circuit 1. Fig. Components 19A are the same as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 19B is a diagram showing the output voltage Vout. Fig. In 19B, a horizontal axis represents time and a vertical axis represents the voltage value.

[0091] In voltage generation circuit 1, for example, a voltage of 8 V is applied as the input voltage Vin to the positive voltage, a voltage of, for example, -8 V is applied as the input voltage V- to the negative voltage, and a voltage of, for example, 4 V is output as the output voltage Vout. The collector terminal Q2c, terminal tR52, terminal tR22, and terminal tC12 are electrically connected to the negative voltage V-. In an example shown in Fig. As shown in Figure 19A, the resistance values ​​of resistor R1 and R2, and R4 and R5, are adjusted to achieve an output voltage of 4 V. For example: (resistance value of resistor R1) / (resistance value of resistor R2) = (resistance value of resistor R4) / (resistance value of resistor R5) = 1.567 kΩ / 4.7 kΩ. Even in this case, the output voltage Vout in voltage generation circuit 1 can be stabilized quickly compared to the voltage generation circuit without the additional circuit K1.

[0092] Next, a negative voltage output in a negative power supply circuit will be described.

[0093] A case in which the voltage generating circuit 1, which serves as a negative power supply circuit, outputs a negative voltage is described with reference to the Fig. 20A and Fig. 20B described. Fig. 20A is a diagram showing a configuration of voltage generation circuit 1. In Fig. 20A are the same components as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 20B is a diagram showing the output voltage Vout. Fig. 20B uses a horizontal axis to represent time and a vertical axis to represent the voltage value.

[0094] In voltage generation circuit 1, for example, a voltage of -8 V is applied as the input voltage Vin to the negative voltage, a voltage of, for example, 8 V is applied as the input voltage V+ to the positive voltage, and a voltage of, for example, -4 V is output as the output voltage Vout. The input voltage V+ is applied as the positive supply voltage of the operational amplifier IC1. Even in this case, the output voltage Vout in voltage generation circuit 1 can be stabilized quickly compared to the voltage generation circuit without the additional circuit K1.

[0095] Next, a negative voltage output in the dual power supply circuit will be described.

[0096] A case in which the voltage generation circuit 1, which serves as a dual power supply circuit, outputs a negative voltage is described with reference to the Fig. 21A and Fig. 21B described. Fig. 21A is a diagram showing a configuration of voltage generation circuit 1. In Fig. 21A are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 21B is a diagram showing the output voltage Vout. Fig. 21B represents time on a horizontal axis and voltage on a vertical axis.

[0097] In voltage generation circuit 1, for example, a voltage of 8 V is applied as the input voltage Vin to the positive voltage, a voltage of, for example, -8 V is applied as the input voltage V- to the negative voltage, and a voltage of, for example, -4 V is output as the output voltage Vout. The collector terminal Q2c, terminal tR52, terminal tR22, and terminal tC12 are electrically connected to the negative voltage V-. In an example shown in Fig. As shown in Figure 21A, the ratio of the resistance value of resistor R1 to the resistance value of resistor R2 and the ratio of the resistance value of resistor R4 to the resistance value of resistor R5 are adjusted so that the output voltage Vout reaches -4 V. For example, (resistance value of resistor R1) / (resistance value of resistor R2) = (resistance value of resistor R4) / (resistance value of resistor R5) = 14.1 kΩ / 4.7 kΩ. Even in this case, the output voltage Vout in voltage generation circuit 1 can be stabilized quickly compared to the voltage generation circuit without the additional circuit K1.

[0098] Next, a case is described in which safety in the event of a failure of the voltage generation circuit 1 is further improved.

[0099] The case in which safety is further improved in the event of a failure in the voltage generation circuit 1 is described with reference to the Fig. 22A and Fig. 22B described. Fig. 22A is a diagram showing a configuration of voltage generation circuit 1. In Fig. 22A are the same components as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 22B is a diagram showing the output voltage Vout. Fig. 22B represents time on a horizontal axis and voltage on a vertical axis.

[0100] The voltage generation circuit 1 in Fig. 22A resembles voltage generation circuit 1 in Fig. 3A insofar as the input voltage Vin to the voltage divider circuit K0 is 8 V. The input voltage Vop to the auxiliary circuit K1 is 5.4 V. In voltage generation circuit 1, the output voltage Vout can be controlled using a minimum input voltage Vop of, for example, 5.4 V. A minimum input voltage Vop is, for example, a voltage obtained by adding the output voltage Vout, the maximum output voltage of operational amplifier IC1, and the VBE voltage of transistor Q1. If voltage generation circuit 1 includes a FET instead of the bipolar transistor, a Vth voltage is used instead of the VBE voltage, which is a gate-source voltage.

[0101] If transistor Q1 fails and is short-circuited, the input voltage Vop is output unchanged as the output voltage Vout. If transistor Q1 is short-circuited when the 8 V input voltage Vin is used as the input voltage for auxiliary circuit K1, the 8 V input voltage Vout is output as the output voltage Vout. Since the original output voltage Vout is 4 V, a device that is the output destination could fail if the output voltage is significantly higher than 4 V. However, if the input voltage Vop is used as the input voltage for auxiliary circuit K1, the output voltage Vout is regulated to 5.4 V even if transistor Q1 is short-circuited. Accordingly, voltage generation circuit 1 can protect the device connected to the output voltage Vout even if transistor Q1 fails and is short-circuited.Furthermore, the output voltage Vout can also be set in voltage generation circuit 1. Fig. 22 can be stabilized quickly compared to the voltage generation circuit without the additional circuit K1.

[0102] Next, a case is described in which the voltage generation circuit 1 is applied to a controller output.

[0103] The case in which the voltage generation circuit 1 is applied to the regulator output is described with reference to the Fig. 23A and Fig. 23B described.

[0104] Fig. 23A is a diagram showing configurations of voltage generation circuit 1 and one of its peripheral circuits. Fig. 23A are the same components as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 23B is a diagram showing the output voltage Vout, inrush currents to a regulator RG, and a bypass current flowing through the auxiliary circuit K1. Fig. 23B, horizontal axes represent time and vertical axes represent the voltage value or the current value.

[0105] The voltage generation circuit 1 in Fig. Circuit 23A differs from the voltage generation circuit 1 described above in that a capacitor Cb is connected to one terminal of resistor R1 on a side that is not connected to resistor R2. An OUT terminal of regulator RG is electrically connected to the voltage input terminal Vin of voltage generation circuit 1. That is, an output voltage of regulator RG, which serves as the regulator output, becomes the input voltage Vin of voltage generation circuit 1. An IN terminal of regulator RG is electrically connected to resistor R100. The other terminal of resistor R100 is electrically connected to a voltage input terminal VIN. The voltage input terminal VIN is connected to a voltage input terminal VIN of the auxiliary circuit K1.The resistor R100 is a resistor that is introduced to describe the inrush current described later, and its resistance value can be significantly smaller than that of the resistor R1 or the like.

[0106] In Fig. In the upper diagram, 23B represents the output voltage Vout of the voltage generation circuit without the additional circuit K1 and the output voltage Vout of voltage generation circuit 1. Fig. 23A shown in time series. In the upper diagram, a case of the voltage generation circuit without the additional circuit K1 is shown by a dashed line and a case of Fig. 23A is shown by a solid line.

[0107] In Fig. 23B in a middle diagram represent a current flowing through resistor R100 when the voltage generation circuit does not include auxiliary circuit K1 and is applied to the regulator output, and a current flowing through resistor R100 when the voltage generation circuit 1 is in Fig. The current applied to the regulator output (23A) is shown in time series. The current flowing through resistor R100 corresponds to the inrush current to the regulator RG. In the middle diagram, a case where the voltage generation circuit does not include the auxiliary circuit K1 is shown by a dashed line, and a case where the voltage generation circuit 1 does include K1 is shown in the diagram. Fig. 23A is shown by a solid line.

[0108] In Fig. In diagram 23B, a current is shown passing through a resistor R200 of the voltage generation circuit 1. Fig. 23A flows. The current flowing through resistor R200 corresponds to the bypass current flowing through the auxiliary circuit K1.

[0109] As in Fig. As shown in Figure 23B, in voltage generation circuit 1, the inrush current to the controller RG can be reduced when the controller RG is started. In particular, as shown in the middle diagram in Fig. As shown in Figure 23B, in voltage generation circuit 1 the inrush current is reduced, for example, from 434 mA to 275 mA. This is because the current is diverted from the voltage input terminal VIN to the voltage input terminal VIN of the auxiliary circuit K1, since the voltage input terminal VIN is connected to the voltage input terminal VIN of the auxiliary circuit K1. As further shown in the diagram above in Fig. As shown in Figure 23B, the output voltage Vout in voltage generation circuit 1 can be stabilized quickly compared to the voltage generation circuit without the additional circuit K1. <Praktische Schaltung der Spannungserzeugungsschaltung>

[0110] Next, the practical circuit of voltage generation circuit 1 will be described.

[0111] First, a case is described in which the voltage generation circuit 1 includes an operational amplifier connection protection circuit.

[0112] The case in which the voltage generation circuit 1 includes the operational amplifier connection protection circuit is described with reference to the Fig. 24A and Fig. 24B described. Fig. Figure 24A is a diagram showing a configuration of voltage generation circuit 1. Fig. 24A are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 24B is a diagram showing the output voltage Vout. Fig. In 24B, horizontal axes represent time and vertical axes represent the voltage value.

[0113] The operational amplifier connection protection circuit is a circuit that protects the connections of the operational amplifier IC1 and is, for example, a Schottky barrier diode.

[0114] The voltage generation circuit 1 in Fig. The voltage generation circuit 1 in the 24A includes Fig. 3B and further comprises additional circuit elements. In particular, it comprises in voltage generation circuit 1 in Fig. In circuit 24A, the auxiliary circuit K1 includes a Schottky barrier diode D1. The Schottky barrier diode D1 is an example of a diode. The Schottky barrier diode D1 comprises a cathode terminal tD11 and an anode terminal tD12. The cathode terminal tD11 is electrically connected to terminal tR42, the collector terminal Q1c, and the like. The anode terminal tD12 is electrically connected to the inverting input terminal IC1-, terminal tR32, terminal tC11, and the like.

[0115] The voltage generation circuit 1 in Fig. The 24A circuit includes a resistor R11 and a power supply switch S2. Resistor R11 has two terminals: tR111 and tR112. Power supply switch S2 has two terminals: tSW11 and tSW12. Terminal tR111, the voltage output terminal Vout, the output terminal IC2out, and the inverting input terminal IC2- are electrically connected. Terminal tR112 is electrically connected to ground. Terminal tSW12, terminal tR11, a positive power supply terminal of operational amplifier IC2, the collector terminal Q1c, and the cathode terminal tD11 are electrically connected. Terminal tSW11 and the voltage input terminal Vin are electrically connected.

[0116] It is assumed that the voltage generation circuit 1 does not include a Schottky barrier diode D1 and that the power supply is switched off quickly, i.e., the input voltage at the voltage input terminal Vin decreases rapidly. In this case, the voltage at the inverting input terminal IC1- of the operational amplifier IC1 can be greater than the input voltage Vin of the voltage input terminal Vin. As shown in the diagram above. Fig. As shown in Figure 24B, the voltage at the inverting input terminal IC1- can exceed the maximum rating of operational amplifier IC1. For example, the output voltage Vout can become 4 V higher than the input voltage Vin immediately after the power supply is switched off. In this case, operational amplifier IC1 can fail. However, since the voltage generation circuit 1 includes the Schottky barrier diode D1, it is possible to prevent the voltage at the inverting input terminal IC1- from exceeding the maximum rating of operational amplifier IC1, as shown in the lower diagram in Figure 24B. Fig. Figure 24B shows that, for example, in voltage generation circuit 1, the output voltage Vout can only be set 0.2 V higher than the input voltage Vin immediately after the power supply is switched off. The maximum rated value of operational amplifier IC1 can be, for example, 0.3 V or 0.7 V.

[0117] The Schottky barrier diode D1 can be another diode or be replaced by another diode capable of preventing an exceedance of the maximum rated power of the operational amplifier IC1, as described above.

[0118] Next, a case is described in which the voltage generation circuit 1 includes a reset circuit.

[0119] The reset circuit can be a microcomputer-controlled reset circuit that performs a reset based on a control signal from a microcomputer, an automatic reset circuit that performs a reset through an action of the circuit without using the control signal from the microcomputer, or the like. The reset circuit can be provided in the auxiliary circuit K1.

[0120] The reset circuit is a circuit that temporarily raises the voltage VB at point B in the auxiliary circuit K1 to create a state where the voltage VA at point A is less than the voltage VB. Accordingly, the voltage VA can be set lower than the voltage VB even if the electrical charge stored in capacitor C1 is conserved, and the charging circuit KA of the auxiliary circuit K1 can be activated early. That is, as soon as the input voltage Vin is removed, the reset circuit supplies a voltage to the non-inverting input IC1+ to control the voltage at the non-inverting input IC1+ so that it is greater than the output voltage Vout.

[0121] First, a case is described in which the voltage generation circuit 1 includes the microcomputer-controlled reset circuit.

[0122] A case in which the voltage generation circuit 1 includes a microcomputer-controlled reset circuit K3 is described with reference to the Fig. 25A and Fig. 25B described. Fig. 25A is a diagram showing a configuration of voltage generation circuit 1. In Fig. 25A are the same components as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 25B is a diagram showing voltages at respective positions in voltage generation circuit 1. Fig. 25B, horizontal axes represent time and vertical axes represent voltage value.

[0123] The microcomputer-controlled reset circuit K3 includes resistor R12, resistor R13, resistor R14, transistor Q3, transistor Q4 and capacitor C3.

[0124] Resistor R12 comprises terminals tR121 and tR122. Resistor R13 comprises terminals tR131 and tR132. Resistor R14 comprises terminals tR141 and tR142. Transistor Q3 comprises a base terminal Q3b, a collector terminal Q3c, and an emitter terminal Q3e. Transistor Q4 comprises a base terminal Q4b, a collector terminal Q4c, and an emitter terminal Q4e. Capacitor C3 comprises terminals tC31 and tC32.

[0125] Terminals tR121, tR131, and tR41, and the voltage input terminal Vin, are electrically connected. Terminal tR122 and the collector terminal Q3c are electrically connected. Terminal tR132, the base terminal Q3b, and the collector terminal Q3c are electrically connected. Emitter terminal Q3e, tR42, tR51, tR61, and the non-inverting input terminal IC1+ are electrically connected. Base terminal Q4b, tC31, and tR141 are electrically connected. Emitter terminal Q4e is electrically connected to ground. Terminal tC32 is electrically connected to ground. Terminal tR142 is electrically connected to a uCOM terminal. The uCOM terminal is a terminal to which a signal is input.The uCOM port receives a signal from the microcomputer, for example. A reset control signal can be input here. The reset control signal is an on / off control signal, meaning a signal that causes the high voltage and low voltage to alternate.

[0126] In an upper diagram in Fig. Figure 25B shows the input voltage Vin and a voltage at the uCOM terminal, i.e., a voltage of the reset control signal of the voltage generation circuit 1, including the microcomputer-controlled reset circuit K3, in time series. In a middle diagram in Fig. Figure 25B shows the output voltage Vout and the voltage at the non-inverting input IC1+ of operational amplifier IC1 of voltage generation circuit 1, which does not include the microcomputer-controlled reset circuit K3, in time series. The lower diagram in Fig. Figure 25B shows the output voltage Vout and the voltage at the non-inverting input terminal IC1+ of the operational amplifier IC1 of the voltage generation circuit 1 including the microcomputer-controlled reset circuit K3 in time series.

[0127] In voltage generation circuit 1, which does not include microcomputer-controlled reset circuit K3, the voltage can remain at the voltage output terminal Vout after the power supply is switched off, i.e., after the input voltage Vin drops sharply, due to the electrical charge stored in capacitor C1. As a result, the output voltage Vout initially drops and then gradually rises again, as shown in the middle diagram in Fig. Figure 25B shows that even if voltage generation circuit 1 is started the next time, the voltage at the non-inverting input IC1+ of operational amplifier IC1 will be lower than the output voltage Vout. Therefore, auxiliary circuit K1 may not function, and it may take some time for voltage generation circuit 1 to start.

[0128] In contrast, in voltage generation circuit 1, the auxiliary circuit K1 can be reset by connecting the microcomputer-controlled reset circuit K3 to the auxiliary circuit K1. In particular, as shown in Fig. As shown in Figure 25B, in the microcomputer-controlled reset circuit K3, the reset control signal is output from the uCOM terminal on the next startup, so that transistor Q3 can be turned on when the power supply is switched on, i.e., when the input voltage Vin is applied. Then, the voltage at the non-inverting input terminal IC1+ of operational amplifier IC1 can be set to a value greater than an output voltage value, for example, 4 V, by means of a combined resistor consisting of resistor R4 and resistor R12. Accordingly, the auxiliary circuit K1 can be started quickly, and as shown in Figure 25B. Fig. As shown in Figure 25B, the output voltage Vout can be quickly set to a predetermined voltage, for example 4 V, immediately after the power supply is switched on. The reset control signal can also be used to control the switching on and off of the power supply switch S2.

[0129] Next, a case is described in which the voltage generation circuit 1 includes an automatic reset circuit K4.

[0130] The case in which the voltage generation circuit 1 includes the automatic reset circuit K4 is described with reference to the Fig. 26A and Fig. 26B described. Fig. 26A is a diagram showing voltage generation circuit 1. In Fig. 26A are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 26B is a diagram showing the voltages at the respective positions of the voltage generation circuit 1. Fig. In 26B, horizontal axes represent time and vertical axes represent the voltage value.

[0131] The automatic reset circuit K4 includes a resistor R15, a resistor R16, a resistor R17, a transistor Q5 and a capacitor C4.

[0132] Resistor R15 has two terminals: tR151 and tR152. Resistor R16 has two terminals: tR161 and tR162. Resistor R17 has two terminals: tR171 and tR172. Transistor Q5 has a base terminal Q5b, a collector terminal Q5c, and an emitter terminal Q5e. Capacitor C4 has two terminals: tC41 and tC42.

[0133] Terminal tR151, emitter terminal Q5e, terminal tR41, and voltage input terminal Vin are electrically connected. Terminal tR152, terminal tC41, and terminal tR161 are electrically connected. Terminal tR162 and base terminal Q5b are electrically connected. Terminal tC42 is electrically connected to ground. Collector terminal Q5c and terminal tR171 are electrically connected. Terminal tR172, terminal tR42, terminal tR51, terminal tR61, and the non-inverting input terminal IC1+ are electrically connected.

[0134] In an upper diagram in Fig. Figure 26B shows the input voltage Vin of the voltage generation circuit 1, including the automatic reset circuit K4, in time series. In a middle diagram in Fig. Figure 26B shows the output voltage Vout and the voltage at the non-inverting input IC1+ of operational amplifier IC1 of voltage generation circuit 1 without the automatic reset circuit K4, in time series. A lower diagram in Fig. Figure 26B shows the output voltage Vout and the voltage at the non-inverting input terminal IC1+ of the operational amplifier IC1 of the voltage generation circuit 1 including the automatic reset circuit K4 in time series.

[0135] In voltage generation circuit 1 without the automatic reset circuit K4, as shown in the middle diagram in Fig. As shown in Figure 26B, the output voltage Vout drops once and then gradually rises. Therefore, even when voltage generation circuit 1 is started the next time, the voltage at the non-inverting input IC1+ of operational amplifier IC1 will be lower than the output voltage Vout. Consequently, auxiliary circuit K1 may not function, and it may take some time for voltage generation circuit 1 to start. One mechanism that causes this start-up delay is the same as the one described for voltage generation circuit 1 without the microcomputer-controlled reset circuit K3.

[0136] In contrast, in voltage generation circuit 1, the auxiliary circuit K1 can be automatically reset by connecting the automatic reset circuit K4 to the auxiliary circuit K1. Specifically, the automatic reset circuit K4 is configured to activate transistor Q5 when the power supply to voltage generation circuit 1 is switched on. This allows, as shown in Fig. As shown in Figure 26B, the voltage at the non-inverting input IC1+ can be adjusted to a voltage greater than the output voltage, for example 4 V, by a combined resistor consisting of resistor R17 and resistor R4. Accordingly, the auxiliary circuit K1 can be started quickly, and as shown in Figure 26B. Fig. As shown in Figure 26B, the output voltage Vout can be quickly set to a predetermined voltage, for example 4 V, immediately after an input power supply is switched on.

[0137] Operation at a time when the power supply is switched off in the case where the voltage generation circuit 1 includes the automatic reset circuit K4 is described with reference to the Fig. 27A and Fig. 27B described. Fig. 27A is a diagram showing a circuit in which part of the voltage generation circuit 1 is in Fig. 26A is extracted. Fig. Figure 27B is a diagram showing voltages and currents at respective positions in voltage generation circuit 1. Fig. 27B, horizontal axes represent time, and vertical axes represent the voltage value or the current value.

[0138] In an upper diagram in Fig. Figure 27B shows the input voltage Vin of the voltage generation circuit 1, including the automatic reset circuit K4, in time series. It is shown in particular that the power supply is interrupted and the input voltage Vin drops, for example, from 8 V to less than 4 V. In a middle diagram in Fig. Figure 27B shows a voltage at point C, a current flowing through resistor R15, and a current flowing through resistor R16 of voltage generation circuit 1, including automatic reset circuit K4, in time series. Point C is a connection point between terminal tR152, terminal tC41, and terminal tR161 in voltage generation circuit 1. Fig. 27A. In a lower diagram in Fig. Figure 27B shows the output voltage Vout and the voltage at the non-inverting input terminal IC1+ of the operational amplifier IC1 of the voltage generation circuit 1 including the automatic reset circuit K4 in time series.

[0139] When the power supply to voltage generation circuit 1 is switched off, a voltage drops at a point D in Fig. 27A drops, meaning the input voltage Vin decreases, and an electrical charge from capacitor C4 is discharged through resistor R15. As a result, the voltage at point C in Fig. 27A, as in Fig. 27B is shown. Accordingly, preparations for the next power supply switch-on of voltage generation circuit 1 are complete. Point D is a connection point of terminal tR41, terminal tR151, emitter terminal Q5e, and the like in voltage generation circuit 1 in Fig. 27A.

[0140] Operation at the time the power supply is switched on in the case where the voltage generation circuit 1 includes the automatic reset circuit K4 is described with reference to the Fig. 27A and Fig. 28 described. Fig. Figure 28 is a diagram showing voltages and currents at respective positions in the voltage generation circuit 1. Fig. 28. Horizontal axes represent time and vertical axes represent voltage or current.

[0141] In an upper diagram in Fig. Figure 28 shows the input voltage Vin of the voltage generation circuit 1, which includes the automatic reset circuit K4, in time series. It is shown in particular that when the power supply is switched on, the input voltage Vin rises, for example, from 3 V to 8 V. In a middle diagram in Fig. Figure 28 shows the voltage at point C, the current flowing through resistor R15, and the current flowing through resistor R16 of voltage generation circuit 1, including automatic reset circuit K4, in time series. A lower diagram in Fig. Figure 28 shows the output voltage Vout and the voltage at the non-inverting input terminal IC1+ of the operational amplifier IC1, i.e., the voltage at point B of the voltage generation circuit 1 including the automatic reset circuit K4, in time series.

[0142] At a time when the power supply to voltage generating circuit 1 is switched on, as in Fig. As shown in Figure 28, the voltage at point D increases, and therefore capacitor C4 is charged with electrical charge via resistors R15 and R16. While current flows through resistor R15, transistor Q5 is switched on, and the voltage at point B rises, causing auxiliary circuit K1 to operate. That is, the automatic reset circuit K4 facilitates the switching on of operational amplifier IC1 of auxiliary circuit K1, causing it to output the high voltage.

[0143] Next, a case is described in which the voltage generation circuit 1 includes a discharge circuit. The discharge circuit can be a microcomputer-controlled discharge circuit that discharges based on a control signal from the microcomputer, an automatic discharge circuit that discharges through an action of the circuit without using the control signal from the microcomputer, or the like. The discharge circuit can be provided in the auxiliary circuit K1.

[0144] The discharge circuit is a circuit that forcibly reduces the voltage at the voltage output terminal Vout to create a state where the voltage VB is greater than the voltage VA at point A, which corresponds to the voltage at the voltage output terminal Vout. Accordingly, the electrical charge is discharged, even if electrical charge is stored in capacitor C1, so that the voltage VA is less than the voltage VB. Therefore, the charging circuit KA of the auxiliary circuit K1 can be operated early. Specifically, as soon as the input voltage Vin is removed, the discharge circuit discharges the electrical charge accumulated in capacitor C1 to control the voltage at the non-inverting input terminal IC1+ so that it is greater than the output voltage Vout.

[0145] First, a case is described in which the voltage generation circuit 1 includes a microcomputer-controlled discharge circuit K5.

[0146] In the case where the voltage generation circuit 1 includes the microcomputer-controlled discharge circuit K5, operation is described with reference to the Fig. 29A and Fig. 29B described. Fig. Figure 29A is a diagram showing a configuration of voltage generation circuit 1. Fig. 29A are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 29B is a diagram showing voltages at respective positions in voltage generation circuit 1. Fig. 29B, horizontal axes represent time and vertical axes represent the voltage value.

[0147] The voltage generation circuit 1 in Fig. 29A includes the voltage generation circuit 1 in Fig. 3A and the microcomputer-controlled discharge circuit K5. The microcomputer-controlled discharge circuit K5 comprises a resistor R18, a resistor R19, a resistor R20, the transistor U2, a transistor Q6 and a capacitor C5.

[0148] Resistor R18 has two terminals: tR181 and tR182. Resistor R19 has two terminals: tR191 and tR192. Resistor R20 has two terminals: tR201 and tR202. Transistor U2 has a gate terminal: U2g, a source terminal: U2s, and a drain terminal: U2d. Transistor Q6 has a base terminal: Q6b, a collector terminal: Q6c, and an emitter terminal: Q6e. Capacitor C5 has two terminals: tC51 and tC52.

[0149] Terminal tR191 is electrically connected to a terminal to which a predetermined voltage, for example, 3.3 V, is applied. Terminal tR192, gate terminal U2g, and collector terminal Q6c are electrically connected. Terminal tR201, terminal tC51, and base terminal Q6b are electrically connected. Terminal tR202 and the uCOM terminal, to which the microcomputer is connected, are electrically connected. The uCOM terminal receives, for example, a discharge control signal from the microcomputer, specifically an on / off control signal for transistor Q6. Terminal tC52 is electrically connected to ground. Emitter terminal Q6e is electrically connected to ground. Drain terminal U2d, terminal tR32, terminal tR12, terminal tR21, terminal tC11, and the voltage output terminal Vout are electrically connected.The source terminal U2s and the terminal tR181 are electrically connected. The terminal tR182 is electrically connected to ground potential.

[0150] In an upper diagram in Fig. Figure 29B shows the input voltage Vin and the voltage at the uCOM terminal of voltage generation circuit 1, which includes one of the microcomputer-controlled discharge circuits K5, in time series. The voltage at the uCOM terminal reflects the on-off behavior based on the control signal from the microcomputer. The control signal from the microcomputer may be the same signal as the control signal used to switch the power supply switch S2, described in another circuit diagram, or it may be a different signal. A lower diagram in Fig. Figure 29B shows the output voltage Vout of the voltage generation circuit 1 without the microcomputer-controlled discharge circuit K5 and the output voltage Vout of the voltage generation circuit 1 with the microcomputer-controlled discharge circuit K5 in time series.

[0151] In voltage generation circuit 1, without the microcomputer-controlled discharge circuit K5, it can take some time for the voltage at the voltage output terminal Vout to drop due to the electrical charge stored in capacitor C1 after the power supply is switched off, i.e., after the input voltage Vin drops rapidly. Consequently, it can take some time for voltage generation circuit 1 to power up the next time.

[0152] In contrast, in voltage generation circuit 1, the electrical charge stored in capacitor C1 can be discharged by actuating the microcomputer-controlled discharge circuit K5, which is connected to the auxiliary circuit K1. Accordingly, in voltage generation circuit 1, which includes the microcomputer-controlled discharge circuit K5, the output voltage Vout can be quickly set to a cutoff voltage, for example, 0 V, when the power supply is interrupted. The on / off control signal from the microcomputer can also be used as the signal to control the on / off state of the power supply switch S2.

[0153] In voltage generation circuit 1 in Fig. 29A Some elements of the microcomputer-controlled discharge circuit K5 can be omitted if the activation of an on / off control performed by the microcomputer is reversed, i.e., if a voltage of the on / off control signal from the microcomputer is set high when the input power supply is interrupted. For example, the microcomputer-controlled discharge circuit K5 can include transistor U2 and resistor R18, and the gate terminal U2g can be electrically connected directly to the uCOM terminal. The same effect can be achieved in this case as well.

[0154] Next, a case is described in which the voltage generation circuit 1 includes an automatic discharge circuit K6.

[0155] The case in which the voltage generation circuit 1 includes the automatic discharge circuit K6 is described with reference to the Fig. 30A and Fig. 30B described. Fig. 30A is a diagram showing a configuration of voltage generation circuit 1. In Fig. 30A are the same components as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified. Fig. Figure 30B is a diagram showing the input voltage Vin and the output voltage Vout. Fig. In 30B, the horizontal axis represents time and the vertical axis represents the voltage value.

[0156] The voltage generation circuit 1 in Fig. The voltage generation circuit 1 comprises 30A. Fig. 3A and the automatic discharge circuit K6. The automatic discharge circuit K6 comprises a resistor R21, a resistor R22, a resistor R23, a resistor R24, a transistor U3 and a transistor U4.

[0157] Resistor R21 has two terminals: tR211 and tR212. Resistor R22 has two terminals: tR221 and tR222. Resistor R23 has two terminals: tR231 and tR232. Resistor R24 ​​has two terminals: tR241 and tR242. Transistor U3 has a gate terminal: U3g, a source terminal: U3s, and a drain terminal: U3d. Transistor U4 has a gate terminal: U4g, a source terminal: U4s, and a drain terminal: U4d.

[0158] Terminals tR211, tR231, and the voltage input terminal Vin are electrically connected. Terminals tR212, tR221, and the gate terminal U3g are electrically connected. Terminal tR222 is electrically connected to ground. Terminals tR232, source terminal U3s, and gate terminal U4g are electrically connected. The drain terminal U3d is electrically connected to ground. Source terminal U4s, tR32, tR12, tR21, tC11, and the voltage output terminal Vout are electrically connected. The drain terminal U4d is electrically connected to ground.

[0159] In a diagram in Fig. Figure 30B shows the input voltage Vin of the voltage generation circuit 1 with the automatic discharge circuit K6, the output voltage Vout of the voltage generation circuit 1 without the automatic discharge circuit K6 and the output voltage Vout of the voltage generation circuit 1 with the automatic discharge circuit K6 in time series.

[0160] In voltage generation circuit 1 without the automatic discharge circuit K6, as in Fig. As shown in Figure 30B, it takes some time for the output voltage Vout to drop, and it can take some time for the voltage generation circuit 1 to start up again. One mechanism by which the start-up takes some time is the same as the one described for voltage generation circuit 1 without the microcomputer-controlled discharge circuit K5.

[0161] In contrast, in voltage generation circuit 1, the electrical charge stored in capacitor C1 can be automatically discharged by activating the automatic discharge circuit K6, which is connected to the auxiliary circuit K1. Specifically, in voltage generation circuit 1, if the input voltage Vin is less than a voltage determined based on resistors R21 and R22, for example 6.4 V, the voltage can be automatically discharged. Fig. 30B, the automatic discharge circuit K6 is automatically activated to discharge the electrical charge. Accordingly, in the voltage generation circuit 1, which includes the automatic discharge circuit K6, the output voltage Vout can be quickly set to a cutoff voltage, for example 0 V, when the power supply is interrupted.

[0162] A case in which the voltage generation circuit 1 includes an automatic discharge circuit K7 is described with reference to the Fig. 31 and Fig. 32 described. Fig. Figure 31 is a diagram showing a configuration of voltage generation circuit 1. Fig. 31 are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference numerals, and their description is omitted or simplified. Fig. Figure 32 is a diagram showing the input voltage Vin and the output voltage Vout. Fig. In diagram 32, a horizontal axis represents time and a vertical axis represents the voltage value.

[0163] The voltage generation circuit 1 in Fig. 31 includes the voltage generation circuit 1 in Fig. 3A and the automatic discharge circuit K7. The automatic discharge circuit K7 comprises resistor R21, resistor R22, resistor R23, resistor R24, transistor U3, transistor U4, capacitor C6, and diode D2. That is, the automatic discharge circuit K7 additionally includes capacitor C6 and diode D2 compared to the automatic discharge circuit K6, which is in Fig. 30A is shown.

[0164] Capacitor C6 has two terminals: tC61 and tR22. Diode D2 has two terminals: tC61, tD21 (the cathode), tD21 (the source), U3s (the source), and U4g (the gate). Terminal tC62 is electrically connected to ground. Anode tD22 and terminal tR232 are electrically connected.

[0165] In a diagram in Fig. Figure 32 shows the input voltage Vin of the voltage generation circuit 1, the output voltage Vout of the voltage generation circuit 1 without the automatic discharge circuit K7 and the output voltage Vout of the voltage generation circuit 1 with the automatic discharge circuit K7 in time series.

[0166] In the voltage generation circuit 1 with the automatic discharge circuit K7 in Fig. 31. The transistor U4 can be influenced by the effect of the capacitor C6 in comparison to the voltage generation circuit 1 with the automatic discharge circuit K6. Fig. The 30A current can remain switched on for a specific period of time. Accordingly, in voltage generation circuit 1 with automatic discharge circuit K7, the output voltage Vout can easily be set to a value close to 0 V, thereby improving the accuracy of generating the output voltage Vout when the power supply is interrupted. <Anwendung auf eine Vorspannungsversorgungsschaltung>

[0167] Next, the application of the voltage generation circuit 1 to the bias supply circuit K2 will be described.

[0168] Fig. 26A to Fig. 30A and Fig. Figure 31 shows that various reset and discharge circuits are provided in voltage generation circuit 1 with voltage divider circuit K0. It is shown below that various reset and discharge circuits are provided in voltage generation circuit 1 with bias supply circuit K2, i.e., voltage generation circuit 1B.

[0169] A case in which the voltage generation circuit 1B includes the microcomputer-controlled reset circuit K3 is described with reference to Fig. 33 described.

[0170] Fig. Figure 33 is a diagram showing a configuration of the voltage generation circuit 1B. Fig. 33 are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified.

[0171] The bias supply circuit K2 can have the same configuration as the bias supply circuit K2 described in Fig. Figure 8 shows, or they may have a different configuration. The bias supply circuit K2 in Fig. 33 has the configuration of the bias supply circuit K2, which is in Fig. Figure 8 shows the circuit, and additionally includes a Schottky barrier diode D3 and a resistor R25. The Schottky barrier diode D3 has a cathode terminal tD31 and an anode terminal tD32. The resistor R25 has a terminal tR251 and a terminal tR252. The cathode terminal tD31, terminal tR91, point Noise2, terminal tC72, and the source terminal U1s are electrically connected. The anode terminal tD32 is electrically connected to a ground terminal. The terminal tR251, terminal tR102, output terminal IC12out, and voltage output terminal Vout are electrically connected. The terminal tR252 and the inverting input terminal IC1- are electrically connected.

[0172] The same effect as in the case where the voltage generation circuit 1 includes the microcomputer-controlled reset circuit K3 can also be achieved in the case where the voltage generation circuit 1B includes the microcomputer-controlled reset circuit K3.

[0173] Likewise, the same effect as in the case where the voltage generation circuit 1 includes the automatic reset circuit K4 can also be achieved in a case where the voltage generation circuit 1B includes the automatic reset circuit K4.

[0174] Next, a case is described in which the voltage generation circuit 1B includes the microcomputer-controlled discharge circuit K5.

[0175] The case in which the voltage generation circuit 1B includes the microcomputer-controlled discharge circuit K5 is described with reference to Fig. 34 described. Fig. Figure 34 is a diagram showing a configuration of the voltage generation circuit 1B. Fig. 34 are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified.

[0176] In the microcomputer-controlled discharge circuit K5 in Fig. Figure 34 shows the positions of transistor U2 and resistor R18 in comparison to the microcomputer-controlled discharge circuit K5 in Fig. 29A in reverse. Terminal tR181 is electrically connected to terminal tR41, the voltage input terminal Vin, and the like. Terminal tR182 is electrically connected to the drain terminal U2d. The source terminal U2s is electrically connected to ground potential.

[0177] The same effect as in the case where the voltage generation circuit 1 includes the microcomputer-controlled discharge circuit K5 can also be achieved in the case where the voltage generation circuit 1B includes the microcomputer-controlled discharge circuit K5.

[0178] Next, a case is described in which the voltage generation circuit 1B includes the microcomputer-controlled discharge circuit K5A. The microcomputer-controlled discharge circuit K5A is a modification of the microcomputer-controlled discharge circuit K5.

[0179] The case in which the voltage generation circuit 1B includes the microcomputer-controlled discharge circuit K5A is described with reference to Fig. 35 described. Fig. Figure 35 is a diagram showing a configuration of the voltage generation circuit 1B. Fig. 35 are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference numerals, and their description is omitted or simplified.

[0180] The microcomputer-controlled discharge circuit K5A in Fig. 35 differs from the microcomputer-controlled discharge circuit K5 in Fig. 34 through a connection target of the terminal tR181. The terminal tR181 is electrically connected to the voltage output terminal Vout, the terminal tR102, the output terminal IC2out, the inverting input terminal IC1- and the like.

[0181] The voltage generation circuit 1B with the microcomputer-controlled discharge circuit K5A, which is in Fig. Figure 35 shows the same effect as the voltage generation circuit 1B with the microcomputer-controlled discharge circuit K5, which is shown in Fig. 34 is shown.

[0182] Next, a case is described in which the voltage generation circuit 1B includes an automatic discharge circuit K7A. The automatic discharge circuit K7A is a modification of the automatic discharge circuit K7.

[0183] Subsequently, a case in which the voltage generation circuit 1B includes the automatic discharge circuit K7A is described with reference to Fig. 36 described. Fig. Figure 36 is a diagram showing a configuration of the voltage generation circuit 1B. Fig. 36 are the same components as those of the voltage generating circuit 1 shown in other drawings, designated with the same reference symbols, and their description is omitted or simplified.

[0184] The automatic discharge circuit K7A in Fig. 36 differs from the automatic discharge circuit K7 in Fig. 31 through a connection target of terminal tR211, terminal tR231 and source terminal U4s. In particular, terminal tR211, terminal tR231, source terminal U4s, terminal tR41 and voltage input terminal Vin are electrically connected to each other.

[0185] The same effect as in the case where voltage generation circuit 1 includes automatic discharge circuit K7 can also be achieved in the case where voltage generation circuit 1B includes automatic discharge circuit K7A. Automatic discharge circuit K7A is not connected to operational amplifier IC2. If automatic discharge circuit K7A is connected to an output terminal of operational amplifier IC2, when the electrical charge remaining in capacitor C2 is discharged, the electrical charge flows to ground via an input terminal and the output terminal of operational amplifier IC2. That is, since the input and output terminals of operational amplifier IC2 are short-circuited, a load can be applied to operational amplifier IC2.On the other hand, in the present embodiment, since the automatic discharge circuit K7A is not connected to the operational amplifier IC2, the operational amplifier IC2 cannot supply a discharge current. Accordingly, the load on the operational amplifier IC2 can be reduced.

[0186] Next, a case is described in which the voltage generation circuit 1B includes an automatic discharge circuit K7B. The automatic discharge circuit K7B is a modification of the automatic discharge circuit K7.

[0187] Subsequently, a case in which the voltage generation circuit 1B includes the automatic discharge circuit K7B is described with reference to Fig. 37 described. Fig. Figure 37 is a diagram showing a configuration of the voltage generation circuit 1B. Fig. 37 are the same components as those of the voltage generation circuit 1 shown in other drawings, designated with the same reference numerals, and their description is omitted or simplified.

[0188] The automatic discharge circuit K7B in Fig. 37 differs from the automatic discharge circuit K7 in Fig. 31 through a connection target of the terminal tR211, the terminal tR231 and the source terminal U4s. In particular, the terminal tR211, the terminal tR231, the source terminal U4s, the voltage output terminal Vout, the terminal tR102, the output terminal IC2out and the inverting input terminal IC1- are electrically connected to each other.

[0189] The same effect as in the case where the voltage generation circuit 1 includes the automatic discharge circuit K7 can also be achieved in the case where the voltage generation circuit 1B includes the automatic discharge circuit K7B.

[0190] Next, the case in which the voltage generation circuit 1B includes the automatic discharge circuit K7A and the case in which the voltage generation circuit 1B includes the automatic discharge circuit K7B are described in comparison.

[0191] Fig. Figure 38 is a diagram showing the input voltages Vin in the case where the voltage generating circuit 1B includes the automatic discharge circuit K7A, and the input voltages Vin in the case where the voltage generating circuit 1B includes the automatic discharge circuit K7B. Fig. Figure 39 is a diagram showing the output voltage Vout in the case where the voltage generating circuit 1B includes the automatic discharge circuit K7A, the output voltage Vout in the case where the voltage generating circuit 1B includes the automatic discharge circuit K7B, and the output voltage Vout in the case where the voltage generating circuit 1B does not include the automatic discharge circuit.

[0192] As in Fig. As shown in 38, the input voltage Vin can assume a negative value when the voltage generation circuit 1B connects to the automatic discharge circuit K7A. Fig. 36. Furthermore, the output voltage Vout can reach 0 V or less, as in Fig. 39 shown.

[0193] The automatic discharge circuit K7A in Fig. 36 is connected to the voltage input terminal Vin. If the voltage generation circuit 1B includes the automatic discharge circuit K7A, as shown in Fig. Figure 39 shows the shortest time required for the output voltage Vout to reach 0 V. Furthermore, it is less likely that the load will be applied to operational amplifier IC2.

[0194] The automatic discharge circuit K7B in Fig. Terminal 37 is connected to the voltage output terminal Vout. If the voltage generating circuit 1B includes the automatic discharge circuit K7B, it is less likely that the input voltage Vin and the output voltage Vout will have negative potentials. Even if the input voltage Vin and the output voltage Vout do have negative potentials, their absolute values ​​are smaller than in the case where the voltage generating circuit 1B includes the automatic discharge circuit K7A. In an example that is in Fig. As shown in Figure 39, the output voltage Vout reaches approximately -0.04 V in the case where the voltage generating circuit 1B includes the automatic discharge circuit K7B. When the voltage generating circuit 1B includes the automatic discharge circuit K7B, the time required for the output voltage Vout to reach 0 V is shorter than when the voltage generating circuit 1B does not include the discharge circuit.

[0195] Although various embodiments are described above with reference to the drawings, it is understood that the present disclosure is not limited to these examples. It is obvious that a person skilled in the art can conceive of various modifications and changes within the scope described in the claims, and it is understood that such modifications and changes naturally fall within the technical scope of the present disclosure. Furthermore, the components of the embodiments mentioned above can be freely combined without deviating from the scope of the invention. (Note)

[0196] The following techniques are disclosed based on the embodiments described above. (Technique 1)

[0197] A voltage generation circuit comprising the following: a voltage input terminal to which an input voltage is applied; a voltage output terminal from which an output voltage is output; a first resistor with a first terminal electrically connected to the voltage input terminal and a second terminal electrically connected to the voltage output terminal; a second resistor with a third terminal, which is electrically connected to the second terminal, and a fourth terminal; a first capacitor that is electrically connected to the first terminal or the second terminal; and a first circuit which is electrically connected to the first terminal or the second terminal and includes a charging circuit which is designed to charge the first capacitor.

[0198] The voltage input terminal is, for example, the voltage input terminal Vin. The voltage output terminal is, for example, the voltage output terminal Vout. The first terminal is, for example, terminal tR11 or terminal tR71. The second terminal is, for example, terminal tR12 or terminal tR72. The first resistor is, for example, resistor R1 or resistor R7. The third terminal is, for example, terminal tR21 or terminal tR81. The fourth terminal is, for example, terminal tR22 or terminal tR82. The second resistor is, for example, resistor R2 or resistor R8. The first capacitor is, for example, capacitor C1 or capacitor C2. The charging circuit is, for example, charging circuit KA. The first circuit is, for example, auxiliary circuit K1.The voltage generation circuit is, for example, voltage generation circuit 1 or voltage generation circuit 1B.

[0199] Accordingly, in the voltage generation circuit, the first capacitor can be quickly charged by the charging circuit. Therefore, the output voltage can be quickly stabilized while simultaneously reducing noise, even when the output voltage is generated using the first capacitor. (Technology 2)

[0200] The voltage generation circuit according to Technique 1, wherein The first circuit includes: a third resistor with a fifth terminal, which is electrically connected to the voltage input terminal, and a sixth terminal; and a fourth resistor with a seventh terminal, which is electrically connected to the sixth terminal, and an eighth terminal, and The charging circuit includes: an operational amplifier with an inverting input terminal electrically connected to the second terminal, a non-inverting input terminal electrically connected to the sixth terminal, and an output terminal; a first transistor with a first control terminal electrically connected to the output terminal, a first non-control terminal electrically connected to the voltage input terminal, and a second non-control terminal; and a fifth resistor with a ninth terminal electrically connected to the second non-control terminal, and a tenth terminal electrically connected to the second terminal.

[0201] The fifth terminal is, for example, terminal tR41. The sixth terminal is, for example, terminal tR42. The third resistor is, for example, resistor R4. The seventh terminal is, for example, terminal tR51. The eighth terminal is, for example, terminal tR52. The fourth resistor is, for example, resistor R5. The inverting input terminal is, for example, the inverting input terminal IC1-. The non-inverting input terminal is, for example, the non-inverting input terminal IC1+. The output terminal is, for example, the output terminal IC1out. The operational amplifier is, for example, operational amplifier IC1. The first control terminal is, for example, the base terminal or the gate terminal U1b. The first non-control terminal is, for example, the collector terminal Q1c or the source terminal U1s.The third non-control terminal is, for example, the emitter terminal Q1e or the drain terminal U1d. The first transistor is, for example, transistor Q1 or transistor U1. The ninth terminal is, for example, terminal tR31. The tenth terminal is, for example, terminal tR32. The fifth resistor is, for example, resistor R3.

[0202] Accordingly, in the voltage generation circuit, a voltage can be applied to the non-inverting input terminal before the output voltage, and the operational amplifier can be operated. Therefore, a charging current can be quickly supplied from the voltage input terminal via the transistor and the fifth resistor, and the first capacitor can be charged quickly. (Technology 3)

[0203] The voltage generation circuit according to Technique 2, in which the operational amplifier compares a non-inverting input voltage applied to the non-inverting input terminal with an inverting input voltage applied to the inverting input terminal, outputs a turn-on voltage from the output terminal to switch on the first transistor when the non-inverting input voltage is less than the inverting input voltage, and outputs a turn-off voltage from the output terminal to turn off the first transistor when the non-inverting input voltage is greater than the inverting input voltage.

[0204] Accordingly, in the voltage generation circuit it is possible to switch between charging the first capacitor by switching on the first transistor and not charging the first capacitor by switching off the first transistor. (Technology 4)

[0205] The voltage generation circuit according to one of techniques 1 to 3, wherein The first circuit includes a stop circuit designed to stop the operation of the charging circuit.

[0206] Accordingly, in the voltage generation circuit, the operation of the charging circuit can be stopped by the stop circuit. (Technology 5)

[0207] The voltage generation circuit according to Technique 4, in which The stop circuit includes: a sixth resistor with an eleventh terminal, which is electrically connected to the sixth terminal, and a twelfth terminal; and a second transistor with a second control terminal electrically connected to the output terminal, a third non-control terminal, and a fourth non-control terminal electrically connected to the twelfth terminal, and The second transistor is switched on when the switch-off voltage is applied to the second control terminal.

[0208] The eleventh connection is, for example, connection tR61. The twelfth connection is, for example, connection tR62. The sixth resistor is, for example, resistor R6. The second control connection is, for example, the base connection Q2b or the gate connection U2g. The third non-control connection is, for example, the collector connection Q2c or the source connection U2s. The fourth non-control connection is the emitter connection Q2e or the drain connection U2d. The second transistor is, for example, transistor Q2 or transistor U2.

[0209] Accordingly, in the voltage generation circuit, the operational amplifier outputs the turn-off voltage when the output voltage exceeds the voltage at the non-inverting input terminal, thus turning on the second transistor. Therefore, a state in which the output voltage is greater than the voltage at the non-inverting input terminal is maintained. Consequently, even if, for example, the input voltage fluctuates, the charging circuit can be prevented from operating. (Technology 6)

[0210] The voltage generation circuit according to one of techniques 2 to 5, in which The first circuit includes a diode with a cathode terminal and an anode terminal, the cathode terminal is electrically connected to the voltage input terminal and The anode terminal is electrically connected to the inverting input terminal.

[0211] The cathode terminal is, for example, the cathode terminal tD11. The anode terminal is, for example, the anode terminal tD12. The diode is, for example, the Schottky barrier diode D1.

[0212] Accordingly, in the voltage generation circuit, a backflow through the Schottky barrier diode D1 can be prevented, and the operational amplifier can be protected from failure even if the input voltage is quickly removed, i.e., set to a low voltage. (Technology 7)

[0213] The voltage generation circuit according to one of techniques 2 to 6, in which the first circuit includes a reset circuit and As soon as the input voltage is removed from the voltage input terminal, the reset circuit supplies a voltage to the non-inverting input terminal to make the voltage at the non-inverting input terminal greater than the output voltage.

[0214] The reset circuit is, for example, the microcomputer-controlled reset circuit K3 or the automatic reset circuit K4.

[0215] Accordingly, in the voltage generation circuit, even if, for example, the output voltage becomes greater than the voltage at the non-inverting input terminal when the power supply is interrupted, a state can be established in which the voltage at the non-inverting input terminal is greater than the output voltage, and the operational amplifier can be operated to output the turn-on voltage. Therefore, when the power supply is switched back on, the charging circuit in the voltage generation circuit can be started quickly, allowing the output voltage to stabilize rapidly. (Technology 8)

[0216] The voltage generation circuit according to one of techniques 2 to 6, in which the first circuit includes a discharge circuit and, As soon as the input voltage is removed from the voltage input terminal, the discharge circuit discharges an electrical charge stored in the first capacitor to make the voltage at the non-inverting input terminal greater than the output voltage.

[0217] The discharge circuit is, for example, the microcomputer-controlled discharge circuit K5, the automatic discharge circuit K6, or the automatic discharge circuit K7.

[0218] Accordingly, in the voltage generation circuit, even if, for example, the output voltage becomes greater than the voltage at the non-inverting input terminal when the power supply is interrupted, a state can be established in which the voltage at the non-inverting input terminal is greater than the output voltage, and the operational amplifier can be operated to output the turn-on voltage. Therefore, when the power supply is switched back on, the charging circuit in the voltage generation circuit can be started quickly, allowing the output voltage to stabilize rapidly. (Technology 9)

[0219] The voltage generation circuit according to one of techniques 1 to 8, in which the first capacitor and the first circuit are electrically connected to the first terminal.

[0220] Accordingly, in the voltage generation circuit, the output voltage can be quickly stabilized while simultaneously reducing noise, even when the output voltage is generated using the first capacitor, which is electrically connected to the first terminal. Here, for example, the first terminal is terminal tR71 and the first capacitor is capacitor C2. (Technology 10)

[0221] The voltage generation circuit according to one of techniques 1 to 8, in which the first capacitor and the first circuit are electrically connected to the second terminal.

[0222] Accordingly, in the voltage generation circuit, the output voltage can be quickly stabilized while simultaneously reducing noise, even when the output voltage is generated using the first capacitor, which is electrically connected to the second terminal. Here, for example, the second terminal is tR12 and the first capacitor is capacitor C1. INDUSTRIAL APPLICABILITY

[0223] The present disclosure is useful, for example, as a voltage generation circuit in which an output voltage can be quickly stabilized while simultaneously reducing noise, even when the output voltage is generated using a capacitor. REFERENCE TO RELATED REGISTRATIONS

[0224] This application is based on Japanese patent application No. 2024-157809, filed on September 11, 2024, and claims priority under 35 USC 119, the contents of which are hereby incorporated by reference. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JPH01-200708A

[0003] JP 2024-157809

[0224]

Claims

[1] Voltage generation circuit comprising the following: a voltage input terminal to which an input voltage is applied; a voltage output terminal from which an output voltage is output; a first resistor with a first terminal electrically connected to the voltage input terminal and a second terminal electrically connected to the voltage output terminal; a second resistor with a third terminal, which is electrically connected to the second terminal, and a fourth terminal; a first capacitor that is electrically connected to the first terminal or the second terminal; and a first circuit which is electrically connected to the first terminal or the second terminal and includes a charging circuit which is designed to charge the first capacitor. [2] Voltage generation circuit according to claim 1, wherein The first circuit includes: a third resistor with a fifth terminal, which is electrically connected to the voltage input terminal, and a sixth terminal; and a fourth resistor with a seventh terminal, which is electrically connected to the sixth terminal, and an eighth terminal, and The charging circuit includes: an operational amplifier with an inverting input terminal electrically connected to the second terminal, a non-inverting input terminal electrically connected to the sixth terminal, and an output terminal; a first transistor with a first control terminal electrically connected to the output terminal, a first non-control terminal electrically connected to the voltage input terminal, and a second non-control terminal; and a fifth resistor with a ninth terminal electrically connected to the second non-control terminal, and a tenth terminal electrically connected to the second terminal. [3] Voltage generation circuit according to claim 2, wherein the operational amplifier compares a non-inverting input voltage applied to the non-inverting input terminal with an inverting input voltage applied to the inverting input terminal, outputs a turn-on voltage from the output terminal to switch on the first transistor when the non-inverting input voltage is less than the inverting input voltage, and outputs a turn-off voltage from the output terminal to turn off the first transistor when the non-inverting input voltage is greater than the inverting input voltage. [4] Voltage generation circuit according to claim 3, wherein the first circuit comprises a stop circuit configured to stop operation of the charging circuit. [5] Voltage generation circuit according to claim 4, wherein The stop circuit includes: a sixth resistor with an eleventh terminal, which is electrically connected to the sixth terminal, and a twelfth terminal; and a second transistor with a second control terminal electrically connected to the output terminal, a third non-control terminal, and a fourth non-control terminal electrically connected to the twelfth terminal, and The second transistor is switched on when the switch-off voltage is applied to the second control terminal. [6] Voltage generation circuit according to claim 2, wherein The first circuit includes a diode with a cathode terminal and an anode terminal, the cathode terminal is electrically connected to the voltage input terminal and The anode terminal is electrically connected to the inverting input terminal. [7] Voltage generation circuit according to claim 2 or 3, wherein the first circuit includes a reset circuit and As soon as the input voltage is removed from the voltage input terminal, the reset circuit supplies a voltage to the non-inverting input terminal to make the voltage at the non-inverting input terminal greater than the output voltage. [8] Voltage generation circuit according to claim 2 or 3, wherein the first circuit includes a discharge circuit and, As soon as the input voltage is removed at the voltage input terminal, the discharge circuit discharges an electrical charge stored in the first capacitor to make the voltage at the non-inverting input terminal greater than the output voltage. [9] Voltage generating circuit according to claim 1 or 2, wherein the first capacitor and the first circuit are electrically connected to the first terminal. [10] Voltage generation circuit according to claim 1 or 2, wherein the first capacitor and the first circuit are electrically connected to the second terminal. [11] Voltage generation circuit according to claim 7, wherein the reset circuit is a microcomputer-controlled reset circuit that performs a reset based on a control signal from a microcomputer, or an automatic reset circuit that performs a reset by an action of the circuit. [12] Voltage generation circuit according to claim 8, wherein the discharge circuit is a microcomputer-controlled discharge or an automatic discharge circuit. [13] Voltage generation circuit according to claim 8, wherein the discharge circuit is connected to the voltage input terminal or the voltage output terminal. [14] Voltage generation circuit according to claim 2, further comprising: an operational amplifier connection protection circuit that protects the connections of the operational amplifier, wherein The operational amplifier connection protection circuit includes a cathode connection and an anode connection. The cathode terminal is electrically connected to the sixth terminal and the first non-control terminal and The anode terminal is electrically connected to the inverting input terminal and the tenth terminal.

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