Elastic wave device

Abstract

To provide a novel structure of preventing effectively connection failure or disconnection of a wire of a circuit in an elastic wave device.SOLUTION: A wire 8 includes a first part 80 that is electrically connected to a first element 70, which is one of a plurality of functional elements 7, and that has the same thickness as this, and a second part 81 that is electrically connected to a second element 71, which is another one of the plurality of functional elements 7, and that has the same thickness as this. Both a first end part 80a of the first part 80 that needs to be connected to the second part 81 and a second end part 81a of the second part 81 that needs to be connected to the first part 80 are present between a functional surface 3a of a device chip 3 and a bump 10a.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an improvement in an acoustic wave device suitable for use as a duplexer in a mobile communication device or the like. [Background technology]

[0002] Acoustic wave devices used as duplexers in mobile communication devices and the like include those in wafer level packages (WLP) and those in chip size packages (CSP). In either package format, the acoustic wave device has a hermetically sealed internal space, and one side of the device chip facing this internal space is provided with a pattern including multiple functional elements, including IDT electrodes, and wiring, formed by film deposition.

[0003] Here, when the pattern is formed in a plurality of separate steps on one surface 100 of the device chip by vacuum deposition, it becomes necessary to connect the pattern formed in advance to the pattern formed in succession. As shown in Figure 11, when a bonding metal film 102 is formed by vacuum deposition on a part of one of two adjacent wirings 101 and a part of the other of the two wirings 101 with a gap S therebetween, there is a considerable chance that a crack C continuing into the gap S will be generated in the bonding metal film 102 during the metal deposition process. On the other hand, as shown in Figure 12, even when the subsequent wiring 101 is deposited by vacuum deposition so that a portion of the subsequently deposited wiring 101 overlaps a portion of the previously deposited wiring 101, there is a considerable chance that a crack C will be generated in the subsequent wiring 101, originating from the point where the side 103, which is the thickness of the previously deposited wiring 101, meets one surface 100 of the device chip. Such a crack C may cause a connection failure or a disconnection in the circuit formed by the pattern. Summary of the Invention [Problem to be solved by the invention]

[0004] A main problem to be solved by the present invention is to provide a new structure that effectively prevents the above-mentioned poor connection or disconnection in a circuit that constitutes this type of acoustic wave device. [Means for solving the problem]

[0005] In order to achieve the above object, the present invention provides an acoustic wave device comprising: a device chip having a pattern including a plurality of functional elements and wiring, each of which includes at least an IDT electrode, formed on one surface by film deposition; a bump formed in a protruding shape on the one surface of the device chip, The wiring has a first portion electrically connected to a first element which is one of the plurality of functional elements and has a thickness equal to that of the first element; a second portion electrically connected to a second element which is another one of the plurality of functional elements and has a thickness equal to that of the second element, Both a first end of the first portion that needs to be connected to the second portion, and a second end of the second portion that needs to be connected to the first portion, are positioned between the one surface of the device chip and the bump.

[0006] In one aspect of the present invention, the wiring has a third portion formed on the first end and the second end so as to position both the first end and the second end between the first end and the one surface of the device chip, and the bump is formed on this third portion.

[0007] In one aspect of the present invention, the second end is adjacent to the first end.

[0008] In one aspect of the present invention, at least a portion of the first end portion and at least a portion of the second end portion are overlapped with each other.

[0009] In one aspect of the present invention, the first portion and the second portion have different thicknesses. Effect of the Invention

[0010] According to the acoustic wave device of the present invention, electrical connection between the first end and the second end can be ensured through the bump, making it possible to effectively prevent the above-mentioned poor connection or breakage in the circuit that constitutes this type of acoustic wave device. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a cross-sectional configuration diagram of an acoustic wave device (first example) according to an embodiment of the present invention, showing the first example in cross section taken along line BB in FIG. [Diagram 2] FIG. 2 is a cross-sectional view of the first example, showing the cross section of the first example taken along line AA in FIG. [Diagram 3] FIG. 3 is an enlarged configuration diagram of a main part of FIG. [Figure 4] FIG. 4 is an enlarged view of the main part of FIG. [Diagram 5] FIG. 5 is a configuration diagram showing an example of a circuit formed on the device chip constituting the first example. [Figure 6] FIG. 6 is a configuration diagram showing an example of a resonator formed in the device chip constituting the first example. [Figure 7] FIG. 7 is a cross-sectional view of a main part of a partial modification (second example) of the first example. [Figure 8] FIG. 8 is a cross-sectional view of a main part of a partial modification (third example) of the first example. [Figure 9]FIG. 9 is a diagram showing the essential configuration of two functional elements formed on a device chip constituting the third example, and their wiring and bonding bumps, for ease of understanding the third example. [Figure 10] FIG. 10 is a cross-sectional view showing a configuration of a main part of an acoustic wave device in a package type different from that of the first example. [Figure 11] FIG. 11 is a cross-sectional view showing a configuration of a main part of a conventional acoustic wave device. [Figure 12] FIG. 12 is a cross-sectional view showing a configuration of a main part of a conventional acoustic wave device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, exemplary embodiments of the present invention will be described with reference to Figures 1 to 10. An acoustic wave device 1 according to this embodiment is suitable for use as a duplexer in a mobile communication device or the like.

[0013] 1 to 9 show first to third examples in which the present invention is applied to an acoustic wave device in a chip size package (CSP / Chip Size Package).

[0014] Such an acoustic wave device 1 includes a device chip 3 mounted on one surface 2a of a package substrate 2, with a functional surface 3a on which a functional element 7 including an IDT electrode 7b, typically a resonator 7a, facing the package substrate 2.

[0015] Typically, the device chip 3 is configured to have a rectangular plate shape with a side of 0.5 to 1 mm and a thickness of 0.15 to 0.2 mm. The package substrate 2 is configured to have a rectangular plate shape with a side of 0.7 to 3 mm and a thickness of 0.15 to 0.2 mm. The acoustic wave device 1 has a thickness of about 0.4 to 0.6 mm.

[0016] Its cross-sectional structure is shown in Figures 1 and 2. In the figures, reference numeral 3 denotes a device chip, reference numeral 3a denotes a functional surface on which the functional element 7 is formed, reference numeral 3b denotes a non-functional surface opposite to the functional surface 3a, reference numeral 7a denotes a resonator, and reference numeral 9 denotes an external output terminal which is the end of wiring 8 (see Figure 5) formed on the functional surface 3a. Between the device chip 3 and the package substrate 2, there is interposed a bump 10 (protruding electrode) made of a conductive metal that electrically connects the external output terminal 9 and the wiring 2c formed on the package substrate 2 side, and a gap 5 equivalent to the height of this bump 10 is formed. On the other surface 2b of the package substrate 2 opposite to the surface 2a on which the device chip 3 is mounted, external connection terminals 2d are formed for connecting the acoustic wave device 1 to a module substrate (not shown) or the like.

[0017] The package substrate 2 has a rectangular plate shape when viewed in a direction perpendicular to one surface 2a, and the device chip 3 has a rectangular plate shape with an area smaller than that of the package substrate 2 when viewed in a direction perpendicular to its functional surface 3a. The device chip 3 is mounted on the package substrate 2 so that a gap is formed between the outer edge 3d of the device chip 3 (where the functional surface 3a of the device chip 3 and the side surface 3e meet) and the outer edge 2e of the package substrate 2 (where one surface 2a of the package substrate 2 and the side surface on the thickness side meet) at any position in the direction circumferentially around the center of the device chip 3.

[0018] In this manner, after the device chip 3 is mounted on the surface 2a of the package substrate 2, a sealing portion 4 is formed on the surface 2a of the package substrate 2. The sealing portion 4 is typically made of an insulating synthetic resin. The sealing portion 4 has a horizontal portion 4a covering the non-functional surface 3b of the device chip 3 facing the functional surface 3a of the device chip 3, and a vertical portion 4b that follows the horizontal portion 4a, covers the side surface 3e which is the thickness of the device chip 3 between the functional surface 3a and the non-functional surface 3b, and reaches the one surface 2a of the package substrate 2, thereby forming an internal space 6 (hollow structure or air cavity) between the functional surface 3a of the device chip 3 and the one surface 2a of the package substrate 2. The vertical portion 4a of the sealing portion 4 hermetically seals the gap 5 around the entire circumference of the device chip 3, thereby forming the internal space 6 between the functional surface 3a of the device chip 3 and one surface 2a of the package substrate 2. In the illustrated example, the sealing portion 4 thus formed gives the acoustic wave device 1 a hexahedral appearance.

[0019] The device chip 3 is provided with a functional element 7 including an IDT electrode 7b, a resonator 7a in the illustrated example, on the portion of the functional surface 3a facing the internal space 6.

[0020] The device chip 3 has a function of propagating elastic waves. A piezoelectric material such as lithium tantalate or lithium niobate is typically used for the device chip 3. The device chip 3 may also be configured by laminating the piezoelectric material on a support such as sapphire, silicon, alumina, spinel, quartz, or glass.

[0021] 5 shows the concept of an example of a circuit 11 provided on one device chip 3. Reference numeral 11a denotes a transmitting filter, reference numeral 11b denotes a receiving filter, reference numeral 9 denotes an external connection terminal, reference numeral 7aa denotes a resonator 7a connected in series between the external connection terminals 9, reference numeral 7ab denotes a resonator 7a connected in parallel between the external connection terminals 9, reference numeral 12 denotes a ground, and reference numeral 8 denotes a wiring. The number and arrangement of the resonators 7a may be changed as necessary.

[0022] 6 shows an example of a resonator 7a constituting a duplexer. The resonator 7a has an IDT electrode 7b and a reflector 7c formed to sandwich the IDT electrode 7b. The IDT electrode 7b is composed of an electrode pair, and each electrode pair is formed by connecting a plurality of electrode fingers 7d arranged in parallel so that their length direction crosses the propagation direction x of the elastic wave with one end side of the electrode fingers by a bus bar 7e. The reflector 7c is formed by connecting ends of a plurality of electrode fingers 7f arranged in parallel so that their length direction crosses the propagation direction x of the elastic wave with a bus bar 7g.

[0023] The pattern including the functional element 7 and the wiring 8 is made of a conductive metal and is formed by photolithography.

[0024] In this embodiment, the wiring 8 includes a first portion 80 that is electrically connected to a first element 70 that is one of the multiple functional elements 7 and has the same thickness as the first element 70, and a second portion 81 that is electrically connected to a second element 71 that is another one of the multiple functional elements 7 and has the same thickness as the second element 71.

[0025] In the illustrated example, the first element 70 and the second element 71 are adjacent to each other on the center side of the device chip 3. In a region between the first element 70 and the second element 71, the first portion 80 and the second portion 81 of the wiring 8 are connected to the first element 70 and the second element 71, respectively. In addition, both the first portion 80 and the second portion 81 extend from the region toward the outer edge 3d of the device chip 3 located below in FIG. 1, and these extending ends are referred to as a first end portion 80a and a second end portion 81a described below.

[0026] It should be noted that the number of first elements 70 and second elements is not limited to 1. When there are two or more first elements 70 on one device chip 3, there will also be two or more second elements 71 on one device chip 3, and thus there will be a plurality of pairs of first elements 70 and second elements 71 on one device chip 3.

[0027] In the illustrated example, the film thickness of the first portion 80 and the film thickness of the second portion 81 are different. In the illustrated example, the first portion 80 and the first element 70 have the same thickness and are formed simultaneously, and the second portion 81 and the second element 71 have the same thickness and are formed simultaneously. Moreover, the thickness of the second portion 81 is larger (thicker) than the thickness of the first portion 80. The first portion 80 and the second portion 81 are formed by vacuum deposition or the like.

[0028] As shown in FIG. 2, the device chip 3 is integrated with the package substrate 2 by connecting a terminal 2g connected to wiring 2c on the package substrate 2 side formed on one surface 2a of the package substrate 2 and an external connection terminal 9 formed on the functional surface 3a of the device chip 3 via the bump 10. Additionally, in this embodiment, the acoustic wave device 1 includes a bump (hereinafter, referred to as a bonding bump 10a) that is used to electrically connect the first portion 80 and the second portion 81. The bonding bumps 10a are formed on the functional surface 3a of the device chip 3 in a protruding shape.

[0029] The bonding bump 10a is formed on the functional surface 3a of the device chip 3 so that both a first end 80a, which needs to be connected to the second portion 81 in the first portion 80, and a second end 81a, which needs to be connected to the first portion 80 in the second portion 81, are positioned between the functional surface 3a of the device chip 3 and the bonding bump 10a. That is, when viewed from a direction perpendicular to the functional surface 3a of the device chip 3, both the first end 80a and the second end 81a are positioned directly below the end 10aa of the bonding bump 10a that is fixed to the device chip 3 side (see FIGS. 3, 4, 7, 8, and 9).

[0030] (Example 1) 1 to 6, the second end 81a is adjacent to the first end 80a, but they are not in contact with each other. A gap S is formed between the first end 80a and the second end 81a in a direction parallel to the functional surface 3a of the device chip 3. In the first example, the wiring 8 includes a third portion 82 for bonding formed on the first end 80a and the second end 81a so as to position both the first end 80a and the second end 81a between the functional surface 3a of the device chip 3. The third portion 82 functions as a bump pad for the bonding bump 10a, and in the illustrated example, is formed only in a position directly below the bonding bump 10a. Then, the bonding bump 10a is formed on the third portion 82 as described above. In the illustrated example, the third portion 82 is formed on the first end portion 80a and the second end portion 81a after the first portion 80 and the second portion 81 are formed. In the illustrated example, the third portion 82 has a larger (thicker) film thickness than both the first portion 80 and the second portion 81. When the third portion 82 is formed by vacuum deposition, as shown in Fig. 3, there is a considerable chance that a crack C continuing to the gap S will be generated in the third portion 82 during the metal deposition process. When such a crack C occurs, a reliable electrical connection between the first end 80a and the second end 81a cannot be achieved even if the third portion 82 is formed as described above. In the first example, the bonding bump 10a is formed on the functional surface 3a of the device chip 3 such that both the first end 80a and the second end 81a are positioned with the third portion 82 interposed between the bonding bump 10a and the functional surface 3a of the device chip 3. Specifically, the bonding bump 10a is formed on the third portion 82 such that a first end 80a is located between a portion on one side of the central axis 10ab and the functional surface 3a of the device chip 3, and a second end 81a is located between a portion on the other side of the central axis 10ab and the functional surface 3a of the device chip 3. The first end 80a is located on one side (the left side in FIG. 3) of the central axis 10ab, and a third portion 82 is formed on the first end 80a, and one side of the central axis 10ab of the end 10aa on the device chip 3 side of the bonding bump 10a is fixed to the third portion 82 on the first end 80a. In addition, a second end 81a is positioned on the other side (the right side in Figure 3) of the central axis 10ab, and a third portion 82 is also formed on this second end 81a, and the other side of the central axis 10ab of the end 10aa on the device chip 3 side of the bonding bump 10a is fixed to the third portion 82 on the second end 81a. After the third portion 82 is formed, the bonding bump 10a is provided on the device chip 3 by fixing its end 10aa on the device chip 3 side to the third portion 82 by a known method. As a result, even if the above-mentioned crack C occurs in the third portion 82, the bonding bump 10a can be reliably electrically connected to the third portion 82 on the first end 80a side sandwiching the crack C between the first end 80a and the third portion 82 on the second end 81a side sandwiching the crack C between the second end 81a and the bonding bump 10a, and therefore the first end 80a and the second end 81a are reliably electrically connected via the bonding bump 10a. In the illustrated example, the end 10ac of the bonding bump 10a located on the package substrate 2 side is fixed to a terminal 2f formed on one surface 2a of the package substrate 2 by a known method (see FIG. 2). Although not illustrated, the end 10ac of the bonding bump 10a located on the package substrate 2 side may be in contact with the one surface 2a of the package substrate 2 without being fixed thereto. Also, a gap may be formed between the end 10ac of the bonding bump 10a located on the package substrate 2 side and the one surface 2a of the package substrate 2.

[0031] (Example 2) 7, the second end 81a is adjacent to the first end 80a, but they are not in contact with each other. A gap S is formed between the first end 80a and the second end 81a in a direction parallel to the functional surface 3a of the device chip 3. The second example does not include the third portion 82. The other configurations of the second example are substantially the same as those of the first example, and therefore a description thereof will be omitted. In this second example, the bonding bump 10a is formed on the device chip 3 such that a first end 80a is positioned between one side of the central axis 10ab and the functional surface 3a of the device chip 3, and a second end 81a is positioned between the other side of the central axis 10ab and the functional surface 3a of the device chip 3. Specifically, the bonding bump 10a has one portion of the end 10aa of the bonding bump 10a on the device chip 3 side, sandwiched between the central axis 10ab, fixed to a first end 80a located on one side (left side in FIG. 7) of the central axis 10ab, and the other portion of the end 10aa of the bonding bump 10a on the device chip 3 side, sandwiched between the central axis 10ab, fixed to a second end 81a located on the other side (right side in FIG. 7) of the central axis 10ab. After the first portion 80 and the second portion 81 are formed, the bonding bump 10a is provided on the device chip 3 by fixing its end 10aa on the device chip 3 side to the first portion 80 and the second portion 81 by a known method. This ensures that the first end 80a and the second end 81a are electrically connected to each other via the bonding bump 10a even if the first end 80a and the second end 81a are not in contact with each other.

[0032] (Example 3) 8 and 9, the wiring 8 is formed so that at least a part of the first end 80a and at least a part of the second end 81a overlap each other. The remaining configuration of the third example is substantially the same as that of the first example, and therefore a description thereof will be omitted. In the illustrated example, the first portion 80 and the second portion 81 are formed such that the left edge portion in FIG. 8 of the second end portion 81a of the second portion 81, which has a thickness larger than that of the first portion 80, is stacked on the right edge portion in FIG. 8 of the first end portion 80a of the first portion 80. In addition, in the third example, the wiring 8 has a third portion 82 formed on the first end 80a and the second end 81a so as to position both the first end 80a and the second end 81a between the functional surface 3a of the device chip 3. Then, the bonding bump 10a is formed on the third portion 82 as described above. In the illustrated example, the third portion 82 is formed on the first end portion 80a and the second end portion 81a after the first portion 80 and the second portion 81 are formed. In the illustrated example, the third portion 82 has a larger (thicker) film thickness than both the first portion 80 and the second portion 81. When the second portion 81 is formed by vacuum deposition after the first portion 80 is formed, as shown in Fig. 8, a phenomenon occurs in which a crack C originating from a portion where a side surface 80b, which is the thickness of the first portion 80, contacts a functional surface 3a of the device chip 3 is formed in the second portion 81. When such a crack C occurs in the second portion 81, a phenomenon occurs in which a continuous crack C is formed in the third portion 82. When such a crack C occurs, a reliable electrical connection between the first end portion 80a and the second end portion 81a cannot be realized even if the third portion 82 is formed as described above. In the third example, the bonding bump 10a formed on the third portion 82 is formed so that both the first end 80a and the second end 81a are positioned between the bonding bump 10a and the functional surface 3a of the device chip 3, with the third portion 82 interposed therebetween. Specifically, the bonding bump 10a is formed on the third portion 82 such that a first end 80a is located between a portion on one side of the central axis 10ab and the functional surface 3a of the device chip 3, and a second end 81a is located between a portion on the other side of the central axis 10ab and the functional surface 3a of the device chip 3. The first end 80a is located on one side of the central axis 10ab (the left side in FIG. 8), and a third portion 82 is formed on the first end 80a, and one side of the central axis 10ab of the end 10aa on the device chip 3 side of the bonding bump 10a is fixed to the third portion 82 on the first end 80a. In addition, a second end 81a is positioned on the other side (the right side in Figure 8) of the central axis 10ab, and a third portion 82 is also formed on this second end 81a, and the other side of the central axis 10ab of the end 10aa on the device chip 3 side of the bonding bump 10a is fixed to the third portion 82 on the second end 81a. After the third portion 82 is formed, the bonding bump 10a is provided on the device chip 3 by fixing its end 10aa on the device chip 3 side to the third portion 82 by a known method. As a result, even if the above-mentioned crack C occurs in the third portion 82, the bonding bump 10a can be reliably electrically connected to the third portion 82 on the first end 80a side sandwiching the crack C between the first end 80a and the third portion 82 on the second end 81a side sandwiching the crack C between the second end 81a and the bonding bump 10a, and therefore the first end 80a and the second end 81a are reliably electrically connected via the bonding bump 10a.

[0033] (Example 4) FIG. 10 shows a fourth example in which the present invention is applied to an acoustic wave device 1 in a wafer level package (WLP). 10, reference numeral 3 denotes the device chip 3, reference numeral 3a denotes its functional surface 3a, reference numeral 7 denotes a functional element, reference numeral 6 denotes an internal space, reference numeral 13 denotes a wall layer made of synthetic resin formed on the functional surface 3a so as to surround the functional element 7, and reference numeral 14 denotes a roof layer made of synthetic resin formed on the wall layer 13 and cooperating with the functional surface 3a and the wall layer 13 to form the internal space 6. That is, the fourth example is a laminate of the device chip 3, the wall layer 13, and the roof layer 14, and does not have a package substrate 2 as in the first example. Although not shown in the figures, in the fourth example, the device chip 3 also has a rectangular plate shape, and by laminating a wall layer 13 and a roof layer 14 on its functional surface 3a, it typically has a flat hexahedral shape. In the fourth example, bumps such as bonding bumps 10a protrude from the roof layer 14 side, and the device chip 3 is mounted on a module substrate or the like by using these bumps. Figure 10 shows a cross section of only the formation location of one bonding bump 10a in this fourth example, taken in a direction perpendicular to the functional surface 3a of the device chip 3. Outside the internal space 6, a bottomed hole 15 is formed through the wall layer 13 and the roof layer 14, with the bottom 15a being the functional surface 3a. A first end 80a of a first portion 80 of a wiring 8 connected to a first element 70 and a second end 81a of a second portion 81 of a wiring 8 connected to a second element 71 are adjacent to the bottom 15a with a gap S therebetween. At the same time, a third portion 82 is formed on the first end 80a and the second end 81a so that both the first end 80a and the second end 81a are positioned between the functional surface 3a of the device chip 3. In the fourth example, a bonding bump 10a is formed in the bottomed hole 15 in the same manner as in the first example. One end 10aa of the bonding bump 10a is fixed to the third portion 82, and the other end 10ac is positioned on the outer surface of the roof layer 14. The acoustic wave device 1 of the fourth example can be mounted on a module substrate (not shown) by using the bonding bumps 10a.

[0034] Of course, the present invention is not limited to the above-described embodiments, but includes all embodiments that can achieve the object of the present invention. [Explanation of symbols]

[0035] 1. Acoustic Wave Devices 2 Package substrate 2a one side 2b Other side 2c Wiring 2d External connection terminal 2e Outer edge 2f terminal 3. Device Chip 3a Functional aspect 3b Non-functional aspects 3c side 3d Outer Border 4 Sealing part 4a Horizontal part 4b Vertical part 5. Gap 6. Interior Space 7 Functional elements 7a, 7aa, 7ab resonators 7b IDT electrode 7c reflector 7d electrode finger 7e Busbar 7f electrode finger 7g busbar 70 First element 71 Second element 8 Wiring 80 Part 1 80a 1st end 80b side 81 Part 2 81a Second end 82 Part 3 9 External connection terminal 10. Bump 10a Bonding Bumps 10aa, 10ac end 10ab center axis 11 Circuit 11a Sender Filter 11b Receiver Filter 12 Grand 13 Wall Layer 14 Roof layer 15 Bottomed hole 15a hole bottom S Gap x Propagation direction C Crack

Claims

1. a device chip having a pattern including a plurality of functional elements including at least an IDT electrode and wiring formed on one surface by film deposition; a bump formed in a protruding shape on the one surface of the device chip, The wiring has a first portion electrically connected to a first element which is one of the plurality of functional elements and has a thickness equal to that of the first element; a second portion electrically connected to a second element which is another one of the plurality of functional elements and has a thickness equal to that of the second element, An elastic wave device, wherein both a first end of the first portion that needs to be connected to the second portion, and a second end of the second portion that needs to be connected to the first portion are positioned between the one surface of the device chip and the bump.

2. 2. The acoustic wave device of claim 1, wherein the wiring has a third portion formed on the first end and the second end so as to position both the first end and the second end between the first end and the one surface of the device chip, and the bump is formed on this third portion.

3. The acoustic wave device according to claim 1 , wherein the second end is adjacent to the first end.

4. The acoustic wave device according to claim 1 , wherein at least a portion of the first end and at least a portion of the second end overlap each other.

5. The acoustic wave device according to claim 1 , wherein the first portion and the second portion have different thicknesses.

Images