Electronic device and method for manufacturing the same

JP2025029507APending Publication Date: 2025-03-06DENSO CORP
View PDF 7 Cites 0 Cited by

Patent Information

Application Number
JP2023134230
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-21
Publication Date
2025-03-06

AI Technical Summary

Benefits of technology

【0067】 <効果> 以上のように、電子装置100は、BGA部品20の部品ランド23とマザー基板10の第1基板ランド13(迎えはんだ31a)とが放射状にずれた位置となるように構成されている。そのため、電子装置100は、中心点CPを通るZ方向の仮想直線に対して傾斜した方向にはんだボール32への応力が作用し、マザー基板10とBGA部品20とが位置ずれしにくくなる。よって、電子装置100は、はんだボール32と第1基板ランド13(迎えはんだ31a)との接続信頼性を確保できる。言い換えると、電子装置100は、はんだ接続部30におけるオープン不良やショート不良が抑制される。また、電子装置100は、BGA部品20の回転ずれも抑制できる。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025029507000001_ABST
    Figure 2025029507000001_ABST
Patent Text Reader

Abstract

To provide an electronic device with an ensured connection reliability.SOLUTION: The electronic device is equipped with a mother substrate 10 and a BGA component 20. The BGA component 20 includes a plurality of component lands 23 and a solder ball connected to the component lands 23. The mother substrate 10 has a plurality of first substrate lands 13 to which the solder ball is connected, on an equipment surface side in which the BGA component 20 is equipped. Also, the first substrate lands 13 are provided in a position displaced radially to the component land 23 on the basis of the center point opposed to the center of the BGA component 20.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present disclosure relates to electronic devices and manufacturing methods. [Background technology]

[0002] Patent Document 1 discloses an electronic device in which a surface-mount package on which external connection bumps are formed is mounted on a motherboard. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 8-335647 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in electronic devices, the surface mount package may become misaligned with respect to the motherboard, which may result in a loss of connection reliability between the electrodes of the motherboard and the external connection bumps of the surface mount package.

[0005] One disclosed object is to provide an electronic device with ensured connection reliability. Another disclosed object is to provide a manufacturing method capable of manufacturing an electronic device with ensured connection reliability. [Means for solving the problem]

[0006] The electronic device disclosed herein comprises: An electronic device in which a second circuit component (20) is mounted on a first circuit component (10), the second circuit component includes a plurality of second electrode portions (23) and solder balls (32) connected to the second electrode portions; the first circuit component includes a plurality of first electrode portions (13, 31a) to which solder balls are connected on a mounting surface (SF11) on which the second circuit component is mounted; The first electrode portions are characterized in that they are provided at positions radially shifted from the second electrode portions, with a center point facing the center of the second circuit component as the origin.

[0007] The electronic device is configured such that the second electrode portion of the second circuit component and the first electrode portion of the first circuit component are radially offset from each other. Therefore, in the electronic device, stress acts on the solder balls in a direction inclined with respect to a perpendicular line passing through the center point, making it difficult for the first circuit component and the second circuit component to become misaligned. Therefore, the electronic device can ensure connection reliability between the solder balls and the first electrode portion.

[0008] The manufacturing method disclosed herein comprises: A method for manufacturing an electronic device in which a second circuit component (20) is mounted on a mounting surface (SF11) of a first circuit component (10), comprising the steps of: A preparation step (S10, S11) of preparing a second circuit component having a plurality of second electrode portions and solder balls (32) connected to the second electrode portions; a first electrode portion forming step (S20) of forming a first electrode portion (13, 31a) to which a solder ball is connected on the mounting surface side; a placement step (S23) of placing a second circuit component on the first circuit component after the first electrode portion forming step; a reflow step (S24) of transporting the structure in which the second circuit component is disposed on the first circuit component to a reflow furnace and soldering the solder balls and the first electrode portions, The first electrode portion forming step is characterized in that a plurality of first electrodes are formed at positions radially shifted from the second electrode portion, with a center point opposite to the center of the second circuit component being set as an origin.

[0009] In the manufacturing method, in the first electrode portion forming step, a center point opposite to the center of the second circuit component is set as the origin, and a plurality of first electrode portions are formed at positions radially shifted from the second electrode portion. Therefore, even during transportation, stress acts on the solder ball in a direction inclined with respect to a perpendicular line passing through the center point, and the manufacturing method can suppress misalignment of the second circuit component with respect to the first circuit component. Therefore, the manufacturing method can manufacture an electronic device in which the second circuit component is positioned with respect to the first circuit component. Furthermore, the manufacturing method can manufacture an electronic device in which connection reliability between the solder balls and the first electrode portions is ensured.

[0010] The aspects disclosed in this specification adopt different technical means to achieve their respective objectives. The claims and the parenthetical symbols described in this section are illustrative of the corresponding relationship with the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the following detailed description and the attached drawings. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a plan view showing a schematic configuration of an electronic device. [Diagram 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Diagram 3] FIG. 2 is a plan view showing a schematic configuration of a mother substrate. [Figure 4] FIG. 2 is a plan view showing the surface wiring of the motherboard. [Diagram 5] FIG. 11 is a plan view showing surface wiring of a motherboard of a comparative example. [Figure 6] 1A to 1C are cross-sectional views illustrating steps in the preparation process of a BGA component. [Figure 7] 1A to 1C are cross-sectional views illustrating steps in a method for manufacturing an electronic device. [Figure 8] FIG. 11 is a plan view showing a schematic configuration of a motherboard in Modification 1. [Figure 9] FIG. 11 is a plan view showing a schematic configuration of a motherboard in Modification 2. [Figure 10] FIG. 13 is a plan view showing a schematic configuration of a motherboard in Modification 3. [Figure 11] FIG. 13 is a plan view showing a schematic configuration of a motherboard in Modification 4. [Figure 12] FIG. 13 is a plan view showing a schematic configuration of a motherboard in Modification 5. [Figure 13] FIG. 23 is a plan view showing a schematic configuration of a motherboard in Modification 6. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] In the following, several embodiments for carrying out the present disclosure will be described with reference to the drawings. In each embodiment, the same reference numerals may be used to designate parts corresponding to matters described in the preceding embodiment, and duplicated descriptions may be omitted. In each embodiment, when only a part of the configuration is described, other parts of the configuration may be applied by referring to the other embodiment described earlier. In the following, the three mutually orthogonal directions are referred to as the X direction, the Y direction, and the Z direction.

[0013] (Embodiment) <Configuration of electronic device> An electronic device 100 will be described with reference to Figs. 1 to 7. As shown in Figs. 1, 2, etc., the electronic device 100 includes a motherboard 10, a BGA component 20, and the like. The BGA component 20 is mounted on the motherboard 10. The BGA component 20 is electrically connected to the motherboard 10 via solder connection parts 30. As shown in Fig. 7, an electronic component 40 is mounted on the motherboard 10 in addition to the BGA component 20. In the electronic device 100, the BGA component 20 and the electronic component 40 are stacked on the motherboard 10 in the Z direction. BGA is an abbreviation for Ball Grid Array.

[0014] In the electronic device 100, a motherboard 10, a BGA component 20, and an electronic component 40 are electrically connected to form a circuit. The electronic device 100 can be applied to a control device, etc. In this manner, it can be said that the electronic device 100 includes the motherboard 10, the BGA component 20, and the electronic component 40 as circuit components that form the circuit. In this embodiment, the motherboard 10 corresponds to a first circuit component, the BGA component 20 corresponds to a second circuit component, and the electronic component 40 corresponds to a peripheral circuit component.

[0015] 7 and other figures, electronic component 40 is a circuit component smaller than BGA component 20 and motherboard 10. BGA component 20 is a circuit component smaller than motherboard 10. Note that "small" here refers to a small size at least when viewed from the Z direction.

[0016] <Motherboard configuration> The motherboard 10 will be described with reference to Figs. 1 to 4, 7, etc. The motherboard 10 comprises an electrically insulating base material 11 and a conductive wiring portion provided on the base material 11. The base material 11 is a substrate whose main component is, for example, resin. Therefore, the base material 11 can also be called a resin substrate. The motherboard 10 also comprises a mounting surface SF11 on which the BGA component 20 and the like are mounted, and a surface SF12 opposite the mounting surface SF11. In Fig. 3, the outlines of the BGA component 20 and the component land 23 are indicated by dashed lines. The component land 23 corresponds to a second electrode portion.

[0017] The motherboard 10 has a protective film 12 provided on the mounting surface SF11. The protective film 12 is made of an electrically insulating resin or the like. The protective film 12 covers a part of the base material 11 and a part of the wiring section for the purpose of protecting against adhesion of dust and damage. The protective film 12 is made of, for example, an epoxy resin or the like as a main component.

[0018] The part of the base material 11 is the surface on the mounting surface SF11 side, and is a portion on which the wiring portion is not provided. The part of the wiring portion is a portion of the wiring layer in the wiring portion. The part of the wiring layer is a portion on the mounting surface SF11 side of the wiring layer, and is a portion excluding the board lands 13, 13a described later. In other words, the protective film 12 covers the wiring layer provided on the mounting surface SF11 side so that the board lands 13, 13a are exposed. The symbol SF13 in FIG. 2 etc. indicates the surface of the protective film 12.

[0019] The wiring section includes wiring layers stacked via substrate 11, and interlayer connection section 15 that electrically connects wiring layers of different layers. The wiring layers are provided inside substrate 11 and on the surface of substrate 11. The wiring layers include board lands 13, 13a which are part of the portion exposed on mounting surface SF11. The wiring layers also include surface wiring 14 which is part of the portion exposed on mounting surface SF11. Board lands 13, 13a can also be considered as part of surface wiring 14. The portion of surface wiring 14 other than board lands 13, 13a is covered with protective film 12.

[0020] 7, the motherboard 10 includes a plurality of first substrate lands 13 and a plurality of second substrate lands 13a. The substrate lands 13 and 13a function as electrodes for external connection. The term "for external connection" means that the electrodes are used for connection to a BGA component 20, an electronic component 40, or the like provided outside the motherboard 10.

[0021] 2, the first board land 13 is connected to a BGA component 20. More specifically, the first board land 13 is connected to a component land 23 of the BGA component 20 via a solder connection portion 30. The solder connection portion 30 is formed by joining a solder ball 32 and a receiving solder 31a. Therefore, it can be said that the first board land 13 is connected to the solder ball 32 of the BGA component 20. The first board land 13 can also be said to be a land for the BGA component 20.

[0022] The facing solder 31a is formed on the first substrate land 13. The first substrate land 13 corresponds to at least a part of the first electrode portion. The facing solder 31a can be considered as a part of the first electrode portion. The facing solder 31a will be described in detail later.

[0023] The first board lands 13 are provided corresponding to the solder balls 32 of the BGA component 20, respectively. In other words, the first board lands 13 are provided corresponding to the component lands 23 of the BGA component 20, respectively. Thus, one first board land 13 corresponds to one component land 23. The solder balls 32 are joined to the receiving solder 31a to form the solder connection 30. Therefore, in FIG. 1, the first board land 13 is provided at the location where the solder connection 30 is illustrated.

[0024] In this way, the mother substrate 10 has a plurality of first substrate lands 13 arranged in a plurality of rings. It can also be said that the mother substrate 10 has a plurality of ring portions in which the plurality of first substrate lands 13 are arranged in a ring shape. Furthermore, it can also be said that the mother substrate 10 has a plurality of first substrate lands 13 arranged in a plurality of columns and rows. In this embodiment, as an example, a configuration in which the plurality of first substrate lands 13 are arranged in five rows and five columns is adopted. However, the number of first substrate lands 13 is not limited to this.

[0025] 3, each first substrate land 13 is provided at a position offset from the corresponding component land 23. That is, each first substrate land 13 is provided so that a portion of it extends beyond the facing area of ​​the corresponding component land 23. Also, each first substrate land 13 is provided so that only a portion of it extends beyond the facing area of ​​the corresponding component land 23, not the entirety of it.

[0026] More specifically, the first substrate lands 13 are provided at positions radially offset from the component lands 23, with a center point CP opposite the center of the BGA component 20 as the origin. Also, the first substrate lands 13 are provided at positions offset away from the center point CP relative to the corresponding component lands 23. As shown in Fig. 3, the corresponding first substrate lands 13 and component lands 23 are illustrated to partially overlap. Note that "with respect to the component land 23" is synonymous with "with respect to the facing region of the component land 23."

[0027] For example, in the X direction, the first board land 13 arranged linearly with the center point CP is arranged at a position shifted in the plus X direction and the minus X direction with respect to the component land 23. The other first board lands 13 are arranged at positions shifted obliquely with respect to the X direction and the Y direction. Therefore, each first board land 13 protrudes in one direction from the facing area of ​​the corresponding component land 23.

[0028] The imaginary line passing through the center point CP and along the X direction can be called the X axis, and the imaginary line passing through the center point CP and along the Y direction can be called the Y axis. In this case, the first board land 13 arranged in the positive X direction from the Y axis is offset in the positive X direction with respect to the component land 23. The first board land 13 arranged in the negative X direction from the Y axis is offset in the negative X direction with respect to the component land 23. The first board land 13 arranged in the positive Y direction from the X axis is offset in the positive Y direction with respect to the component land 23. The first board land 13 arranged in the negative Y direction from the X axis is offset in the negative Y direction with respect to the component land 23. The first board land 13 on the X axis is offset in the positive X direction and the negative X direction with respect to the component land 23.

[0029] Moreover, it is preferable that the amount of misalignment between the corresponding first board land 13 and component land 23 is about half the land diameter of the first board land 13. As a result, even if the first board land 13 and the component land 23 are misaligned, the solder life of the solder connection portion 30 of the electronic device 100 is unlikely to be adversely affected.

[0030] As described above, the first substrate lands 13 are offset on the mother substrate 10. Therefore, as shown in Fig. 4, the spacing L1 between some of the first substrate lands 13 is wider on the mother substrate 10. In other words, the spacing L1 on the mother substrate 10 is wider than in a configuration in which the first substrate lands 13 are not offset.

[0031] To explain this point, Fig. 5 shows a part of a motherboard of a comparative example. Fig. 5 is an enlarged plan view of the same part as Fig. 4. In the motherboard of the comparative example, each first board land 13z and a corresponding component land 23 are provided facing each other. In the motherboard of the comparative example, the distance between some of the first board lands 13z is L2. Furthermore, the distance L1 is greater than the distance L2.

[0032] Therefore, motherboard 10 can increase the number of surface wirings 14 between some of the first substrate lands 13. That is, as shown in Fig. 5, the motherboard of the comparative example can arrange only two surface wirings 14. On the other hand, as shown in Fig. 4, motherboard 10 can arrange three surface wirings 14.

[0033] The second board land 13a is provided around the first board land 13. The electronic component 40 is connected to the second board land 13a. That is, the electrodes of the electronic component 40 are connected to the second board land 13a. The second board land 13a is formed with the receiving solder 31b, similar to the first board land 13. The second board land 13a is electrically connected to the electrodes of the electronic component 40 via the receiving solder 31b. The second board land 13a corresponds to at least a part of the peripheral electrode portion. The receiving solder 31b can be considered as a part of the peripheral electrode portion. The receiving solder 31b will be explained in detail later.

[0034] In this embodiment, a multi-layer board in which wiring layers are stacked is used as the mother board 10. However, the present disclosure is not limited to this. The mother board 10 can also be called a wiring board or a main board. Also, a multi-chip module can be used as the mother board 10.

[0035] <Configuration of BGA Component> With reference to FIGS. 1, 2, 6, etc., the BGA component 20 will be described. As shown in FIGS. 2, 6, etc., the BGA component 20 includes an electrically insulating base material 21, an electrically insulating encapsulating resin 22, a bare chip-shaped semiconductor chip 24, a component land 23 electrically connected to the semiconductor chip 24, and solder balls 32. Further, the BGA component 20 includes a facing surface SF21 with the mother board 10 and a surface SF22 opposite to the facing surface SF21. Note that in FIG. 6, the semiconductor chip 24 is omitted.

[0036] The base material 21 is, for example, a substrate mainly composed of resin. Therefore, the base material 21 can also be called a resin substrate. The semiconductor chip 24 is mounted on the base material 21 and encapsulated with the encapsulating resin 22.

[0037] Note that a protective film may be provided at a portion of the BGA component 20 facing the mother board 10. In this case, the surface of the protective film becomes the facing surface SF21. Further, the BGA component 20 may be provided with a component land 23 which is a part of the wiring pattern provided on the base material 21 and exposed on the facing surface SF21 side. Solder balls 32 are connected to the component land 23. The component land 23 can be regarded as an electrode of the BGA component 20.

[0038] It can also be said that the BGA component 20 has a plurality of annular portions in which a plurality of component lands 23 are arranged annularly. Further, it can be said that a plurality of component lands 23 are arranged in a plurality of rows and a plurality of columns in the BGA component 20. In the present embodiment, as an example, a configuration in which a plurality of component lands 23 are arranged in five rows and five columns is adopted. However, the number of component lands 23 is not limited to this.

[0039] As shown in FIG. 2, the BGA component 20 is electrically connected to the mother board 10 via a solder connection portion 30 formed by the solder balls 32 and the mating solder 31a. The first board land 13 of the mother board 10 is provided at a position radially shifted with respect to the component land 23. Therefore, the electronic device 100 is formed in a state where the solder connection portion 30 is inclined.

[0040] The solder balls 32 are electrically connected to the semiconductor chip 24 via component lands 23 and wiring patterns provided on the base material 21. The solder balls 32 are in the form of a sphere that is partially crushed by the base material 21.

[0041] The solder balls 32 are provided to electrically connect the semiconductor chip 24 to the motherboard 10 (first board lands 13). That is, the semiconductor chip 24 is electrically connected to the motherboard 10 by connecting the solder balls 32 to the first board lands 13. The BGA component 20 has the solder balls 32 provided at multiple locations on the facing surface SF21.

[0042] A discrete component, a module component having multiple semiconductor chips that constitute a system, or the like can be used as the BGA component 20. The module component can also be called a system on chip (SoC) or a multi-chip module.

[0043] <Electronic components> As shown in FIG. 7, the electronic component 40 is a circuit component provided around the BGA component 20. The electronic component 40 has electrodes. As described above, the electronic component 40 is electrically connected to the second substrate land 13a. A discrete component can be used as the electronic component 40. The electronic component 40 corresponds to a peripheral circuit component. Note that the electronic device 100 can also be configured without the electronic component 40.

[0044] <Electronic device manufacturing method> Here, a manufacturing method of the electronic device 100 will be described with reference to Figs. 6 and 7. In this embodiment, a manufacturing method including a flux transfer process is adopted as an example. However, the electronic device 100 can also be manufactured by other manufacturing methods. Hereinafter, a process can be rephrased as a step. Note that the protective film 12 and the semiconductor chip 24 are omitted in Figs. 6 and 7 to avoid complicating the drawings.

[0045] 6, the preparation process (preparation step) for preparing the BGA component 20 having the solder balls 32 will be described. First, a chip component preparation process S10 for preparing the BGA component 20 is performed. In this process, a chip component is prepared in which solder bumps 32a, which are part of the solder balls 32, are formed on the base material 21, the semiconductor chip 24, and the sealing resin 22. The solder bumps 32a are connected to the component lands 23. The solder bumps 32a have the same shape as the solder balls 32.

[0046] Next, a flux transfer step S11 is performed. In this step, the flux material 210 is placed in the container 200, and the container 200 and the chip component are brought relatively close to each other. Then, the solder bumps 32a are pressed against the flux material 210 placed in the container 200. As a result, the flux material 210 is transferred to the surface of the solder bumps 32a, and the flux 32b is formed. Furthermore, the flux transfer step S11 forms solder balls 32 including the solder bumps 32a and the flux 32b.

[0047] In this embodiment, the solder ball 32 includes the solder bump 32a and the flux 32b. However, the solder ball 32 may include only the solder bump 32a. That is, the solder ball 32 may be the solder bump 32a.

[0048] A method for manufacturing the motherboard 10 and the electronic device 100 will be described with reference to FIG.

[0049] In the solder printing process S20, the facing solders 31a, 31b are printed on the board lands 13, 13a formed on the base material 11. This process forms the facing solder 31a on the first board land 13 on the mounting surface SF11 side. In this way, the solder printing process S20 can be said to form a first electrode portion by forming the facing solder 31a on the first board land 13.

[0050] As described above, the first board lands 13 are provided at positions radially offset from the component lands 23. Therefore, the solder printing step S20 may include a step of forming the first board lands 13. That is, in the solder printing step S20, a plurality of first board lands 13 are formed at positions radially offset from the component lands 23, with the center point CP as the origin. The step of forming the first board lands 13 may be a step separate from the solder printing step S20. The solder printing step S20 corresponds to a first electrode portion forming step. Also, the step of forming the first board lands 13 corresponds to a first electrode portion forming step.

[0051] Further, the second board land 13a has an incoming solder 31b formed thereon. The first board land 13 and the incoming solder 31a are electrode portions to which the solder balls 32 are connected. The second board land 13a and the incoming solder 31b are peripheral electrode portions to which the electrodes of the electronic component 40 are connected. In this embodiment, the incoming solders 31a and 31b are formed by printing. Therefore, it is possible to suppress variation in the amount of the incoming solders 31a and 31b.

[0052] In the component mounting process S21, electronic components 40 are mounted on the motherboard 10. In this process, the electrodes of the electronic components 40 are aligned with the receiving solders 31b formed on the second board lands 13a. Then, the electronic components 40 are mounted on the motherboard 10 so that the electrodes of the electronic components 40 and the receiving solders 31b are in contact with each other.

[0053] In this case, mounting refers to placing electronic components 40 on motherboard 10. Mounting can also be rephrased as placing or arranging.

[0054] In the first reflow process S22, the motherboard 10 on which the electronic components 40 are mounted is transported to a reflow furnace. Then, in the reflow furnace, the electrodes of the electronic components 40 and the second board lands 13a are soldered with the receiving solder 31b. In the first reflow process S22, the BGA components 20 are not placed on the receiving solder 31a. Therefore, the receiving solder 31a melts in the reflow furnace and becomes hemispherical.

[0055] This step is performed before the BGA component mounting step S23, which will be described later. The first reflow step S22 corresponds to a pre-reflow step.

[0056] In the BGA component mounting process S23, after the solder printing process S20, the BGA component 20 is mounted on the motherboard 10. In this process, the solder balls 32 are aligned with the receiving solder 31a formed on the first board land 13. Then, the BGA component 20 is mounted on the motherboard 10 so that the solder balls 32 and the receiving solder 31a are in contact with each other. As described above, mounting here means placing the BGA component 20 on the motherboard 10. The BGA component mounting process S23 corresponds to a placement step.

[0057] 7, the structure in which the BGA component 20 is arranged on the motherboard 10 has the solder balls 32 placed on the pre-solder 31a. In the second reflow process S24, which will be described later, the structure is transported to a reflow furnace. During this process, external forces such as vibrations are applied to the structure.

[0058] Incidentally, an electronic device of a comparative example (hereinafter, the comparative example) may have a configuration in which the first board land 13 is provided to face the component land 23. In the comparative example, the above-mentioned external force may cause the BGA component 20 to move from the aligned state in a direction along the XY plane. That is, the solder balls 32 slide off the welcoming solder 31a, causing the BGA component 20 to move. In this way, the movement of the BGA component 20 causes the positions of the solder balls 32 and the welcoming solder 31a (first board land 13) to shift. For convenience, the reference numerals of the components of the comparative example are used to refer to the components of the comparative example using the reference numerals of the components of this embodiment.

[0059] Furthermore, there is a risk that the solder balls 32 and the receiving solder 31a may not be connected to each other depending on the amount of movement of the BGA component 20. Also, there is a risk that the structure may end up in a state where the solder balls 32 and the receiving solder 31a that are not originally meant to be connected come into contact with each other.

[0060] If the second reflow process S24 is performed in this state, there is a risk of poor connection in the solder connection portion 30. Therefore, this state can be said to be a poor state. On the other hand, the state in which the solder ball 32 and the receiving solder 31a that should be connected are in contact can be said to be a good state. The stage of the BGA component mounting process S23 in FIG. 7 can be said to show a structure in a good state.

[0061] Therefore, in this manufacturing method, the first board land 13 is provided at a position radially offset from the component land 23, as described above. Therefore, each solder ball 32 is positioned inside the corresponding receiving solder 31a. In other words, each solder ball 32 is positioned on the side of an imaginary line in the Z direction passing through the center point CP, relative to the corresponding receiving solder 31a. The corresponding receiving solder 31a is the connection target of the solder ball 32. The imaginary line in the Z direction that runs along the center point CP corresponds to a perpendicular line that passes through the center point CP.

[0062] It can also be said that, by arranging the BGA component 20 on the motherboard 10, each solder ball 32 applies a force to the multiple receiving solders 31a in a direction inclined with respect to the Z direction. It can also be said that stress acts on the solder balls 32 in a direction inclined with respect to the imaginary line. Furthermore, it can also be said that the BGA component 20 is arranged on the motherboard 10 with the multiple solder balls 32 fitted into the multiple receiving solders 31a.

[0063] Therefore, the movement of the BGA component 20 in the direction along the XY plane is restricted. In other words, even if an external force is applied to the BGA component 20, the solder balls 32 will remain in contact with the receiving solder 31a in an oblique direction. Therefore, with this manufacturing method, it is possible to prevent the structure from becoming defective even if it is transported to a reflow furnace.

[0064] In the second reflow process S24, the structure in which the BGA component 20 is arranged on the motherboard 10 is transported to a reflow furnace. Then, in the reflow furnace, the electrodes of the BGA component 20 and the first board land 13 are soldered with the solder balls 32 and the receiving solder 31a. That is, the solder balls 32 and the receiving solder 31a are joined to form the solder connection parts 30. It can also be said that the electrodes of the BGA component 20 and the first board land 13 are electrically connected by the solder connection parts 30.

[0065] In particular, in this embodiment, the second reflow process S24 is performed after the solder printing process S20. Therefore, in the second reflow process S24, soldering can be performed on structures in good condition. Note that the second reflow process S24 corresponds to a reflow step.

[0066] The present manufacturing method including these steps can manufacture the electronic device 100. Note that the present disclosure does not require the use of the receiving solders 31a and 31b. In this case, the first board land 13 corresponds to the electrode portion, and the second board land 13a corresponds to the peripheral electrode portion.

[0067] <Effects> As described above, the electronic device 100 is configured such that the component lands 23 of the BGA component 20 and the first board lands 13 (facing solder 31a) of the motherboard 10 are radially offset from each other. Therefore, in the electronic device 100, stress acts on the solder balls 32 in a direction inclined with respect to a virtual line in the Z direction passing through the center point CP, making it difficult for the motherboard 10 and the BGA component 20 to become misaligned. This ensures the reliability of the connection between the solder balls 32 and the first board lands 13 (facing solder 31a) in the electronic device 100. In other words, the electronic device 100 suppresses open failures and short failures in the solder connection parts 30. The electronic device 100 can also suppress rotational misalignment of the BGA component 20.

[0068] Furthermore, the manufacturing method forms a plurality of first board lands 13 (facing solder 31a) at positions radially offset from the component lands 23 with the center point CP as the origin. Therefore, even during transportation, the manufacturing method applies stress to the solder balls 32 in a direction inclined with respect to an imaginary line in the Z direction passing through the center point CP, and can suppress misalignment of the BGA component 20 with respect to the motherboard 10. Therefore, the manufacturing method can manufacture an electronic device in which the BGA component 20 is positioned with respect to the motherboard 10. Furthermore, the manufacturing method can manufacture an electronic device in which the connection reliability between the solder balls 32 and the first board lands 13 (facing solder 31a) is ensured.

[0069] Furthermore, in this embodiment, the solders 31a and 31b are formed by printing, which makes it possible to suppress variations in the amount of solder 31a and 31b, and therefore the manufacturing method allows the BGA component 20 to be mounted stably.

[0070] In this embodiment, an example is adopted in which the first board land 13 is shifted with respect to the component land 23. However, in the present disclosure, the component land 23 may be shifted with respect to the first board land 13 as described above. In other words, in the present disclosure, it is sufficient that the first board land 13 and the component land 23 are shifted relative to each other in the above-mentioned relationship.

[0071] The above describes preferred embodiments of the present disclosure. However, the present disclosure is not limited to the above embodiments, and various modifications are possible without departing from the spirit of the present disclosure. Below, modifications 1 to 6 are described as other aspects of the present disclosure. In each of modifications 1 to 6, differences from the above embodiment are mainly described. Other aspects are the same as the above embodiment.

[0072] The above-mentioned embodiment and modifications 1 to 6 can be implemented individually, or can be implemented in appropriate combination. The present disclosure is not limited to the combinations shown in the embodiments, and can be implemented in various combinations. In addition, the first board land 13 in modifications 1 to 6 may or may not be provided with the receiving solder 31a.

[0073] (Variation 1) As shown in Fig. 8, in the motherboard 10 of the first modification, only some of the first substrate lands 13 surrounding the center point CP may be provided at offset positions as described above. The twelve first substrate lands 13 surrounding the center point CP are provided at positions radially offset from the component lands 23, with the center point CP as the origin. The first substrate lands 13 provided at offset positions are also referred to as positional deviation suppression lands. Meanwhile, the other first substrate lands 13 are also referred to as normal substrate lands. Fig. 8 is a drawing corresponding to Fig. 3.

[0074] That is, in the motherboard 10 of the first modification, some of the first substrate lands 13 are misalignment suppression lands. Therefore, it can be said that the misalignment suppression lands are misaligned with respect to the normal substrate lands. In other words, the misalignment suppression lands are provided at positions that are shifted from the imaginary straight lines in the X and Y directions that connect the normal substrate lands.

[0075] 8, the component lands 23 corresponding to the misalignment prevention lands are indicated by dashed lines. The other component lands 23 are not shown in the figure because they are normally disposed opposite the board lands. This point is the same for the other modified examples.

[0076] 8 is merely an example. The number of misalignment suppression lands is not limited to the above. The electronic device 100 of the first modification can be manufactured by the manufacturing method of the above embodiment. The first modification can achieve the same effects as the above embodiment.

[0077] Furthermore, the motherboard 10 of the first modification suppresses misalignment of the BGA component 20 by supporting the BGA component 20 at the center of the component. The normal board lands around the misalignment suppression lands are disposed opposite the component lands 23. This prevents the solder connection 30 connecting the normal board lands and the component lands 23 from becoming tilted. Thus, the first modification can improve the solder life more than the above embodiment. The solder life includes the life of the solder connection 30, the connection life between the solder connection 30 and the first board land 13, and the connection life between the solder connection 30 and the component land 23.

[0078] In a configuration in which the misalignment prevention land is provided with the backing solder 31a, the misalignment prevention land and the backing solder 31a prevent the BGA component 20 from misaligning. This point is similar to the other modified examples.

[0079] (Variation 2) As shown in Fig. 9, in the motherboard 10 of the second modification, only the first substrate lands 13 on the outermost periphery may be provided at the offset positions as described above. The 14 first substrate lands 13 on the outermost periphery surrounding the center point CP are provided at positions radially offset from the component lands 23, with the center point CP as the origin. In other words, in the motherboard 10 of the second modification, misalignment prevention lands are provided only on the outermost periphery. Fig. 9 is a drawing corresponding to Fig. 3.

[0080] 9 is merely an example. The number of misalignment suppression lands is not limited to the above. The electronic device 100 of the second modification can be manufactured by the manufacturing method of the above embodiment. The second modification can achieve the same effects as the above embodiment.

[0081] Furthermore, the motherboard 10 of the second modification suppresses misalignment of the BGA component 20 by supporting it at the outermost periphery. Also, the normal board lands surrounded by the misalignment suppression lands are disposed opposite the component lands 23. Therefore, the second modification can improve the solder life, similar to the first modification.

[0082] (Variation 3) As shown in Fig. 10, in the motherboard 10 of the modified example 3, the outermost misalignment suppression lands are larger than the normal board lands. Therefore, the modified example 3 can be said to be a modified example of the modified example 2. The area of ​​the misalignment suppression lands is larger than the normal board lands. The area here is the area in the XY plane. Also, the receiving solder 31a is provided over the entire area of ​​the misalignment suppression lands. Fig. 10 is a drawing corresponding to Fig. 3.

[0083] 10 is merely an example. The number of misalignment suppression lands is not limited to the above. The electronic device 100 of the third modification can be manufactured by the manufacturing method of the above embodiment. The third modification can achieve the same effects as the above embodiment.

[0084] Furthermore, the motherboard 10 of Modification 3 has large misalignment suppression lands. Therefore, the motherboard 10 of Modification 3 can increase the contact area between the solder balls 32 and the misalignment suppression lands. Therefore, the motherboard 10 of Modification 3 can suppress misalignment more effectively than the first embodiment. Furthermore, the motherboard 10 of Modification 3 can improve the solder life between the solder balls 32 and the misalignment suppression lands.

[0085] (Variation 4) As shown in Fig. 11, in the mother board 10 of the fourth modification, only the first board lands 13 at the four corners may be provided at the offset positions as described above. The four first board lands 13 at the four corners surrounding the center point CP are provided at positions radially offset from the center point CP as the origin with respect to the component lands 23. In other words, in the mother board 10 of the fourth modification, misalignment suppression lands are provided only at the four corners. Fig. 11 is a drawing corresponding to Fig. 3.

[0086] The electronic device 100 of the fourth modification can be manufactured by the manufacturing method of the above embodiment. The fourth modification can achieve the same effects as the above embodiment.

[0087] Furthermore, the motherboard 10 of the fourth modification example prevents the BGA component 20 from shifting by supporting it at the four corners. Also, the normal board lands other than the shift prevention lands are disposed opposite the component lands 23. Therefore, the fourth modification example can improve the solder life, similar to the first modification example.

[0088] The misalignment suppression lands at the four corners are connected to the component lands 23 at the four corners of the BGA component 20. The solder life of the solder connection 30 of the component lands 23 at the four corners is poor. In other words, the connection reliability of the component lands 23 at the four corners is more likely to decrease than that of the other component lands 23. For this reason, the BGA component 20 does not use the component lands 23 at the four corners for electrical connection. The misalignment suppression lands only need to have the function of suppressing misalignment of the BGA component 20. Therefore, the electronic device 100 of the fourth modification does not need to consider the solder life between the misalignment suppression lands and the component lands 23 at the four corners.

[0089] (Variation 5) As shown in Fig. 12, the BGA component 20 of the fifth modification includes a virtual block including a plurality of component lands 23. Here, as an example, a BGA component 20 that can be divided into four blocks is used. Each virtual block is provided with component lands 23 in, for example, nine locations. Fig. 12 is a drawing corresponding to Fig. 3.

[0090] On the other hand, the motherboard 10 of the fifth modification has a positional deviation suppression land provided for each virtual block. That is, the first substrate lands 13 are provided in units of the first substrate lands 13 corresponding to each virtual block at positions radially shifted from the component lands 23 with the center point facing the center of the virtual block as the origin.

[0091] By providing the misalignment suppression lands in this manner, the first substrate lands 13 are provided at positions radially shifted from the component lands 23 with the center point CP as the origin. For example, the mother substrate 10 of the fifth modification has some of the misalignment suppression lands provided at the outermost periphery. The mother substrate 10 of the fifth modification also has some of the misalignment suppression lands provided at four locations surrounding the center point CP.

[0092] 12 is merely an example. The number of misalignment suppression lands is not limited to the above. The electronic device 100 of the fifth modification can be manufactured by the manufacturing method of the above embodiment. The fifth modification can achieve the same effects as the above embodiment.

[0093] Furthermore, the motherboard 10 of the fifth modification suppresses misalignment of the BGA component 20 by supporting the BGA component 20 in units of multiple virtual blocks. Therefore, the motherboard 10 of the fifth modification can support the BGA component 20 more stably than the above embodiment. The motherboard 10 of the fifth modification also easily suppresses rotational misalignment of the BGA component 20.

[0094] (Variation 6) As shown in Fig. 13, in the motherboard 10 of the sixth modification, the first substrate lands 13 are provided at positions shifted toward the center point CP with respect to the corresponding component lands 23. The first substrate lands 13 are provided at positions radially shifted from the component lands 23 with the center point CP as the origin. In other words, the positional relationship between the first substrate lands 13 and the component lands 23 is the opposite of that in the above embodiment. Fig. 13 is a drawing corresponding to Fig. 3.

[0095] Therefore, in the BGA component mounting process S23, each solder ball 32 is disposed outside the corresponding receiving solder 31a. In other words, each receiving solder 31a is disposed on the side of the imaginary line in the Z direction passing through the center point CP from the corresponding solder ball 32. Therefore, the motherboard 10 of the sixth modification can stabilize the solder balls 32 by applying stress from the inside to the outside.

[0096] 13 is merely an example. The number of misalignment prevention lands is not limited to the above. As in Modifications 2 to 5, some of the first substrate lands 13 may be used as misalignment prevention lands.

[0097] The electronic device 100 of the sixth modification can be manufactured by the manufacturing method of the above embodiment. The sixth modification can achieve the same effects as the above embodiment. Furthermore, the electronic device 100 of the sixth modification can enlarge the formation area of ​​the surface wiring 14 around the outermost first substrate lands 13.

[0098] Although the present disclosure has been described based on the embodiment, it is understood that the present disclosure is not limited to the embodiment or structure. The present disclosure also encompasses various modifications and modifications within the equivalent range. In addition, although various combinations and forms are shown in the present disclosure, other combinations and forms including only one element, more than one element, or less than one element are also within the scope and concept of the present disclosure. [Explanation of symbols]

[0099] 10... mother board, 13... first board land, 20... BGA component, 23... component land, 32... solder ball, 31a... solder ball, 100... electronic device

Claims

1. An electronic device in which a second circuit component (20) is mounted on a first circuit component (10), The second circuit component includes a plurality of second electrode portions (23) and solder balls (32) connected to the second electrode portions; the first circuit component includes a plurality of first electrode portions (13, 31 a) to which the solder balls are connected on a mounting surface (SF11) on which the second circuit component is mounted, An electronic device, wherein the first electrode portions are provided at positions radially offset from the second electrode portions, with a center point opposite the center of the second circuit component as the origin.

2. the second circuit component has a plurality of the second electrode portions arranged in a plurality of columns and a plurality of rows, The electronic device according to claim 1 , wherein the first circuit component is provided with a plurality of the first electrodes corresponding to the second electrodes.

3. The electronic device according to claim 2 , wherein the first electrode portions are provided at positions shifted away from the center point relative to the corresponding second electrode portions.

4. 4. The electronic device according to claim 1, wherein only a portion of the first electrode portions surrounding the central point are provided at shifted positions.

5. 4. The electronic device according to claim 1, wherein only the first electrode portion on the outermost periphery is provided at a shifted position.

6. The electronic device according to claim 5 , wherein the outermost first electrode portion is larger than the other first electrode portions.

7. 4. The electronic device according to claim 1, wherein only the first electrode portions at the four corners are provided at shifted positions.

8. the second circuit component includes a virtual block including a plurality of the second electrode portions, 3. The electronic device according to claim 1, wherein the first electrode portions are arranged in units of the first electrode portions corresponding to each virtual block, at positions radially shifted from the second electrode portion, with a center point facing the center of the virtual block as the origin.

9. The electronic device according to claim 1 , wherein the first electrode portions are provided at positions shifted toward the center point with respect to the corresponding second electrode portions.

10. A method for manufacturing an electronic device in which a second circuit component (20) is mounted on a mounting surface (SF11) of a first circuit component (10), comprising the steps of: A preparation step (S10, S11) of preparing the second circuit component including a plurality of second electrode portions and solder balls (32) connected to the second electrode portions; a first electrode portion forming step (S20) of forming a first electrode portion (13, 31 a) to which the solder ball is connected on the mounting surface side; a placement step (S23) of placing the second circuit component on the first circuit component after the first electrode portion forming step; a reflow step (S24) of transporting a structure in which the second circuit component is disposed on the first circuit component to a reflow furnace and soldering the solder balls and the first electrode portions, A manufacturing method in which, in the first electrode portion forming step, a plurality of the first electrode portions are formed at positions radially shifted from the second electrode portion, with a center point opposite the center of the second circuit component as the origin.

11. the first circuit component includes, in addition to the first electrode portion, a peripheral electrode portion (13a, 31b) provided around the first electrode portion, the first electrode portion and the peripheral electrode portion include solder on their surfaces; the electronic device includes a peripheral circuit component (40) connected to the peripheral electrode portion around the second circuit component, The manufacturing method according to claim 10, further comprising a pre-reflow step (S22) of soldering the peripheral electrode portion and the peripheral circuit component in the reflow furnace, prior to the placement step.

Citation Information

Patent Citations

  • Package for mounting surface mounting type semiconductor device

    JP1996335647A

  • Method for mounting chip

    JP1999017319A

  • Ic chip and substrate with ic chip arranged thereon

    JP2000021918A

  • Mounting structure for electronic components

    JP2000114315A

  • Ball terminal connecting structure for electronic component

    JP2001060759A