Common-mode transient suppression
Patent Information
- Application Number
- JP2024545138
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-03-04
- Filing Date
- 2023-02-01
- Publication Date
- 2025-03-13
Smart Images

Figure 2025506634000001_ABST
Abstract
Description
[Background technology]
[0001]
[0001] As is known in the art, common mode transient signals can interfere with circuit operation. For example, common mode transients can overwhelm the dynamic range for a given differential input signal. In signal isolator applications, the common mode transients can be of a magnitude larger than the differential signal input. Summary of the Invention
[0002]
[0002] The embodiments of the present disclosure provide a method and apparatus for a common mode transient processing circuit that can suppress, buffer, or otherwise mitigate the effects of common mode current signals. Exemplary common mode transient suppression circuits can be useful in digital isolator components, as well as various other applications where multiple ground domains are required. In general, embodiments of the common mode transient suppression circuit provide a closed loop circuit topology that suppresses / cancels input current transients during CMTI perturbations. In some embodiments, the common mode transient suppression circuit includes a closed loop class AB high bandwidth buffer that can sink and source fast transient currents injected at the input of a receiver during CMTI perturbations.
[0003]
[0003] In an exemplary embodiment, the common mode transient suppression circuit can separate common mode and differential impedances to allow independent design of differential and common mode paths, allowing allocation of the maximum differential dynamic range to the signal of interest even in the presence of much larger common mode signal amplitudes. It is understood by those skilled in the art that large common mode signals may undesirably require all of the available dynamic range simply to process the common mode signal. Additionally, this may not be possible in a completely passive filtering approach.
[0004]
[0004] Active common-mode transient suppression offers power efficiency and scalability that also enables higher common-mode transient immunity operation. By separating the differential and common-mode impedances, the maximum available input dynamic range can be used for the differential path, with little or no dynamic range allocated to process the common-mode signal. It should be appreciated that this is a significant advantage over conventional fully passive filtering approaches, where the common-mode and differential paths share the same impedance.
[0005]
[0005] Common-mode transient immunity (CMTI) is useful for specifying the level of immunity in a multi-ground GND domain application to fast transient perturbations in one domain relative to other domains. Transient perturbations are typically measured in KV / us or V / ns.
[0006]
[0006] CMTI design may trade off headroom, bandwidth, and / or gain to set limits in circuit implementation. CMTI provides a measure of system robustness against common mode strikes between different GND domains. Usually, isolation domains require some robustness against transients that occur only in one of the domains. Electrical isolation depends on the level of impedance coupling between different boundaries at different frequencies. This is highly related to the technology involved in the isolation barrier. In the case of capacitive isolators, the same isolation barrier is shared by the signal path as well as the common mode coupling path, which presents a certain challenge for CMTI design robustness.
[0007]
[0007] In one aspect, a signal isolator includes a first die having a transmit module, the first die having a first voltage domain, and a second die having a receive module including a receive amplifier configured to receive a transmit signal from the transmit module including a differential signal and a common mode current, the second die having a second voltage domain, the first and second dies being separated by an isolation barrier, the receive amplifier including a differential amplifier for receiving a differential input signal from the transmit module, and a common mode module configured to sense the common mode current and sink or source the common mode current to minimize changes in input impedance of the receive amplifier.
[0008]
[0008] The signal isolator may further include one or more of the following features: the first or second die has a capacitively coupled signal connection to carry the transmit signal, the common mode module comprises an AB class amplifier, the common mode module is configured to control the regulated input common mode voltage such that the dynamic range of the differential amplifier is used for the differential input signal, the common mode module is configured to control the regulated input common mode voltage such that the dynamic range of the differential amplifier is not used for the common mode current, and / or the receive module is configured to separate the differential impedance and the common mode impedance.
[0009]
[0009] In another aspect, a method includes using a first die having a transmit module, the first die having a first voltage domain, in a signal isolator; and using a second die having a receive module including a receive amplifier configured to receive a transmit signal from the transmit module including a differential signal and a common mode current, the second die having a second voltage domain, the first and second dies being separated by an isolation barrier, the receive amplifier including a differential amplifier for receiving a differential input signal from the transmit module and a common mode module configured to sense the common mode current and sink or source the common mode current to minimize changes in input impedance of the receive amplifier.
[0010]
[0010] The method may further include one or more of the following features: the first or second die has a capacitively coupled signal connection to carry the transmit signal, the common mode module comprises an AB class amplifier, the common mode module is configured to control the regulated input common mode voltage such that the dynamic range of the differential amplifier is used for the differential input signal, the common mode module is configured to control the regulated input common mode voltage such that the dynamic range of the differential amplifier is not used for the common mode current, and / or the receive module is configured to separate the differential impedance and the common mode impedance.
[0011]
[0011] In a further aspect, a signal isolator comprises a transmit module and first die means for providing a first voltage domain, and a receive module including a receive amplifier configured to receive a transmit signal from the transmit module including a differential signal and a common mode current, the second die having a second voltage domain, the first and second dies being separated by an isolation barrier, and the receive amplifier comprising differential amplifier means for receiving a differential input signal from the transmit module and common mode means for sensing the common mode current and sinking or sourcing the common mode current and minimizing changes to the input impedance of the receive amplifier.
[0012]
[0012] The signal isolator may further include one or more of the following features: the first or second die means has a capacitively coupled signal connection for conveying a transmit signal, the common mode means comprises an AB class amplifier, the common mode means is configured to control the regulated input common mode voltage such that the dynamic range of the differential amplifier is used for the differential input signal, the common mode means is configured for controlling the regulated input common mode voltage such that the dynamic range of the differential amplifier is not used for the common mode current, and / or the receiving means is configured for isolating the differential impedance and the common mode impedance.
[0013]
[0013] The above features of the present disclosure, as well as the disclosure itself, may be more fully understood from the following description of the drawings. [Brief description of the drawings]
[0014] [Figure 1] 1 is a schematic diagram of a signal isolator with common mode transient handling according to an exemplary embodiment of the present disclosure. [Figure 2A]
[0015] FIG. 13 illustrates an example waveform of a static CMTI strike with a HIGH input. [Figure 2B]FIG. 13 shows an example waveform of a static CMTI strike with LO input. [Figure 2C] FIG. 13 illustrates example waveforms of dynamic CMTI strikes when input data is toggling. [Diagram 3]
[0016] 1 is a schematic diagram of an exemplary receive amplifier having a differential amplifier and a common mode signal processing module. [Figure 3A]
[0017] FIG. 1 is a block diagram of a portion of a signal isolator channel including a receive amplifier having a differential amplifier and a common mode signal processing module. [Figure 4]
[0018] 1 is a circuit diagram of an exemplary receiving amplifier having a differential amplifier, a common mode signal processing amplifier, and a bias circuit. [Diagram 5]
[0019] FIG. 2 is a circuit diagram of an exemplary class AB common mode signal processing amplifier in the absence of a CMTI strike. [Figure 6]
[0020] FIG. 2 is a circuit diagram of an exemplary class AB common mode signal processing amplifier when a CMTI strike is present. [Figure 7]
[0021] FIG. 1 is a circuit diagram of an example class AB common mode signal processing amplifier with indicators to show how the signal bandwidth can be determined. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0015]
[0022] 1 shows an example system 100 having active common mode transient signal suppression according to an example embodiment of the present disclosure. In the illustrated embodiment, a first die 102 including a transmitter module 104 is connected to a second die 106 in a signal isolator application where the second die 106 includes a receiver module 108. The first die 102 may have a different voltage domain than the second die 106, and the dies may be separated by an insulating region 110 including a dielectric material.
[0016]
[0023] In the illustrated embodiment, the first and second dies 102, 106 are connected to one another via differential signal connections 112a, 112b. Each connection 112 may include an isolation capacitor 114, 116 within the respective first and second dies 102, 106, as well as an inherent inductance 118 of the bond wire connection through the isolation region 110.
[0017]
[0024] It will be appreciated that the first and second die may be formed from a single die or from separate dies. Generally, the first and second die are electrically isolated from one another.
[0018]
[0025] The second die 106 may include first and second capacitors 120, 122 coupled end-to-end across the differential signals 112a, 112b, and first and second resistors 124, 126 coupled end-to-end across the differential signals 112a, 112b. An amplifier 128 is coupled in a feedback configuration with an output 130 coupled to a node between the first and second resistors 124, 126 and to a first input 132 of the amplifier. A reference voltage is coupled to the other input 134 of the amplifier 128. In some embodiments, a transimpedance amplifier (TIA) may be used.
[0019]
[0026] The first transient suppression module 140 is coupled to the first differential input signal 112a, and the second transient suppression module 142 is coupled to the second differential input signal 112b. Each of the input signals 112a, 112b has an undesired common-mode current I CM , and the differential input current I DIFF As described more fully below, the first and second transient suppression modules 140, 142 are configured to extract a common mode current I from the input differential signals 112a, 112b. CM Then, the differential current I CM is the common mode current I CMis presented to the receiver module 108 with the common mode impedance removed. The differential impedance is isolated from the common mode impedance.
[0020]
[0027] The CMTI specification for capacitively coupled isolators specifies that a current is injected from one GND domain (die 1 domain) to another GND domain (die 2 domain). This common mode current, in addition to the input differential current, specifies the input current dynamic range of the circuit required for proper operation. In signal isolators, the common mode current is often larger than the input differential current.
[0021]
[0028] CMTI strikes can be classified as static and dynamic depending on the test conditions: static CMTI refers to when the inputs are tied to a logic high or logic low state while the outputs are monitored during a CMTI strike, and a dynamic CMTI condition refers to when a CMTI strike occurs while the input data is toggling and the outputs are monitored to be free of faults (missing pulses, extra pulses, excessive delays, etc.).
[0022]
[0029] FIG. 2A shows a static CMTI strike with an input signal in a HIGH state. There is some noise JI in the output signal at the rising and falling edges R, F of the ground differential signal (GNDa-GNDb). FIG. 2B shows a similar CMTI strike with an input signal in a LOW state. FIG. 2C shows a series of pulses on the input signal, some of which are not present in the output signal, which may contain some oscillations and / or unknown states OS. The ground differential signal (GNDa-GNDb) shows normal pulses, missing pulses, extra pulses or errors, and excessive propagation delays or pulse width delay errors.
[0023]
[0030] 3 shows further details of the circuit of FIG. 1 including a receive amplifier 300 having a differential amplifier 302 along with the first and second transient suppression modules 140, 142 of FIG. 1 shown as a single CMTI module 304. The CMTI buffer or suppressor circuit 304 provides common mode feedback (CMFB) or CMTI buffering. The CMTI module 304 reduces the common mode injection current I without affecting the input impedance of the receive amplifier 300. CM provides a low impedance to
[0024]
[0031] A CMTI buffer or suppressor 304 senses the input signal common mode and sinks or sources it in a common mode manner to avoid affecting the differential input impedance and signal. A differential amplifier 302 then amplifies the input signal seen across resistors 124, 126.
[0025]
[0032] FIG 3A illustrates a portion of an exemplary bidirectional isolator 350 of which the receive amplifier 300 of FIG 3 forms a part. The receive path includes an IO terminal 352 to receive an input (or output) signal at an IO buffer 354 for a transmit module 356 having an input detector 358, a modulator 360, and a driver module 362. The receive amplifier 300 of the receive module 364 receives an input from the transmit module 356 across a barrier 366. The output of the receive amplifier 300 may be rectified / demodulated 368, filtered 370, and detected 372.
[0026]
[0033] 4 illustrates an implementation of a differential amplifier 400, such as differential amplifier 302 of FIG. 3, an implementation of a transient / buffer module 402, such as CMTI module 304, as a class AB amplifier, and an example bias circuit 404. The amplifier 402 senses a common mode input signal 406 across a resistor and either sinks or sources the common mode current to avoid affecting the differential input impedance and signal.
[0027]
[0034] Figure 5 shows the I CM 5 shows the operation of the exemplary class AB amplifier 500 during operation without common-mode current, shown as V = 0. In the illustrated embodiment, the CMTI suppressor circuit is a fully differential rail-to-rail implementation of a common-gate input stage that senses the input voltage through a common-mode input pair and injects or subtracts the necessary input current in a common-mode fashion to maintain the input common-mode voltage stage at a desired level. This allows the buffer to control the regulated input common-mode voltage to extend the input dynamic range to differential signals only.
[0028]
[0035] The injected common mode current is zero, i.e., no CMTI strike I CM When =0, input node 502 tends to remain at the selected input common mode voltage. Current 504 balances so that the output AB class driver consumes only the static current it is designed for. As can be seen, current mirrors can be used if desired to meet the needs of a particular application.
[0029]
[0036] In an exemplary embodiment, for bias currents designated as IBIASP and IBIASN of 40 μA, the amplifier current (IPA+IPB) is I CM When = 0 balances, it is 20 μA, and as a result, the current is equal to 10 μA.
[0030]
[0037] 6 illustrates an example amplifier 600 operation when a common-mode current ICM is injected during a CMTI strike that causes the input node 602 to tend to increase in voltage. The change in common-mode voltage is proportional to the sum of the currents 604 INA+INB+2I CM This current imbalance is injected into the class AB common mode output stage at node 606 which is charged until the input common mode current is compensated to be zero through the output N-MOS transistor 608.
[0031]
[0038] FIG. 7 shows an example amplifier 700 having an input impedance that is determined based on the input stage transconductance gm and the output impedance ro of the amplifier output stage, as described below.
[0032]
number
[0033]
[0039] In an embodiment, the bandwidth of the amplifier is determined by the transconductance, the drain-source current I DS , the constant K, and the total capacitance C TOT It can be determined based on:
[0034]
number
[0035]
[0040] It will be understood that the devices circled in 7 in FIG. 7 relate to the above linear equations for gm_nmos7 and gm_pmos7.
[0036]
[0041] Total capacitance C TOT is determined from the capacitances of the drain d, gate g, source s, and body b of the transistor.
[0037]
number
[0038]
[0042] Active input impedance embodiments, such as those shown and described above, may provide advantages over passive input impedance configurations. When the input impedance is implemented using solely passive networks, the input dynamic range for both differential and common modes is related to the input impedance RIN_RX value. Assuming that both signals for differential and common modes share the same impedance path, the current input dynamic range is defined as the maximum total current before reaching the rail at the input of the receiver. This occurs because the passive configuration requires allocating common mode current in addition to differential. In many applications, such as in the case of certain CMTI requirements, it is common to find that the common mode current is an order of magnitude or more higher when compared to the differential current. In this scenario, and especially when the input dynamic range is limited to a few hundred mV, the passive configuration may not be sufficient.
[0039]
[0043] An exemplary embodiment of an active common mode loop for suppressing common mode currents and defining input impedance can overcome the limitations imposed by low voltage applications where the input dynamic range is 100mV and the input impedance maximum limit makes the differential signal so small that the overall gain and signal to noise ratio of the signal path are also reduced. In an exemplary embodiment, the input differential impedance is separated from the common mode impedance. By sensing the common mode current at the input of the receiver amplifier and subtracting it at the same input node, for example by using a current mirror, a variable common mode impedance is created that does not affect the differential impedance of the amplifier. This allows some freedom in the calculation of the differential and common mode input impedances (due to dynamic range limitations) and in the same way maximizes the available dynamic range for the differential signal by virtually not consuming headroom or dynamic range in the common mode signal.
[0040]
[0044] It is understood that the processing may be implemented in hardware, software, or a combination of the two. The processing may be implemented in a computer program executed on a programmable computer / machine, each of which includes a processor, a storage medium or other article of manufacture (volatile and non-volatile memory and / or storage elements) readable by the processor, at least one input device, and one or more output devices. The program code may be applied to data entered using the input device to perform the processing and to generate output information.
[0041]
[0045] The system may at least partially implement the processes through a computer program product (e.g., in a machine-readable storage device) for execution by or to control the operation of a data processing device (e.g., a programmable processor, computer, or multiple computers). Each such program may be implemented in a high-level procedural or object-oriented programming language to communicate with a computer system. However, the program may also be implemented in assembly or machine language. The language may be a compiled or interpreted language, and it may be deployed in any form, such as as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program may be deployed to be executed on one computer, or on multiple computers at one location or distributed across multiple locations and interconnected by a communication network. The computer program may be stored on a storage medium or device (e.g., a CD-ROM, a hard disk, or a magnetic diskette), which is readable by a general-purpose or special-purpose programmable computer for configuring and operating the computer when the storage medium or device is read by the computer.
[0042]
[0046] The process may also be implemented as a machine-readable storage medium configured to contain a computer program, the instructions in the computer program causing a computer to operate when executed.
[0043]
[0047] Processing may be performed by one or more programmable embedded processors executing one or more computer programs to perform the functions of the system. All or a portion of the system may be implemented as special purpose logic circuitry (e.g., a field programmable gate array (FPGA) and / or an application specific integrated circuit (ASIC)).
[0048] Although exemplary embodiments of the present disclosure have been described, it will now become apparent to those skilled in the art that other embodiments incorporating their concepts may also be used. The embodiments contained herein should not be limited to the disclosed embodiments, but rather should be limited only by the spirit and scope of the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.
[0044]
[0049] Elements of different embodiments described herein may be combined to form other embodiments not specifically set forth above. Various elements described in the context of a single embodiment may also be provided separately or in any suitable subcombination. Other embodiments not specifically described herein are also within the scope of the following claims.
Claims
1. a first die comprising a transmit module, the first die having a first voltage domain; a second die including a receive module including a receive amplifier configured to receive a transmit signal including a differential signal and a common mode current from the transmit module; Equipped with the second die having a second voltage domain, the first and second dies being separated by an isolation barrier; The receiving amplifier includes: a differential amplifier for receiving the differential input signal from the transmitter module; a common mode module configured to sense the common mode current and sink or source the common mode current to minimize changes to an input impedance of the receiving amplifier; A signal isolator comprising:
2. 10. The signal isolator of claim 1, wherein the first or second die has a capacitively coupled signal connection for carrying the transmit signal.
3. The signal isolator of claim 1 , wherein the common mode module comprises a class AB amplifier.
4. 2. The signal isolator of claim 1, wherein the common mode module is configured to control an input common mode voltage that is adjusted such that a dynamic range of the differential amplifier is used for the differential input signal.
5. 2. The signal isolator of claim 1, wherein the common mode module is configured to control an input common mode voltage to be regulated such that a dynamic range of the differential amplifier is not used for the common mode current.
6. 10. The signal isolator of claim 1, wherein the receiver module is configured to isolate a differential impedance and a common mode impedance.
7. using a first die comprising a transmit module, the first die having a first voltage domain in a signal isolator; using a second die comprising a receiver module including a receiver amplifier configured to receive a transmit signal from the transmitter module including a differential signal and a common mode current; Including, the second die having a second voltage domain, the first and second dies being separated by an isolation barrier; The receiving amplifier includes: a differential amplifier for receiving the differential input signal from the transmitter module; a common mode module configured to sense the common mode current and sink or source the common mode current to minimize changes to an input impedance of the receiving amplifier; A method comprising:
8. The method of claim 7 , wherein the first or second die has a capacitively coupled signal connection for carrying the transmit signal.
9. The method of claim 7 , wherein the common mode module comprises a class AB amplifier.
10. The method of claim 7 , wherein the common mode module is configured to control an input common mode voltage that is adjusted such that a dynamic range of the differential amplifier is used for the differential input signal.
11. The method of claim 7 , wherein the common mode module is configured to control an input common mode voltage to be regulated such that a dynamic range of the differential amplifier is not used for the common mode current.
12. The method of claim 7 , wherein the receiver module is configured to separate the differential impedance and the common mode impedance.
13. a first die means for providing a transmitter module and a first voltage domain; a second die means for providing a receive module including a receive amplifier configured to receive a transmit signal including a differential signal and a common mode current from the transmit module; the second die having a second voltage domain, the first and second dies being separated by an isolation barrier, and the receiving amplifier comprising: a differential amplifier means for receiving the differential input signal from the transmitter module; and A signal isolator comprising common mode means for sensing said common mode current and for sinking or sourcing said common mode current to minimize modification of an input impedance of said receiving amplifier.
14. 14. The signal isolator of claim 13, wherein the first or second die means has a capacitively coupled signal connection for carrying the transmit signal.
15. 14. The signal isolator of claim 13, wherein the common mode means comprises a class AB amplifier.
16. 14. The signal isolator of claim 13, wherein the common mode means is configured to control an input common mode voltage to be adjusted such that a dynamic range of the differential amplifier is used for the differential input signal.
17. 14. The signal isolator of claim 13, wherein the common mode means is configured to control the input common mode voltage to be regulated such that the dynamic range of the differential amplifier is not used for the common mode current.
18. 14. The signal isolator of claim 13, wherein the receiving means is configured to isolate a differential impedance and a common mode impedance.
Citation Information
Patent Citations
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CN110943706A
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JP1997126875A
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Operational amplifier
JP2013066067A
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