Method of manufacturing wiring board

By adjusting the thickness of metal films and resin layers on the substrate surfaces and through holes, the method addresses warping issues in printed wiring boards, enhancing connection reliability through balanced conductor layer thicknesses.

JP2026004067APending Publication Date: 2026-01-14IBIDEN CO LTD
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Patent Information

Application Number
JP2024102280
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-06-25
Publication Date
2026-01-14

AI Technical Summary

Technical Problem

The printed wiring board in Patent Document 1 experiences warping due to differences in the total residual conductivity between conductor layers on opposite surfaces, leading to reduced reliability in connections with mounted components.

Method used

A method involving the formation of metal films with varying thicknesses on the substrate surfaces and through holes, followed by resin filling and polishing to adjust the thickness differences, thereby reducing warpage and enhancing connection reliability.

Benefits of technology

The method effectively reduces warpage and maintains the reliability of the wiring substrate by balancing the thickness of conductor layers, ensuring stable connections with mounted components.

✦ Generated by Eureka AI based on patent content.

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Abstract

To suppress warpage of a wiring board.SOLUTION: Forming a metal film such that the metal film on the first surface and the second surface and inside the through hole on an end portion side of the substrate is thicker than the metal film on the first surface and the second surface and inside the through hole in a central portion of the substrate; Filling the inside of the through-hole with a resin, forming a resin layer such that the protrusion of the resin from the second surface at the center portion of the substrate is higher than the protrusion of the resin from the second surface at the end portion side of the substrate, polishing the second surface side while causing the first surface side to follow a horizontal support member, and reducing the thickness difference of the metal film on the second surface between the end portion side of the substrate and the center portion of the substrate while leaving the protrusion of the resin from the second surface at the center portion of the substrate, and polishing the first surface side while causing the second surface side to follow a horizontal support member, and increasing the thickness difference of the metal film on the first surface between the end portion side of the substrate and the central portion of the substrate.SELECTED DRAWING: Figure 2I
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Description

[Technical Field]

[0001] The disclosed technology relates to a method for manufacturing a wiring board. [Background technology]

[0002] Patent document 1 discloses a printed wiring board in which the ratio per unit area of ​​the conductor layer formed on a first surface of an insulating substrate is different from the ratio per unit area of ​​the conductor layer formed on a second surface opposite the first surface of the insulating substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-134409 Summary of the Invention [Problem to be solved by the invention]

[0004] In the printed wiring board disclosed in Patent Document 1, the thickness of the conductor layer on the first surface of the insulating substrate may be equal to the thickness of the conductor layer on the second surface of the insulating substrate. In this case, if the ratio per unit area of ​​the conductor layer on the first surface differs from the ratio per unit area of ​​the conductor layer on the second surface, the difference in total residual conductivity may cause warping of the printed wiring board. [Means for solving the problem]

[0005] A method for manufacturing a wiring board according to the present disclosure includes preparing a substrate having a first surface, a second surface opposite to the first surface, and a plurality of through holes penetrating between the first surface and the second surface; forming metal films on the first surface and the second surface and inside the through holes at the end portions of the substrate so that the metal films are thicker than the metal films on the first surface and the second surface and inside the through holes at the center of the substrate; filling the insides of the through holes with resin, and forming a metal film such that the protrusion of the resin from the second surface at the center of the substrate is thicker than the metal films on the front surfaces of the substrate at the end portions. The method includes, in this order, forming a resin layer on the metal film on the first surface so that the resin is higher than the protrusion of the resin from the second surface; polishing the second surface while making the first surface follow a horizontal support member, thereby reducing the difference in thickness of the metal film on the second surface between the edge side of the substrate and the center of the substrate while leaving the resin protruding from the second surface at the center of the substrate; and polishing the first surface while making the second surface follow a horizontal support member, thereby increasing the difference in thickness of the metal film on the first surface between the edge side of the substrate and the center of the substrate.

[0006] According to the embodiments of the present disclosure, it is possible to reduce warpage of the wiring substrate, thereby suppressing a decrease in the reliability of the connection between the wiring substrate including the metal film and the mounted components. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a cross-sectional view showing an example of a wiring board manufactured by a wiring board manufacturing method according to a first embodiment of the present disclosure. [Figure 2A] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2B] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2C] 1A to 1C are plan views illustrating an example of a method for manufacturing a wiring substrate according to a first embodiment of the present disclosure. [Figure 2D] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2E] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2F] 1A to 1C are plan views illustrating an example of a method for manufacturing a wiring substrate according to a first embodiment of the present disclosure. [Figure 2G] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2H] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2I] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 2J] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 3A] FIG. 2E is an enlarged cross-sectional view showing the laminate corresponding to FIG. 2E. [Figure 3B] FIG. 2C is an enlarged cross-sectional view showing the laminate corresponding to FIG. 2G. [Figure 3C] FIG. 2J is an enlarged cross-sectional view showing the laminate corresponding to FIG. 2J. [Figure 4A] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 4B] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 4C] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 4D] 3A to 3C are cross-sectional views illustrating an example of a method for manufacturing a wiring board according to the first embodiment of the present disclosure. [Figure 5] FIG. 10 is an enlarged cross-sectional view showing a core substrate formed in the middle of an example of a method for manufacturing a wiring board according to a second embodiment of the present disclosure. [Figure 6] FIG. 10 is an enlarged cross-sectional view showing a core substrate formed in the middle of an example of a method for manufacturing a wiring board according to a third embodiment of the present disclosure. [Figure 7A] FIG. 10 is a side view showing an example of concave warpage of the core substrate of the first comparative example. [Figure 7B] FIG. 10 is a side view showing an example of convex warpage of the core substrate of the second comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, an example of an embodiment of the present disclosure will be described with reference to the drawings.

[0009] FIG. 1 is a cross-sectional view showing a wiring board 100, which is an example of a wiring board manufactured by a wiring board manufacturing method according to a first embodiment. To facilitate understanding of the first embodiment, the structure of the wiring board 100 will first be described. Note that the wiring board 100 is merely an example of a wiring board manufactured by a wiring board manufacturing method according to the first embodiment (hereinafter simply referred to as the "method of the first embodiment"). The layered structure and the number of conductor layers and insulating layers of a wiring board manufactured by the method of the first embodiment are not limited to the layered structure of the wiring board 100 shown in FIG. 1 and the number of conductor layers and insulating layers included in the wiring board 100. In addition, in the drawings referred to in the following description, characteristic portions may be drawn enlarged to facilitate understanding of the disclosed embodiments, and the components may not be drawn to exact proportions with respect to size or length.

[0010] As shown in FIG. 1, the wiring board 100 includes a core substrate 1, buildup layers 2 laminated on both sides of the core substrate 1, and solder resist 3 formed on each buildup layer 2. The core substrate 1 includes an insulating layer 10 having a first surface 1a and an opposite second surface 1b, and conductor layers 11 formed on each of the first surface 1a and the second surface 1b. The insulating layer 10 includes a reinforcing material 10a formed of, for example, glass fiber or aramid nonwoven fabric. The insulating layer 10 includes through-hole conductors 16 connecting the conductor layers 11 on both sides. The through-hole conductors 16 are filled with a filler 17 containing, for example, epoxy resin. The conductor layer 11 has a multilayer structure and includes, from the insulating layer 10 side, a metal foil 12, a metal film 13 (first metal film) including a lower metal film 131 and an upper metal film 132, and a metal film 15 (second metal film). Each of these metal films may further have a multilayer structure.

[0011] Buildup layers 2 are laminated on the first surface 1a and the second surface 1b of the insulating layer 10, respectively. The buildup layers 2 are an example of a buildup portion. Each buildup layer 2 includes an insulating layer 2a, a conductor layer 21, an insulating layer 2b, and a conductor layer 22, which are laminated in this order from the core substrate 1 side, and also includes via conductors 23 that penetrate each insulating layer. The via conductor 23 that penetrates the insulating layer 2a connects the conductor layer 11 to the conductor layer 21, and the via conductor 23 that penetrates the insulating layer 2b connects the conductor layer 21 to the conductor layer 22. Each via conductor 23 is formed integrally with the conductor layer 21 or the conductor layer 22. The conductor layers 21, 22, and the via conductor 23 are formed of a material having appropriate conductivity, such as copper or nickel. The insulating layers 2a, 2b are formed using a thermosetting or thermoplastic resin having appropriate insulating properties, such as an epoxy resin, a bismaleimide triazine resin (BT resin), a phenolic resin, a fluororesin, or a liquid crystal polymer (LCP).

[0012] The solder resist 3 has openings 3a that expose the conductor pads of the conductor layer 22. The solder resist 3 is made of, for example, a photosensitive epoxy resin or a polyimide resin.

[0013] Taking the case of manufacturing wiring board 100 of FIG. 1 as an example, a method for manufacturing a wiring board of the first embodiment will be described below with reference to FIGS. 2A to 2J and 4A to 4D, and continuing to refer to FIG.

[0014] 2A to 2C, the method of the first embodiment includes providing an insulating substrate 1c having a first surface 1a and a second surface 1b opposite to the first surface 1a with a through-hole 16a penetrating between the first surface 1a and the second surface 1b. The insulating substrate 1c constitutes the insulating layer 10 (see FIG. 1) of the wiring board 100 to be manufactured.

[0015] In the description of the method of the first embodiment, the side farther from the insulating substrate 1c (i.e., the insulating layer 10 of the wiring substrate 100) in the thickness direction of the insulating substrate 1c (i.e., the thickness direction of the wiring substrate 100) is also referred to as the "outside," "upper side," or "upper," or simply "upper." On the other hand, the side closer to the insulating substrate 1c is also referred to as the "inside," "lower side," or "lower," or simply "lower." Furthermore, in each conductor layer, the conductor pattern contained in each conductor layer, and each insulating layer, the surface facing away from the insulating substrate 1c is also referred to as the "upper surface," and the surface facing the insulating substrate 1c is also referred to as the "lower surface." The thickness direction of the insulating substrate 1c is also referred to as the "Z direction."

[0016] As shown in FIG. 2A, an insulating substrate 1c is prepared, having a first surface 1a and a second surface 1b opposite the first surface 1a. In the example of FIG. 2A, in which a wiring board 100 is manufactured, metal foils 12 are bonded to two main surfaces (first surface 1a and second surface 1b) of the insulating substrate 1c that are perpendicular to the thickness direction. For example, a double-sided copper-clad laminate may be prepared as the insulating substrate 1c having metal foils 12 on both sides. However, the metal foil 12 is not limited to copper and may be made of any metal with appropriate conductivity, such as nickel. Furthermore, the insulating substrate 1c prepared by the method of this embodiment does not necessarily have to have metal foil 12. Alternatively, the metal foil 12 and the insulating substrate 1c, which are separately prepared, may be bonded to each other by thermocompression bonding or by adhesion using an adhesive.

[0017] The insulating substrate 1c may have any thickness. For example, the insulating substrate 1c may have a thickness of 0.8 mm or more and 2.5 mm or less. Examples of materials for the insulating substrate 1c include thermosetting resins such as epoxy resin, BT resin, and phenolic resin, but the material for the insulating substrate 1c is not limited to these. In the example of FIG. 2A, the insulating substrate 1c includes a reinforcing material (core material) 10a. Examples of the reinforcing material 10a include glass fiber, aramid fiber, and aramid nonwoven fabric, but the material for the reinforcing material 10a is not limited to these. The insulating substrate 1c may further include a filler (not shown) made of particles such as silicon dioxide or alumina.

[0018] As shown in FIGS. 2B and 2C, through-holes 16a are formed through the insulating substrate 1c. FIG. 2C is a plan view showing the upper surface of the metal foil 12 on the first surface 1a side of the insulating substrate 1c shown in FIG. 2B. FIG. 2B is a cross-sectional view of the insulating substrate 1c taken along line IIB-IIB in FIG. 2C. In the example shown in FIGS. 2B and 2C, multiple through-holes 16a are formed through the insulating substrate 1c and the metal foils 12 on both sides of the insulating substrate 1c. The through-holes 16a can be formed by any method, such as drilling or laser processing using a carbon dioxide laser or other laser beam. The method of the first embodiment includes preparing an insulating substrate 1c as an example of a substrate having multiple through-holes 16a penetrating between the first surface 1a and the second surface 1b.

[0019] The through holes 16a are formed at positions where through-hole conductors 16 (see FIG. 2E) will be formed in a later process. The through holes 16a are formed to have any inner diameter depending on, for example, the electrical characteristics required of the wiring board to be manufactured. For example, the through holes 16a may have an inner diameter of 100 μm or more and 250 μm or less. Although the term "inner diameter" is used for convenience, the planar shape of the through holes 16a formed in the method of the first embodiment is not limited to a circular or elliptical shape, and the through holes 16a may have any planar shape. In addition, in the description of the method of the first embodiment, the "planar shape" refers to the shape of each object as seen in a planar view, and the "planar view" refers to the view of each object from a line of sight along the thickness direction of the wiring board 100 (see FIG. 1) or the insulating substrate 1c.

[0020] As shown in FIG. 2C, in the examples of FIGS. 2B and 2C, the plurality of through holes 16a are not uniformly formed in the insulating substrate 1c in a plan view. The insulating substrate 1c has regions with a large number of through holes 16a per unit area (i.e., regions with a high density of through holes 16a) and regions with a small number of through holes 16a per unit area (i.e., regions with a low density of through holes 16a). Specifically, the insulating substrate 1c has a high-density portion A, which is a region surrounded by a two-dot chain line, as a region with a large number of through holes 16a per unit area (i.e., a high-density region). The insulating substrate 1c also has a low-density portion B, which is a region other than the high-density portion A, as a region with a small number of through holes 16a per unit area (i.e., a non-high-density region). The high-density portion A has the through holes 16a formed at a higher density than the low-density portion B. For example, the high-density portion A has 6 through holes / mm 2 More than 25 pieces / mm 2 The through holes 16a are formed at a density of 0 / mm or less in the low density portion B. 2 More than 5 pieces / mm 2 The through holes 16a are formed at a density of 0 / mm or less. In the low-density portion B, which is a non-high-density region, the through holes 16a are formed particularly sparsely (low-density region). 2 More than 3 pieces / mm 2 The through holes 16a may be formed at the following density.

[0021] As an example, a high-density portion A is formed in the center of the insulating substrate 1c in a plan view, and a low-density portion B is formed around the insulating substrate 1c, i.e., on the edge side of the insulating substrate 1c. As an example, the high-density portion A is located below the electronic component mounted on the wiring substrate 100, and the low-density portion B is located outside the electronic component.

[0022] After the through-holes 16a are formed, resin residue (smear) in the through-holes 16a is preferably removed by a desmear treatment using, for example, a solution containing alkaline permanganate.

[0023] As shown in FIGS. 2D and 2E, the method of the first embodiment further includes forming a metal film 13 (first metal film) on each of the first surface 1a and the second surface 1b of the insulating substrate 1c and inside each through-hole 16a. In the example of FIGS. 2D and 2E, a lower-layer metal film 131 and an upper-layer metal film 132 are formed, thereby forming a two-layer metal film 13. The lower-layer metal film 131 and the upper-layer metal film 132 that constitute the metal film 13 are both formed so as to be continuous from each of the first surface 1a and the second surface 1b of the insulating substrate 1c to the inside of each through-hole 16a. Examples of metals used to form the lower-layer metal film 131 and the upper-layer metal film 132 include copper and nickel. However, these metal films may be formed of any metal having appropriate conductivity other than copper and nickel.

[0024] 2D, first, a lower metal film 131 is formed on the entire exposed surface of the metal foil 12 on each of the first and second surfaces 1a and 1b of the insulating substrate 1c, as well as on the entire inner wall surface of each through-hole 16a. The lower metal film 131 is formed, for example, by electroless plating or sputtering. The lower metal film 131 can be formed by any method capable of forming a metal film on both an insulator such as epoxy resin and a conductor such as the metal foil 12.

[0025] Next, as shown in FIG. 2E , an upper-layer metal film 132 is formed on the lower-layer metal film 131. The upper-layer metal film 132 is formed on the entire exposed surface of the lower-layer metal film 131, for example, by electrolytic plating using the lower-layer metal film 131 as a power supply layer. That is, as the upper-layer metal film 132, an electrolytic plated film is formed continuously from the first surface 1a and the second surface 1b of the insulating substrate 1c to the inner surface of each through hole 16a. As a result, a metal film 13 including the lower-layer metal film 131 and the upper-layer metal film 132 is formed. In this way, forming the metal film 13 in the method of the first embodiment may include forming, by electrolytic plating, a plated film that is continuous from the first surface 1a and the second surface 1b of the insulating substrate 1c to the inside of each through hole 16a.

[0026] A through-hole conductor 16 made of a lower metal film 131 and an upper metal film 132 (i.e., a metal film 13) is formed in the through hole 16a. Furthermore, the surface 13a of the metal film 13 may be roughened by an oxidation treatment (so-called blackening treatment) using a chemical solution, if necessary.

[0027] 2E and 2F, a laminate 91 is formed that includes an insulating substrate 1c, a plurality of through holes 16a, and a metal film 13. The laminate 91 is an example of a substrate after the metal film 13 has been formed. Specifically, the laminate 91 includes an insulating substrate 1c having a first surface 1a and a second surface 1b, a plurality of through holes 16a that penetrate between the first surface 1a and the second surface 1b, and a metal film 13 formed on the first surface 1a and the second surface 1b and inside the through holes 16a.

[0028] When forming the metal film 13, various factors can cause the metal film 13 to be formed without a uniform thickness, resulting in variations in the thickness of the metal film 13 within the surface to be plated (e.g., the surface of the metal foil 12 and the inner wall surface of the through hole 16a). For example, when the metal film 13 is formed by electroless plating or electrolytic plating in which the insulating substrate 1c is immersed in a plating solution, uneven flow of the plating solution can cause variations in the growth rate of the plating film, resulting in variations in the thickness of the metal film 13. Furthermore, when the metal film 13, for example, the upper-layer metal film 132 thereof, is formed by electrolytic plating as described above, variations in the electric field within the surface to be plated can cause variations in the thickness of the upper-layer metal film 132.

[0029] As described above, the upper-layer metal film 132 is continuously formed from the first surface 1a and the second surface 1b of the insulating substrate 1c to the inside of the through-holes 16a. Therefore, for example, variations in the number of through-holes 16a per unit area (i.e., the arrangement density of the through-holes 16a) can cause variations in the electric field when the upper-layer metal film 132 is formed by electroplating. That is, in the low-density portion B, where the number of through-holes 16a per unit area is small, the area of ​​the plated surface is smaller by the number of through-holes 16a compared to the high-density portion A, where the number of through-holes 16a per unit area is large. As a result, the electric field tends to concentrate in the low-density portion B, and thus a relatively thick plating film tends to be formed. On the other hand, a relatively thin plating film tends to be formed in the high-density portion A. For example, the metal film 13, which is composed of the upper-layer metal film 132 and the like, tends to be relatively thick in the low-density portion B, while the metal film 13, which is composed of the upper-layer metal film 132 and the like, tends to be relatively thin in the high-density portion A. If there is a variation in thickness of the metal film 13 formed of the upper metal film 132 and the like, then undulations corresponding to the difference in thickness may occur on the surface 13a of the metal film 13 opposite to the metal foil 12.

[0030] In the example of FIG. 2E , as shown in FIGS. 2E and 2F , the high-density region A, which has a greater number of through holes 16 a per unit area than the other regions, has recesses 4 recessed toward the metal foil 12 than the surrounding low-density region B. Note that FIG. 2F is a plan view showing the upper surface of the upper-layer metal film 132 on the first surface 1 a of the insulating substrate 1 c shown in FIG. 2E . The cross-sectional view of the insulating substrate 1 c taken along line IIE-IIE in FIG. 2F corresponds to FIG. 2E . The recesses 4 in the examples of FIGS. 2E and 2F are formed across the through holes 16 a so as to overlap with the through holes 16 a in a plan view. Thus, the method of the first embodiment includes preparing the metal film 13 so that the metal film 13 formed on the first surface 1 a and the second surface 1 b at the end of the laminate 91 and inside the through holes 16 a are thicker than the metal film 13 formed on the first surface 1 a and the second surface 1 b at the center of the laminate 91 and inside the through holes 16 a. The end side of the laminate 91 is an example of the end side of a substrate, and the center part of the laminate 91 is an example of the center part of a substrate.

[0031] As described above, the undulations on the surface 13a of the metal film 13 are caused by differences in the thickness of the conductor 92, which is composed of the metal foil 12 and the metal film 13. For example, the thermal expansion coefficient of the metal constituting the conductor 92 differs from that of the insulating substrate 1c, resulting in a difference in the amount of elongation of the conductor 92 and that of the insulating substrate 1c. For example, the thermal expansion coefficient of a metal constituting the conductor 92, such as copper, is greater than that of the insulating substrate 1c, making the amount of elongation of the conductor 92 likely to be greater than that of the insulating substrate 1c. Here, the thermal expansion coefficient of the insulating substrate 1c is a value in a direction parallel to the first surface 1a or the second surface 1b. Furthermore, if the thicknesses of the conductors 92 differ, differences in the amount of elongation of the conductors 92 will occur at locations where the thicknesses of the conductors 92 differ. Therefore, if differences in the thicknesses of the conductors 92 result in differences in the amount of conductor 92 per unit area, differences in the total residual conductivity may cause warping of the wiring board 100 (see FIG. 1). Here, the residual conductivity refers to the ratio of the amount of conductor 92 on a predetermined surface (for example, first surface 1a or second surface 1b) of insulating substrate 1c to the area of ​​the predetermined surface.

[0032] Here, the shape of warpage of the wiring board will be described with reference to Figures 7A and 7B. Figure 7A shows an example of warpage of wiring board 500 of the first comparative example. As shown in Figure 7A, concave warpage occurs in wiring board 500 due to the difference in the total residual conductivity between a first conductor layer (not shown) formed on first surface 502 side of wiring board 500 and a second conductor layer (not shown) formed on second surface 504 side of wiring board 500. Second surface 504 of wiring board 500 is the surface opposite first surface 502. Here, concave warpage refers to a shape in which central portion 502a of first surface 502 of wiring board 500 is recessed downward in the thickness direction relative to end portion 502b of first surface 502. For example, if the amount per unit area of ​​the first conductor layer in the central portion 502a on the first surface 502 side is greater than the amount per unit area of ​​the second conductor layer in the central portion 504a on the second surface 504 side, concave warping is likely to occur in the wiring substrate 500.

[0033] 7B shows an example of warpage of wiring board 510 of the second comparative example. As shown in FIG. 7B, convex warpage occurs in wiring board 510 due to a difference in the total residual conductivity between a first conductor layer (not shown) formed on first surface 512 of wiring board 510 and a second conductor layer (not shown) formed on second surface 514 of wiring board 510. Second surface 514 of wiring board 510 is the surface opposite first surface 512. Here, convex warpage refers to a shape in which central portion 512a of first surface 512 of wiring board 510 protrudes upward in the thickness direction relative to end portion 512b of first surface 512. For example, if the amount per unit area of ​​the first conductor layer in central portion 512a on the first surface 512 side is smaller than the amount per unit area of ​​the second conductor layer in central portion 514a on the second surface 514 side, wiring board 510 is likely to experience convex warpage.

[0034] However, according to the method of the first embodiment, as will be described below, the thickness of the metal film 13 on the first surface 1a side of the insulating substrate 1c and the thickness of the metal film 13 on the second surface 1b side of the insulating substrate 1c are adjusted in a post-process. This makes it possible to reduce warpage of the wiring substrate 100. As a result, it is possible to prevent a decrease in the reliability of the wiring substrate 100 itself and its mounting reliability.

[0035] Here, an example of the layer thickness of the conductor 92 composed of the metal foil 12 and the metal film 13 will be described using FIG. 3A. FIG. 3A is an enlarged cross-sectional view showing a portion of the laminate 91 of FIG. 2E. As shown in FIG. 3A, in the low-density portion B, the layer thickness t1 of the conductor 92 on each of the first surface 1a and the second surface 1b of the insulating substrate 1c is, for example, 57.0 μm. In the high-density portion A, the layer thickness t2 of the conductor 92 on each of the first surface 1a and the second surface 1b of the insulating substrate 1c is, for example, 30.5 μm. Therefore, the layer thickness difference (t1-t2) of the conductor 92 on the surface layer of the insulating substrate 1c is 26.5 μm.

[0036] 3A, in the low-density portion B, the layer thickness t3 of the conductor 92 inside the through-hole 16a of the insulating substrate 1c is, for example, 33.0 μm. In the high-density portion A, the layer thickness t4 of the conductor 92 inside the through-hole 16a of the insulating substrate 1c is, for example, 16.3 μm. Therefore, the layer thickness difference (t3-t4) of the conductor 92 inside the through-hole 16a of the insulating substrate 1c is 16.7 μm. For example, due to the layer thickness difference (t3-t4), the inner diameter D1 of the cylindrical conductor 92 inside the through-hole 16a in the low-density portion B is smaller than the inner diameter D2 of the cylindrical conductor 92 inside the through-hole 16a in the high-density portion A (D1 <D2)。

[0037] As shown in FIG. 2G, for example, a resin layer 5 is formed on the metal film 13 on the first surface 1a and the second surface 1b of the insulating substrate 1c, filling the recesses 4 on the surface 13a of the metal film 13. For example, the resin layer 5 is formed by printing the resin constituting the resin layer 5 on the metal film 13 on the first surface 1a or the second surface 1b of the insulating substrate 1c. The resin layer 5 may be formed of any resin, for example, a thermosetting resin such as an epoxy resin or a BT resin, or a thermoplastic resin such as a fluororesin or an LCP. The resin layer 5 may be formed of the same resin as the resin constituting the insulating substrate 1c. However, from the perspective of ease of processing in subsequent steps, a resin layer 5 that does not contain a reinforcing material such as the reinforcing material 10a contained in the insulating substrate 1c is preferred. From the standpoint of reliability, a resin having a thermal expansion coefficient equal to or close to that of the insulating substrate 1c being used is preferable, and more preferably, a resin having a thermal expansion coefficient equal to or close to that of the insulating substrate 1c in the Z direction is desirable.

[0038] In the example shown in FIG. 2G, the inside of the through-hole 16a (the inside of the through-hole conductor 16) is filled with a portion of the resin constituting the resin layer 5. The resin filling the through-hole 16a forms a filler 17. Thus, forming the resin layer 5 in the method of the first embodiment includes filling the inside of the through-hole 16a, which has the metal film 16 on its surface, with a portion of the resin constituting the resin layer 5. When the through-hole 16a is filled with a portion of the resin constituting the resin layer 5 in this manner, a first resin layer 5 containing an inorganic filler (not shown), such as silicon dioxide or alumina, may be preferable in terms of matching the thermal expansion coefficient of the insulating substrate 1c. Filling the through-hole 16a also makes it possible, for example, to form a via conductor 23 (see FIG. 4D) directly above the through-hole conductor 16 in a later process.

[0039] In the example shown in FIG. 2G, the resin layer 5 is formed by printing a resin (e.g., an appropriate resin such as epoxy resin) that constitutes the resin layer 5 on the first surface 1a of the insulating substrate 1c. For example, by printing the resin that constitutes the resin layer 5 on the first surface 1a of the insulating substrate 1c, the resin fills the inside of the through-hole 16a from the first surface 1a and is then ejected onto the second surface 1b. As an example, the resin fills the inside of the through-hole 16a from the first surface 1a side of the insulating substrate 1c toward the second surface 1b side. This forms the resin layer 5 on the metal film 13 on the first surface 1a.

[0040] 3B is an enlarged cross-sectional view showing a portion of the laminate 91 of FIG. 2G. In the laminate 91, as described above, the inner diameter D1 of the cylindrical conductor 92 inside the through-hole 16a in the low-density portion B is smaller than the inner diameter D2 of the cylindrical conductor 92 inside the through-hole 16a in the high-density portion A (see FIG. 3A). Therefore, in the low-density portion B, it is more difficult for the resin to be ejected onto the second surface 1b than in the high-density portion A. Ensuring that the resin is ejected onto the second surface 1b in the low-density portion B increases the amount of resin ejected onto the second surface 1b in the high-density portion A. As a result, as shown in FIG. 3B, the thickness of the resin layer 5 on the second surface 1b side is thicker than the thickness of the resin layer 5 on the first surface 1a side. Thus, the method of the first embodiment includes filling the inside of the through hole 16a with resin and forming a resin layer 5 on the metal film 13 on the first surface 1a so that the protrusion of the resin from the second surface 1b at the center of the laminate 91 is higher than the protrusion of the resin from the second surface 1b at the end side of the laminate 91.

[0041] 3B, the thickness rt1 of the resin layer 5 on the first surface 1a side in the high density portion A is, for example, 36.1 μm, and the thickness rt2 of the resin layer 5 on the second surface 1b side in the high density portion A is, for example, 118.6 μm. Furthermore, the thickness rt3 of the resin layer 5 on the first surface 1a side in the low density portion B is, for example, 56.4 μm, and the thickness rt4 of the resin layer 5 on the second surface 1b side in the low density portion B is, for example, 32.5 μm.

[0042] As shown in FIG. 2H, the method of the first embodiment includes polishing the resin layer 5 on one side of the first surface 1a and the second surface 1b. In the example shown in FIG. 2H, first, polishing of the second surface 1b side is performed, which polishes the resin layer 5 on the second surface 1b side, which is one side of the insulating substrate 1c. This polishing of the second surface 1b side is the initial polishing of the resin layer 5 on the second surface 1b side, and is the first axis polishing. Polishing of the second surface 1b side can be performed by any method that can remove a portion of the resin layer 5 in the thickness direction. For example, mechanical polishing such as sanding with a belt sander or buffing with a ceramic buff roll can be used to polish the second surface 1b side.

[0043] 2H, the resin layer 5 on the second surface 1b side of the laminate 91 is polished by rotating a ceramic buff roll 64 while the first surface 1a side of the laminate 91 is supported by a horizontal support roll 62. The support roll 62 is an example of a support member, and the ceramic buff roll 64 is an example of a buffing device. Thus, polishing the second surface 1b side in the method of the first embodiment may include buffing the resin layer 5 on the second surface 1b side with the ceramic buff roll 64 while the first surface 1a side of the laminate 91 is supported by the support roll 62.

[0044] As shown in FIG. 2H, in the initial polishing of the resin layer 5 on the second surface 1b side (i.e., the first axis), the resin layer 5 on the second surface 1b side of the high-density portion A is thick, so it may not be possible to remove a portion of the resin layer 5. For example, the height of the surface of the resin layer 5 relative to the second surface 1b of the insulating substrate 1c in the high-density portion A may be higher than the height of the surface of the conductor 92 relative to the second surface 1b of the insulating substrate 1c in the low-density portion B. By polishing the second surface 1b side while moving the first surface 1a side along the horizontal support roll 62, the difference in thickness of the metal film on the second surface 1b between the end sides of the laminate 91 and the center of the laminate 91 is reduced while leaving the resin protruding from the second surface 1b at the center of the laminate 91.

[0045] As shown in FIG. 2I, the method of the first embodiment includes polishing the resin layer 5 on the other side of the first surface 1a and the second surface 1b. In the example shown in FIG. 2I, polishing of the first surface 1a is performed to polish the resin layer 5 on the first surface 1a, which is the other side of the insulating substrate 1c. In this manner, the method of the first embodiment includes polishing the second surface 1b and then polishing the first surface 1a, in this order. The polishing of the first surface 1a is the initial polishing of the resin layer 5 on the first surface 1a, and is the second axis. For example, mechanical polishing such as sanding with a belt sander or buffing using a ceramic buff roll may be performed to polish the first surface 1a.

[0046] 2I, similar to the polishing of the second surface 1b side shown in FIG. 2H, the resin layer 5 on the first surface 1a side is polished by rotating a ceramic buff roll 64 while the second surface 1b side of the laminate 91 is supported by a horizontal support roll 62. In this way, polishing the first surface 1a side in the method of the first embodiment can include buffing the resin layer 5 on the first surface 1a side with the ceramic buff roll 64 while the second surface 1b side of the laminate 91 is supported by the support roll 62.

[0047] In the example shown in FIG. 2I, the height of the surface of the resin layer 5 relative to the second surface 1b of the insulating substrate 1c in the high-density portion A is higher than the height of the surface of the conductor 92 relative to the second surface 1b of the insulating substrate 1c in the low-density portion B. Therefore, when the support roll 62 pushes the resin layer 5 on the second surface 1b of the high-density portion A in the direction of arrow F, the resin layer 5 and metal film 13 on the first surface 1a of the high-density portion A are excessively polished, resulting in a thin layer of the conductor 92. Therefore, polishing the first surface 1a while moving the second surface 1b side along the horizontal support roll 62 increases the difference in thickness of the metal film 13 on the first surface 1a of the laminate 91 between the edge and center portions of the laminate 91. Note that, for clarity, FIG. 2I does not accurately depict the thickness of the metal film 13 or the position of the ceramic buff roll 64, but rather shows them schematically. In this way, polishing the first surface 1a side in the method of the first embodiment may include partially exposing the metal film 13 on the first surface 1a side, which is the other side of the insulating substrate 1c.

[0048] In the method of the first embodiment, the second surface 1b side polishing, which polishes the resin layer 5 on the second surface 1b side of the insulating substrate 1c, and the first surface 1a side polishing, which polishes the resin layer 5 on the first surface 1a side of the insulating substrate 1c, are performed at least once. At this time, polishing of the second surface 1b side and polishing of the first surface 1a side are performed in this order at least once. For example, polishing of the second surface 1b side and polishing of the first surface 1a side may be performed twice in this order. As a result, as shown in FIG. 2J, the metal film 13 on the first surface 1a side and the metal film 13 on the second surface 1b side are exposed, and the thickness of the metal film 13 on the first surface 1a side and the metal film 13 on the second surface 1b side are adjusted. Thus, polishing of the second surface 1b side in the method of the first embodiment may include partially exposing the metal film 13 on the second surface 1b side, which is one side of the insulating substrate 1c.

[0049] For example, when polishing the second surface 1b side from the third axis onward, the resin layer 5 in the high-density portion A on the second surface 1b side remains, making it difficult to polish the metal film 13 on the second surface 1b side. Furthermore, when polishing the first surface 1a side from the fourth axis onward, the support roll 62 pushes up the resin layer 5 in the high-density portion A on the second surface 1b side in the direction of arrow F, making it easier to polish the metal film 13 in the high-density portion A on the first surface 1a side, resulting in a thinner metal film 13. For example, the thickness of the metal film 13 on the first surface 1a side and the thickness of the metal film 13 on the second surface 1b side may be adjusted by controlling one or more of the number of times the second surface 1b side is polished and the first surface 1a side is polished, the amount of polishing by polishing the second surface 1b side, and the amount of polishing by polishing the first surface 1a side.

[0050] The number of times that the second surface 1b side and the first surface 1a side are polished does not have to be the same. For example, by polishing the second surface 1b side, polishing the first surface 1a side, and polishing the second surface 1b side in this order, the second surface 1b side may be polished twice and the first surface 1a side may be polished once in total.

[0051] For example, if the central portion of the laminate 91 tends to warp convexly, protruding upward in the thickness direction relative to the end portions, the thickness of the metal film 13 on the first surface 1a, which is the surface on the convex warp side of the central portion of the laminate 91, may be made thinner than the thickness of the metal film 13 on the second surface 1b. That is, in the method of the first embodiment, if the central portion of the laminate 91 tends to warp convexly, protruding relative to the end portions, the method may include making the thickness of the metal film 13 on the surface on the convex warp side of the central portion of the laminate 91 thinner than the thickness of the metal film 13 on the opposite surface.

[0052] 3C is an enlarged cross-sectional view showing a portion of the laminate 91 of FIG. 2J. As shown in FIG. 3C, the layer thickness t7 of the conductor 92 on the second surface 1b side of the low-density portion B is, for example, 23.9 μm. The layer thickness t8 of the conductor 92 on the second surface 1b side of the high-density portion A is, for example, 22.2 μm. Therefore, the layer thickness difference (t7-t8) of the conductor 92 on the second surface 1b side is 1.7 μm. At this time, the layer thickness difference (t7-t8) of the conductor 92 on the second surface 1b side is smaller than the initial layer thickness difference (t1-t2) of the conductor 92. Thus, the method of the first embodiment involves polishing the second surface 1b side while making the first surface 1a side follow the horizontal support roll 62, thereby reducing the difference in thickness of the metal film on the second surface 1b between the end side of the laminate 91 and the center of the laminate 91 while leaving the resin protruding from the second surface 1b at the center of the laminate 91 as a substrate.

[0053] 3C, the layer thickness t5 of the conductor 92 on the first surface 1a side of the low-density portion B is, for example, 49.5 μm. The layer thickness t6 of the conductor 92 on the first surface 1a side of the high-density portion A is, for example, 11.1 μm. Therefore, the layer thickness difference (t5-t6) of the conductor 92 on the first surface 1a side is 38.4 μm. At this time, the layer thickness difference (t5-t6) of the conductor 92 on the first surface 1a side is greater than the initial layer thickness difference (t1-t2) of the conductor 92. As described above, the method of the first embodiment includes polishing the second surface 1b side, and then polishing the first surface 1a side while moving the second surface 1b side along the horizontal support roll 62, thereby increasing the thickness difference of the metal film 13 on the first surface 1a between the end sides of the laminate 91 and the center of the laminate 91. In the example shown in FIG. 3C, the layer thickness t6 of the conductor 92 on the first surface 1a side of the high density portion A, which is the center of the laminate 91, is thinner than the layer thickness t8 of the conductor 92 on the second surface 1b side of the high density portion A (t6 <t8)。

[0054] In this way, for example, if the central portion of laminate 91 tends to warp convexly, protruding upward in the thickness direction relative to the end portions, the thickness of metal film 13 on first surface 1a, which is the surface on the convex warp side of the central portion of laminate 91, may be made thinner than the thickness of metal film 13 on second surface 1b. In this way, by controlling the balance of the layer thicknesses of conductors 92 on the front and back sides of laminate 91, it is possible to cancel out the warping stress that occurs in laminate 91 due to the difference in total residual conductivity.

[0055] This reduces warpage of wiring board 100. Furthermore, it is possible to prevent a decrease in the reliability of connection between wiring board 100 including metal film 13 and mounted components.

[0056] When manufacturing the wiring board 100 of FIG. 1, the method of the first embodiment may include further steps, which will be described below with reference to FIGS. 4A to 4D. In the following description, the insulating substrate 1c is also referred to as the "insulating layer 10." Note that the difference in thickness between the metal film 13 on the first surface 1a side and the metal film 13 on the second surface 1b side, as well as the difference in thickness between the metal film 13 in the high-density portion A and the low-density portion B, is quite small, on the order of several tens of μm. For this reason, in FIGS. 4A to 4D, to make each step easier to understand, the difference in thickness of the metal film 13 is not shown, and the metal film 13 is shown as having a substantially uniform thickness.

[0057] 4A, metal films 13 are formed on the first surface 1a and the second surface 1b of insulating substrate 1c, and metal films 13 are formed inside a plurality of through holes 16a. As described above, the difference in thickness of metal films 13 is not shown.

[0058] As shown in FIG. 4B , a metal film 15 (second metal film) is formed on the surface 13a of the metal film 13 and on the end face of the filler 17 that fills the inside of the through-hole conductor 16 (i.e., the inside of the through-hole 16a). The metal film 15 can be formed by, for example, electroless plating or sputtering. The metal film 15 may be formed to have a two-layer structure by electroless plating or sputtering, etc., and electrolytic plating using the metal film formed by electroless plating or the like as a power supply layer. By forming the metal film 15 that covers the end face of the filler 17 so as to be in contact with the metal film 13 surrounding the through-hole conductor 16, a via conductor 23 (see FIG. 4D ) that is electrically connected to the through-hole conductor 16 can be formed directly above the through-hole conductor 16 in a later process. In other words, the metal film 15 covers the through-hole conductor 16, so-called cap plating. By forming the metal film 15, the conductor layer 11 made up of the metal foil 12, the metal film 13, and the metal film 15 is formed on each of the first surface 1a and the second surface 1b of the insulating layer 10.

[0059] After the metal film 15 is formed, an etching resist R is provided on the metal film 15, for example, by laminating a dry film resist. The etching resist R is exposed using an exposure mask with appropriate openings, and developed to form openings Ra that expose portions other than the portions where the conductor pattern to be formed on the conductor layer 11 is to be formed. Then, the portions of the conductor layer 11 exposed in the openings Ra are removed by, for example, wet etching or dry etching, and the conductor layer 11 is patterned.

[0060] As shown in Fig. 4C, a conductor layer 11 is obtained that includes a desired conductor pattern, such as conductor pads 11a that are through-hole pads for through-hole conductors 16. Portions of the first surface 1a and the second surface 1b of insulating layer 10 that are not covered by conductor layer 11 are exposed. Core substrate 1 of wiring board 100 of Fig. 1 is completed.

[0061] As shown in FIG. 4D, buildup layers 2 are formed on both sides of core substrate 1. Buildup layers 2 can be formed by a general buildup method. For example, insulating layer 2a is formed by laminating a semi-cured epoxy resin, BT resin, or fluororesin molded into a film or sheet on core substrate 1 and thermocompressing it. Conductor layer 21 is formed on insulating layer 2a by any method such as a subtractive method, a semi-additive method, or a full-additive method, and via conductors 23 are formed in insulating layer 2a. Furthermore, insulating layer 2b and conductor layer 22 are formed by the same methods as insulating layer 2a and conductor layer 21, respectively, and via conductors 23 are also formed in insulating layer 2b.

[0062] Then, solder resist 3 is formed on the build-up layer 2. The solder resist 3 is formed by supplying, for example, a photosensitive epoxy resin or polyimide resin by spraying, laminating, printing, or the like. Openings 3a are formed at desired positions by exposure using an exposure mask (not shown) with appropriate openings, development, laser processing, or the like. Through the above steps, the wiring board 100 of FIG. 1 is completed.

[0063] FIG. 5 shows an example of a method for manufacturing a wiring board according to the second embodiment of the present disclosure. FIG. 5 is a cross-sectional view showing an example of a laminate 201. The laminate 201 has been polished at least once: the second surface 1b side of the insulating substrate 1c is polished to polish the resin layer 5 on the second surface 1b side, and the first surface 1a side is polished to polish the resin layer on the first surface 1a side of the insulating substrate 1c. As a result, as shown in FIG. 5, the metal film 13 on the second surface 1b side of the insulating substrate 1c is exposed, and the metal film 13 on the first surface 1a side of the insulating substrate 1c is exposed, thereby adjusting the thickness of the metal film 13 on the second surface 1b side and the thickness of the metal film 13 on the first surface 1a side.

[0064] For example, if the central portion of the laminate 201 tends to be concavely warped downward in the thickness direction relative to the end portions, the thickness of the metal film 13 on the first surface 1a, which is the surface on the concavely warped side of the central portion of the laminate 201, may be made thicker than the thickness of the metal film 13 on the second surface 1b. For example, when polishing the second surface 1b side to polish the resin layer 5 on the second surface 1b side of the insulating substrate 1c, adjustment is made so that the metal film 13 on the second surface 1b side is polished more than the metal film 13 on the first surface 1a side. This makes the thickness t11 of the metal film 13 on the first surface 1a side of the high-density portion A, which is the central portion of the laminate 201, thicker than the thickness t13 of the metal film 13 on the second surface 1b side of the high-density portion A (t11>t13). In this way, the method of the second embodiment may include making the thickness of the metal film 13 on the concave warped surface of the central part of the laminate 201 thicker than the thickness of the metal film 13 on the opposite surface when the central part of the laminate 201 tends to be concave downward relative to the end side.

[0065] Other steps of the method of the second embodiment are the same as those of the first embodiment. That is, after the example shown in Fig. 5, steps similar to those shown in Fig. 4A to Fig. 4D are performed to form a wiring substrate 100 similar to that of the method of the first embodiment.

[0066] 5, the warpage stress generated in laminate 201 can be offset by the total residual conductivity of conductors 92. This can reduce the warpage of wiring board 100. Furthermore, it can prevent a decrease in the connection reliability between wiring board 100 including metal film 13 and mounted components.

[0067] FIG. 6 shows an example of a method for manufacturing a wiring board according to the third embodiment of the present disclosure. FIG. 6 is a cross-sectional view showing an example of a laminate 251.

[0068] In the method for manufacturing a wiring board according to the third embodiment, the same steps as those in FIGS. 2A to 2J in the method for manufacturing a wiring board according to the first embodiment are performed. In particular, similar to FIGS. 2H and 2I, the polishing on the second surface 1b side for polishing the resin layer 5 on the second surface 1b side of the insulating substrate 1c and the polishing on the first surface 1a side for polishing the resin layer on the first surface 1a side of the insulating substrate 1c are performed one or more times (see laminate 91). As a result, similar to FIG. 2J, the metal film 13 on the second surface 1b side of the insulating substrate 1c is exposed and the metal film 13 on the first surface 1a side of the insulating substrate 1c is exposed, and the thickness of the metal film 13 on the second surface 1b side and the thickness of the metal film 13 on the first surface 1a side are adjusted (see laminate 91).

[0069] Then, by reversing the top and bottom of the laminate 91, the laminate 251 according to the third embodiment is obtained. For example, when the central portion of the laminate 251 has a tendency to be concave downward in the thickness direction with respect to the end portion side, the thickness t8 of the metal film 13 on the second surface 1b side of the high-density portion A, which is the surface on the concave side of the central portion of the laminate 251, is made thicker than the thickness t6 of the metal film 13 on the first surface 1b side of the high-density portion A (t6 < t8). The second surface 1b, which is the surface on the concave side of the central portion of the laminate 251, is the upper surface of the laminate 251 shown in FIG. 6. Thus, in the method according to the third embodiment, when the central portion of the laminate 251 has a tendency to be concave downward with respect to the end portion side, it may include making the thickness of the metal film 13 on the surface on the concave side of the central portion of the laminate 251 thicker than the thickness of the metal film 13 on the opposite surface.

[0070] In addition, other steps of the method according to the third embodiment are the same as those of the first embodiment. That is, after the example shown in FIG. 6, by performing the same steps as those in FIGS. 4A to 4D, a wiring board 100 similar to that of the first embodiment is formed.

[0071] 6, the difference in the total residual conductivity of conductors 92 can offset the warpage stress generated in laminate 251. This can reduce the warpage of wiring board 100. Furthermore, it can prevent a decrease in the connection reliability between wiring board 100 including metal film 13 and mounted components.

[0072] The methods for manufacturing wiring boards according to the first to third embodiments of the present disclosure are not limited to the methods described with reference to the drawings. For example, as described above, wiring boards having any laminated structure and any number of layers can be manufactured by the methods for manufacturing wiring boards according to the first to third embodiments. Furthermore, cap plating (a metal film such as metal film 15 in the example of FIG. 4B) covering the through-hole conductors need not be formed. The methods for manufacturing wiring boards according to the first to third embodiments may include any additional process steps in addition to the processes described above, or some of the processes described above may be omitted. [Explanation of symbols]

[0073] 1 Core board 1a 1st page 1b 2nd side 1c Insulating substrate 5 Resin layer 12 Metal foil 13 Metal Film 16 through-hole conductor 16a Through hole 62 Support roll (an example of a support member) 64 Ceramic buff roll (an example of buffing) 91 Laminated Plate 92 Conductor 92 Laminated Plate 100 wiring board 131 Lower metal film 132 Upper metal film 201 Laminated Plate 251 Laminated Plate A High density area B Low density area

Claims

1. preparing a substrate having a first surface, a second surface opposite to the first surface, and a plurality of through holes penetrating between the first surface and the second surface; forming the metal film so that the metal film formed on each of the first surface and the second surface at the end side of the substrate and inside the through hole is thicker than the metal film formed on each of the first surface and the second surface at the center of the substrate and inside the through hole; filling the inside of the through hole with resin, and forming a resin layer on the metal film on the first surface so that the protrusion of the resin from the second surface at the center of the substrate is higher than the protrusion of the resin from the second surface at the end side of the substrate; polishing the second surface side while making the first surface side follow a horizontal support member, thereby reducing a difference in thickness of the metal film on the second surface between the end side of the substrate and the central part of the substrate while leaving the resin protruding from the second surface at the central part of the substrate; polishing the first surface side while making the second surface side follow a horizontal support member, thereby increasing a difference in thickness of the metal film on the first surface between the edge side of the substrate and the central part of the substrate; A method for manufacturing a wiring board, comprising the steps of:

2. A method for manufacturing a wiring board as described in claim 1, wherein preparing the substrate includes forming a high-density portion in which the number of through holes per unit area of ​​the substrate is large and a low-density portion in which the number of through holes per unit area of ​​the substrate is small.

3. 2. The method for manufacturing a wiring board according to claim 1, wherein polishing the second surface side includes partially exposing the metal film on the second surface side.

4. 2. The method for manufacturing a wiring board according to claim 1, wherein polishing the first surface side includes partially exposing the metal film on the first surface side.

5. 2. The method for manufacturing a wiring board according to claim 1, wherein polishing the second surface side includes polishing the resin layer on the second surface side by buffing while the first surface side is supported by the support member.

6. 6. A method for manufacturing a wiring board according to claim 5, wherein polishing the first surface side includes polishing the resin layer on the first surface side by buffing while the second surface side is supported by the support member.

7. A method for manufacturing a wiring board according to claim 2, wherein preparing the substrate includes forming the high-density portion in the center of the substrate when viewed in a plane and forming the low-density portion on the edge side of the substrate.

8. 2. The method for manufacturing a wiring board according to claim 1, further comprising forming build-up portions each consisting of a plurality of insulating layers and a plurality of conductor layers on the first surface and the second surface.