Electronic circuit board
The multilayer wiring structure with overlapping output patterns on an asymmetric half-bridge circuit board suppresses noise and facilitates efficient heat dissipation by canceling magnetic fields, addressing the noise issues in inverter circuits for switched reluctance motors.
Patent Information
- Application Number
- JP2021210155
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-12-24
- Publication Date
- 2025-08-28
- Estimated Expiration
- 2041-12-24
AI Technical Summary
Asymmetric half-bridge circuits in inverter circuits for switched reluctance motors require six output wiring patterns, which tend to be thin and generate noise due to high impedance, and existing technologies do not adequately address noise suppression.
The circuit board design features a multilayer wiring structure with overlapping output wiring patterns on different layers, arranged in a trapezoidal shape to widen towards terminals and cancel out magnetic fields, and groups switching elements on opposite surfaces to facilitate wide, short wiring patterns.
This design effectively suppresses noise by canceling out magnetic fields and allows for wider, shorter wiring patterns, reducing noise and enabling efficient heat dissipation.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to an electronic circuit board on which an asymmetrical half-bridge circuit serving as a three-phase inverter circuit is mounted, for example as a driving device for a switched reluctance motor. [Background technology]
[0002] Switched reluctance motors (also known as SR motors) have been attracting attention in recent years as drive sources for various devices because they do not require permanent magnets containing rare earths. In SR motors, current is applied independently to each of the three phase coils (U, V, and W), for example, so an asymmetric half-bridge circuit is used as the three-phase inverter circuit that serves as the drive circuit for the SR motor (see Patent Document 1).
[0003] Patent Document 2 discloses a circuit board on which a three-phase inverter circuit serving as a drive circuit for a three-phase brushless motor is mounted, in which a first electronic component having three resin-molded semiconductor switching elements that form the upper arm and a second electronic component having three resin-molded semiconductor switching elements that form the lower arm are arranged opposite each other on the front and back of the circuit board, with a through-hole provided in the board between them. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] International Publication No. 2018 / 084092 [Patent Document 2] Japanese Patent Application Laid-Open No. 2016-129461 Summary of the Invention [Problem to be solved by the invention]
[0005] As disclosed in Fig. 13 of Patent Document 1, an asymmetric half-bridge circuit requires output wiring from each of the six switching elements to a load (e.g., a coil of an SR motor). Therefore, when the asymmetric half-bridge circuit is mounted on a printed wiring board, a total of six output wiring patterns are printed and formed between the six terminals of a connector provided on the wiring board and each of the switching elements.
[0006] Inverter circuits used in motor drive circuits and the like generally suffer from noise generation at their output side. To suppress such noise, it is preferable to make each output wiring pattern thick and short so as to reduce impedance. However, when six output wiring patterns are laid out between six semiconductor switching elements mounted on a printed wiring board and a connector, each output wiring pattern tends to be thin. This causes noise problems due to the current flowing through these six output wiring patterns.
[0007] Patent Document 2 is a technology that aims to improve the heat dissipation of a motor drive circuit by taking advantage of the fact that the first electronic component and the second electronic component are not energized at the same time, and does not give any consideration to noise suppression in an asymmetric half-bridge circuit.
[0008] An object of the present invention is to provide an electronic circuit board on which an asymmetric half-bridge circuit is mounted so as to suppress noise in an output wiring pattern. [Means for solving the problem]
[0009] In one aspect, the present invention provides an electronic circuit board having an asymmetrical half-bridge circuit that serves as a three-phase inverter circuit mounted on a multilayer wiring board having a first surface and a second surface, A connector having six terminals arranged in a row is attached to one side edge of the multilayer wiring board, Two switching elements constituting each phase are arranged on the first surface and the second surface, respectively. and two switching elements constituting each phase are arranged in positions that overlap each other when projected in the lamination direction of the multilayer wiring board. And, The three switching elements on each of the first surface and the second surface are arranged in a straight line toward the connector. First and second sides Two switching elements each Towards the above terminal The extending output wiring patterns are respectively wired on different layers of the multilayer wiring board, Each output wiring pattern has a trapezoidal shape that widens toward an adjacent pair of terminals, and has a notch at its tip edge to avoid contact with one of the terminals, When projected in the lamination direction of the multilayer wiring board, Whole body excluding cutout are arranged so as to overlap each other. [Effects of the Invention]
[0010] According to this invention, currents flow simultaneously in opposite directions in the two output wiring patterns that overlap when projected in the stacking direction of the multilayer wiring board, so the magnetic fields generated by each cancel each other out, thereby suppressing noise. In addition, six switching elements are arranged in groups of three on the first surface and three on the second surface, making it easy to layout relatively wide output wiring patterns. [Brief explanation of the drawings]
[0011] [Figure 1] FIG. 1 is a circuit diagram showing an example of an asymmetric half-bridge circuit. [Figure 2] An explanatory diagram of the configuration of an SR motor. [Figure 3] 1A and 1B are explanatory views showing the main part of the electronic circuit board of the first embodiment, comparing (a) the first surface with (b) the second surface. [Figure 4] FIG. 3 is an explanatory diagram of the flow of current and magnetic fields in the electronic circuit board of the first embodiment. [Figure 5] FIG. 3 is an explanatory diagram of a current flow and a magnetic field in a cross section perpendicular to the longitudinal direction of the output wiring pattern according to the first embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0012] An embodiment in which this invention is applied to an SR motor drive device will be described below with reference to the drawings. First, an SR motor and an asymmetric half-bridge circuit serving as a three-phase inverter circuit for driving the SR motor will be outlined. FIG. 2 shows a typical 4-pole, 6-slot SR motor M. This SR motor M is composed of a rotor 1 having four salient poles, for example, made of laminated electromagnetic steel sheets, and a stator 2 having six salient poles and coils C1 to C6. Coils C1 and C2, which are positioned opposite each other, are connected in series to each other as a U-phase coil. Similarly, coils C3 and C4, which are positioned opposite each other, are connected in series to each other as a V-phase coil, and coils C5 and C6 are connected in series to each other as a W-phase coil. The coils for the U, V, and W phases are independent and not connected to each other, and are individually energized by the asymmetric half-bridge circuit illustrated in FIG. 1. The rotor 1 of the SR motor M rotates by sequentially energizing the coils for the U, V, and W phases.
[0013] 1 includes six semiconductor switching elements S1-S6 each connected between the positive and negative terminals of a DC power supply 11, and diodes D1-D6 connected in series with the semiconductor switching elements S1-S6. Diodes D1, D3, and D5 are located between the switching elements S1, S3, and S5 and the negative terminal of the DC power supply 11, and diodes D2, D4, and D6 are located between the switching elements S2, S4, and S6 and the positive terminal of the DC power supply 11. Output points OUT1-OUT6 are located between the semiconductor switching elements S1-S6 and the diodes D1-D6, respectively. Output points OUT1 and OUT2 are connected to opposite ends of a U-phase coil of an SR motor M, output points OUT3 and OUT4 are connected to opposite ends of a V-phase coil, and output points OUT5 and OUT6 are connected to opposite ends of a W-phase coil.
[0014] The two semiconductor switching elements S1 and S2 constituting the U phase are turned ON simultaneously, causing a current to flow from output point OUT1 through the U-phase coil to output point OUT2, as indicated by the arrows in FIG. 1. Similarly, the two semiconductor switching elements S3 and S4 constituting the V phase are turned ON simultaneously, causing a current to flow from output point OUT3 through the V-phase coil to output point OUT4. The two semiconductor switching elements S5 and S6 constituting the W phase are also turned ON simultaneously, causing a current to flow from output point OUT5 through the W-phase coil to output point OUT6. The gate signals of each of the semiconductor switching elements S1 to S6 are controlled by a motor control circuit (not shown). MOSFETs, for example, are used as the semiconductor switching elements S1 to S6, but other types of switching elements may also be used.
[0015] 1 is mounted on a multilayer wiring board and connected to the SR motor M via a connector 12. Therefore, the output lines L1 to L6 extending from the output points OUT1 to OUT6 toward the respective coils are configured as output wiring patterns made of metal foil on each layer on the multilayer wiring board, and are configured as a so-called harness between the connector 12 and the SR motor M.
[0016] Next, an electronic circuit board according to a first embodiment will be described with reference to FIGS. 3 to 5. The electronic circuit board according to the first embodiment is formed by mounting an asymmetric half-bridge circuit together with a connector 12 (specifically, one of a female and male connector) on a printed wiring board 21 having, for example, four metal foil layers (two surface layers and two inner layers). FIG. 3 shows the main parts of the electronic circuit board according to the first embodiment, with FIG. 3(a) showing the configuration of the main parts of one main surface, i.e., the first surface 21A, of the wiring board 21, and FIG. 3(b) showing the configuration of the main parts of the other main surface, i.e., the second surface 21B. FIG. 4 is an explanatory diagram viewed from the direction of arrow A in FIG. 3. FIG. 5 is an explanatory diagram showing the printed wiring board 21 in cross section.
[0017] Wiring board 21 is provided with a thin, elongated connector 12 made of synthetic resin on one side edge, and six pin-shaped terminals 22A to 22F (collectively referred to as terminals 22 when no distinction is necessary) are arranged in a row on connector 12, corresponding to the U, V, and W phase coils described above. Each terminal 22 is L-shaped as shown in Fig. 4, and is inserted into a through-hole formed in wiring board 21 and soldered to a land at the end of an output wiring pattern, which will be described later.
[0018] As shown in FIG. 3A, three semiconductor switching elements S1, S3, and S5 are arranged on the first surface 21A of the wiring board 21 so as to be aligned in a straight line parallel to the connector 12. That is, the three semiconductor switching elements S1, S3, and S5 are arranged so as to face the connector 12, with the semiconductor switching element S1 facing the terminals 22A and 22B, the semiconductor switching element S3 facing the terminals 22C and 22D, and the semiconductor switching element S5 facing the terminals 22E and 22F. More specifically, the semiconductor switching elements S1, S3, and S5 are arranged symmetrically with respect to the two terminals 22 so that each semiconductor switching element and its corresponding two adjacent terminals 22 are located at the vertices of an isosceles triangle. The semiconductor switching elements S1, S3, and S5 are provided with rectangular resin packages, and the aforementioned diodes D1, D3, and D5 are mounted on the first surface 21A of the wiring board 21 along the side surfaces of the packages of the semiconductor switching elements S1, S3, and S5.
[0019] Output wiring patterns 23A, 23C, and 23E (collectively referred to as output wiring patterns 23 when no distinction is necessary) that become the above-mentioned output lines L1, L3, and L5 extend from the semiconductor switching elements S1, S3, and S5 to the corresponding terminals 22A, 22C, and 22E, respectively, with their respective tips connected to the terminals 22A, 22C, and 22E. Specifically, these output wiring patterns 23A, 23C, and 23E are trapezoidal and widen toward the pair of terminals 22, with one edge of the trapezoid being cut out and connected to one terminal 22. For example, the output wiring pattern 23A of the semiconductor switching element S1 expands in a trapezoidal shape from one edge of the package facing the connector 12 toward the pair of terminals 22A and 22B, with one side of the widest tip (the side closest to terminal 22B) cut out to prevent contact with terminal 22B and connected only to terminal 22A. Output wiring patterns 23C and 23E have a similar configuration.
[0020] FIG. 5 is an explanatory diagram showing a cross section perpendicular to the longitudinal direction of the output wiring patterns 23A, 23C, and 23E of the wiring board 21. As shown in FIG. 5, in a preferred embodiment, the output wiring patterns 23A, 23C, and 23E are formed across two layers, namely, a surface metal foil layer 25a on the first surface 21A and a next inner metal foil layer 25b, in order to ensure the amount of current flow.
[0021] As shown in FIG. 3(b), the remaining three semiconductor switching elements S2, S4, and S6 are arranged on the second surface 21B of the wiring board 21 so as to be aligned on a straight line parallel to the connector 12. Here, these three semiconductor switching elements S2, S4, and S6 are arranged at positions where they overlap with the semiconductor switching elements S1, S3, and S5 on the first surface 21A corresponding to the same phase coil when projected in the stacking direction of the multilayer wiring board 21 (in other words, at substantially the same positions). For example, the U-phase semiconductor switching element S2 is arranged to face the semiconductor switching element S1 constituting the same U-phase on the front and back of the wiring board 21. The V-phase semiconductor switching element S4 has a similar positional relationship to the semiconductor switching element S2 on the first surface 21A, and the W-phase semiconductor switching element S6 has a similar positional relationship to the semiconductor switching element S5 on the first surface 21A.
[0022] Output wiring patterns 23B, 23D, and 23F extending from semiconductor switching elements S2, S4, and S6 toward terminal 22 have the same shape as output wiring patterns 23A, 23C, and 23E on first surface 21A. For example, output wiring pattern 23B of semiconductor switching element S2 expands in a trapezoidal shape from one edge of the package facing connector 12 toward a pair of terminals 22A and 22B, with one side of its widest tip (the side closest to terminal 22A) cut out to prevent contact with terminal 22A and connected only to terminal 22B. Output wiring patterns 23D and 23F also have a similar configuration.
[0023] Therefore, when the multilayer wiring board 21 is projected in the stacking direction, the output wiring patterns 23B, 23D, and 23F on the second surface 21B entirely overlap with the output wiring patterns 23A, 23C, and 23E on the first surface 21A, except for their tip portions (the connection portions with the terminals 22 and the cutout portions).
[0024] As shown in FIG. 5, in a preferred embodiment, the output wiring patterns 23B, 23D, and 23F on the second surface 21B are formed across two layers, namely, the surface metal foil layer 25d on the second surface 21B and the next inner metal foil layer 25c, in order to ensure sufficient current flow.
[0025] In the electronic circuit board of this embodiment, three semiconductor switching elements are arranged on each of the first surface 21A and the second surface 21B of the wiring board 21. This makes it easier to layout the output wiring patterns 23 as relatively wide and short as compared to when six semiconductor switching elements are arranged side by side on the same surface. Furthermore, the six output wiring patterns 23 are of equal length. Furthermore, two output wiring patterns 23 (e.g., output wiring pattern 23A on the first surface 21A and output wiring pattern 23B on the second surface 21B) that constitute the same phase (U phase, V phase, W phase) overlap in the stacking direction of the wiring board 21. This causes magnetic fields generated by currents flowing through them to cancel each other out, thereby suppressing noise. Furthermore, in the above embodiment, noise suppression is achieved for all phases, including the U phase, V phase, and W phase.
[0026] As shown schematically in FIG. 4, for example, a current (indicated by arrow F1) flows from semiconductor switching element S1 through output wiring pattern 23A to connector 12 (i.e., the U-phase coil), and simultaneously, an equal current (indicated by arrow F2) flows from connector 12 (i.e., the U-phase coil) to semiconductor switching element S2 through output wiring pattern 23B. Magnetic fields MG1 and MG2 are generated in the directions shown by the respective currents. As shown schematically in FIG. 5, in output wiring pattern 23A, current F1 generates magnetic field MG1 in the counterclockwise direction as viewed from the connector 12 side, and in output wiring pattern 23B, current F2 in the opposite direction generates magnetic field MG2 in the clockwise direction. In this way, currents flowing in opposite directions at adjacent locations cancel each other out, thereby suppressing noise.
[0027] As a secondary effect, the area where the output wiring pattern 23 is located is smaller than when six semiconductor switching elements are arranged side by side on the same surface, so that when cooling the output wiring pattern 23 using a heat sink, a heat dissipation sheet, or the like, it is possible to cool the area in a small area. For example, the area that needs to be cooled can be reduced by about half.
[0032] Although one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment and various modifications are possible. For example, the present invention is not limited to a drive device for an SR motor, but can be applied to an electronic circuit board on which an inverter circuit is mounted in various devices. Furthermore, in the above embodiment, each output wiring pattern is formed using two metal foil layers in a multilayer wiring board. 、3 Layers and above Out A power wiring pattern may be configured. [Explanation of symbols]
[0033] M...SR motor, C1 to C6...coils, S1 to S6...semiconductor switching elements, D1 to D6...diodes, 11...DC power supply, 12...connector, 21...printed wiring board, 22A to 22F...terminals, 23A to 23F...output wiring patterns.
Claims
1. An electronic circuit board having an asymmetric half-bridge circuit that serves as a three-phase inverter circuit mounted on a multilayer wiring board having a first surface and a second surface, A connector having six terminals arranged in a row is attached to one side edge of the multilayer wiring board, two switching elements constituting each phase are respectively arranged on the first surface and the second surface, and the two switching elements constituting each phase are arranged at positions that overlap each other when projected in a stacking direction of the multilayer wiring board, The three switching elements on each of the first surface and the second surface are arranged in a straight line toward the connector. an electronic circuit board in which output wiring patterns extending from two switching elements on a first surface and a second surface toward the terminals are respectively wired on different layers of the multilayer wiring board, each output wiring pattern having a trapezoidal shape expanding toward an adjacent pair of terminals and having a notch at its tip edge to avoid contact with one of the terminals, and arranged so that the entirety of the multilayer wiring board except for the notched portion overlaps with each other when projected in the stacking direction of the multilayer wiring board.
2. 10. The electronic circuit board of claim 1, which is used to drive a switched reluctance motor.
3. The output wiring patterns of the six switching elements are configured to be substantially equal in length.
3. The electronic circuit board according to claim 1 or 2.
Citation Information
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