Semiconductor devices and methods for manufacturing the same

By using a conductive adhesive or metal layer at a predetermined potential, the semiconductor device achieves stable transistor operation, addressing the issue of charging-induced deviations in flexible semiconductor devices.

JP7842644B2Active Publication Date: 2026-04-08NIPPON HOSO KYOKAI
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-06-07
Publication Date
2026-04-08

AI Technical Summary

Technical Problem

The issue with existing flexible semiconductor devices is that the CMOS circuit does not function correctly due to charging of the plastic substrate or adhesive layer, leading to large characteristic deviations and variations in MOS transistors, which prevents stable operation.

Method used

The semiconductor device employs a conductive adhesive layer or metal layer maintained at a predetermined potential, preferably ground potential, to stabilize transistor operation by connecting signal wiring to input/output pads and ground wiring to the adhesive layer.

Benefits of technology

This approach ensures stable transistor operation by eliminating characteristic deviations and variations, allowing the device to function reliably even when subjected to static charge.

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Abstract

To provide a semiconductor device that is so flexible that a transistor can stably operates, and a method of manufacturing the same.SOLUTION: A semiconductor device has a semiconductor device chip stacked on a flexible substrate with a conductive adhesion layer interposed, and the adhesion layer is held at a predetermined potential.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly to a semiconductor device using a flexible substrate and a method for manufacturing the same.

Background Art

[0002] In recent years, the applications of semiconductor devices have been widely diversified, such as flexible displays and wearable electronic devices, and the development of semiconductor devices with flexibility has also been promoted. For example, a semiconductor device has been proposed in which an adhesive layer, an organic intermediate layer, an inorganic intermediate layer, and a semiconductor layer are sequentially laminated on a flexible substrate, and a semiconductor element is constituted by the semiconductor layer (Patent Document 1).

[0003] The present inventors aim to realize a new image sensor that has the high performance inherent to CMOS (Complementary Metal Oxide Semiconductor) image sensors such as high definition and high frame rate, and can be freely bent, and are conducting research on a flexible CMOS image sensor in which a CMOS circuit formed on an FDSOI (Fully-depleted silicon on insulator) substrate and a photoelectric conversion film are laminated on a flexible plastic substrate. Image sensors with flexibility are expected to have many advantages and applications, such as being able to improve lens aberration on the sensor surface and being applicable to wearable electronic devices.

[0004] Figure 9 shows an example of the structure of a semiconductor device developed by the present inventors. An FDSOI substrate (CMOS device chip) 10 on which a CMOS circuit is formed is bonded to a flexible substrate 30 made of plastic or the like by a double-sided adhesive film 40. This laminated structure is fabricated by transferring the CMOS device chip 10 to the flexible substrate 30. Furthermore, a photoelectric conversion film 50 made of crystalline selenium (c-Se) or the like is laminated on the CMOS device chip 10, and input / output wiring 60 such as FPC (Flexible Printed Circuits) is connected to the electrodes of the CMOS circuit.

[0005] Here, the adhesive film 40 has a total thickness of 10 μm and is composed of "acrylic adhesive / PET substrate / acrylic adhesive". In addition, the CMOS device chip (FDSOI substrate) 10 has had its support substrate removed and has been made into a thin film, and this semiconductor device has sufficient flexibility. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2008-262955 [Overview of the project] [Problems that the invention aims to solve]

[0007] However, this semiconductor device transfers the FDSOI substrate (CMOS device chip) 10 to the plastic substrate 30 via an insulating adhesive layer (adhesive film) 40. As a result, there was a problem that the CMOS circuit would not function correctly if the plastic substrate 30 or the adhesive layer 40 were charged.

[0008] Figure 10 shows the I of a p-type MOS transistor before and after the transfer process. D -V GThis is an example of the characteristics. The characteristics shown in Figure 10 are the results of measuring eight transistors each before and after transfer (but before the photoelectric conversion film was formed) on the FDSOI substrate 10. Before transfer, the characteristics of the eight MOS transistors are aligned so that they overlap on a single line, but after transfer, the MOS transistors show a problem of large characteristic deviations and variations. This problem is due to the charging of the adhesive film directly beneath the channel after transfer. D It is believed that this is caused by modulation of the drain current, which is preventing the signal processing circuit and image sensor from working.

[0009] Therefore, in view of the above-mentioned problems, the object of the present invention is to provide a flexible semiconductor device and a method for manufacturing the same that enables stable operation of the transistor. [Means for solving the problem]

[0010] To solve the above problems, the semiconductor device according to the present invention (1) A semiconductor device in which semiconductor device chips are stacked on a flexible substrate via a conductive adhesive layer, wherein the adhesive layer is maintained at a predetermined potential.

[0011] (2) The semiconductor device described in (1) above is further preferably such that the predetermined potential is the ground potential.

[0012] (3) The semiconductor device described in (1) or (2) above is further preferably an SOI substrate on which a CMOS circuit is formed and a support substrate has been removed.

[0013] (4) In any of the semiconductor devices described in (1) to (3) above, it is preferable that the adhesive layer is a conductive adhesive film or a metal layer.

[0014] (5) Preferably, any of the semiconductor devices described in (1) to (4) above is further configured such that an FPC is connected to the semiconductor device chip, signal wiring is connected to the input / output pads of the semiconductor device chip, and ground wiring is connected to the adhesive layer.

[0015] (6) Preferably, any of the semiconductor devices described in (1) to (5) above further comprises a photoelectric conversion film on the semiconductor device chip, and the semiconductor device is a CMOS image sensor.

[0016] To solve the above problems, the method for manufacturing a semiconductor device according to the present invention is: (7) The process includes the steps of forming a semiconductor device chip by forming a CMOS circuit on an SOI substrate and removing the support substrate from the SOI substrate; bonding the semiconductor device chip to a flexible substrate via a conductive adhesive layer; and connecting signal wiring to the input / output pads of the semiconductor device chip and connecting ground wiring to the adhesive layer.

[0017] (8) The method for manufacturing the semiconductor device described in (7) above is further preferably such that the adhesive layer is a conductive adhesive film or a metal layer.

[0018] (9) The method for manufacturing the semiconductor device described in (7) or (8) above preferably further comprises the step of forming a photoelectric conversion film on the semiconductor device chip.

[0019] (10) In any of the semiconductor device manufacturing methods described in (7) to (9) above, it is preferable that the wafer process is carried out at least up to the step of bonding to the flexible substrate. [Effects of the Invention]

[0020] According to the semiconductor device and its manufacturing method in the present invention, a flexible semiconductor device capable of stable transistor operation can be realized. [Brief explanation of the drawing]

[0021] [Figure 1] It is an example of the structure (cross-sectional view) of the semiconductor device of Embodiment 1. [Figure 2] It is an example of the structure (plan view) of the semiconductor device of Embodiment 1. [Figure 3] It is an example of a flowchart showing the manufacturing process of the semiconductor device of Embodiment 1. [Figure 4A] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 1. [Figure 4B] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 1. [Figure 4C] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 1. [Figure 4D] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 1. [Figure 4E] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 1. [Figure 5] It is an example of the structure (cross-sectional view) of the semiconductor device of Embodiment 2. [Figure 6A] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 2. [Figure 6B] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 2. [Figure 6C] It is a diagram for explaining the manufacturing process of the semiconductor device of Embodiment 2. [Figure 7] It is a diagram for explaining the manufacturing process of a semiconductor device by a wafer process. [Figure 8] It is an example of the ID-VG characteristics of the MOS transistor of the semiconductor device of the present invention. [Figure 9] It is an example of the structure of a conventional semiconductor device. [Figure 10] It is an example of the ID-VG characteristics of the MOS transistor of a conventional semiconductor device.

Embodiments for Carrying Out the Invention

[0022] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0023] (Embodiment 1) Figure 1 shows an example of the structure (cross-sectional view) of the semiconductor device of Embodiment 1. Figure 2 shows an example of a plan view of the semiconductor device of Embodiment 1. The semiconductor device according to Embodiment 1 of the present invention is a flexible CMOS image sensor, but its structure and manufacturing method can be applied to other semiconductor devices.

[0024] In Figure 1, an FDSOI substrate (CMOS device chip) 10 on which a CMOS circuit is formed is bonded to a flexible substrate 30 made of plastic or the like by a double-sided adhesive layer (adhesive layer) 70. The flexible substrate 30 is not limited to plastic; any substrate made of a flexible material is acceptable. In this embodiment, a CMOS device chip 10 is used, but it is not limited to a CMOS circuit; a general semiconductor device chip with a circuit including MOS transistors may also be used. A photoelectric conversion film 50 made of crystalline selenium (c-Se) or the like is laminated on the CMOS device chip 10 and connected to the pixel electrodes 17. Input / output wiring 60 such as an FPC is connected to the electrodes (input / output pads) 18 of the CMOS circuit.

[0025] In this embodiment, the adhesive layer (tacky layer) is a conductive adhesive film 70 composed of, for example, "conductive acrylic adhesive / conductive mesh substrate / conductive acrylic adhesive". A portion of the adhesive film 70 is in contact with the grounding wiring of the FPC 60 and is maintained at ground potential.

[0026] In the plan view of the semiconductor device in Figure 2, a CMOS device chip 10 is provided on a flexible substrate 30 via a conductive adhesive layer (adhesive film) 70. The size of the adhesive layer (adhesive film) 70 is larger than the outer dimensions of the CMOS device chip 10, and a portion of it extends beyond the CMOS device chip 10. The CMOS device chip 10 has a photoelectric conversion film 50 (not shown) formed on its surface and is equipped with multiple pixels (pixel arrays). Input / output pads 18 are exposed on the surface of the CMOS device chip 10, and signal wiring 61 of the FPC 60 is connected to the input / output pads 18 to perform signal input and output. In addition, a portion of the adhesive layer (adhesive film) 70 on the outside of the CMOS device chip 10 is connected to ground wiring 62. As a result, the entire conductive adhesive layer 70 (the entire back surface of the chip 10) is maintained at ground potential.

[0027] Figure 3 is an example of a flowchart showing the manufacturing process of the semiconductor device according to Embodiment 1. The manufacturing process of the semiconductor device according to Embodiment 1 will be described sequentially below, based on the flowchart in Figure 3 and the manufacturing process diagrams in Figures 4A to 4E.

[0028] Step S1: CMOS circuit formation process Figure 4A shows a CMOS device chip 10 with a CMOS circuit formed on an FDSOI substrate. The FDSOI substrate has a Si layer 13 provided on a Si support substrate 11 via an insulating film (SiO2 film) 12. The thickness of the Si layer 13 is usually 100 nm or less. P-type and n-type MOS transistors 14 are formed on this Si layer 13 to form a CMOS circuit. Because the channel region of the MOS transistors 14 formed on the FDSOI substrate is completely depleted, the parasitic capacitance value between the source and drain is reduced, and the leakage current is also significantly reduced. Subsequently, a wiring layer 15 and an insulating film (interlayer insulating film or surface insulating film) 16 are formed to connect to the MOS transistors 14, and further, necessary electrodes such as pixel electrodes 17 and input / output pads 18 are formed to form a circuit for an image sensor on the FDSOI substrate.

[0029] Step S2: Support substrate removal process A temporary adhesive substrate 20 is attached to the surface of the CMOS device chip 10 fabricated in step S1. The temporary adhesive substrate 20 is preferably a substrate that has a function of reducing adhesive strength when exposed to ultraviolet light. A commercially available backgrind tape or dicing tape can be used as the temporary adhesive substrate 20. Subsequently, the Si support substrate 11 of the FDSOI substrate is removed by grinding and / or etching. XeF2 gas can be used for etching. Alternatively, gases such as SF6 or CF4 may be used. Alternatively, the Si support substrate 11 may be removed using CMP (Chemical Mechanical Polishing) without etching. The insulating film (SiO2 film) 12 can be used as a stopper to selectively remove the Si support substrate 11. Figure 4B shows the CMOS device chip 10 with the Si support substrate 11 removed. By removing the Si support substrate 11, the semiconductor device chip 10 is made thinner and more flexible.

[0030] Step S3: Flexible substrate bonding process A flexible substrate 30 is prepared, and a double-sided adhesive film 70 is provided on its surface as an adhesive layer (adhesive layer) 70. The flexible substrate 30 is, for example, a plastic substrate made of PET (polyethylene terephthalate) with a thickness of 50 μm. The adhesive layer used in this embodiment is a conductive adhesive film 70 with a total thickness of 50 μm, composed of "conductive acrylic adhesive / conductive mesh substrate / conductive acrylic adhesive". As shown in Figure 4C, the back surface (insulating film 12) of the CMOS device chip 10 is bonded to the flexible substrate 30 via the adhesive film 70 together with the temporary adhesive substrate 20.

[0031] Step S4: Temporarily bonded substrate removal process Figure 4D shows the peeling process of the temporary adhesive substrate 20. The temporary adhesive substrate 20 is irradiated with ultraviolet light to reduce its adhesive strength, and the temporary adhesive substrate 20 is peeled off. In addition to the temporary adhesive substrate 20 whose adhesive strength is reduced by ultraviolet light, a temporary adhesive substrate 20 whose adhesive strength is reduced by heating may also be used. Furthermore, a method of mechanical fixing and peeling may be used as long as the device can be supported during the removal process of the Si support substrate 11. In this embodiment, a transfer device using a conductive adhesive film 70 is fabricated.

[0032] Step S5: Photoelectric conversion film formation process Next, a photoelectric conversion film 50 is formed on the surface of the CMOS device chip 10. In this embodiment, the photoelectric conversion film 50 is crystalline selenium (c-Se). Crystalline selenium (c-Se) is produced, for example, by forming amorphous selenium (a-Se) on the CMOS device chip 10 by sputtering or CVD (Chemical Vapor Deposition), and then crystallizing it by heating it at a low temperature of about 160°C. Here, the formation area of ​​the photoelectric conversion film 50 is limited as needed, and a photoelectric conversion film 50 connected to the pixel electrode 17 of the CMOS device chip 10 is produced as shown in Figure 4E. In the actual photoelectric conversion film 50, a transparent conductive film (not shown) for voltage application is formed on its surface. The photoelectric conversion film 50 may also be a multilayer structure in which a hole injection blocking layer (gallium oxide layer) and / or an electron blocking layer (nickel oxide layer) are provided on the crystalline selenium layer.

[0033] Step S6: Input / Output Wiring Formation Process Finally, wiring for input and output signals is formed. Input and output wiring 60, such as an FPC, is crimped onto the CMOS device chip 10, and the input / output pads 18 of the chip 10 are connected to the signal wiring 61. At this time, the ground wiring 62 of the FPC is connected to a part of the conductive adhesive film 70. By positioning the FPC 60 along the edge of the CMOS device chip 10, connection to the input / output pads 18 and ground connection to the conductive adhesive film 70 can be achieved with a single FPC 60. In this way, as shown in Figures 1 and 2, the semiconductor device (flexible CMOS image sensor) of this embodiment is completed. In this embodiment, the conductive adhesive film 70 is set to ground potential, but even if it is not at ground potential, the MOS transistor circuit can be operated stably by maintaining it at a certain predetermined potential.

[0034] Since the Si layer of the FDSOI substrate is less than 100 nm thick, the thickness of the CMOS device chip (circuit portion) 10 can be reduced to less than 10 μm, as the wiring layer 15 (and insulating layer 16) dominates the overall thickness. Furthermore, the photoelectric conversion film 50 portion is thin, ranging from 100 nm to several hundred nm. Therefore, the semiconductor device has sufficient flexibility.

[0035] Alternatively, a general SOI substrate may be used instead of the FDSOI substrate. When using an SOI substrate other than FDSOI, the Si layer 13 will be 3-5 μm thick, and the thickness of the CMOS circuit portion will be approximately 10 μm or more. However, a certain degree of flexibility can still be obtained, and a similarly flexible CMOS image sensor can be realized.

[0036] (Embodiment 2) Figure 5 shows an example of the structure (cross-sectional view) of the semiconductor device of Embodiment 2. The semiconductor device of Embodiment 2 differs from the semiconductor device of Embodiment 1 in that it uses a metal layer (e.g., an Au layer) 80 as the adhesive layer (bonding layer), but the other structures are the same as those in Figure 1. The plan view of the semiconductor device of Embodiment 2 is also substantially the same as that of Figure 2.

[0037] In Figure 5, an FDSOI substrate (CMOS device chip) 10 on which a CMOS circuit is formed is bonded to a flexible substrate 30 made of plastic or the like by a metal adhesive layer (bonding layer) 80. A photoelectric conversion film 50 made of crystalline selenium (c-Se) or the like is laminated on the CMOS device chip 10 and connected to the pixel electrodes 17. Input / output wiring 60 of an FPC or the like is connected to the electrodes (input / output pads) 18 of the CMOS circuit.

[0038] In this embodiment, the adhesive layer (bonding layer) is a metal layer 80, for example, an Au layer. The metal layer 80 may be Cu, W, Cr, Ni, Ti, Mo, Nb, Ta, Al, or compounds or composite films thereof. Alternatively, a transparent electrode ITO may be used. A portion of the metal layer 80 is connected to the grounding wiring 62 of the FPC 60 and maintained at ground potential.

[0039] Next, the manufacturing method will be described. The flowchart of the manufacturing process for the semiconductor device of Embodiment 2 is basically the same as that in Figure 3. Below, the manufacturing process for the semiconductor device of Embodiment 2 will be described based on the flowchart in Figure 3 and the manufacturing process diagrams in Figures 6A to 6C.

[0040] Step S1, the CMOS circuit formation process, and Step S2, the support substrate removal process, are exactly the same in Embodiment 2. The difference from Embodiment 1 begins with Step S3.

[0041] Step S3: Flexible substrate bonding (joining) process For example, a flexible substrate 30 made of plastic or the like is prepared. A metal layer (film) 80 such as Au is formed on both the back surface of the CMOS device chip 10 and the front surface of the flexible substrate 30 by methods such as sputtering, vapor deposition, or plating. Next, the two are joined together as shown in Figure 6A. The joining is performed at room temperature, or at a temperature below the heat resistance temperature of the plastic or the wiring electrodes of the CMOS circuit (for example, below 150 degrees Celsius), by applying pressure. Before joining, the metal surface may be planarized by CMP. In addition, irradiation with plasma, ion beam, atomic beam, ultraviolet light, etc. may be performed before joining to clean or modify the substrate surface, or an ultrathin layer of Si (a layer of several nanometers) may be deposited on the metal to increase the bonding strength. Here, joining of chips (substrates) is assumed, and the Au layer 80 on the flexible substrate 30 side is patterned to be slightly larger than the CMOS device chip 10, or it is formed over the entire surface of the flexible substrate 30.

[0042] Step S4: Temporarily bonded substrate removal process Figure 6B shows the peeling process of the temporary adhesive substrate 20. The process in Figure 6B is the same as in Figure 4D, in which the temporary adhesive substrate 20 is irradiated with ultraviolet light to reduce its adhesive strength and then peeled off. Note that a temporary adhesive substrate 20 that loses its adhesive strength when heated may be used. In this embodiment, a transfer device using a metal layer 80 is fabricated.

[0043] Step S5: Photoelectric conversion film formation process Next, a photoelectric conversion film 50 is formed on the surface of the CMOS device chip 10. In this embodiment, the photoelectric conversion film 50 is crystalline selenium (c-Se), and a photoelectric conversion film 50 with a similar structure can be fabricated by the same process as in Embodiment 1. Here, the formation area of ​​the photoelectric conversion film 50 is limited as needed, and a photoelectric conversion film 50 connected to the pixel electrode 17 of the CMOS device chip 10 is fabricated as shown in Figure 6C. In the actual photoelectric conversion film 50, a transparent conductive film (not shown) for voltage application is formed on its surface.

[0044] Step S6: Input / Output Wiring Formation Process The process of forming the wiring for input and output signals is basically the same as in Embodiment 1. Input and output wiring 60 such as an FPC is crimped onto the CMOS device chip 10, and the input / output pads 18 of the chip 10 are connected to the signal wiring 61. Furthermore, the ground wiring 62 of the FPC is brought into contact with the portion of the metal layer (e.g., Au film) 80 that extends beyond the outside of the chip 10. Then, by applying 0V (ground potential) to the metal layer 80, stable operation of the transistor is achieved. In this way, the semiconductor device (flexible CMOS image sensor) of this embodiment is completed, as shown in Figures 5 and 2.

[0045] (Embodiment on a wafer) In the embodiments described above, semiconductor devices were fabricated chip by chip, but semiconductor devices may also be mass-produced using a wafer process. Figure 7 is a diagram illustrating the manufacturing process of a semiconductor device using a wafer process.

[0046] In Figure 7, the upper left is a semiconductor wafer 100 on which a CMOS device chip 10 is formed, and the lower left is a flexible substrate 30 having the same shape as the wafer. In this embodiment, the bonding process of the flexible substrate 30 (step S3) and the peeling process of the temporary bonded substrate (step S4) are performed in the wafer state. Bonding of the semiconductor wafer 100 and the flexible substrate 30 is also possible using a conductive adhesive film 70, but in order to make effective use of the wafer process, a bonding process using a metal layer 80 is desirable. Note that the photoelectric conversion film formation process (step S4) may be performed in the wafer state or after chip formation.

[0047] In the wafer process, to expose the ground potential contact (conductive adhesive film 70 or metal layer 80), a portion of each chip 10 is patterned and an opening is created by etching. For etching, for example, CHF3 or CF4 gas that can etch SiO2, or a mixed gas of these with O2 gas, can be used. At this time, it is desirable to create an opening that is in contact with the edge of the chip area, and after dicing the chip 10, a contact portion is provided at the step at the edge of the chip, as shown in Figures 1 and 5, so that it can be wired with an FPC 60. The opening process can also be performed after chip formation, but it is preferable to perform it in the wafer state to shorten the process. After the opening process, chip formation is performed by dicing. In this wafer process, multiple transferred device chips can be manufactured at once.

[0048] (Verification of effectiveness) As an experiment to verify the operation of the present invention by applying a ground potential, the characteristics of the semiconductor device fabricated in Embodiment 1 were investigated. Embodiment 1 is a transfer device fabricated using a conductive adhesive film 70.

[0049] Figure 8 shows the I of the p-type MOS transistor in the semiconductor device of Embodiment 1. D -V G This is an example of the characteristics. The characteristics shown in Figure 8 are the results of measuring eight transistors each before and after transfer (but before the photoelectric conversion film was formed) on the FDSOI substrate 10. Here, a probe was used to contact the conductive adhesive film 70, and its potential was set to 0V. The characteristics of the eight MOS transistors before and after transfer all overlap on a single line, indicating that the characteristic deviations and variations after transfer have been eliminated.

[0050] Furthermore, in the evaluation of the input / output characteristics of the CMOS inverter in the semiconductor device created in Embodiment 1, it was confirmed that the circuit operated without any problems.

[0051] Furthermore, since the metal layer 80, which is the adhesive layer (bonding layer) in Embodiment 2, has lower resistance compared to the conductive resin and conductive mesh used in this experiment, it is considered that the operation of the transistor in the semiconductor device of Embodiment 2 will be even more stable.

[0052] Thus, the semiconductor device of the present invention prevents the effects of static charge and allows the transferred device to operate stably. The manufacturing method using adhesive film bonding in Embodiment 1 allows for relatively easy transfer of semiconductor devices. Furthermore, the manufacturing method in Embodiment 2 utilizes established semiconductor processes such as metal layer formation and wafer / chip bonding, thus contributing to mass production and cost reduction of devices.

[0053] The semiconductor devices of the present invention are not limited to image sensors, but may be any semiconductor devices formed on a semiconductor substrate (SOI substrate), such as logic circuits, arithmetic circuits, memories, communication devices, MEMS devices, and display devices, and enable stable operation of devices onto which these are transferred.

[0054] Although the embodiments described above are representative examples, it will be apparent to those skilled in the art that many modifications and substitutions are possible within the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited by the embodiments described above, and various modifications or changes are possible without departing from the scope of the claims. For example, the functions, etc., included in each block, step, etc., described in the embodiments can be rearranged in a logically consistent manner, and multiple constituent blocks, steps, etc., can be combined into one or divided. [Explanation of Symbols]

[0055] 10 CMOS device chips 11 Si support substrate 12 Insulating film 13 Si layer 14 MOS transistors 15 wiring layer 16 Insulating film 17 Pixel electrodes 18 input / output pads 20 Temporarily bonded substrate 30 Flexible circuit boards 40 Adhesive Film 50 Photoelectric conversion film 60 Input / Output Wiring 70 Conductive adhesive film 80 metal layer 100 semiconductor wafers

Claims

1. A semiconductor device in which semiconductor device chips are stacked on a flexible substrate via a conductive adhesive layer, The adhesive layer is a conductive adhesive film or metal layer, and is maintained at ground potential. The aforementioned semiconductor device chip is an SOI substrate on which a CMOS circuit is formed and the support substrate has been removed. An FPC is connected to the semiconductor device chip, signal wiring is connected to the input / output pads of the semiconductor device chip, and ground wiring is connected to the adhesive layer. Semiconductor devices.

2. In the semiconductor device according to claim 1, A semiconductor device comprising a photoelectric conversion film on the semiconductor device chip, wherein the semiconductor device is a CMOS image sensor.

3. A process of forming a semiconductor device chip by forming a CMOS circuit on an SOI substrate and removing the support substrate of the SOI substrate, The process of bonding the semiconductor device chip to a flexible substrate via an adhesive layer which is a conductive adhesive film or a metal layer, A step of connecting an FPC to the semiconductor device chip, comprising connecting signal wiring to the input / output pads of the semiconductor device chip and connecting ground wiring to the adhesive layer, A method for manufacturing semiconductor devices, comprising:

4. In the method for manufacturing a semiconductor device according to claim 3, A method for manufacturing a semiconductor device, further comprising the step of forming a photoelectric conversion film on the semiconductor device chip.

5. In the method for manufacturing a semiconductor device according to claim 3 or 4, A method for manufacturing a semiconductor device, wherein at least the step of bonding to the flexible substrate is performed in a wafer process.

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