Circuit board, and semiconductor package comprising same

Abstract

A circuit board, according to an embodiment, comprises: a glass layer; an insulating member penetrating the glass layer; and a via electrode penetrating the insulating member, wherein the horizontal central axis of the via electrode and the horizontal central axis of the insulating member are offset from each other.

Description

Circuit boards and semiconductor packages including the same

[0001] The embodiment relates to a circuit board and a semiconductor package board including the same.

[0002] As the performance of electrical and electronic products continues to improve, technologies are being proposed and researched to accommodate a greater number of semiconductor devices on a limited-size semiconductor package substrate. However, conventional semiconductor packages typically consist of a single semiconductor device, limiting their ability to achieve desired performance.

[0003] Accordingly, semiconductor packages that utilize multiple substrates to arrange multiple semiconductor devices have recently been developed. These semiconductor packages have a structure in which multiple semiconductor devices are connected to each other horizontally and / or vertically on the substrate. Accordingly, these semiconductor packages have the advantage of efficiently utilizing the mounting area of ​​the semiconductor devices and enabling high-speed signal transmission through short signal transmission paths between the semiconductor devices.

[0004] In addition, semiconductor packages applied to products that provide the Internet of Things (IoT), autonomous vehicles, and high-performance servers are expanding their concept to semiconductor chiplets as the number of semiconductor elements and / or the size of each semiconductor element increases in line with the trend toward high integration, or as the functional parts of semiconductor elements are divided.

[0005] Meanwhile, as the number of semiconductor devices and / or semiconductor chiplets mounted on a semiconductor package increases, the area of ​​the semiconductor package is also increasing. Furthermore, as the area of ​​the semiconductor package increases, the circuit board tends to warp more. If the circuit board warps significantly, the semiconductor devices may not be stably attached to the circuit board. For example, the circuit board has pad portions that are connected to the terminals of the semiconductor devices. Furthermore, if the circuit board warps significantly in a specific direction, a deviation in the height of the plurality of pad portions may occur, preventing the semiconductor devices from being stably attached.

[0006] Conventionally, a core layer of a certain thickness is provided to improve the rigidity of a circuit board. This core layer, often containing a reinforcing material such as glass fiber, serves as the core of the circuit board. While glass fiber-based core layers are effective in improving rigidity, they suffer from significant signal transmission loss due to their low dielectric constant and high surface roughness.

[0007] Therefore, a method is required to improve the rigidity of a circuit board so that the circuit board can be prevented from being bent significantly in a specific direction, while also mitigating the bending of the circuit board, thereby ensuring that semiconductor elements are stably attached and minimizing loss of transmission signals, thereby ensuring that the semiconductor elements operate stably.

[0008] The embodiment provides a circuit board of a novel structure and a semiconductor package including the same.

[0009] In addition, the embodiment provides a circuit board having a structure that is relaxed from being bent in a specific direction and a semiconductor package including the same.

[0010] Additionally, the embodiment provides a circuit board having signal transmission characteristics and a semiconductor package including the same.

[0011] In addition, the embodiment provides a circuit board in which a connecting member can be stably embedded and a semiconductor package including the same.

[0012] The technical tasks to be achieved in the proposed embodiment are not limited to the technical tasks mentioned above, and other technical tasks not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the proposed embodiment belongs from the description below.

[0013] A circuit board according to an embodiment includes a glass layer; an insulating member penetrating the glass layer; and a via electrode penetrating the insulating member, wherein a horizontal central axis of the via electrode and a horizontal central axis of the insulating member are misaligned with each other.

[0014] In addition, the insulating member has a slope in which a horizontal width gradually narrows along a direction from the upper surface of the glass layer toward the lower surface of the glass layer, and the via electrode includes a first portion having a slope in which a horizontal width gradually narrows along a direction from the upper surface of the glass layer toward the lower surface of the glass layer; and a second portion disposed under the first portion and having a slope in which a horizontal width gradually widens along a direction from the upper surface of the glass layer toward the lower surface of the glass layer, and an angle of inclination of the second portion is different from an angle of inclination of the insulating member.

[0015] In addition, the direction in which the inclination of the insulating member is inclined is the same as the direction in which the inclination of the first part is inclined, and the direction in which the inclination of the second part is inclined is different from the direction in which the inclination of the insulating member is inclined and the direction in which the inclination of the first part is inclined.

[0016] Additionally, the horizontal central axis of the via electrode is closer to the horizontal central axis of the glass layer than to the horizontal central axis of the insulating member.

[0017] In addition, each of the insulating member and the via electrode is provided in a plurality of pieces so as to be spaced apart from each other in the horizontal direction, and the misalignment direction of the central axis of each of the plurality of via electrodes with respect to the horizontal central axis of each of the plurality of insulating members includes a first misalignment direction and a second misalignment direction that are different from each other.

[0018] Additionally, at least one of the plurality of via electrodes has a vertical thickness of the first portion and a vertical thickness of the second portion that are identical to each other.

[0019] Additionally, at least one of the plurality of via electrodes has a different thickness in the vertical direction of the first portion and a different thickness in the vertical direction of the second portion.

[0020] In addition, the plurality of via electrodes include first and second via electrodes, and a vertical thickness of a first portion of the first via electrode is greater than a vertical thickness of a second portion of the first via electrode, and a vertical thickness of a first portion of the second via electrode is less than a vertical thickness of a second portion of the second via electrode.

[0021] In addition, the insulating member has a third portion having a slope in which a horizontal width gradually narrows in a direction from the upper surface of the glass layer toward the lower surface of the glass layer, and a fourth portion disposed under the third portion and having a slope in which a horizontal width gradually widens in a direction from the upper surface of the glass layer toward the lower surface of the glass layer.

[0022] In addition, the horizontal central axis of the third portion of the insulating member and the horizontal central axis of the fourth portion of the insulating member are misaligned with each other, the vertical thickness of the third portion on one side of the insulating member and the vertical thickness of the third portion on the other side of the insulating member are different from each other, and the vertical thickness of the fourth portion on one side of the insulating member and the vertical thickness of the fourth portion on the other side of the insulating member are different from each other.

[0023] In addition, the horizontal central axis of the first portion of the via electrode and the horizontal central axis of the second portion of the via electrode are misaligned with each other, the vertical thickness of the first portion on one side of the via electrode and the vertical thickness of the first portion on the other side of the via electrode are different from each other, and the vertical thickness of the second portion on one side of the via electrode and the vertical thickness of the second portion on the other side of the via electrode are different from each other.

[0024] Additionally, the circuit board further includes a resin layer disposed on the inner side of the via electrode, and the via electrode is provided to surround the resin layer.

[0025] Additionally, the horizontal thickness of the via electrode on one side of the resin layer and the horizontal thickness of the via electrode on the other side of the resin layer are different from each other.

[0026] Additionally, the circuit board further includes a first build-up layer disposed on an upper surface of the glass layer; a second build-up layer disposed under a lower surface of the glass layer; and a connecting member embedded in the first build-up layer.

[0027] In addition, the glass layer has a concave cavity formed from the upper surface of the glass layer toward the lower surface of the glass layer, the connecting member is disposed within the cavity of the glass layer, the glass layer includes a side wall forming the cavity, a bottom surface, and a border surface between the side wall and the bottom surface, and the border surface has a curved surface having a specific curvature.

[0028] Additionally, the inclination of the side wall of the cavity with respect to the upper surface and / or lower surface of the glass layer is closer to 90° than the inclination of the insulating member with respect to the upper surface and / or lower surface of the glass layer and the inclination of the via electrode with respect to the upper surface and / or lower surface of the glass layer.

[0029] Meanwhile, a circuit board according to an embodiment includes a glass layer having a cavity on an upper surface; and a connecting member arranged within the cavity of the glass layer; wherein the cavity includes a side wall, a bottom surface, and a border surface between the side wall and the bottom surface, and the border surface has a curved surface having a specific curvature, and a horizontal central axis of the connecting member and a horizontal central axis of the cavity are misaligned with each other.

[0030] In addition, the circuit board further includes an insulating member that is spaced apart horizontally from the cavity and penetrates the glass layer; and a via electrode that penetrates the insulating member, wherein the horizontal central axis of the via electrode and the horizontal central axis of the insulating member are misaligned with each other.

[0031] Additionally, the horizontal central axis of the connecting member is closer to the horizontal central axis of the glass layer than the horizontal central axis of the cavity, and the horizontal central axis of the via electrode is closer to the horizontal central axis of the glass layer than the horizontal central axis of the insulating member.

[0032] The circuit board of the embodiment includes a glass layer, an insulating member penetrating the glass layer, and a via electrode penetrating the insulating member. In addition, a horizontal central axis of the via electrode and a horizontal central axis of the insulating member are misaligned with each other. For example, the horizontal central axis of the via electrode may be shifted in a specific direction with respect to the horizontal central axis of the insulating member. Accordingly, the circuit board may be mitigated from being bent in a specific direction depending on the direction and distance by which the horizontal central axis of the via electrode is shifted from the horizontal central axis of the insulating member.

[0033] Specifically, the central axis of the via electrode can be shifted with respect to the central axis of the insulating member based on the direction in which the circuit board is bent, thereby preventing the circuit board from being bent in a specific direction and avoiding excessive stress applied to the circuit board. Accordingly, the mechanical reliability and / or electrical reliability of the circuit board can be improved. In addition, the embodiment can alleviate the bending of the circuit board so that the semiconductor element can be stably attached on the circuit board. At this time, when the circuit board is bent in a specific direction, a height deviation may occur between the plurality of bonding portions provided on the circuit board, and the terminals of the semiconductor element may not be stably bonded on the plurality of bonding portions. In contrast, the embodiment can alleviate the overall bending of the circuit board by shifting the horizontal central axis of the via electrode from the horizontal central axis of the insulating member, thereby allowing the semiconductor element to be stably attached on the circuit board. Therefore, the embodiment can enable the semiconductor element to operate stably, thereby improving product reliability. Furthermore, the embodiment can enable a product such as a server to which a semiconductor package is applied to operate stably.

[0034] In addition, the circuit board of the embodiment may include a plurality of insulating members and a plurality of via electrodes respectively disposed on the plurality of insulating members. In addition, a shift direction and / or a shift distance of a horizontal central axis of at least one of the plurality of via electrodes may be different from a shift direction and / or a shift distance of a horizontal central axis of at least one other via electrode. For example, the horizontal central axis of each of the plurality of via electrodes may be shifted in a direction from the horizontal central axis of each of the insulating members toward the horizontal central axis of the glass layer. Therefore, the embodiment may further improve the overall bending characteristics of the circuit board by allowing each of the plurality of via electrodes to have different shift directions and / or shift distances.

[0035] In addition, the insulating member of one embodiment may have a slope in which the width in the horizontal direction gradually narrows in a direction from the upper surface of the glass layer to the lower surface of the glass layer. In addition, the via electrode may include a first portion having a slope in which the width in the horizontal direction gradually narrows in a direction from the upper surface of the glass layer to the lower surface of the glass layer, and a second portion disposed under the first portion and having a slope in which the width in the horizontal direction gradually widens in a direction from the upper surface of the glass layer to the lower surface of the glass layer. That is, the embodiment may allow the insulating member to have only one slope, thereby simplifying the process of forming a through hole that must be provided in the glass layer to place the insulating member, thereby improving product yield. In addition, by allowing the via electrode to include the first portion and the second portion having different slopes, the process characteristics in the plating process for plating the via electrode may be improved, and thus the mechanical reliability and / or electrical reliability of the circuit board may be improved.

[0036] In addition, the vertical thickness of the first portion of the via electrode of the embodiment and the vertical thickness of the second portion may be different from each other. Therefore, by controlling the ratio of the vertical thickness of the first portion and the vertical thickness of the second portion, the process capability in the process of plating the via electrode can be improved. Through this, the embodiment can shorten the manufacturing time of the circuit board and improve the product yield. Furthermore, the embodiment can prevent cracks from occurring in the via electrode due to stress according to the heat cycle by preventing voids from being formed in the via electrode, thereby improving the electrical reliability of the circuit board. Furthermore, the ratio of the vertical thickness of the first portion and the vertical thickness of the second portion can be determined in consideration of the direction in which the circuit board is bent, through which the embodiment can more efficiently prevent the circuit board from being bent in a specific direction and enable the semiconductor device to be mounted more stably.

[0037] Additionally, the insulating member may have first and second portions having different slopes, thereby reducing the size of the through hole through which the insulating member is positioned in the glass layer. Accordingly, the embodiment can further improve the rigidity of the circuit board by reducing the area of ​​the through hole provided in the glass layer.

[0038] In addition, the horizontal central axis of the first portion of the insulating member and the horizontal central axis of the second portion of the insulating member may be misaligned with each other. Alternatively, the horizontal central axis of the first portion of the via electrode and the horizontal central axis of the second portion of the via electrode may be misaligned with each other. That is, considering the direction in which the circuit board is bent, the respective central axes of the first portion and the second portion of the insulating member may be misaligned, or the respective central axes of the first portion and the second portion of the via electrode may be misaligned, thereby further improving the overall bending characteristics of the circuit board.

[0039] In addition, the circuit board may further include a resin layer provided on the inner side of the via electrode, and the via electrode may be provided to surround the resin layer. Accordingly, as the vertical direction of the glass layer increases in thickness, voids may be prevented from occurring inside the via electrode, thereby further improving the electrical reliability and / or mechanical reliability of the circuit board.

[0040] In addition, the horizontal thickness of the via electrode includes a first thickness and a second thickness that are different from each other along the periphery of the resin layer, thereby further improving the overall bending characteristics of the circuit board. For example, the embodiment may consider the bending direction of the circuit board, and may make the horizontal central axis of the insulating member described above misalign with the horizontal central axis of the via electrode, so that the via electrode may have different horizontal thicknesses along the periphery of the resin layer, thereby further improving the overall bending characteristics of the circuit board.

[0041] In addition, a concave cavity facing downward may be provided on the upper surface of the glass layer, and the connecting member may be placed in the cavity of the glass layer. Through this, the connecting member may be placed on the glass layer having relatively high rigidity, thereby improving the flatness of the connecting member, improving the rigidity of the connecting member, and thereby further improving the overall bending characteristics of the circuit board and semiconductor package. Furthermore, the alignment between the pad portion provided on the connecting member and the circuit layer and via electrode of the first build-up layer may be improved.

[0042] In addition, the glass layer may have side walls forming a cavity, a bottom surface, and a boundary surface between the side walls and the bottom surface. The side walls forming the cavity of the glass layer may have an angle closer to 90° than the inclination of the insulating material and the inclination of the via electrode. Therefore, the area occupied by the cavity in the glass layer can be minimized to maintain the rigidity of the glass layer, thereby further improving the bending characteristics of the circuit board and the semiconductor package. In addition, the boundary surface between the side walls and the bottom surface of the cavity may be provided as a curved surface having a predetermined curvature. Through this, the embodiment can improve the mechanical reliability of the circuit board and the semiconductor package. For example, when the boundary between the side walls and the bottom surface of the cavity is at a right angle, stress may be concentrated at the boundary described above in the manufacturing environment and / or operating environment of the circuit board, which may cause cracks to occur. In contrast, the embodiment can prevent stress from being concentrated on the edge surface by rounding the edge surface between the side wall and the bottom surface, thereby improving the mechanical reliability of the circuit board and semiconductor package.

[0043] In addition, the horizontal central axis of the connecting member and the horizontal central axis of the cavity may be misaligned. Furthermore, each of the connecting member and the cavity may be provided in multiple numbers, and the horizontal central axis of each connecting member may be shifted in different directions and at different distances from the horizontal central axis of each cavity. Through this, the embodiment can further mitigate warping of the circuit board.

[0044] FIG. 1a is a cross-sectional view illustrating a circuit board according to the first embodiment.

[0045] Figures 1b and 1c are cross-sectional views illustrating a circuit board according to the second embodiment,

[0046] FIGS. 2A and 2B are cross-sectional views illustrating a core via electrode according to the first embodiment.

[0047] Fig. 3 is a cross-sectional view showing an example of the arrangement of the core via electrodes illustrated in Figs. 2a and 2b.

[0048] Fig. 4 is a plan view showing in more detail an example of the arrangement of the core via electrode of Fig. 3.

[0049] FIG. 5 is a cross-sectional view illustrating a core via electrode according to the second embodiment.

[0050] Fig. 6 is a cross-sectional view illustrating a core via electrode according to the third embodiment.

[0051] Fig. 7 is a cross-sectional view illustrating a core via electrode according to the fourth embodiment.

[0052] Fig. 8 is a cross-sectional view illustrating a core via electrode according to the fifth embodiment.

[0053] Fig. 9 is a cross-sectional view illustrating a core via electrode according to the sixth embodiment.

[0054] Fig. 10 is a cross-sectional view illustrating a core via electrode according to the seventh embodiment.

[0055] Fig. 11 is a cross-sectional view illustrating a circuit board according to the third embodiment.

[0056] Fig. 12 is a cross-sectional view illustrating a circuit board according to the fourth embodiment.

[0057] Fig. 13 is a cross-sectional view illustrating a circuit board according to the fifth embodiment.

[0058] Figure 14 is a cross-sectional view illustrating some layers of the circuit board of Figure 13 in more detail.

[0059] Fig. 15 is a plan view showing in more detail the arrangement structure of the cavity and connecting members of the circuit board of Fig. 14.

[0060] Fig. 16 is a cross-sectional view illustrating a semiconductor package according to the first embodiment.

[0061] Fig. 17 is a cross-sectional view illustrating a semiconductor package according to the second embodiment.

[0062] Figures 18a to 18h are cross-sectional views showing a method for manufacturing a circuit board according to one embodiment in process order.

[0063] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.

[0064] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0065] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by those of ordinary skill in the technical field to which the present invention pertains, unless explicitly and specifically defined and described, and commonly used terms, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology. In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention.

[0066] In this specification, singular forms may also include plural forms unless specifically stated otherwise in the phrase, and when it is described as “A and / or at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C. In addition, when describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0067] These terms are only intended to distinguish the component from other components, and are not intended to limit the nature, order, or sequence of the component by the term. In addition, when a component is described as being "connected," "coupled," or "connected" to another component, it may include not only cases where the component is directly connected, coupled, or connected to the other component, but also cases where the component is "connected," "coupled," or "connected" by another component between the component and the other component.

[0068] Additionally, when described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Furthermore, when expressed as "above" or "below", it may include the meaning of the downward direction as well as the upward direction based on one component.

[0069] The terminology used in this application is only used to describe specific embodiments and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, it should be understood that the terms "comprise" or "have" indicate the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0070] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0071]

[0072] Hereinafter, embodiments will be described in detail with reference to the attached drawings. Regardless of the drawing symbols, identical or corresponding components are given the same reference numbers, and redundant descriptions thereof will be omitted.

[0073]

[0074] Before describing the embodiment, an electronic device (not shown) to which the semiconductor package of the embodiment is applied will be briefly described. The electronic device may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive device, etc. However, the electronic device is not limited thereto, and it goes without saying that the electronic device may be any other electronic device that processes data.

[0075] An electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to a semiconductor package of the embodiment. Furthermore, the semiconductor package includes a circuit board, a semiconductor chip, a bonding portion for electrically connecting the semiconductor element and the circuit board, a resin portion for filling the space between the semiconductor element and the circuit board, and a molding portion for entirely enclosing the semiconductor element.

[0076] Semiconductor devices may include active and / or passive components and may have various functions. Active devices may be in the form of integrated circuits (ICs) in which hundreds to millions of transistors are integrated into a single semiconductor device, and may be, for example, logic chips, memory chips, etc. For example, the logic chip may be an application processor (AP) device including at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, an encryption processor, a microprocessor, a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), etc., or a set of devices including a specific combination of the above. The memory chip may be a stacked memory such as HBM. In addition, the memory chip may include a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), or a flash memory.

[0077] The semiconductor package of the embodiment may be any one of a CSP (Chip Scale Package), an FC-CSP (Flip Chip-Chip Scale Package), an FC-BGA (Flip Chip Ball Grid Array), a POP (Package On Package), and a SIP (System In Package), but is not limited thereto.

[0078]

[0079] FIG. 1A is a cross-sectional view illustrating a circuit board according to a first embodiment, FIGS. 1B and 1C are cross-sectional views illustrating a circuit board according to a second embodiment, FIGS. 2A and 2B are cross-sectional views illustrating a core via electrode according to the first embodiment, FIG. 3 is a cross-sectional view illustrating an example of the arrangement of the core via electrode illustrated in FIGS. 2A and 2B, and FIG. 4 is a plan view illustrating an example of the arrangement of the core via electrode of FIG. 3 in more detail. FIG. 5 is a cross-sectional view illustrating a core via electrode according to a second embodiment, FIG. 6 is a cross-sectional view illustrating a core via electrode according to a third embodiment, FIG. 7 is a cross-sectional view illustrating a core via electrode according to a fourth embodiment, FIG. 8 is a cross-sectional view illustrating a core via electrode according to a fifth embodiment, FIG. 9 is a cross-sectional view illustrating a core via electrode according to a sixth embodiment, and FIG. 10 is a cross-sectional view illustrating a core via electrode according to a seventh embodiment. 11 is a cross-sectional view illustrating a circuit board according to a third embodiment, FIG. 12 is a cross-sectional view illustrating a circuit board according to a fourth embodiment, FIG. 13 is a cross-sectional view illustrating a circuit board according to a fifth embodiment, FIG. 14 is a cross-sectional view illustrating some layers of the circuit board of FIG. 13 in more detail, FIG. 15 is a plan view illustrating the arrangement structure of cavities and connecting members of the circuit board of FIG. 14 in more detail, FIG. 16 is a cross-sectional view illustrating a semiconductor package according to a first embodiment, and FIG. 17 is a cross-sectional view illustrating a semiconductor package according to a second embodiment.

[0080] Hereinafter, a circuit board and a semiconductor package including the same according to an embodiment will be specifically described with reference to FIGS. 1 to 17.

[0081] Referring to FIG. 1A, the circuit board (100) includes a glass layer (101), a first build-up layer (102) disposed on one surface of the glass layer (101), and a second build-up layer (103) disposed on the other surface of the glass layer (101). Here, the meaning of being disposed on one surface and the other surface is not limited to a configuration in direct contact with the one surface and the other surface, but should also be understood to mean that there are other configurations between the one surface and the first build-up layer (102), and between the other surface and the second build-up layer (103).

[0082] The glass layer (101) is an insulating layer made of plate-shaped glass material, and functions as a core of the circuit board (100) to improve the rigidity of the circuit board (100). For example, the glass layer (101) may include, but is not limited to, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, alumino-silicate glass, etc., and may include, in addition to silicon-based glass compositions, fluorine glass, phosphate glass, chalcogen glass, etc. In addition, the glass layer (101) may further include other additives to form glass having specific physical properties. These additives may include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, and carbonates and / or oxides of these elements and other elements. The glass layer (101) may also be referred to as a ‘core layer’ or ‘glass core’ that serves as the core of the circuit board (100).

[0083] As the number of terminals of semiconductor devices arranged on a recent circuit board (100) increases, wiring becomes more complex, and accordingly, the thickness of the first and second build-up layers (102, 103) is increasing. Accordingly, the glass layer (101) of the present embodiment may have a thickness of 200 µm to 1200 µm in order to improve the overall rigidity of the circuit board (100) and prevent excessive signal loss. The glass layer (101) may have a higher dielectric constant and lower surface roughness than a core layer having a conventional glass fiber, thereby improving the rigidity of the circuit board (100) while minimizing signal transmission loss, thereby improving the electrical reliability and / or mechanical reliability of the circuit board (100) and the semiconductor package including the same.

[0084] A through hole penetrating one surface and the other surface may be formed in the glass layer (101). The via hole in the glass layer (101) may be formed using a CO2 laser, etc. For example, the crystal quality of the area of ​​the glass layer (101) irradiated with the CO2 laser is altered, and the through hole may be formed by removing the area of ​​the glass layer (101) where the crystal quality is altered through wet etching using hydrofluoric acid (HF), etc. However, the present invention is not limited thereto, and the through hole in the glass layer (101) may be formed using various methods. For example, when a through hole is formed in the glass layer (101) using a mechanical drill, the inclination of the through hole may be perpendicular to one surface and / or the other surface of the glass layer (101). However, when the inclination of the through hole is perpendicular to one surface and / or the other surface of the glass layer (101), it may be difficult to densely fill the inside of the through hole with a metal material in a plating process for filling a conductive material into the through hole. In addition, when forming a through hole in the glass layer (101) using a mechanical drill, damage such as breakage of the glass layer (101) may occur during the process of using the mechanical drill, and thus the product yield may decrease. Accordingly, the glass layer (101) may be provided with a through hole that is inclined so that the width in the horizontal direction gradually decreases and / or increases from one surface to the other surface.

[0085] A core via electrode (141) may be arranged within the through hole of the glass layer (101). The core via electrode (141) functions to electrically connect the first build-up layer (102) and the second build-up layer (103). It is preferable that the core via electrode (141) densely fill the through hole for the function of resistance or heat dissipation. However, when the insulating layer serving as the core is a glass layer (101) including a glass material, it may be difficult to form a seed layer of the core via electrode (141) having a uniform thickness on the inner wall of the through hole of the glass layer (101). For example, in order to form the core via electrode (141), a process of forming a seed layer by performing electroless plating, such as sputtering, on the inner wall of the through hole of the glass layer (101) is performed. When the seed layer is made of a copper material, the adhesion between the copper and the glass layer (101) is not good, which may cause problems such as peeling between the seed layer and the glass layer (101). However, when the seed layer is made of a material having good adhesion to the glass layer (101), such as titanium (Ti) or chromium (Cr), it can be arranged using sputtering. However, in the absence of a sputtering device applicable to the panel process, when the seed layer is made of a copper material, an insulating member (142) can be arranged in the through hole of the glass layer (101), and a copper material having good adhesion to the insulating member (142) can be arranged as the seed layer, and then a core via electrode (141) can be formed through a plating process. For example, the glass layer (101) may have a through hole, the core via electrode (141) may be disposed within the through hole of the glass layer (101), and the insulating member (142) may be disposed between the inner wall of the through hole of the glass layer (101) and the outer surface of the core via electrode (141) to surround the core via electrode (141). That is, the glass layer (101) may have a through hole, the insulating member (142) may have a via hole and be disposed within the through hole of the glass layer (101), and the core via electrode (141) may be disposed within the via hole of the insulating member (142).Here, for the purpose of distinguishing the configuration, a hole penetrating the glass layer (101) is called a 'through hole', and a hole penetrating the insulating member (142) is called a 'via hole'. Therefore, the core via electrode (141) may not be in contact with the glass layer (101) and may be in contact with the insulating member (142), and accordingly, a smooth plating process can be performed in the process of forming the core via electrode (141), thereby improving the product yield, and it is possible to secure the adhesion between the core via electrode (141) and the insulating member (142), thereby improving the mechanical reliability and / or electrical reliability of the core via electrode (141). In addition, by having the function of alleviating the difference in the coefficient of thermal expansion between the core via electrode (141) and the glass layer (101), peeling and / or cracking of the core via electrode (141) can be prevented.

[0086] At this time, the insulating member (142) may be disposed on the inner wall of the through hole of the glass layer (101), and thus may function to improve the adhesion with the core via electrode (141). According to the embodiment of FIG. 1A, the insulating member (142) may not be in contact with the upper and lower surfaces of the glass layer (101). That is, the seed layer formed on the upper and / or lower surfaces of the glass layer (101) to form a circuit layer described later can secure adhesion compared to forming the seed layer within the through hole of the glass layer (101), and accordingly, the insulating member (142) may be selectively provided only within the through hole of the glass layer (101) without being in contact with the upper and lower surfaces of the glass layer (101). However, the embodiment is not limited thereto. According to the embodiment of FIG. 1B, the insulating member (142A) may be disposed on the upper surface and / or lower surface of the glass layer (101) to improve adhesion between the glass layer (101) and the circuit layer. For example, the insulating member (142A) may include a first portion (142A1) disposed on the inner wall of a through hole penetrating the glass layer (101), and a second portion (142A2) disposed on the upper surface and / or lower surface of the glass layer (101). In this case, the insulating member (142A) may be provided with the same insulating material as the insulating material of the plurality of insulating layers (106, 107, 108, 109, 110) of the first build-up (102) disposed on the glass layer (101) and / or the plurality of insulating layers (111, 112, 113, 114, 115) of the second build-up layer (103). At this time, when the insulating member (142A) includes a second portion (142A2) disposed on the upper and lower surfaces of the glass layer (101), the adhesion between the glass layer (101) and the circuit layers (121, 122) can be further improved, and the reliability problem of the circuit layers (121, 122) being peeled off from the glass layer (101) can be solved. Furthermore, according to the embodiment of FIG. 1C, the insulating member (142B) can be disposed on the upper and / or lower surfaces, and also on the outer surface, of the glass layer (101) in order to improve the adhesion between the glass layer (101) and the circuit layer.For example, the insulating member (142B) may be provided with a first portion (142B1) disposed on the inner wall of a through hole penetrating the glass layer (101), a second portion (142B2) disposed on the upper surface and / or lower surface of the glass layer (101), and a third portion (142B3) disposed on the outer surface of the glass layer (101). In this case, the insulating member (142B) may be provided with the same insulating material as the insulating material of the plurality of insulating layers (106, 107, 108, 109, 110) of the first build-up (102) disposed on the glass layer (101) and / or the plurality of insulating layers (111, 112, 113, 114, 115) of the second build-up layer (103). At this time, if the insulating member (142B) further includes a third portion (142B2) disposed on the outer surface of the glass layer (101), reliability problems such as cracks in the glass layer (101) that may occur during the manufacturing process of the circuit board can be further improved, thereby further improving the product yield. For example, the circuit board can be manufactured in panel units. At this time, cracks in the glass layer (101) may occur during the process of separating the panel unit into a unit package, and thus the product yield may be reduced. Accordingly, the insulating member (142B) further includes a third portion (142B3) disposed on the outer surface of the glass layer (101), thereby solving problems such as cracks that may occur during the process of separating the panel unit into a unit package. Furthermore, the third portion (142B3) of the insulating member (142B) disposed on the outer surface of the glass layer (101) can function as a buffer layer that alleviates stress due to thermal shrinkage and / or thermal expansion occurring in the manufacturing process of the circuit board and / or the operating environment of the circuit board, thereby solving the problem of the circuit board being greatly bent in a specific direction and / or the reliability problem of a plurality of components of the circuit board being separated from each other due to the above-described stress. Hereinafter, the description will be made based on the insulating member (142) illustrated in FIG. 1A.

[0087] A first build-up layer (102) is arranged on one side of the glass layer (101). The first build-up layer (102) includes a plurality of insulating layers (106, 107, 108, 109, 110), a plurality of circuit layers (116, 117, 118, 119, 120, 121), and a first protective layer (104).

[0088] The plurality of circuit layers (116, 117, 118, 119, 120, 121) of the first build-up layer (102) may include a first circuit layer (116) that is farthest from the glass layer (101) in the vertical direction, a second circuit layer (117) that is closer to the glass layer (101) in the vertical direction than the first circuit layer (116), a third circuit layer (118) that is closer to the glass layer (101) in the vertical direction than the second circuit layer (117), a fourth circuit layer (119) that is closer to the glass layer (101) in the vertical direction than the third circuit layer (118), a fifth circuit layer (120) that is closer to the glass layer (101) in the vertical direction than the fourth circuit layer (119), and a sixth circuit layer (121) that is closer to the glass layer (101) in the vertical direction than the fifth circuit layer (120).

[0089] The first to sixth circuit layers (116, 117, 118, 119, 120, 121) may function to electrically connect with semiconductor elements arranged on a circuit board (100). Each of the first to sixth circuit layers (116, 117, 118, 119, 120, 121) may be freely designed in consideration of impedance. In addition, via electrodes (131, 132, 133, 134, 135) may be arranged to connect each of the first to sixth circuit layers (116, 117, 118, 119, 120, 121). For example, a first via electrode (131) is disposed between a first circuit layer (116) and a second circuit layer (117), a second via electrode (132) is disposed between a second circuit layer (117) and a third circuit layer (118), a third via electrode (133) is disposed between a third circuit layer (118) and a fourth circuit layer (119), a fourth via electrode (134) is disposed between a fourth circuit layer (119) and a fifth circuit layer (120), and a fifth via electrode (135) is disposed between a fifth circuit layer (120) and a sixth circuit layer (121), thereby electrically connecting the first to sixth circuit layers (116, 117, 118, 119, 120, 121).

[0090] The first to fifth via electrodes (131, 132, 133, 134, 135) can be formed simultaneously in the process of arranging the first to fifth circuit layers (116, 117, 118, 119, 120). For example, in the process of arranging the fifth circuit layer (120) on the sixth circuit layer (121), a through hole can be formed in the fifth insulating layer (110) to expose a portion of the sixth circuit layer (121), and through this, the fifth circuit layer (120) can be arranged together with the fifth via electrode (135) filling the through hole of the fifth insulating layer (110). Therefore, the fifth via electrode (135) can be distinguished as a protrusion of the fifth circuit layer (120). Likewise, each of the first to fourth via electrodes (131, 132, 133, 134) is separated by a protrusion of the first to fourth circuit layers (116, 117, 118, 119) and can be connected to another circuit layer disposed below each circuit layer.

[0091] The sixth circuit layer (121) may be in contact with one surface of the glass layer (101). In this case, a portion of the sixth circuit layer (121) may be arranged to cover the above-described insulating member (142). That is, the lower surface of the sixth circuit layer (121) may include a first portion in contact with the upper surface of the core via electrode (141), a second portion in contact with the upper surface of the insulating member (142), and a third portion in contact with the upper surface of the glass layer (101).

[0092] The plurality of insulating layers (106, 107, 108, 109, 110) of the first build-up layer (102) may include a first insulating layer (106) that is farthest from the glass layer (101) in a vertical direction, a second insulating layer (107) that is closer to the glass layer (101) in a vertical direction than the first insulating layer (106), a third insulating layer (108) that is closer to the glass layer (101) in a vertical direction than the second insulating layer (107), a fourth insulating layer (109) that is closer to the glass layer (101) in a vertical direction than the third insulating layer (108), and a fifth insulating layer (110) that is closer to the glass layer (101) in a vertical direction than the fourth insulating layer (109).

[0093] The first to fifth insulating layers (106, 107, 108, 109, 110) are arranged to vertically insulate the first to sixth circuit layers (116, 117, 118, 119, 120, 121) described above. For example, the first to sixth insulating layers (106, 107, 108, 109, 110) may be formed using a thermosetting insulating material containing an inorganic filler in a resin, and Ajinomoto Build-up Film (ABF) of Ajinomoto Co., Ltd. may be used. However, the embodiment is not limited thereto, and a photo-curable insulating material (Photo Imageable Dielectric, PID) for forming a fine pattern may be used.

[0094] The first protective layer (104) can protect the first circuit layer (116) from external moisture or contaminants. In addition, when semiconductor elements are arranged on the circuit board (100) using a material such as solder, the first protective layer (104) functions to prevent short circuits between solders due to its low wettability with the solder. The first protective layer (104) can be formed using a photocurable insulating material, and for example, a solder resist can be used.

[0095] A second build-up layer (103) is arranged on the other side of the glass layer (101). The second build-up layer (103) includes a plurality of insulating layers (111, 112, 113, 114, 115), a plurality of circuit layers (122, 123, 124, 125, 126, 127), and a second protective layer (127).

[0096] The plurality of circuit layers (122, 123, 124, 125, 126, 127) of the second build-up layer (103) may include a seventh circuit layer (122) that is most adjacent to the glass layer (101) in the vertical direction, an eighth circuit layer (123) arranged under the seventh circuit layer (116), a ninth circuit layer (124) arranged under the eighth circuit layer (123), a tenth circuit layer (125) arranged under the ninth circuit layer, an eleventh circuit layer (126) arranged under the tenth circuit layer (125), and a twelfth circuit layer (127) arranged under the eleventh circuit layer (126). The seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127) may electrically connect a main board (not shown) of an electronic device and semiconductor elements arranged on a circuit board (100). Each of the seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127) may be freely designed in consideration of impedance.

[0097] Additionally, via electrodes (136, 137, 138, 139, 140) may be arranged to connect each of the seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127). The sixth via electrode (136) is disposed between the seventh circuit layer (122) and the eighth circuit layer (123), the seventh via electrode (137) is disposed between the eighth circuit layer (123) and the ninth circuit layer (124), the eighth via electrode (138) is disposed between the ninth circuit layer (124) and the tenth circuit layer (125), the ninth via electrode (139) is disposed between the tenth circuit layer (125) and the eleventh circuit layer (126), and the tenth via electrode (140) is disposed between the eleventh circuit layer (126) and the twelfth circuit layer (127), thereby electrically connecting the seventh to twelfth circuit layers (122, 123, 124, 125, 126, 127).

[0098] As described above for the first to fifth via electrodes (131, 132, 133, 134, 135) of the first build-up layer (102), the arrangement of the sixth to tenth via electrodes (136, 137, 138, 139, 140) can be performed simultaneously in the process of arranging the eighth to twelfth circuit layers (123, 124, 125, 126, 127). Therefore, as described above, the seventh via electrode (137) can be distinguished as a protrusion of the ninth circuit layer (124). However, since the 8th to 12th circuit layers (123, 124, 125, 126, 127) are laminated in a different direction from the first build-up layer (102), the inclination direction of each via electrode (131, 132, 133, 134, 135) of the first build-up layer (102) may have a direction opposite to the inclination direction of each via electrode (136, 137, 138, 139, 140) of the second build-up layer (103). For example, each via electrode (131, 132, 133, 134, 135) of the first build-up layer (102) may have a slope that becomes narrower toward the glass layer (101), and each via electrode (136, 137, 138, 139, 140) of the second build-up layer (103) may also have a slope that becomes narrower toward the glass layer (101). For example, the slope of each via electrode (131, 132, 133, 134, 135) of the first build-up layer (102) may be symmetrical with respect to the slope of each via electrode (136, 137, 138, 139, 140) of the second build-up layer (103) with respect to the glass layer (101).

[0099] The seventh circuit layer (122) may be in contact with the other surface of the glass layer (101). In this case, a part of the seventh circuit layer (122) may be arranged to cover the above-described insulating member (142). That is, the lower surface of the seventh circuit layer (122) may include a first portion in contact with the lower surface of the core via electrode (141), a second portion in contact with the lower surface of the insulating member (142), and a third portion in contact with the lower surface of the glass layer (101).

[0100] The plurality of insulating layers (111, 112, 113, 114, 115) of the second build-up layer (103) may include a sixth insulating layer (111) that is most adjacent to the glass layer (101) in the vertical direction, a seventh insulating layer (112) arranged under the sixth insulating layer (111), an eighth insulating layer (113) arranged under the seventh insulating layer (112), a ninth insulating layer (114) arranged under the eighth insulating layer (113), and a tenth insulating layer (115) arranged under the ninth insulating layer (114). The 6th to 10th insulating layers (111, 112, 113, 114, 115) are arranged to vertically insulate the 7th to 12th circuit layers (122, 123, 124, 125, 126, 127) described above. In addition, as an example, the 6th to 10th insulating layers (111, 112, 113, 114, 115) may be formed using a thermosetting insulating material containing an inorganic filler in a resin, and Ajinomoto Build-up Film (ABF) of Ajinomoto Co., Ltd. may be used. However, the embodiment is not limited thereto, and a photo-curable insulating material (Photo Imageable Dielectric, PID) for forming a fine pattern may be used.

[0101] The second protective layer (105) can protect the 12th circuit layer (127) from external moisture or contaminants. In addition, when semiconductor elements are arranged on the circuit board (100) using a material such as solder, the second protective layer (105) functions to prevent short circuits between solders due to its low wettability with the solder. The second protective layer (105) can be formed using a photocurable insulating material, and for example, a solder resist can be used.

[0102] The structure of the circuit board (100) described above is only an example for explaining the present invention, and the technical idea of ​​the present invention is not limited to the laminated structure of the present embodiment.

[0103] The circuit board (100) may warp depending on the heat and / or pressure applied during the process, the thickness of each insulating layer, the thickness of each protective layer, and the density or thickness of the circuit layer. Warp may be caused by warping in the smile direction (∪) and warping in the cry direction (∩), and warping in these two directions may be applied in combination. Warping in the smile direction means that the upper and / or lower surface of the circuit board (100) is warped concavely so that the center is lower than the edge of the circuit board (100), and may also be referred to as a concave direction. In addition, warping in the cry direction means that the upper and / or lower surface of the circuit board (100) is warped convexly so that the center is higher than the edge of the circuit board (100), in a direction opposite to the warping in the smile direction, and may also be referred to as a convex direction.

[0104] The warpage of the circuit board (100) may be a factor that prevents the semiconductor elements placed on the first protective layer (104) from being uniformly bonded to the entire circuit board (100) by solder bonding, etc., thereby reducing the reliability of the semiconductor package. To solve this problem, the embodiment changes the position of the core via electrode (141) within the insulating member (142) provided on the glass layer (101). That is, when the insulating member (142) and the core via electrode (141) are placed without considering the direction in which the circuit board is bent, the horizontal central axis of the insulating member (142) and the horizontal central axis of the core via electrode (141) can be matched (or aligned) with each other. In contrast, the embodiment can change the position of the core via electrode (141) within the insulating member (142) in consideration of the direction in which the circuit board (100) is bent, and accordingly, the horizontal central axis of the insulating member (142) and the horizontal central axis of the core via electrode (141) can be misaligned with each other.

[0105] FIG. 2A and FIG. 2B show an example of the positional relationship between the horizontal central axis of the insulating member (142) and the horizontal central axis of the core via electrode (141). For example, a circuit board (100) is provided with a plurality of core via electrodes (141), and FIG. 2A may show one of the plurality of core via electrodes (141), and FIG. 2B may show another one of the plurality of core via electrodes (141).

[0106] (a) of FIG. 2A is a cross-sectional view showing one of a plurality of core via electrodes (141), and (b) of FIG. 2A is a plan view of the core via electrode shown in (a) of FIG. 2A.

[0107] Referring to (a) and (b) of FIG. 2A, the glass layer (201) has a through hole, and the insulating member (204) is placed within the through hole of the glass layer (201). At this time, the through hole of the glass layer (201) is formed by performing a laser process on the upper surface of the glass layer (201), and accordingly, the through hole may have a slope such that the horizontal width gradually narrows in the direction from the upper surface of the glass layer (201) toward the lower surface. For example, the through hole provided in the glass layer (201) may be formed by irradiating the glass layer (201) with a CO2 laser to alter the crystal quality of an area of ​​the glass layer (201), and then removing the area of ​​the glass layer (201) where the crystal quality is altered through wet etching using hydrofluoric acid (HF), but is not limited thereto. The insulating member (204) is disposed within the through hole of the glass layer (201) while having a slope corresponding to the inner wall of the through hole of the glass layer (201). That is, the insulating member (204) may be sloped such that the width thereof gradually narrows in the horizontal direction from the upper surface to the lower surface. When the insulating member (204) has a slope such that the width thereof gradually narrows in the direction from the upper surface to the lower surface, the manufacturing process of the circuit board (100) can be facilitated, and thus the product yield can be improved. For example, a laser process can be performed on each of the upper and lower surfaces of the glass layer (201) to form a through hole, and through this, the through hole of the glass layer (201) and the insulating member (204) can each have an hourglass shape. In this case, the laser process for forming a through hole in the glass layer (201) must be performed individually on both sides of the glass layer (201), which may increase the number of manufacturing processes, and the product yield may decrease as the laser process is performed on both sides of the glass layer (201).In contrast, the through hole and the insulating member (204) provided in the glass layer (201) can have only one slope in which the width gradually narrows in the direction from the upper surface to the lower surface, thereby simplifying the manufacturing process and improving the product yield. Furthermore, the above-described through hole is a space filled with the insulating member (204) rather than the via electrode, and therefore, unlike the via electrode, the plating processability and size (e.g., the width of the upper surface and the width of the lower surface) do not need to be greatly considered. Accordingly, the insulating member (204) can have only one slope in which the width gradually narrows in the direction from the upper surface to the lower surface, thereby improving the product yield.

[0108] The insulating member (204) has a via hole. The via hole provided in the insulating member (204) penetrates the upper surface and the lower surface of the insulating member (204). The via hole provided in the insulating member (204) may include a first portion that is inclined so that the width in the horizontal direction gradually narrows in a direction from the upper surface to the lower surface of the insulating member (204), and a second portion that is disposed under the first portion and is inclined so that the width in the horizontal direction gradually widens in a direction from the upper surface to the lower surface of the insulating member (204). A core via electrode (205) is disposed in the via hole of the insulating member (204). The core via electrode (205) electrically connects the circuit layers (202, 203) disposed on the upper surface and the lower surface of the glass layer (201), respectively. The core via electrode (205) has a slope corresponding to a slope of an inner wall of the via hole of the insulating member (204). The core via electrode (205) may include a first portion (206) inclined so that the width in the horizontal direction gradually narrows along a direction from the upper surface of the glass layer (201) toward the lower surface of the glass layer (201), and a second portion (207) inclined so that the width in the horizontal direction gradually widens along a direction from the upper surface of the glass layer (201) toward the lower surface of the glass layer (201). Each of the inclination of the first portion (206) and the inclination of the second portion (207) of the core via electrode (205) overlaps with the inclination of the insulating member (204) in the horizontal direction. The inclination angle of the inclination of the second portion (207) of the core via electrode (205) may be different from the inclination angle of the inclination of the insulating member (204). The inclination angle of the inclination of the first portion (206) of the core via electrode (205) may correspond to the inclination angle of the inclination of the insulating member (204). Here, correspondence could mean that the two slopes are inclined in the same direction and the difference in their angles is within 10 degrees.That is, the inclination of the insulating member (204) and the inclination of the first part (206) of the core via electrode (205) may be inclined in the same direction, and the inclination of the second part (207) of the core via electrode (205) may be inclined in a direction different from the direction in which the inclination of the insulating member (204) and the inclination of the first part (206) are each inclined.

[0109] That is, the core via electrode (205) can be divided into a plurality of parts based on the slope of the side surface. By having the core via electrode (205) include a first part (206) and a second part (207) having different slopes, the processability in the process of plating the core via electrode (205) can be improved, and thus the electrical reliability can be improved.

[0110] For example, the core via electrode (205) may have only one slope, which is the same as the slope of the insulating member (204). In this case, the difference between the width of the upper surface and the width of the lower surface of the core via electrode (205) increases in response to the slope of the core via electrode (205), and thus, electrical characteristics may deteriorate during signal transmission. Furthermore, when the difference between the width of the upper surface and the width of the lower surface of the core via electrode (205) increases, the width of the upper surface of the core via electrode (205) may become excessively large compared to the embodiment in order for the core via electrode (205) to penetrate the insulating member (204), and thus, the circuit integration may deteriorate. Furthermore, when the width of the upper surface of the core via electrode (205) increases, the core via electrode (205) may not be densely filled in the via hole of the insulating member (204), and thus, a void may be formed in the core via electrode (205). In addition, the void expands due to heat generated during the operation of the semiconductor package, which becomes a factor that reduces the mechanical reliability of the circuit board. Accordingly, the embodiment provides a first portion (206) and a second portion (207) of the core via electrode (205) having different inclinations, thereby preventing the size of the core via electrode (205) from increasing while preventing a void from being formed in the core via electrode (205). Through this, the embodiment can improve the circuit integration of the circuit board and enhance electrical reliability and / or mechanical reliability.

[0111] And, in one embodiment, the vertical length of the first part (206) of the core via electrode (205) may correspond to the vertical length of the second part (207). Here, corresponding may mean that the deviation of the lengths therebetween is within 5%. By making the vertical length of the first part (206) of the core via electrode (205) and the vertical length of the second part (207) correspond to each other, the plating process of the core via electrode (205) can be performed more smoothly, and further, warping of the circuit board (100) in a specific direction, which may be caused by the first part (206) and the second part (207) of the core via electrode (205) having an asymmetrical structure, can be prevented.

[0112] At this time, the horizontal central axis (x1) of the insulating member (204) may not be aligned with the horizontal central axis (x2) of the core via electrode (205) and may be spaced apart from it in the horizontal direction. That is, the horizontal central axis (x1) of the insulating member (204) and the horizontal central axis (x2) of the core via electrode (205) may be misaligned. Here, when the upper surface of the insulating member (204) has a circular or oval shape, the horizontal central axis (x1) of the insulating member (204) may mean the intersection point where the long axis and the short axis of the upper surface of the insulating member (204) meet. Alternatively, when the upper surface of the insulating member (204) has a square shape, the horizontal central axis (x1) of the insulating member (204) may mean the point where the line segment connecting two vertices facing each other on the upper surface of the insulating member (204) meets. Correspondingly, the horizontal central axis (x2) of the core via electrode (205) may mean the intersection of the major axis and the minor axis, or the point where two line segments connecting two opposite vertices meet.

[0113] The horizontal central axis (x1) of the insulating member (204) and the horizontal central axis (x2) of the core via electrode (205) may be misaligned with each other, and may have a horizontal separation distance (w2) as an example. For example, the central axis (x2) of the core via electrode (205) may be shifted in the horizontal direction by the separation distance (w2) based on the central axis (x1) of the insulating member (204). Here, being shifted may mean that the central axis (x2) of the core via electrode (205) and the central axis (x1) of the insulating member (204) are not aligned along the vertical direction but are misaligned. For example, the above-described shift may mean that the horizontal distance from the horizontal central axis (x0) of the glass layer to the central axis (x2) of the core via electrode (205) and the horizontal distance from the horizontal central axis (x0) of the glass layer to the central axis (x1) of the insulating member (204) are applied differently from each other, and for example, it may mean that the horizontal distance from the horizontal central axis (x0) of the glass layer to the central axis (x2) of the core via electrode (205) is smaller than the horizontal distance from the horizontal central axis (x0) of the glass layer to the central axis (x1) of the insulating member (204). In addition, the above-described shift means the relationship between the horizontal central axis (x0) of the glass layer and the central axis (x2) of the core via electrode (205), and for the convenience of explanation, the term "shift" will be used in the above-described meaning in the following description.

[0114] The circuit board (100) can be mitigated from being bent in a specific direction depending on the direction and distance in which the central axis (x2) of the core via electrode (205) is shifted based on the central axis (x1) of the insulating member (204). At this time, bending of the circuit board (100) in a specific direction may occur depending on the direction and distance in which the central axis (x2) of the core via electrode (205) is shifted based on the central axis (x1) of the insulating member (204), and the meaning of the above-described mitigation may mean that the central axis (x2) of the core via electrode (205) is shifted so that bending of the circuit board (100) occurs in a direction opposite to the direction in which the circuit board (100) is bent before the above-described shift occurs. By shifting the central axis (x2) of the core via electrode (205) with respect to the central axis (x1) of the insulating member (204) based on the direction in which the circuit board (100) is bent, the circuit board (100) can be prevented from being bent in a specific direction, excessive stress applied to the circuit board can be avoided, and mechanical reliability and / or electrical reliability of the circuit board can be improved accordingly. In addition, the embodiment can alleviate the bending of the circuit board so that a semiconductor element can be stably attached on the circuit board. At this time, when the circuit board is bent in a specific direction, a height deviation may occur between a plurality of bonding portions provided on the circuit board, and terminals of the semiconductor element may not be stably bonded on the plurality of bonding portions. In contrast, the embodiment can alleviate the overall bending of the circuit board by shifting the central axis (x2) of the core via electrode (205), and can enable a semiconductor element to be stably attached on the circuit board. Therefore, the embodiment can improve product reliability by ensuring stable operation of semiconductor devices. Furthermore, the embodiment can ensure stable operation of products such as servers to which semiconductor packages are applied.

[0115] In addition, as the horizontal central axis (x2) of the core via electrode (205) is shifted with respect to the horizontal central axis (x1) of the insulating member (204), the horizontal width of the insulating member (204) may have different horizontal widths along the circumferential direction of the upper surface of the core via electrode (205).

[0116] That is, the insulating member (204) may have a first width (w1) in the horizontal direction on one side of the core via electrode (205) based on the vertical cross-section, and may have a second width (w2) in the horizontal direction different from the first width (w1) on the other side opposite to the one side. Furthermore, the insulating member (204) is provided along the circumference of the core via electrode (205), and the width in the horizontal direction may vary along the circumference of the core via electrode (205). In addition, the width of the insulating member (204) in the horizontal direction may be determined according to the shift direction and the shift distance of the central axis (x2) of the core via electrode (205). In addition, the embodiment may alleviate the overall warpage of the circuit board (100) by making the widths of the insulating member (204) in the horizontal direction different from each other along the circumference of the core via electrode (205).

[0117] At this time, FIG. 2a illustrates that the horizontal central axis (x2) of the core via electrode (205) is shifted in the first horizontal direction based on the horizontal central axis (x1) of the insulating member (204), and FIG. 2b shows the core via electrode shifted in the second horizontal direction opposite to the first horizontal direction.

[0118] Referring to (a) and (b) of FIG. 2B, the glass layer (208) has a through hole, and the insulating member (211) is disposed within the through hole of the glass layer (208). The insulating member (211) is disposed within the through hole of the glass layer (208) while having a slope corresponding to the inner wall of the through hole of the glass layer (208). That is, the insulating member (211) can be sloped so that the width in the horizontal direction gradually narrows along the direction from the upper surface to the lower surface. The insulating member (211) has a via hole. The via hole provided in the insulating member (211) penetrates the upper surface and the lower surface of the insulating member (211). The via hole provided in the insulating member (211) may include a first portion that is inclined so that the width in the horizontal direction gradually narrows in a direction from the upper surface to the lower surface of the insulating member (211), and a second portion that is disposed under the first portion and is inclined so that the width in the horizontal direction gradually widens in a direction from the upper surface to the lower surface of the insulating member (211). A core via electrode (212) is disposed within the via hole of the insulating member (211). The core via electrode (212) has a slope corresponding to a slope of an inner wall of the via hole of the insulating member (211). The core via electrode (212) may include a first portion (213) inclined so that the width in the horizontal direction gradually becomes narrower in the direction from the upper surface of the glass layer (208) toward the lower surface of the glass layer (208), and a second portion (214) inclined so that the width in the horizontal direction gradually becomes wider in the direction from the upper surface of the glass layer (208) toward the lower surface of the glass layer (208). Each of the inclination of the first portion (213) and the inclination of the second portion (214) of the core via electrode (212) horizontally overlaps with the inclination of the insulating member (211). The inclination angle of the inclination of the second portion (214) of the core via electrode (212) may be different from the inclination angle of the inclination of the insulating member (211). The inclination angle of the inclination of the first portion (213) of the core via electrode (212) may correspond to the inclination angle of the inclination of the insulating member (211).Here, corresponding may mean that the two slopes are inclined in the same direction and the difference in angle between them is within 10 degrees. That is, the slope of the insulating member (211) and the slope of the first part (213) of the core via electrode (212) may be inclined in the same direction, and the slope of the second part (214) of the core via electrode (212) may be inclined in a direction different from the direction in which the slope of the insulating member (211) and the slope of the first part (213) are inclined, respectively.

[0119] The horizontal central axis (x3) of the insulating member (211) may not be aligned with the horizontal central axis (x4) of the core via electrode (212) and may be horizontally spaced apart from each other. That is, the horizontal central axis (x3) of the insulating member (211) and the horizontal central axis (x4) of the core via electrode (212) may be misaligned with each other. The horizontal central axis (x3) of the insulating member (211) and the horizontal central axis (x4) of the core via electrode (214) may be misaligned with each other and may have a horizontal separation distance (w4) for example. For example, the horizontal central axis (x4) of the core via electrode (212) may be shifted by a horizontal separation distance (w6) based on the horizontal central axis (x3) of the insulating member (211). And, depending on the direction and distance in which the central axis (x4) of the core via electrode (212) is shifted based on the central axis (x3) of the insulating member (211), the circuit board (100) can be alleviated from being bent in a specific direction. At this time, depending on the direction and distance in which the central axis (x4) of the core via electrode (214) is shifted based on the central axis (x3) of the insulating member (211), bending of the circuit board (100) in a specific direction can occur, and the meaning of alleviating as described above can mean that the central axis (x4) of the core via electrode (212) is shifted so that bending of the circuit board occurs in a direction opposite to the direction in which the circuit board (100) is bent before the shift as described above occurs. By shifting the central axis (x4) of the core via electrode (212) with respect to the central axis (x3) of the insulating member (211) based on the direction in which the circuit board (100) is bent, the circuit board (100) can be prevented from being bent in a specific direction, excessive stress applied to the circuit board can be avoided, and thus the mechanical reliability and / or electrical reliability of the circuit board can be improved. In addition, the embodiment can alleviate the bending of the circuit board so that a semiconductor element can be stably attached on the circuit board.At this time, if the circuit board is bent in a specific direction, a height deviation may occur between the plurality of bonding portions provided on the circuit board, and the terminals of the semiconductor elements may not be stably bonded on the plurality of bonding portions. In contrast, the embodiment can alleviate the overall bending of the circuit board by shifting the central axis (x4) of the core via electrode (212), and can enable the semiconductor elements to be stably attached on the circuit board. Therefore, the embodiment can enable the semiconductor elements to operate stably, thereby improving product reliability. Furthermore, the embodiment can enable the products, such as servers, to which the semiconductor package is applied to operate stably.

[0120] In addition, as the horizontal central axis (x4) of the core via electrode (212) is shifted based on the horizontal central axis (x3) of the insulating member (211), the horizontal width of the insulating member (211) may have different horizontal widths along the circumferential direction of the upper surface of the core via electrode (212). That is, the insulating member (211) may have a fourth width (w4) in the horizontal direction on one side of the core via electrode (212) based on the vertical cross-section, and may have a fifth width (w5) in the horizontal direction different from the fourth width (w4) on the other side opposite to the one side. Furthermore, the insulating member (211) is provided along the circumference of the core via electrode (212), and the horizontal width may change along the circumferential direction of the core via electrode (212). In addition, the horizontal width of the insulating member (211) can be determined according to the shift direction and shift distance of the central axis (x4) of the core via electrode (212). In addition, the embodiment can alleviate the overall warpage of the circuit board (100) by making the horizontal width of the insulating member (211) different from each other along the circumferential direction of the core via electrode (212).

[0121] At this time, the above-described shift direction and shift distance can be determined based on the direction in which the circuit board (100) is bent and the position at which the core via electrode is arranged on the circuit board. For example, the circuit board (100) is provided with a plurality of core via electrodes, and the plurality of core via electrodes can have different shift directions and shift distances depending on the position at which they are arranged. Here, the shift direction and shift distance can be determined based on the direction in which the horizontal central axis (x0) of the glass layer faces and the distance from the horizontal central axis (x0) of the glass layer.

[0122] According to the embodiment of FIG. 3, the circuit board has a plurality of insulating members (304, 306) and a plurality of core via electrodes (305, 307) arranged within a glass layer (301). In addition, the plurality of core via electrodes (305, 307) electrically connect the circuit layers (302, 303) arranged on the upper and lower surfaces of the glass layer (301) to each other. At this time, the plurality of core via electrodes (305, 307) may be positioned in different directions with respect to the central axis (x0) of the glass layer (301). At this time, the central axis (x0) of the glass layer (301) may mean a point where two line segments connecting two vertices facing each other with respect to the plane of the glass layer (301) meet.

[0123] The plurality of insulating members (304, 306) include a first insulating member (304) positioned on one side with respect to the central axis (x0) of the glass layer (301), and a second insulating member (306) positioned on the other side opposite to the one side with respect to the central axis (x0) of the glass layer (301). In addition, the plurality of core via electrodes (305, 307) include a first core via electrode (305) penetrating the first insulating member (304), and a second core via electrode (306) penetrating the second insulating member (305). In addition, a shift direction of the central axis (x1) of the first core via electrode (305) within the first insulating member (304) may be different from a shift direction of the central axis (x4) of the second core via electrode (306) within the second insulating member (305).

[0124] That is, the central axis (x2) of the first core via electrode (305) can be shifted (shift 1) in the first horizontal direction with respect to the central axis (x1) of the first insulating member (304). Specifically, the central axis (x2) of the first core via electrode (305) can be shifted (shift 1) in the direction toward the horizontal central axis (x0) of the glass layer (301) with respect to the central axis (x1) of the first insulating member (304). Conversely, the central axis (x4) of the second core via electrode (307) can be shifted (shift 2) in the second horizontal direction opposite to the first horizontal direction with respect to the central axis (x3) of the second insulating member (306). Specifically, the central axis (x4) of the second core via electrode (307) can be shifted (shift 2) in a direction toward the horizontal central axis (x0) of the glass layer (301) based on the central axis (x3) of the second insulating member (306). That is, the plurality of core via electrodes (305, 307) can be shifted in the direction toward the central axis (x0) of the glass layer (301) within each insulating member (304, 306), thereby further alleviating the circuit board (100) from being bent in a specific direction. For example, when the circuit board (100) is bent in the smile direction, the first core via electrode (305) located on one side of the horizontal central axis (x0) of the glass layer (301) is shifted (shift 1) in the first horizontal direction with respect to the first insulating member (304), and the second core via electrode (307) located on the other side of the horizontal central axis (x0) of the glass layer (301) is shifted (shift 2) in the second horizontal direction opposite to the first horizontal direction with respect to the second insulating member (306), thereby further alleviating the overall bending of the circuit board.Conversely, when the circuit board (100) is bent in the crying direction, the first core via electrode (305) located on one side of the horizontal central axis (x0) of the glass layer (301) is shifted (shift 2) in the second horizontal direction with respect to the first insulating member (304), and the second core via electrode (307) located on the other side of the horizontal central axis (x0) of the glass layer (301) is shifted (shift 1) in the first horizontal direction opposite to the second horizontal direction with respect to the second insulating member (306), so that the overall bending of the circuit board can be further alleviated.

[0125] According to the embodiment of FIG. 4, the glass layer (401) includes a plurality of insulating members (402, 404, 406, 408, 410, 412, 414, 416) and a plurality of core via electrodes (403, 405, 407, 409, 411, 413, 415, 417) positioned in different horizontal directions based on the horizontal central axis (x0) of the glass layer (401). The plurality of core via electrodes (403, 405, 407, 409, 411, 413, 415, 417) can be shifted in different directions within each insulating member (402, 404, 406, 408, 410, 412, 414, 416), and for example, can be shifted in a direction toward the horizontal central axis (x0) of the glass layer (401).

[0126] For example, a first insulating member (402) and a first core via electrode (403) are arranged on the left side of the horizontal central axis (x0) of the glass layer (401). The first core via electrode (403) can be shifted (shift 1) in a first horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the first insulating member (402).

[0127] Additionally, a second insulating member (404) and a second core via electrode (405) are arranged on the right side of the horizontal central axis (x0) of the glass layer (401). The second core via electrode (405) can be shifted (shift 2) in a second horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the second insulating member (404).

[0128] Additionally, a third insulating member (406) and a third core via electrode (407) are arranged on the rear side of the horizontal central axis (x0) of the glass layer (401). The third core via electrode (407) can be shifted (shift 3) in a third horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the third insulating member (406).

[0129] Additionally, a fourth insulating member (408) and a fourth core via electrode (409) are arranged on the front side of the horizontal central axis (x0) of the glass layer (401). The fourth core via electrode (409) can be shifted (shift 4) in the fourth horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the fourth insulating member (408).

[0130] Additionally, a fifth insulating member (410) and a fifth core via electrode (411) are arranged on the left-rear side of the horizontal central axis (x0) of the glass layer (401). The fifth core via electrode (411) can be shifted (shift 5) in a fifth horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the fifth insulating member (410).

[0131] Additionally, a sixth insulating member (412) and a sixth core via electrode (413) are arranged on the right-rear side of the horizontal central axis (x0) of the glass layer (401). The sixth core via electrode (413) can be shifted (shift 6) in a sixth horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the sixth insulating member (412).

[0132] Additionally, a seventh insulating member (414) and a seventh core via electrode (415) are arranged on the left-front side of the horizontal central axis (x0) of the glass layer (401). The seventh core via electrode (415) can be shifted (shift 7) in the seventh horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the seventh insulating member (414).

[0133] Additionally, an eighth insulating member (416) and an eighth core via electrode (417) are arranged on the right-front side of the horizontal central axis (x0) of the glass layer (401). The eighth core via electrode (417) can be shifted (shift 7) in the eighth horizontal direction toward the horizontal central axis (x0) of the glass layer (401) within the eighth insulating member (416).

[0134] In addition, a plurality of core via electrodes spaced apart from each other on one side of the horizontal central axis (x0) of the glass layer (401) can shift in the same direction with different shift distances. That is, a plurality of core via electrodes provided on one side of the horizontal central axis (x0) of the glass layer (401) can shift in a direction toward the horizontal central axis (x0) of the glass layer (401), and the shift distance can increase according to the distance from the horizontal central axis (x0) of the glass layer (401). For example, a core via electrode spaced apart by a first distance on one side of the horizontal central axis (x0) of the glass layer (401) can be shifted by a first shift distance in a direction toward the horizontal central axis (x0) of the glass layer (401), and a core via electrode spaced apart by a second distance greater than the first distance on one side of the horizontal central axis (x0) of the glass layer (401) can be shifted by a second shift distance greater than the first shift distance in a direction toward the horizontal central axis (x0) of the glass layer (401).

[0135] As described above, considering the positions where the insulating member and core via electrode are arranged based on the horizontal central axis (x0) of the glass layer (401), the plurality of core via electrodes (403, 405, 407, 409, 411, 413, 415, 417) can be shifted in different directions and / or different distances within each insulating member (402, 404, 406, 408, 410, 412, 414, 416), and thus the overall warpage of the circuit board can be further alleviated, so that the semiconductor elements can be arranged more stably.

[0136] Hereinafter, various examples of modifications of the insulating member and / or the core via electrode are described, including the structure described in FIGS. 1 to 5 as a basic structure (eg, the shift direction of the core via electrode within the insulating member, and the respective shift directions of the plurality of core via electrodes, etc.).

[0137] According to the embodiment of FIG. 5, the circuit board includes a glass layer (501) having a plurality of through holes spaced apart from each other in the horizontal direction, a plurality of insulating members (504, 508) arranged in the through holes of the glass layer (501), and a plurality of core via electrodes (505, 509). In addition, the plurality of core via electrodes (505, 509) electrically connect the circuit layers (502, 503) arranged on the upper and lower surfaces of the glass layer (501) to each other. At this time, the plurality of core via electrodes (505, 509) may be positioned in different directions with respect to the central axis (x0) of the glass layer (501). At this time, the central axis (x0) of the glass layer (501) may mean a point where two line segments connecting two vertices that face each other with respect to the plane of the glass layer (501) meet.

[0138] The plurality of insulating members (504, 508) include a first insulating member (504) positioned on one side with respect to the central axis (x0) of the glass layer (501) and a second insulating member (508) positioned on the other side opposite to the one side with respect to the central axis (x0) of the glass layer (501). In addition, the plurality of core via electrodes (505, 509) include a first core via electrode (505) penetrating the first insulating member (504) and a second core via electrode (509) penetrating the second insulating member (505). In addition, a shift direction of the central axis of the first core via electrode (505) within the first insulating member (504) may be different from a shift direction of the central axis of the second core via electrode (509) within the second insulating member (505). For example, each of the first core via electrode (505) and the second core via electrode (509) can be shifted (shift 1, shift 2) in the direction toward the horizontal central axis of the glass layer (501) within each insulating member (504, 508).

[0139] The first core via electrode (505) and the second core via electrode (509) may have different vertical cross-sectional shapes. For example, the first core via electrode (505) includes a first portion (506) that is inclined so that the width in the horizontal direction gradually narrows along the vertical direction from the upper surface of the glass layer (501) toward the lower surface of the glass layer (501), and a second portion (507) that is disposed under the first portion (506) and has the inclined so that the width in the horizontal direction gradually widens along the vertical direction from the upper surface of the glass layer (501) toward the lower surface of the glass layer (501). At this time, the vertical thickness (T1) of the first portion (506) and the vertical thickness (T2) of the second portion (507) may be different from each other. For example, the first portion and the second portion of the core via electrode in the previous embodiment may have corresponding vertical thicknesses and may have mutually symmetrical shapes. In contrast, the first portion (506) and the second portion (507) of the first core via electrode (505) may have different vertical thicknesses. For example, the vertical thickness (T1) of the first portion (506) of the first core via electrode (505) may be greater than the vertical thickness (T2) of the second portion (507) of the first core via electrode (505). In addition, the second core via electrode (509) includes a first portion (510) that is inclined so that the width in the horizontal direction gradually narrows in the vertical direction from the upper surface of the glass layer (501) toward the lower surface of the glass layer (501), and a second portion (511) that is disposed under the first portion (510) and is inclined so that the width in the horizontal direction gradually widens in the vertical direction from the upper surface of the glass layer (501) toward the lower surface of the glass layer (501). At this time, the vertical thickness (T3) of the first portion (510) and the vertical thickness (T4) of the second portion (511) may be different from each other. For example, the vertical thickness (T3) of the first portion (510) of the second core via electrode (509) may be smaller than the vertical thickness (T4) of the second portion (511) of the second core via electrode (509).Through this, the embodiment can improve the plating process capability in the process of plating the plurality of core via electrodes (505, 509) by controlling the vertical thicknesses (T1, T2, T3, T4) of the first portion (506, 510) and the second portion (507, 511) of the plurality of core via electrodes (505, 509). For example, the ratio of the vertical thickness (T1) of the first portion (506) of the first core via electrode (505) to the vertical thickness (T2) of the second portion (507) can satisfy a range of 7:3 to 8:2. When the ratio of the vertical thickness (T1) of the first part (506) of the first core via electrode (505) to the vertical thickness (T2) of the second part (507) is outside the range of 7:3 to 8:2, the problem of voids occurring in the first core via electrode (505) due to the width of the first core via electrode (505) at the center point where the first part (506) and the second part (507) meet being too small, and the problem of the flatness of the circuit layer (502, 503) connected to the first core via electrode (505) being deteriorated due to the width of the first core via electrode (505) at the center point where the first part (506) and the second part (507) meet being too large, can be solved. In addition, the ratio of the vertical thickness (T3) of the first part (510) of the second core via electrode (509) to the vertical thickness (T4) of the second part (511) can satisfy the range of 2:8 to 3:7, thereby solving the problem of voids being formed in the second core via electrode (509) and the problem of deterioration of the flatness of the circuit layers (502, 503). Furthermore, by adjusting the ratio of the vertical thicknesses (T1, T2, T3, T4) of the first parts (506, 510) and the second parts (507, 511) of the plurality of core via electrodes (505, 509) described above, the process capability in the process of plating the plurality of core via electrodes (505, 509) can be improved, thereby shortening the manufacturing time and improving the product yield.In addition, by preventing voids from being formed within the plurality of core via electrodes (505, 509), cracks from occurring in the plurality of core via electrodes (505, 509) due to stress according to a heat cycle can be prevented, thereby improving the electrical reliability of the circuit board. Furthermore, the ratio of the vertical thicknesses (T1, T2, T3, T4) of the first portion (506, 510) and the second portion (507, 511) of the plurality of core via electrodes (505, 509) described above can be determined in consideration of the direction in which the circuit board (100) is bent. For example, when the circuit board is bent in a smile shape like '∪, both the first core via electrode (505) and the second core via electrode (509) can be made so that the vertical thickness of the first portion (506, 511) is greater than the vertical thickness of the second portion (507, 511). In addition, when the circuit board is bent in a crying shape like '∩, both the first core via electrode (505) and the second core via electrode (509) can be made so that the vertical thickness of the first portion (506, 511) is less than the vertical thickness of the second portion (507, 511). That is, the first core via electrode (505) and the second core via electrode (509) may have the same shape depending on the direction in which the circuit board is bent, but the ratio of the vertical thickness of the first portion (506, 511) to the vertical thickness of the second portion (507, 511) may be different. Through this, the embodiment can more efficiently prevent the circuit board from being bent in a specific direction, and enable the semiconductor element to be mounted more stably.

[0140]

[0141] According to the embodiment of FIG. 6, the circuit board includes a glass layer (601), an insulating member (605) penetrating the glass layer (601), and a core via electrode (608) penetrating the insulating member (605), and the core via electrode (608) can electrically connect circuit layers (602, 603) arranged on the upper and lower surfaces of the glass layer (601).

[0142] The insulating member (605) may have a shape corresponding to the core via electrode (608). That is, the insulating member in the previous embodiment may be provided only with a slope such that the width in the horizontal direction decreases along the vertical direction from the upper surface to the lower surface of the glass layer. In contrast, the insulating member (605) may be provided with a first portion (606) having a slope such that the width in the horizontal direction decreases along the vertical direction from the upper surface to the lower surface of the glass layer (601), and a second portion (607) having a slope such that the width in the horizontal direction increases along the vertical direction from the upper surface to the lower surface of the glass layer (601). Through this, the size of the insulating member (605) surrounding the core via electrode (608) can be reduced. For example, when the insulating member has only one slope as in the previous embodiment, the size of the through hole provided in the glass layer and the corresponding size of the insulating member must increase, and accordingly, a problem may arise in which the rigidity of the circuit board is reduced in correspondence to the area occupied by the through hole in the glass layer. In contrast, when the insulating member (605) has a first portion (606) and a second portion (607) having different slopes, the area occupied by the through hole in the glass layer (601) can be reduced, and thus the rigidity of the circuit board can be further improved. At this time, although not shown in the drawing, the vertical thickness of the first portion (606) of the glass layer (601) and the vertical thickness of the second portion (607) may be the same as or different from each other.

[0143] In addition, a core via electrode (608) is provided penetrating the insulating member (605). The core via electrode (608) may include a first portion (609) that is inclined so that a horizontal width thereof becomes narrower in a vertical direction from the upper surface of the glass layer (601) toward the lower surface of the glass layer (601), and a second portion (610) that is disposed under the first portion (609) and is inclined so that a horizontal width thereof becomes wider in a vertical direction from the upper surface of the glass layer (601) toward the lower surface of the glass layer (601). In addition, the vertical thickness of the first portion (609) of the core via electrode (608) and the vertical thickness of the second portion (610) may be the same as or different from each other.

[0144] Furthermore, considering the direction in which the circuit board is bent, the vertical thickness of the first portion (606) of the glass layer (601) may be greater than the vertical thickness of the second portion (607) of the glass layer (601), and the vertical thickness of the first portion (609) of the core via electrode (608) may be less than the vertical thickness of the second portion (610) of the core via electrode (608). Conversely, considering the direction in which the circuit board is bent, the vertical thickness of the first portion (606) of the glass layer (601) may be less than the vertical thickness of the second portion (607) of the glass layer (601), and the vertical thickness of the first portion (609) of the core via electrode (608) may be greater than the vertical thickness of the second portion (610) of the core via electrode (608). Through this, the embodiment can further improve the overall warpage of the circuit board by additionally adjusting the shape of the glass layer (601) and the vertical thickness of the first and second portions of the glass layer (601) in consideration of the direction in which the circuit board is warped.

[0145]

[0146] According to the embodiment of FIG. 7, the circuit board includes a glass layer (701), an insulating member (705) penetrating the glass layer (701), and a core via electrode (708) penetrating the insulating member (705), and the core via electrode (708) can electrically connect circuit layers (702, 703) arranged on the upper and lower surfaces of the glass layer (701).

[0147] The insulating member (705) may include a first portion (706) having an incline such that the width in the horizontal direction decreases along a vertical direction from the upper surface of the glass layer (701) toward the lower surface of the glass layer (701), and a second portion (707) having an incline such that the width in the horizontal direction increases along a vertical direction from the upper surface of the glass layer (701) toward the lower surface of the glass layer (701). Here, the first portion (706) and the second portion (707) of the insulating member (705) may be determined based on the incline of the side surface of the insulating member (705).

[0148] At this time, in the embodiment of FIG. 6, the vertical thickness of the first portion (606) on one side of the insulating member (605) and the vertical thickness of the first portion (606) on the other side of the insulating member (605) may be the same. In addition, the vertical thickness of the second portion (607) on one side of the insulating member (605) and the vertical thickness of the second portion (607) on the other side of the insulating member (605) may be the same. That is, the horizontal central axis of the first portion (606) of the insulating member (605) in the previous embodiment and the horizontal central axis of the second portion (607) may be aligned or coincide with each other.

[0149] In contrast, according to the embodiment of FIG. 7, the horizontal central axis of the first portion (706) of the insulating member (705) and the horizontal central axis of the second portion (707) of the insulating member (705) may be misaligned. Accordingly, the vertical thickness (T11) of the first portion (706) on one side of the insulating member (705) may be different from the vertical thickness (T12) of the first portion (706) on the other side of the insulating member (705). For example, the vertical thickness (T11) of the first portion (706) on one side of the insulating member (705) may be smaller than the vertical thickness (T12) of the first portion (706) on the other side of the insulating member (705). Accordingly, the vertical thickness (T13) of the second portion (707) on one side of the insulating member (705) may be different from the vertical thickness (T14) of the second portion (707) on the other side of the insulating member (705). For example, the vertical thickness (T11) of the first portion (706) on one side of the insulating member (705) may be smaller than the vertical thickness (T13) of the second portion (707) on one side of the insulating member (705), and the vertical thickness (T12) of the first portion (706) on the other side of the insulating member (705) may be larger than the vertical thickness (T14) of the second portion (707) on the other side of the insulating member (705). That is, the embodiment can further improve the overall bending characteristics of the circuit board by additionally including the first part (706) and the second part (707) in the previous embodiment, while making the horizontal central axis of the first part (706) and the horizontal central axis of the second part (707) misaligned with each other.

[0150] At this time, the core via electrode (708) is provided to penetrate the insulating member (705). The core via electrode (708) may include a first portion (709) that is inclined so that the width in the horizontal direction becomes narrower along the vertical direction from the upper surface of the glass layer (701) toward the lower surface of the glass layer (701), and a second portion (710) that is disposed under the first portion (709) and is inclined so that the width in the horizontal direction becomes wider along the vertical direction from the upper surface of the glass layer (701) toward the lower surface of the glass layer (701). In addition, the horizontal central axis of the first portion (709) of the core via electrode (708) may coincide with the horizontal central axis of the second portion (710) of the core via electrode (708).

[0151]

[0152] According to the embodiment of FIG. 8, the circuit board includes a glass layer (801), an insulating member (805) penetrating the glass layer (801), and a core via electrode (808) penetrating the insulating member (805), and the core via electrode (808) can electrically connect circuit layers (802, 803) arranged on the upper and lower surfaces of the glass layer (801).

[0153] The insulating member (805) may include a first portion (806) having an incline such that the width in the horizontal direction decreases along a vertical direction from the upper surface of the glass layer (801) toward the lower surface of the glass layer (801), and a second portion (807) having an incline such that the width in the horizontal direction increases along a vertical direction from the upper surface of the glass layer (801) toward the lower surface of the glass layer (801). In addition, the horizontal central axis of the first portion (806) of the insulating member (805) may be misaligned with the horizontal central axis of the second portion (807) of the insulating member (805).

[0154] A core via electrode (808) is provided to penetrate the insulating member (805). The core via electrode (808) may include a first portion (809) that is inclined so that a horizontal width thereof becomes narrower along a vertical direction from the upper surface of the glass layer (801) toward the lower surface of the glass layer (801), and a second portion (810) that is disposed under the first portion (809) and is inclined so that a horizontal width thereof becomes wider along a vertical direction from the upper surface of the glass layer (801) toward the lower surface of the glass layer (801). In addition, a horizontal central axis of the first portion (809) of the core via electrode (808) may be misaligned with a horizontal central axis of the second portion (810) of the core via electrode (808).

[0155] To summarize, the horizontal central axis of the first part (806) of the insulating member (805) and the horizontal central axis of the first part (809) of the core via electrode (808) may be misaligned with each other, and the horizontal central axis of the second part (807) of the insulating member (805) and the horizontal central axis of the second part (710) of the core via electrode (808) may be misaligned with each other.

[0156] That is, the embodiment can further improve the bending characteristics of the circuit board by making the horizontal central axis of the first portion (809) of the core via electrode (808) and the horizontal central axis of the second portion (810) misalign with each other depending on the direction in which the circuit board is bent.

[0157]

[0158] According to the embodiment of FIG. 9, the circuit board includes a glass layer (901), an insulating member (904) penetrating the glass layer (901), and a core via electrode (905) penetrating the insulating member (904), and the core via electrode (905) can electrically connect circuit layers (902, 903) arranged on the upper and lower surfaces of the glass layer (901).

[0159] It is preferable that the core via electrode (905) densely fill the via hole provided in the insulating member (905) for the function of resistance or heat dissipation. However, when the thickness of the glass layer (901) increases as described above, it may become difficult for the core via electrode (905) to densely fill the via hole of the insulating member (905). For example, when attempting to fill the via hole provided in the insulating member (905) penetrating the thick glass layer (901) as described above according to the plating process, a void may occur inside the core via electrode (905). The void expands due to heat generated during the operation of the semiconductor package, which becomes a factor that lowers the mechanical reliability of the circuit board. Therefore, the core via electrode (905) having a predetermined thickness is arranged on the inner wall of the via hole of the insulating member (905). The thickness of the core via electrode (905) refers to the thickness in the horizontal direction perpendicular thereto, not the thickness in the vertical direction in which the first build-up layer (102), the glass layer (901), and the second build-up layer (103) are laminated. The thickness of the core via electrode (905) may be arranged to have a thickness of 5 μm to 20 μm to prevent a voltage drop that occurs as the thickness of the glass layer (901) and the insulating member (904) increases, and to prevent the occurrence of voids. It is difficult to densely fill the inside of the core via electrode (905) with metal through a process such as plating, resulting in the creation of empty spaces. The empty spaces may cause a problem in that it is difficult to evenly arrange the first build-up layer (102) when laminating the first build-up layer (102). Accordingly, the resin layer (906) can be arranged on the inner side of the core via electrode (905), thereby ensuring the flatness of the glass layer (901), the first build-up layer (102), and the second build-up layer (103). The upper surface of the resin layer (906) can be on the same plane as the upper surface of the glass layer (901), or can be arranged closer to the first build-up layer (102) in the vertical direction than the upper surface of the glass layer (901).The lower surface of the resin layer (906) may be on the same plane as the lower surface of the glass layer (901), or may be arranged closer to the second build-up layer (103) in the vertical direction than the lower surface of the glass layer (901). This can be freely designed to solve the flatness when laminating the first build-up layer (102) and the second build-up layer (103), or to secure the flatness of the circuit layers (902, 903) described above.

[0160] Furthermore, a part of the circuit layer (902) covering the resin layer (906) on the glass layer (901) may be thinner than the remaining parts that do not vertically overlap the resin layer (906). Here, the thickness of the circuit layer (902) refers to the thickness in the vertical direction. When designing the circuit layer (902), the resin layer (906) may be covered or not covered depending on the degree of freedom of wiring, and thus the freedom of wiring connection may be increased. When the circuit layer (902) does not cover the resin layer (906), the resin layer (906) may be in direct contact with the fifth insulating layer (110). Compared to a case where the resin layer (906) and the fifth insulating layer (110) are in direct contact, when the circuit layer (902) and the fifth insulating layer (110) are in contact, the bonding force may be better and heat dissipation may be advantageous. However, in order to reduce the process cost, the circuit layer (902) may be arranged so as not to cover the resin layer (906). Furthermore, depending on the design of the fifth via electrode (135), the circuit layer (902) may or may not cover the resin layer (906). For example, when the fifth via electrode (135) vertically overlapping the circuit layer (902) is arranged, the circuit layer (902) may be arranged to cover the resin layer (906) to secure electrical connectivity and / or mechanical bonding between the circuit layer (902) and the fifth via electrode (135). In addition, when the fifth via electrode (135) vertically overlapping the circuit layer (902) is not arranged, the circuit layer (902) may be arranged to not cover the resin layer (906).

[0161] Accordingly, a part of the circuit layer (903) disposed on the lower surface of the glass layer (901) may be disposed to cover the resin layer (906) described above. The part of the circuit layer (903) covering the resin layer (906) may be thinner than the remaining parts that do not vertically overlap the resin layer (906). Here, the thickness of the circuit layer (903) refers to the thickness in the vertical direction. When designing the circuit layer (903), the resin layer (906) may or may not be covered depending on the degree of freedom of wiring, thereby increasing the freedom of wiring connection. When the circuit layer (903) does not cover the resin layer (906), the resin layer (906) may be in direct contact with the sixth insulating layer (111). Compared to a case where the resin layer (906) and the sixth insulating layer (111) are in direct contact, a case where the circuit layer (903) and the sixth insulating layer (111) are in contact may have better bonding strength and may be advantageous for heat dissipation. However, in order to reduce the process cost, the circuit layer (903) may be arranged so as not to cover the resin layer (906). Furthermore, depending on the design of the sixth via electrode (136), the circuit layer (903) may or may not cover the resin layer (906). For example, when a sixth via electrode (136) is arranged to overlap the circuit layer (903) in a vertical direction, the circuit layer (903) may be provided to cover the resin layer (906) in order to secure electrical connectivity and / or mechanical coupling between the circuit layer (903) and the sixth via electrode (136). Additionally, when the sixth via electrode (136) that vertically overlaps the circuit layer (903) is not arranged, the circuit layer (903) may be provided without covering the resin layer (906).

[0162]

[0163] According to the embodiment of FIG. 10, the circuit board includes a glass layer (1001), an insulating member (1004) penetrating the glass layer (1001), and a core via electrode (1005) penetrating the insulating member (1004). The core via electrode (1005) can electrically connect circuit layers (1002, 1003) disposed on the upper and lower surfaces of the glass layer (1001). In addition, a resin layer (1006) can be disposed on the inner side of the core via electrode (1005).

[0164] At this time, the core via electrode (1005) may be provided to surround the outer side of the resin layer (1006). And, unlike the embodiment of FIG. 9, the core via electrode (1005) may have different thicknesses in the horizontal direction along the circumferential direction of the resin layer (1006).

[0165] That is, the core via electrode (1005) may have a seventh thickness (w7) on one side of the resin layer (1006), and may have an eighth thickness (w8) different from the seventh thickness (w7) on the other side of the resin layer (1006). The core via electrode (1005) may have different thicknesses in the horizontal direction along the circumferential direction of the resin layer (1006), thereby further improving the overall bending characteristics of the circuit board. For example, in the embodiment, in consideration of the bending direction of the circuit board, the horizontal central axis of the insulating member described above may be misaligned with the horizontal central axis of the core via electrode, and the core via electrode may have different horizontal thicknesses along the circumferential direction of the resin layer (1006), thereby further improving the overall bending characteristics of the circuit board.

[0166]

[0167] The circuit board according to the embodiment of FIG. 11 includes a laminated structure (1100) and a bonding portion disposed on the laminated structure (1100). Here, the laminated structure (1100) has a structure corresponding to the glass layer, the first build-up layer, and the second build-up layer of the circuit board illustrated in FIG. 1A, and thus, the description will be made with reference to the drawing symbols illustrated in FIG. 1A.

[0168] A portion of the first circuit layer (116) may include a pad portion exposed from the first protective layer (1101). In addition, as the density of terminals of the semiconductor device increases, a solder short circuit problem may occur between adjacent pad portions with conventional solder bonding. Therefore, in order to reduce the amount of solder used as the density of terminals of the semiconductor device increases, the semiconductor device and the circuit board may be bonded to each other through a thermal compression bonding method. When thermal compression bonding is used, the circuit board may further include a bonding portion (1102) protruding on the first protective layer (1101). The bonding portion (1102) may have a protrusion protruding on the upper surface of the first protective layer (1101) and a penetration portion (1103) penetrating the first protective layer (1101) to contact the first circuit layer (116). In addition, when bonding the circuit board (100) and the semiconductor element using a thermal compression bonding method, a crack may occur in the penetration portion (1103) of the bonding portion (1102) due to the load generated thereby. Therefore, the penetration portion (1103) of the bonding portion (1102) can prevent cracks by placing a material having an elasticity higher than the elasticity of the first circuit layer (116) in a portion adjacent to the first circuit layer (116). This material may be nickel (Ni), but a copper layer having a low grain density can be placed by electroless plating.

[0169] The bonding portion (1102) and the penetration portion (1103) illustrated in FIG. 11 can be arranged in various ways. For example, a process may be performed in which the first protective layer (1101) is exposed and developed to form an opening in the first protective layer (1101), and then the bonding portion (1102) and the penetration portion (1103) are arranged in the opening. Alternatively, a process may be performed in which a penetration hole in the first protective layer (1101) is formed using a laser, and then the bonding portion (1102) and the penetration portion (1103) are arranged in the opening. In addition, by using DFR (Dry Film resist), DFR is first placed in the area where the penetration portion (1103) is to be placed, and then the first protective layer (1101) is placed so that the DFR is covered, and then a part of the first protective layer (1101) is etched with a chemical solution to expose the DFR, and then the DFR is peeled off to form an opening in the first protective layer (1101), and then the bonding portion (1102) and the penetration portion (1103) can be placed. Therefore, the penetration portion (1103) can have various shapes depending on the process method. For example, when the opening of the first protective layer (1101) is formed through an exposure process, the side surface of the through-hole (1103) may have a structure in which the width gradually narrows toward the first circuit layer (116), when the opening of the first protective layer (1101) is formed through a laser process, the side surface of the through-hole (1103) may have a vertical side surface and a curved side surface adjacent to the first circuit layer (116), and when the opening of the first protective layer (1101) is formed using DFR, the side surface of the through-hole (1103) may have only a vertical side surface. As described above, when the semiconductor element is bonded to the circuit board (100) through thermocompression bonding, a load may be applied to the through-hole (1103), and in this case, in the case of the through-hole (1103) using DFR, the stress may be applied uniformly, so that the manufacturing yield may be increased.In addition, as illustrated in FIG. 11, each via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140) of the first build-up layer (102) and the second build-up layer (103) may have a structure in which at least a portion thereof overlaps with each other along the vertical direction. Through this, problems of voltage drop and / or signal loss can be solved, and the degree of freedom for wiring design can be increased. However, when a semiconductor element is mounted on a circuit board (100), if a load is applied to each vertically overlapping via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140) due to a load applied to the circuit board (100), there may be a problem in that cracks occur at the interface between each via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140) and each circuit layer (116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127). For this purpose, the bonding portion (1102) may have a structure that does not vertically overlap with each via electrode (131, 132, 133, 134, 135, 136, 137, 138, 139, 140).

[0170]

[0171] Referring to FIG. 12, the circuit board (100) may further include at least one connecting member (1200). At this time, a configuration not shown in FIG. 12 will be described with reference to FIG. 1a.

[0172] Recently, as the number of signals that semiconductor devices must process increases, the size of semiconductor devices is trending toward larger areas. However, this larger area of ​​semiconductor devices is causing problems in lowering the yield of semiconductor devices. Therefore, there is a trend to divide the pattern size or functional part of semiconductor devices, place chiplets on a circuit board (100), and embed a connecting member (1200) that has the function of electrically connecting them within the circuit board (100). However, the connecting member (1200) is not limited thereto, and can also connect semiconductor devices with other functions, such as memory. In addition, it is advantageous for the connecting member (1200) to be embedded in the first build-up layer (102) to prevent signal loss. That is, the connecting member (1200) electrically connects a plurality of semiconductor devices arranged on the circuit board (100), and thus, reducing the signal transmission distance while being adjacent to the plurality of semiconductor devices can be advantageous in reducing signal transmission loss. Accordingly, the connecting member (1200) can be placed on top of the first build-up layer (102) of the circuit board (100). An example in which the connecting member (1200) according to the present invention is placed on top of the first build-up layer (102) is described.

[0173] Referring to (a) of FIG. 12, the second insulating layer (1212) and the third insulating layer (1213) may have through holes, and the upper surface of the insulating layer disposed under the third insulating layer (1213) and the through holes of the second and third insulating layers (1212, 1213) may form a cavity.

[0174] The connecting member (1200) can be placed within the cavity described above, and the connecting member (1200) can be embedded with a first insulating layer (1211). The connecting member (1200) can be placed on the upper surface of a fourth insulating layer (1214) that vertically overlaps the cavity, and the first insulating layer (1214) can be provided to surround the side of the connecting member (1200) embedded within the cavity while filling the cavity.

[0175] In the past, only the third insulating layer (1213) had a through hole and the connecting member (1200) was embedded in the second insulating layer (1212), or only the second insulating layer (1212) had a through hole and the connecting member (1200) was embedded in the first insulating layer (1211). However, in this case, the flatness of the upper surface of the first insulating layer (1211) may deteriorate. In addition, when the thickness of the connecting member (1200) is thicker than the thickness of the second insulating layer (1212) and / or the thickness of the third insulating layer (1213), the flatness of the upper surface of the first insulating layer (1211) may deteriorate further. Therefore, it is necessary to improve the flatness of the upper surface of the first insulating layer (1211) by reducing the difference between the thickness of the connecting member (1200) and the depth of the cavity.

[0176] Referring to (a) of FIG. 12 and (b) of FIG. 5, the upper surface of the connecting member (1200) is depicted as being closer to the glass layer (101) than the upper surface of the second insulating layer (1212), but if the vertical length difference between the upper surface of the connecting member (1200) and the upper surface of the second insulating layer (1212) is within 1 μm to 5 μm, it is also acceptable to arrange the upper surface of the connecting member (1200) to be closer to the first protective layer (104) than the upper surface of the second insulating layer (1212).

[0177] According to (a) and (b) of FIG. 12, in order to reduce the difference between the depth of the cavity and the thickness of the connecting member (1200), it is advantageous to form the cavity across the second insulating layer (1212) and the third insulating layer (1213). At this time, the through hole of the third insulating layer (1213) can be formed to have a second inclination angle higher than the first inclination angle of the inner wall forming the through hole of the second insulating layer (1212). Referring to (a) and (b) of FIG. 12, in order to increase the positional alignment of the connecting member (1200) and to prevent the occurrence of voids when filling the cavity with the first insulating layer (1201), the inclination angle of the inner wall forming the through hole of the second insulating layer (1212) and the inclination angle of the inner wall forming the through hole of the third insulating layer (1213) can be arranged to be different from each other.

[0178] In the case of (a) of FIG. 12, the inclination angle of the inner wall forming the through hole of the second insulating layer (1212) is depicted as having a gentler inclination angle than the inclination angle of the inner wall forming the through hole of the third insulating layer (1213), but is not limited thereto, and as shown in (b) of FIG. 12, the inclination angle of the inner wall forming the through hole of the third insulating layer (1213) may have a gentler inclination angle than the inclination angle of the inner wall forming the through hole of the second insulating layer (1212).

[0179] Additionally, when embedding a connecting member (1200), a metal member (1215) may be placed around the cavity to improve the alignment of the position. This can improve the alignment of the position, thereby improving the alignment of the via electrode and circuit layer placed in a subsequent process.

[0180] In addition, the first via electrode penetrating the first insulating layer (1211) may have different widths depending on the location. For example, the first via electrode may include a first via portion (1216) that vertically overlaps the connecting member (1200), and a second via portion (1217) that horizontally overlaps the first via portion (1216) and does not vertically overlap the connecting member (1200). The above-described first via portion (1216) may be directly connected to a pad portion (1201) provided on the upper surface of the connecting member (1200). At this time, the pad portion (1201) may have a width smaller than the width of the circuit layer (1218) embedded in the lower surface of the first insulating layer (1211). Therefore, the horizontal width of the first via portion (1216) may be smaller than the horizontal width of the second via portion (1217).

[0181]

[0182] Referring to FIG. 13, the circuit board may include a glass layer (1301), a first build-up layer (1302) disposed on the glass layer (1301), a second build-up layer (1303) disposed under the glass layer (1301), an insulating member (1304) penetrating the glass layer (1301), and a via through electrode (1305) penetrating the insulating member (1304).

[0183] Additionally, the glass layer (1301) may have a cavity (1306) and may include a connecting member (1311) attached to an adhesive member (1310) disposed on a bottom surface (1308) of the cavity (1306).

[0184] The glass layer (1301) has a cavity (1306). And, the connecting member (1311) is disposed within the cavity (1306) provided in the glass layer (1301). That is, the embodiment can prevent the connecting member (1311) from being bent in a specific direction by allowing the connecting member (1311) to be disposed within the cavity (1306) provided in the cavity (1306), thereby allowing the connecting member (1311) to operate stably. That is, by allowing the connecting member (1311) to be disposed on the glass layer (1301) having relatively high rigidity, the flatness of the connecting member (1311) can be improved, the rigidity of the connecting member (1311) can be improved, and thus the overall bending characteristics of the circuit board and semiconductor package can be further improved. Furthermore, the alignment between the pad portion provided in the connecting member (1311) and the circuit layer and via electrode of the first build-up layer (1301) can be improved.

[0185] At this time, a cavity (1306) is provided in the glass layer (1301). The cavity (1306) may be provided without penetrating the glass layer (1301). For example, the cavity (1306) may be a recess provided concavely from the upper surface of the glass layer (1301) toward the lower surface of the glass layer (1301). Through this, the embodiment can secure the area of ​​the glass layer (1301) to the maximum extent possible, and thereby improve the rigidity of the circuit board and semiconductor package, thereby improving the overall bending characteristics.

[0186] The glass layer (1301) may have a side wall (1307), a bottom surface (1308), and a border surface (1309) between the side wall (1307) and the bottom surface (1308) forming a cavity (1306).

[0187] The side wall (1307) forming the cavity (1306) of the glass layer (1301) may have an angle closer to 90° than the inclination of the insulating member (1304) and the inclination of the core via electrode (1305). For example, the inclination of the side wall (1307) forming the cavity (1306) of the glass layer (1301) may be 90° with respect to the upper surface and / or the lower surface of the glass layer (1301). Through this, the embodiment can minimize the area occupied by the cavity (1306) in the glass layer (1301), and thereby maintain the rigidity of the glass layer (1301), thereby improving the bending characteristics of the circuit board (100) and the semiconductor package. For example, when the inclination of the side wall (1307) is greater than or less than 90°, the area occupied by the cavity (1306) in the glass layer (1301) correspondingly increases, which may reduce the rigidity of the glass layer (1301). In contrast, in the embodiment, since the side wall (1307) forming the cavity (1306) of the glass layer (1301) has an inclination of 90° with respect to the upper surface and / or lower surface of the glass layer (1301), the area occupied by the cavity (1306) is minimized, thereby maintaining the rigidity of the glass layer (1301), and thus the bending characteristics of the circuit board and semiconductor package can be further improved.

[0188] At this time, the slope of the side wall (1307) forming the cavity (1306) of the glass layer (1301) being close to vertical can be achieved by performing a process of forming the cavity (1306) in the glass layer (1301) by performing a plurality of processing processes.

[0189] In an embodiment, a cavity (1306) having a certain depth can be formed in a glass layer (1301) through a wet etching process. However, a side wall (1307) of the cavity (1306) formed through the wet etching process can have an obtuse angle with respect to a bottom surface (1308) of the cavity (1306). Accordingly, in an embodiment, a sand blasting process can be performed on the cavity (1306) formed through the wet etching process, thereby making the side wall (1307) of the cavity (1306) nearly perpendicular to the upper surface and / or lower surface of the glass layer (1301).

[0190] Furthermore, in the embodiment, since the cavity (1306) is formed through a wet etching and sandblasting process, the boundary surface (1309) between the sidewall (1307) and the bottom surface (1308) of the cavity (1306) may have a round shape. For example, the boundary surface (1309) between the sidewall (1307) and the bottom surface (1308) may be provided as a curved surface having a certain curvature. Through this, the embodiment may improve the mechanical reliability of the circuit board and the semiconductor package. For example, when the boundary between the sidewall (1307) and the bottom surface (1308) of the cavity (1306) has a right angle, stress may be concentrated at the boundary described above in the manufacturing environment and / or operating environment of the circuit board, which may cause cracks to occur. In contrast, the embodiment can prevent stress from being concentrated on the edge surface (1309) by rounding the edge surface (1309) between the side wall (1307) and the bottom surface (1308), thereby improving the mechanical reliability of the circuit board and semiconductor package.

[0191] The cavity (1306) may have a certain depth (H1) in the glass layer (1301). At this time, the depth (H1) of the cavity (1306) may be less than half the thickness of the glass layer (1301). That is, the core via electrode (1305) is provided to penetrate the insulating member (1304) provided in the glass layer (1301). The core via electrode (1305) may include a first portion that is inclined so that the width in the horizontal direction gradually narrows in a direction from the upper surface of the glass layer (1301) toward the lower surface of the glass layer (1301), and a second portion that is disposed under the first portion and is inclined so that the width gradually widens from the upper surface of the glass layer (1301) toward the lower surface of the glass layer (1301). In addition, the depth (H1) of the cavity (1306) may be smaller than the vertical thickness (H2) of the first portion of the core via electrode (1305). When the depth (H1) of the cavity (1306) is larger than the vertical thickness (H2) of the first portion of the core via electrode (1305), cracks may occur in the glass layer (1301) during the process of forming the cavity (1306), and thus, the mechanical reliability of the circuit board may be deteriorated.

[0192] In addition, the insulating member (1304) may be provided on the upper and lower surfaces of the glass layer (1301) while penetrating the glass layer (1301). In addition, the cavity (1306) may be formed in a state where the insulating member (1304) is arranged on the upper surface of the glass layer (1301). Accordingly, the insulating member (1304) may not be provided in the area where the cavity (1306) is formed.

[0193] An adhesive member (1310) may be placed on the bottom surface (1308) of the cavity (1306). The adhesive member (1310) may be a non-conductive paste (NCP), but is not limited thereto, and any material having adhesive strength may be used as the adhesive member (1310).

[0194] The connecting member (1311) can be attached to the adhesive member (1310).

[0195] The first build-up layer (1302) may be disposed on the glass layer (1301), and the second build-up layer (1303) may be disposed under the glass layer (1301). The first build-up layer (1302) and the second build-up layer (1303) correspond to the structure of the previous embodiment, and a detailed description thereof is omitted.

[0196] The insulating layer of the first build-up layer (1302) can be provided to fill the cavity (1306) of the glass layer (1301). That is, the insulating layer of the first build-up layer (1302) can be provided to surround the connection member (1311) placed within the cavity (1306) and stably protect the connection member (1311).

[0197] The via electrode and circuit layer provided in the first build-up layer (1302) includes a first portion that vertically overlaps with the connecting member (1311) and a second portion that does not vertically overlap with the connecting member (1311), and the horizontal width of the first portion may be smaller than the horizontal width of the second portion.

[0198]

[0199] According to the embodiment of FIG. 14, the glass layer (1401) may have a plurality of cavities (1402, 1406) spaced apart in the horizontal direction. In addition, connecting members (1405, 1409) may be arranged within the plurality of cavities (1402, 1406). At this time, the connecting members (1405, 1409) may be arranged to be offset in a specific direction within each of the cavities (1402, 1406).

[0200] For example, the plurality of cavities (1402, 1406) may include a first cavity (1402) and a second cavity (1406) spaced horizontally apart.

[0201] A first connecting member (1405) may be placed within the first cavity (1402). The first connecting member (1405) may be placed within the first cavity (1402) shifted in a direction toward the horizontal central axis of the glass layer (1401).

[0202] For example, the glass layer (1401) includes side walls (1403, 1404) forming a first cavity (1402), and the side walls (1403, 1404) may include a first portion (1403) provided on one side of a first connecting member (1405) and a second portion (1404) provided on the other side of the first connecting member (1405). In addition, a separation distance (d1) between the first portion (1403) and the connecting member (1405) may be different from a separation distance (d2) between the second portion (1404) and the connecting member (1405). For example, a separation distance (d1) between the first portion (1403) and the connecting member (1405) may be greater than a separation distance (d2) between the second portion (1404) and the connecting member (1405). For example, the horizontal central axis of the first connecting member (1405) may be misaligned with the horizontal central axis of the first cavity (1402), and preferably, the horizontal central axis of the first connecting member (1405) may be shifted in a direction toward the horizontal central axis of the glass layer (1401) with respect to the horizontal central axis of the first cavity (1402).

[0203] A second connecting member (1409) may be placed within the second cavity (1406). The second connecting member (1409) may be placed within the second cavity (1406) shifted in a direction toward the horizontal central axis of the glass layer (1401).

[0204] For example, the glass layer (1401) includes side walls (1407, 1408) forming a second cavity (1406), and the side walls (1407, 1408) may include a third portion (1407) provided on one side of a second connecting member (1409) and a fourth portion (1408) provided on the other side of the second connecting member (1409). In addition, a separation distance (d3) between the third portion (1407) and the second connecting member (1409) may be different from a separation distance (d4) between the fourth portion (1408) and the second connecting member (1409). For example, the separation distance (d3) between the third portion (1407) and the second connecting member (1409) may be greater than the separation distance (d4) between the fourth portion (1408) and the second connecting member (1409). For example, the horizontal central axis of the second connecting member (1409) may be misaligned with the horizontal central axis of the second cavity (1406), and preferably, the horizontal central axis of the second connecting member (1409) may be shifted in a direction toward the horizontal central axis of the glass layer (1401) with respect to the horizontal central axis of the second cavity (1406).

[0205] Through this, the embodiment can make it possible to have different widths in the horizontal direction of the insulating layer of the first build-up layer provided along the perimeter of the side surface of the connecting member (1405, 1409). For example, the cavity (1402, 1406) is filled with the insulating layer of the first build-up layer. At this time, the separation distance between the side wall of the cavity (1402, 1406) and the connecting member (1405, 1409) can include different separation distances along the perimeter direction of the connecting member (1405, 1409). Through this, the insulating layer of the first build-up layer (1302) can have different widths in the horizontal direction along the perimeter direction of the connecting member (1405, 1409). Through this, the embodiment can have different spacing distances from the side walls of the cavity along the circumferential direction of the connecting member (1405, 1409) in consideration of the direction in which the circuit board is bent, thereby further alleviating the bending of the circuit board.

[0206]

[0207] According to the embodiment of FIG. 15, the glass layer (1501) includes a plurality of cavities (1502, 1504, 1506, 1508, 1510, 1512, 1514, 1516) and a plurality of connecting members (1503, 1505, 1507, 1509, 1511, 1513, 1515, 1517) located in different horizontal directions based on the horizontal central axis (x0) of the glass layer (1501). The plurality of connecting members (1503, 1505, 1507, 1509, 1511, 1513, 1515, 1517) can be shifted in different directions within each cavity (1502, 1504, 1506, 1508, 1510, 1512, 1514, 1516), for example, can be shifted in a direction toward the horizontal central axis (x0) of the glass layer (1501).

[0208] For example, a first cavity (1502) and a first connecting member (1503) are arranged to the left of the horizontal central axis (x0) of the glass layer (1501). The first connecting member (1503) can be shifted (shift 1) in a first horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the first cavity (1502).

[0209] Additionally, a second cavity (1504) and a second connecting member (1505) are arranged to the right of the horizontal central axis (x0) of the glass layer (1501). The second connecting member (1505) can be shifted (shift 2) in a second horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the second cavity (1504).

[0210] Additionally, a third cavity (1506) and a third connecting member (1507) are arranged on the rear side of the horizontal central axis (x0) of the glass layer (1501). The third connecting member (1507) can be shifted (shift 3) in a third horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the third cavity (1506).

[0211] Additionally, a fourth cavity (1508) and a fourth connecting member (1509) are arranged in front of the horizontal central axis (x0) of the glass layer (1501). The fourth connecting member (1509) can be shifted (shift 4) in a fourth horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the fourth cavity (1508).

[0212] Additionally, a fifth cavity (1510) and a fifth connecting member (1511) are arranged on the left-rear side of the horizontal central axis (x0) of the glass layer (1501). The fifth connecting member (1511) can be shifted (shift 5) in a fifth horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the fifth cavity (1510).

[0213] Additionally, a sixth cavity (1512) and a sixth connecting member (1513) are arranged on the right-rear side of the horizontal central axis (x0) of the glass layer (1501). The sixth connecting member (1513) can be shifted (shift 6) in a sixth horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the sixth cavity (1512).

[0214] Additionally, a seventh cavity (1514) and a seventh connecting member (1515) are arranged on the left-front side of the horizontal central axis (x0) of the glass layer (1501). The seventh connecting member (1515) can be shifted (shift 7) in the seventh horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the seventh cavity (1514).

[0215] Additionally, an eighth cavity (1516) and an eighth connecting member (1517) are arranged on the right-front side of the horizontal central axis (x0) of the glass layer (1501). The eighth connecting member (1517) can be shifted (shift 7) in the eighth horizontal direction toward the horizontal central axis (x0) of the glass layer (1501) within the eighth cavity (1516).

[0216] As described above, considering the positions where the cavities and connecting members are arranged based on the horizontal central axis (x0) of the glass layer (1501), the plurality of connecting members (1503, 1505, 1507, 1509, 1511, 1513, 1515, 1517) can be shifted in different directions and / or different distances within each of the cavities (1502, 1504, 1506, 1508, 1510, 1512, 1514, 1516), and thus the overall warpage of the circuit board can be further alleviated, so that the semiconductor elements can be arranged more stably.

[0217]

[0218] The circuit board described above can be used as a semiconductor package substrate of a semiconductor package. Referring to the embodiment of FIG. 16, the semiconductor package can include a semiconductor package substrate (1600), a bonding member (1610), and semiconductor elements (1620, 1630). The semiconductor package substrate (1600) can be connected to a main board of an electronic device while providing a space in which the semiconductor elements (1620, 1630) are mounted.

[0219] In addition, the circuit board described above can be used as an interposer provided between the semiconductor package substrate and the semiconductor elements of the semiconductor package. Referring to the embodiment of FIG. 17, the semiconductor package can include an interposer (1700), a first bonding member (1710), a plurality of semiconductor elements (1720, 1730), a second bonding member (1740), and a semiconductor package substrate (1750).

[0220] The interposer (1700) may refer to the circuit board (100) described with reference to FIGS. 1 to 17. That is, as the terminal density of semiconductor devices increases, the wiring becomes more complex, and accordingly, the thickness of the circuit board increases. As the thickness increases, the yield of the circuit board may decrease, which may cause a problem. Therefore, the circuit board may be divided into an interposer (1700) and a semiconductor package board (1750) and used. The circuit board (100) described above may be used as a semiconductor package board (1600) as in the embodiment of FIG. 16, and further, may be used as an interposer (1700) as in the embodiment of FIG. 17.

[0221] Semiconductor elements (1720, 1730) are arranged on the interposer (1700). The semiconductor elements (1720, 1730) may be provided in multiple numbers on the interposer (1700) while being spaced apart from each other in the horizontal direction, but the present invention is not limited thereto. For example, the semiconductor elements (1720, 1730) may be arranged to be stacked not only horizontally but also vertically on the interposer (1700). A connecting member (620) for electrically connecting the semiconductor elements (1720, 1730) is arranged on the interposer (1700).

[0222] A first bonding member (1710) may be provided between the interposer (1700) and the semiconductor elements (1720, 1730). The first bonding member (1710) may be placed on a bonding portion (see FIG. 11) provided on the interposer (1700), through which the semiconductor elements (1720, 1730) may be attached to the interposer (1700) by a thermocompression bonding method. At this time, the semiconductor elements (1720, 1730) may be provided with terminals (1725, 1735), and the terminals (1725, 1735) may be electrically connected to the bonding portion and circuit layer of the interposer (1700) through the first bonding member (1710).

[0223] A semiconductor package substrate (1750) is placed on the lower surface of the interposer (1700). The semiconductor package substrate (1750) can electrically connect the main board of an electronic device and the interposer (1700).

[0224] At this time, a second bonding member (1740) may be placed between the interposer (1700) and the semiconductor package substrate (1750), through which the interposer (1700) and the semiconductor package substrate (1750) may be electrically bonded.

[0225]

[0226] Hereinafter, a method for manufacturing a circuit board according to an embodiment will be described in process order. Figures 18a to 18h are cross-sectional views showing a method for manufacturing a circuit board according to an embodiment in process order.

[0227] Referring to FIG. 18A, the embodiment prepares a core member that serves as the basis for manufacturing a circuit board. For this purpose, the embodiment may prepare a glass layer (1801). Next, the embodiment may perform a process of forming a through hole (1801T) in the prepared glass layer (1801). For example, the embodiment may form the through hole (1801T) by processing the glass layer (1801) using femto, pico, FED (Focused Electrical Discharging), wet etching, etc. At this time, the process of forming the through hole (1801T) may be performed on one surface of the glass layer (1801). In this case, the through hole (1801T) may have a slope such that the width in the horizontal direction gradually narrows in the direction from the upper surface of the glass layer (1801) toward the lower surface of the glass layer (1801).

[0228] Next, referring to FIG. 18b, the embodiment may proceed with a process of forming an insulating member (1802) within a through hole (1801T) formed in a glass layer (1801). At this time, as illustrated in (a) of FIG. 18b, the insulating member (1802) may be placed only in the through hole (1801T) of the glass layer (1801). In addition, as illustrated in (b) of FIG. 18b, the insulating member (1802) may be formed with a certain thickness not only in the through hole (1801T) of the glass layer (1801), but also on the upper and lower surfaces of the glass layer (1801).

[0229] Next, referring to FIG. 18c, the embodiment may perform a process of forming a cavity (1803) in a glass layer (1801). At this time, the embodiment may form the cavity (1803) by wet etching the glass layer (1801). At this time, when an insulating member (1802) is provided on the upper surface of the glass layer (1801), in the process of forming the cavity (1803), a part of the insulating member (1802) provided on the upper surface of the glass layer (1801) may also be removed together with the glass layer (1801). In addition, the cavity (1803) formed through the wet etching process may be inclined so that the horizontal width gradually narrows in the direction from the upper surface of the glass layer (1801) toward the lower surface of the glass layer (1801).

[0230] Next, referring to FIG. 18D, the embodiment may perform a process of forming a final cavity (1804) by further processing a cavity (1803) formed through a wet etching process. Preferably, the embodiment may perform a sandblasting process on the cavity (1803) that has been primarily processed through the wet etching process. Through this, the sidewall of the finally formed cavity (1804) may be perpendicular to the upper surface and / or lower surface of the glass layer (1801). In addition, the boundary surface between the sidewall and the bottom surface of the cavity (1804) may have a curved surface having a certain curvature.

[0231] Next, referring to FIG. 18E, the embodiment may perform a process of forming a via hole (1805) in the insulating member (1802). For example, the embodiment may perform a first via hole forming process on the upper surface of the insulating member (1802), and then perform a second via hole forming process on the lower surface of the insulating member (1802). Through this, the via hole (1805) formed in the insulating member (1802) may have a first portion having a slope in which a horizontal width gradually narrows in a direction from the upper surface of the glass layer (1801) toward the lower surface of the glass layer (1801), and a second portion disposed below the first portion and having a slope in which a horizontal width gradually widens in a direction from the upper surface of the glass layer (1801) toward the lower surface of the glass layer (1801). In addition, a plurality of via holes (1805) may be formed, and each of the plurality of via holes may be formed in each insulating member in consideration of the direction in which the circuit board (100) is bent. For example, in consideration of the direction in which the circuit board is bent, the horizontal central axis of each insulating member and the horizontal central axis of each via hole may be misaligned. For example, the horizontal central axis of each via hole may be shifted in a direction toward the horizontal central axis of the glass layer (1801) with respect to the horizontal central axis of each insulating member.

[0232] Next, referring to FIG. 18f, the embodiment can form a core via electrode (1806) by filling a via hole (1805) formed in an insulating member (1802) with a conductive material, and form a circuit layer (1807, 1808) connected to the core via electrode (1806).

[0233] Next, referring to FIG. 18g, the embodiment may form an adhesive member (1809) on the bottom surface of a cavity (1804) formed in a glass layer (1801). In addition, the embodiment may perform a process of attaching a connecting member (1810) on the adhesive member (1809). At this time, the connecting member (1810) may be attached while being shifted in a specific horizontal direction within the cavity (1804) in consideration of the direction in which the circuit board is bent. For example, the horizontal central axis of the connecting member (1810) may be shifted in a direction toward the horizontal central axis of the circuit board (100) with respect to the horizontal central axis of the cavity (1804).

[0234] Next, referring to FIG. 18h, the embodiment may perform a process of forming a first build-up layer (1811) on top of a glass layer (1801) and forming a second build-up layer (1812) on the bottom of the glass layer (1801). Through this, the embodiment may manufacture a circuit board with improved bending characteristics. Furthermore, the embodiment may perform a process of mounting a semiconductor device on the manufactured circuit board, thereby manufacturing a semiconductor package.

[0235]

[0236] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor chips from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor chips. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability with each other.

[0237] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor chip controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuit between terminals, or electrical open of the terminal supplying the semiconductor chip, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

[0238] The features, structures, effects, etc. described in the embodiments above are included in at least one embodiment, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be interpreted as being included within the scope of the embodiments.

[0239] Although the above has been described focusing on embodiments, these are merely examples and are not intended to limit the embodiments. Those skilled in the art to which the embodiments pertain will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the embodiments set forth in the appended claims.

Claims

1. Glass layer; an insulating member penetrating the glass layer; and Including a via electrode penetrating the above insulating member, A circuit board in which the horizontal central axis of the above via electrode and the horizontal central axis of the above insulating member are misaligned with each other.

2. In paragraph 1, The insulating member has a slope in which the horizontal width gradually narrows along the direction from the upper surface of the glass layer toward the lower surface of the glass layer, The via electrode includes a first portion having a slope in which a horizontal width gradually narrows along a direction from the upper surface of the glass layer toward the lower surface of the glass layer; and a second portion disposed under the first portion and having a slope in which a horizontal width gradually widens along a direction from the upper surface of the glass layer toward the lower surface of the glass layer. A circuit board wherein the inclination angle of the second part is different from the inclination angle of the insulating member.

3. In paragraph 2, The direction in which the slope of the above insulating member is inclined is the same as the direction in which the slope of the first part is inclined, A circuit board in which the direction in which the slope of the second part is inclined is different from the direction in which the slope of the insulating member is inclined and the direction in which the slope of the first part is inclined.

4. In paragraph 1, A circuit board in which the horizontal central axis of the via electrode is closer to the horizontal central axis of the glass layer than to the horizontal central axis of the insulating member.

5. In paragraph 4, The insulating member and the via electrode are provided in multiple pieces so as to be spaced apart from each other in the horizontal direction, A circuit board, wherein the misalignment direction of the central axis of each of the plurality of via electrodes with respect to the horizontal central axis of each of the plurality of insulating members includes a first misalignment direction and a second misalignment direction that are different from each other.

6. In paragraph 4, A circuit board, wherein at least one of the plurality of via electrodes has a vertical thickness of the first portion and a vertical thickness of the second portion that are the same.

7. In paragraph 4, A circuit board, wherein at least one of the plurality of via electrodes has a different vertical thickness of the first portion and a different vertical thickness of the second portion.

8. In paragraph 7, The above plurality of via electrodes include first and second via electrodes, The vertical thickness of the first part of the first via electrode is greater than the vertical thickness of the second part of the first via electrode, A circuit board, wherein the vertical thickness of the first portion of the second via electrode is smaller than the vertical thickness of the second portion of the second via electrode.

9. In paragraph 1, A circuit board, wherein the insulating member has a third portion having a slope in which a horizontal width gradually narrows along a direction from the upper surface of the glass layer toward the lower surface of the glass layer, and a fourth portion disposed below the third portion and having a slope in which a horizontal width gradually widens along a direction from the upper surface of the glass layer toward the lower surface of the glass layer.

10. In paragraph 9, The horizontal central axis of the third part of the insulating member and the horizontal central axis of the fourth part of the insulating member are misaligned with each other, The vertical thickness of the third part on one side of the insulating member and the vertical thickness of the third part on the other side of the insulating member are different from each other, A circuit board wherein the vertical thickness of the fourth part on one side of the insulating member and the vertical thickness of the fourth part on the other side of the insulating member are different from each other.

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