Nitride semiconductor device

Abstract

This nitride semiconductor device has: a group III nitride semiconductor substrate which has a first main surface and a second main surface facing away from each other; a first nitride semiconductor layer which is provided above the first main surface, is selectively provided with a projection part having a forward-tapered side wall, and has a first conductivity type; a second nitride semiconductor layer which is formed to cover the side wall of the projection part and the intersection of the side wall and the bottom part of the projection part, and which has a bandgap greater than the first nitride semiconductor layer; a third nitride semiconductor layer which is formed to cover the surface of the second nitride semiconductor layer and has a second conductivity type different from the first conductivity type; a gate electrode which is formed in direct contact with the third nitride semiconductor layer; a source electrode which is formed above the projection part of the first nitride semiconductor layer; and a drain electrode which is provided to the second main surface side.

Description

nitride semiconductor devices

[0001] The present disclosure relates to the structure of a semiconductor device, and more particularly to a device using a semiconductor, particularly a Group III nitride semiconductor, that can be used as a field effect transistor or the like.

[0002] Group III nitride semiconductors have a high breakdown voltage due to their wide band gap. Furthermore, heterostructures such as AlGaN / GaN can be easily formed. The difference in lattice constants between AlGaN and GaN, together with the difference in band gap, generates a high-mobility, high-concentration electron channel (two-dimensional electron gas) on the GaN layer side of the AlGaN / GaN interface. Controlling this two-dimensional electron gas makes it possible to form a high electron mobility transistor (HEMT). Due to these characteristics of high breakdown voltage, high speed, and large current, Group III nitride semiconductors are being applied to electronic devices such as power field-effect transistors (FETs) and diodes.

[0003] Previously, due to the lack of large-diameter freestanding GaN substrates, horizontal AlGaN / GaN-HFET structures using epitaxial substrates fabricated on SiC, sapphire, or Si substrates were common. In recent years, large-diameter freestanding GaN substrates have been put into practical use, and vertical GaN field-effect transistors (FETs) that can easily achieve smaller chip sizes and lower costs are now being realized.

[0004] In the semiconductor device shown in Fig. 1A of Patent Document 1, a channel layer (e.g., n-GaN) is formed on a substrate (e.g., n-GaN). A convex shape is selectively formed in the channel layer, and a p-type gate layer (e.g., p-GaN) is formed on the sidewall of the convex portion of the channel layer by epitaxial regrowth.

[0005] According to Patent Document 1, a p-type gate layer (e.g., p-GaN) depletes a convex-shaped channel made of n-GaN from the side by a p-n junction, thereby controlling the current between the source and drain (junction FET, JFET).

[0006] U.S. Patent No. 8,969,912

[0007] In the structure described in Patent Document 1, the n-GaN channel is depleted from the side using the p-n junction of p-GaN. However, to achieve complete depletion, it is necessary to narrow the n-GaN channel width or lower the n-type carrier concentration, which reduces the on-resistance and leaves room for improvement.

[0008] A nitride semiconductor device according to one aspect of the present disclosure includes: a Group III nitride semiconductor substrate having first and second main surfaces facing each other; a first nitride semiconductor layer having a first conductivity type provided above the first main surface and having protrusions selectively provided with forward tapered sidewalls; a second nitride semiconductor layer having a larger bandgap than the first nitride semiconductor layer, formed so as to cover the sidewalls of the protrusions and intersections of the sidewalls of the protrusions and bottom portions other than the protrusions; a third nitride semiconductor layer having a second conductivity type different from the first conductivity type, formed so as to cover a surface of the second nitride semiconductor layer; a gate electrode formed in direct contact with the third nitride semiconductor layer; a source electrode formed on the first nitride semiconductor layer at the protrusions; and a drain electrode provided on the second main surface side.

[0009] The nitride semiconductor device according to the present disclosure can increase the drain current and reduce the on-resistance.

[0010] 1 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to an embodiment. FIG. 2 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a first modification of the embodiment. FIG. 3 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a second modification of the embodiment. FIG. 4 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a third modification of the embodiment. FIG. 5 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a fourth modification of the embodiment. 13 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a twelfth modification of the embodiment. FIG. 14 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a thirteenth modification of the embodiment. FIG. 15 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a fourteenth modification of the embodiment. FIG. 16 is a cross-sectional view showing a cross-sectional structure of a nitride semiconductor device according to a fifteenth modification of the embodiment.

[0011] Hereinafter, nitride semiconductor devices according to embodiments will be described in detail with reference to the drawings. Note that each of the embodiments described below represents a specific example of the present disclosure. The numerical values, shapes, materials, components, component placement positions, and connection forms shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, components not recited in independent claims will be described as optional components.

[0012] Furthermore, each figure is a schematic diagram and is not necessarily an exact illustration. Therefore, for example, the scales of the figures do not necessarily match. Furthermore, in each figure, substantially the same components are given the same reference numerals, and redundant explanations are omitted or simplified.

[0013] Furthermore, in this specification, terms indicating the relationship between elements, terms indicating the shape of elements, and numerical ranges are not expressions that only express a strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0014] Furthermore, in this specification, the terms "above" and "below" do not refer to the upward direction (vertically upward) and downward direction (vertically downward) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. Furthermore, the terms "above" and "below" are applied not only to a case where two components are arranged with a gap between them and another component exists between the two components, but also to a case where two components are arranged closely together and the two components are in contact with each other.

[0015] Furthermore, in this specification, ordinal numbers such as "first" and "second" do not refer to the number or order of components unless otherwise specified, but are used for the purpose of avoiding confusion and distinguishing between components of the same type.

[0016] All of the drawings described below show a state in which no voltage is applied to the electrodes of the nitride semiconductor device.

[0017] FIG. 1 shows a cross-sectional structure of a vertical nitride semiconductor device 51 according to an embodiment, in which a vertically flowing two-dimensional electron gas layer is depleted from the side by using a pn junction.

[0018] 1 includes a group III nitride semiconductor substrate 1 made of GaN (or other materials such as InN, InGaN, AlN, AlGaN, AlInGaN, etc.) having a first main surface 101 and a second main surface 102 facing each other. The nitride semiconductor device 51 includes a first nitride semiconductor layer 2 made of GaN (or other materials such as InN, InGaN, AlN, AlGaN, AlInGaN, etc.) of a first conductivity type, in which a protrusion 12 having a forward tapered sidewall 203 is selectively provided above the first main surface 101 of the group III nitride semiconductor substrate 1. The nitride semiconductor device has a second nitride semiconductor layer 3 made of AlGaN (or other group III nitride semiconductors such as GaN, InGaN, AlN, AlInGaN, etc.) which is formed so as to cover at least the sidewalls 203 of the convex portions of the first nitride semiconductor layer 2 and the intersections 204 between the sidewalls 203 of the convex portions 12 and the bottom portions 201 other than the convex portions 12, and which has a larger band gap than the first nitride semiconductor layer 2.

[0019] The convex portion 12 is defined as the region above a straight line L12 connecting the left and right sides of an intersection 204 between the side wall 203 of the convex portion 12 and the bottom portion 201 other than the convex portion 12.

[0020] The second nitride semiconductor layer 3 has a larger band gap than the first nitride semiconductor layer 2 and is in direct contact with the first nitride semiconductor layer 2. If the second nitride semiconductor layer 3 is AlGaN and the first nitride semiconductor layer 2 is GaN, piezoelectric charges generated by the difference in lattice constant between AlGaN and GaN and the difference in band gap generate high concentrations of two-dimensional electron gas along the sidewalls 203 of the protrusions 12 on the first nitride semiconductor layer 2 side near the interface between the second nitride semiconductor layer 3 and the first nitride semiconductor layer 2. However, if the sidewalls 203 of the protrusions 12 are perpendicular to the first main surface 101, piezoelectric charges are not generated laterally, and therefore almost no two-dimensional electron gas is generated. Therefore, the sidewalls 203 of the protrusions 12 must have a forward tapered shape, and the forward taper angle 13 of the sidewalls 203 of the protrusions 12 is preferably 80 degrees or less. On the other hand, if the taper angle 13 is too shallow, the device dimensions will become too large, increasing costs and deteriorating pinch-off characteristics. For this reason, it is desirable that the forward taper angle 13 of the sidewall 203 of the convex portion 12 be 40 degrees or more. Note that the forward taper angle 13 here is defined as the angle at which the sidewall 203 of the convex portion 12 meets a straight line L12 connecting the left and right sides of an intersection 204 between the sidewall 203 of the convex portion 12 and the bottom portion 201 other than the convex portion 12.

[0021] The nitride semiconductor device also has a third nitride semiconductor layer 4 made of GaN (or other group III nitride semiconductors such as InN, InGaN, AlN, AlGaN, and AlInGaN) that has a second conductivity type different from the first conductivity type and is formed so as to cover at least a portion of the surface of the second nitride semiconductor layer 3.

[0022] When the first conductivity type is n-type, the second conductivity type is p-type. When the first conductivity type is p-type, the second conductivity type is n-type. When the conductivity type is n-type, the nitride semiconductor layer may contain Si, Ge, O, etc. as n-type impurities, or may be unintentionally doped (UID)-GaN. When the conductivity type is p-type, Mg, Zn, C, etc. are used as p-type impurities in the nitride semiconductor layer, and the concentration of the p-type impurities is 1E19 cm －３ Above, if possible, 5E19cm －３The above doping amounts are preferably used.

[0023] Hereinafter, for the sake of simplicity, when the first conductivity type is n-type, the second conductivity type is p-type.

[0024] 1 , it is necessary to deplete the protruding portions 12 of the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3 that is in direct contact with the protruding portions 12 by a p-n junction with the third nitride semiconductor layer 4. For this reason, it is necessary to set the threshold voltage (Vth) of the nitride semiconductor device 51 (in this case, a field effect transistor, FET) by appropriately determining the width of the protruding portions 12 of the first nitride semiconductor layer 2 and the composition ratio of the second nitride semiconductor layer 3 that determines the two-dimensional electron gas concentration, which is the concentration of the first conductivity type contained in the first nitride semiconductor layer 2.

[0025] For example, the second nitride semiconductor layer 3 is made of AlGaN, has an Al composition ratio of 0.2, and has a film thickness of 20 nm in the vertical direction from the sidewall 203 of the protrusion 12 of the first nitride semiconductor layer 2. In this case, in order to realize the normally-off operation required for the power device by the p-n junction with the third nitride semiconductor layer 4 made of p-GaN, the n-type impurity concentration of the protrusion 12 of the first nitride semiconductor layer 2 should be 1E18 cm －３ Below, if possible, 1E17cm －３ It is necessary to set the doping amount as follows. Note that normally-off operation is an operation in which no current flows between the source and drain when the gate voltage is 0 V. Furthermore, the n-type impurity concentration of this first nitride semiconductor layer 2 depends on the dimension (length) of the protrusion 12, but from the viewpoints of ease of processing and complete depletion from the sides, it is appropriate that the lateral length of the top 202 of the protrusion 12 (the length in the left-right direction in the drawing) be approximately 0.2 μm or more and 1.0 μm or less.

[0026] 1 also includes a gate electrode 6 formed above the third nitride semiconductor layer 4, a source electrode 5 formed above the first nitride semiconductor layer 2 at the protrusion 12, and a drain electrode 7 provided below the second major surface 102 of the Group III nitride semiconductor substrate 1. The source electrode 5 is electrically connected to the first nitride semiconductor layer 2. The drain electrode 7 is electrically connected to the Group III nitride semiconductor substrate 1. Specifically, the materials for the source electrode 5 and the drain electrode 7 are selected from metals that are in ohmic contact with the first nitride semiconductor layer 2 and the Group III nitride semiconductor substrate 1, respectively. When the first nitride semiconductor layer 2 and the Group III nitride semiconductor substrate 1 are both n-type nitride semiconductor layers, the metal in ohmic contact is an electrode made of one or a combination of two or more metals such as Ti, Al, Mo, and Hf.

[0027] The gate electrode 6 may be an electrode made of one or a combination of two or more metals such as Ti, Ni, Pd, Pt, Au, W, WSi, Ta, TiN, Al, Mo, Hf, and Zr. The gate electrode 6 may be in ohmic contact or Schottky contact with the third nitride semiconductor layer 4. The reliability of the gate electrode 6 is higher when the gate electrode 6 is in ohmic contact with the third nitride semiconductor layer 4. For this reason, it is desirable to use an electrode made of one or a combination of two or more metals having low contact resistance, such as Ni, Pt, Pd, Au, Ti, Cr, In, Sn, and Al.

[0028] Next, the operation of this structure will be described. Here, we will explain the case where the first conductivity type is n-type and the second conductivity type is p-type. When no voltage is applied to any electrode, the third nitride semiconductor layer 4 is a p-type nitride semiconductor layer, and the third nitride semiconductor layer 4 is physically close to the two-dimensional electron gas layer. Therefore, the p-n junction depletes the two-dimensional electron gas layer directly below the third nitride semiconductor layer 4 (to the side of the convex portion 12) (off state). Figure 1 shows this off state. In this state, even if a positive voltage is applied to the drain electrode 7 and the source electrode 5 is grounded, no current flows between the drain electrode 7 and the source electrode 5. Next, when a positive voltage is applied to the third nitride semiconductor layer 4 via the gate electrode 6, the depletion layer of the p-n junction is pulled toward the gate electrode 6 and becomes smaller, and a two-dimensional electron gas layer is generated directly below the third nitride semiconductor layer 4 (to the side of the convex portion) (on state). In this state, when a positive voltage is applied to the drain electrode 7 and the source electrode 5 is grounded, a current flows between the drain electrode 7 and the source electrode 5. In this way, this structure is a so-called field effect transistor structure in which the current between the source electrode 5 and the drain electrode 7 is controlled by the voltage of the gate electrode 6.

[0029] Next, the effects of this structure will be explained. This structure is characterized by a vertical nitride semiconductor device 51 in which a vertically flowing two-dimensional electron gas layer is laterally depleted using a p-n junction. This allows the high-current, high-mobility channel of the two-dimensional electron gas layer to be used vertically, reducing sheet resistance and, as a result, reducing on-resistance and increasing the maximum drain current. At the same time, the use of a p-n junction also improves the gate pinch-off characteristics, enabling a reduction in leakage current between the drain and source.

[0030] [First Modification] Next, Fig. 2 shows a cross-sectional structure of a nitride semiconductor device 52 according to a first modification of the embodiment. Specifically, Fig. 2 shows a cross-sectional structure in which the second nitride semiconductor layer 3 further covers the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2. In Fig. 2, the second nitride semiconductor layer 3 covers the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2. As a result, two-dimensional electron gas 8 is formed within the protruding portions 12 immediately below the interface between the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3.

[0031] By using this modification, in addition to the effects of the embodiment, the sheet resistance directly below the source electrode 5 can be reduced, the on-resistance can be reduced, and the maximum drain current can be increased.

[0032] [Second Modification] Next, Fig. 3 shows a cross-sectional structure of a nitride semiconductor device 53 according to a second modification of the embodiment. Specifically, Fig. 3 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers the bottom 201 of the first nitride semiconductor layer 2 other than the protruding portions 12. In Fig. 3, the second nitride semiconductor layer 3 covers the bottom 201 of the first nitride semiconductor layer 2 other than the protruding portions 12. As a result, when the nitride semiconductor device 53 is on, a two-dimensional electron gas layer is formed in the first nitride semiconductor layer 2 immediately below the interface between the bottom 201 of the first nitride semiconductor layer 2 other than the protruding portions 12 and the second nitride semiconductor layer 3.

[0033] By using this modification, in addition to the effects of the embodiment, when nitride semiconductor device 53 is on, the sheet resistance in the lateral direction along bottom 201 of bottom 201 other than convex portion 12 of first nitride semiconductor layer 2 can be reduced, current can be spread in the lateral direction, on-resistance can be reduced, and the maximum drain current can be increased.

[0034] [Third Modification] Next, Fig. 4 shows a cross-sectional structure of a nitride semiconductor device 54 according to a third modification of the embodiment. Specifically, Fig. 4 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers both the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protruding portions 12. In Fig. 4, the second nitride semiconductor layer 3 covers both the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protruding portions 12. As a result, a two-dimensional electron gas 8 is formed in the first nitride semiconductor layer 2 immediately below the interface between the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3. Furthermore, when the nitride semiconductor device 54 is on, a two-dimensional electron gas layer is formed in the first nitride semiconductor layer 2 immediately below the interface between the bottoms 201 other than the protruding portions 12 of the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3. As a result, when the nitride semiconductor device 54 is turned on, a two-dimensional electron gas layer is formed directly under the entire second nitride semiconductor layer 3 .

[0035] By using this modification, in addition to the effects of the embodiment, when the nitride semiconductor device 54 is on, a two-dimensional electron gas layer is formed all over directly below the second nitride semiconductor layer 3. Therefore, the sheet resistance in the lateral direction of the first nitride semiconductor layer 2 can be reduced all over, the on-resistance can be reduced, and the maximum drain current can be increased.

[0036] [Fourth Modification] Next, Fig. 5 shows a cross-sectional structure of a nitride semiconductor device 55 according to a fourth modification of the embodiment. Specifically, Fig. 5 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2, and the film thickness of the second nitride semiconductor layer 3 is thinner on the sidewalls 203 of the protruding portions 12 of the first nitride semiconductor layer 2 than on the tops 202 of the protruding portions 12. In Fig. 5, the second nitride semiconductor layer 3 covers the tops 202 of the protruding portions 12 of the first nitride semiconductor layer 2. The film thickness of the second nitride semiconductor layer 3 is thinner on the sidewalls 203 of the protruding portions 12 of the first nitride semiconductor layer 2 than on the tops 202 of the protruding portions 12.

[0037] In addition to the effects of the first modification of the embodiment, this modification reduces the sheet resistance directly below the source electrode 5, reduces the on-resistance, and increases the maximum drain current. Furthermore, since the film thickness of the second nitride semiconductor layer 3 along the sidewall 203 of the protrusion 12 of the first nitride semiconductor layer 2 is thin, the pinch-off characteristics of the gate can be improved. Therefore, the threshold voltage can be set high, and the leakage current between the drain and source can also be reduced.

[0038] [Fifth Modification] Next, Fig. 6 shows a cross-sectional structure of a nitride semiconductor device 56 according to a fifth modification of the embodiment. Specifically, Fig. 6 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers the bottom portions 201 of the first nitride semiconductor layer 2 other than the protruding portions 12, and the film thickness of the second nitride semiconductor layer 3 is thinner at the sidewalls 203 of the protruding portions 12 of the first nitride semiconductor layer 2 than at the bottom portions 201 other than the protruding portions 12. In Fig. 6, the second nitride semiconductor layer 3 covers the bottom portions 201 of the first nitride semiconductor layer 2 other than the protruding portions 12. Furthermore, the film thickness of the second nitride semiconductor layer 3 is thinner at the sidewalls 203 of the protruding portions 12 of the first nitride semiconductor layer 2 than at the bottom portions 201 other than the protruding portions 12.

[0039] By using this modification, in addition to the effects of the second modification of the embodiment, when the nitride semiconductor device 56 is on, the sheet resistance in the lateral direction along the bottom 201 of the bottom 201 other than the protrusion 12 of the first nitride semiconductor layer 2 can be reduced, thereby reducing the on-resistance and increasing the maximum drain current. Furthermore, since the film thickness of the second nitride semiconductor layer 3 along the sidewall 203 of the protrusion 12 of the first nitride semiconductor layer 2 is thin, the pinch-off characteristics of the gate can also be improved. Therefore, the threshold voltage can be set high and the leakage current between the drain and source can also be reduced.

[0040] 7 shows a cross-sectional structure of a nitride semiconductor device 57 according to a sixth modification of the embodiment. Specifically, Fig. 7 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers both the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protrusions 12, and the film thickness of the second nitride semiconductor layer 3 is thinner on the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 and on the bottoms 201 other than the protrusions 12 than the tops 202 of the protrusions 12. In Fig. 7, the second nitride semiconductor layer 3 covers both the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protrusions 12. The second nitride semiconductor layer 3 has a smaller film thickness at each of the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 and at the bottom 201 other than the protrusions 12 than at the top 202 of the protrusions 12 .

[0041] By using this modification, in addition to the effects of the third modification of the embodiment, the film thickness of the second nitride semiconductor layer 3 along the sidewall 203 of the protrusion 12 of the first nitride semiconductor layer 2 is thin, so that the pinch-off characteristics of the gate can be improved. Therefore, the threshold voltage can be set high, and the leakage current between the drain and the source can also be reduced. Furthermore, since the two-dimensional electron gas layer below the gate electrode when the nitride semiconductor device 57 is on can be reduced, the leakage current between the gate and the drain can be reduced.

[0042] [Seventh Modification] Next, Fig. 8 shows a cross-sectional structure of a nitride semiconductor device 58 according to a seventh modification of the embodiment. Specifically, Fig. 8 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers both the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protrusions 12, and the film thickness of the second nitride semiconductor layer 3 is thinner on both the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 and the tops 202 of the protrusions 12 than on the bottoms 201 other than the protrusions 12. In Fig. 8, the second nitride semiconductor layer 3 covers both the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protrusions 12. The second nitride semiconductor layer 3 has a smaller film thickness at each of the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 and the tops 202 of the protrusions 12 than at the bottoms 201 other than the protrusions 12 .

[0043] In addition to the effects of the third modification of the embodiment, this modification can improve the gate pinch-off characteristics because the film thickness of the second nitride semiconductor layer 3 along the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 is thin. This makes it possible to set a high threshold voltage and reduce the leakage current between the drain and the source. Furthermore, the thickness of the second nitride semiconductor layer 3 on the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 is thin, physically reducing the distance to the two-dimensional electron gas 8, thereby reducing the contact resistance of the source electrode.

[0044] 9 shows a cross-sectional structure of a nitride semiconductor device 59 according to an eighth modification of the embodiment. Specifically, Fig. 9 shows a cross-sectional structure in which the second nitride semiconductor layer 3 covers both the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protrusions 12, and the film thickness of the second nitride semiconductor layer 3 is thinner on the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 than both the tops 202 of the protrusions 12 and the bottoms 201 other than the protrusions 12. In Fig. 8, the second nitride semiconductor layer 3 covers both the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 and the bottoms 201 other than the protrusions 12. Furthermore, the thickness of the second nitride semiconductor layer 3 on the sidewalls 203 of the protrusions 12 of the first nitride semiconductor layer 2 is thinner than both the tops 202 of the protrusions 12 and the bottoms 201 other than the protrusions 12 .

[0045] By using this modification, in addition to the effects of the third modification of the embodiment, the film thickness of the second nitride semiconductor layer 3 along the sidewall 203 of the convex portion 12 of the first nitride semiconductor layer 2 is thin, so that the pinch-off characteristics of the gate can be improved, the threshold voltage can be set high, and the leakage current between the drain and the source can be reduced.

[0046] 10 shows a cross-sectional structure of a nitride semiconductor device 60 according to a ninth modification of the embodiment. Specifically, Fig. 10 shows a cross-sectional structure in which the topmost part 4T of the third nitride semiconductor layer 4 is lower than the topmost part 3T of the second nitride semiconductor layer 3, with respect to the first main surface 101 of the group III nitride semiconductor substrate 1. In Fig. 10, the topmost part 4T of the third nitride semiconductor layer 4 is lower than the topmost part 3T of the second nitride semiconductor layer 3.

[0047] By using this modification, in addition to the effects of the embodiment and the first to eighth modifications of the embodiment, it is possible to physically separate the source electrode 5 from the third nitride semiconductor layer 4. This makes it possible to reduce the leakage current between the gate and the source and to expand the process margin.

[0048] 11 shows a cross-sectional structure of a nitride semiconductor device 61 according to a tenth modification of the embodiment. Specifically, Fig. 11 shows a cross-sectional structure in which the source electrode 5 is in direct contact with both the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3. In Fig. 11, the source electrode 5 is in direct contact with both the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3. As a result, the source electrode 5 is in direct contact with a two-dimensional electron gas layer that is generated at the interface between the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3 when the device is on.

[0049] By using this modification, in addition to the effects of the embodiment and the first to ninth modifications of the embodiment, the source electrode 5 comes into direct contact with the two-dimensional electron gas layer, thereby reducing the contact resistance, reducing the on-resistance, and increasing the maximum drain current.

[0050] 12 shows a cross-sectional structure of a nitride semiconductor device 62 according to an eleventh modification of the first embodiment. Specifically, Fig. 12 shows a cross-sectional structure in which the topmost part 3T of the second nitride semiconductor layer 3 is higher than the topmost part 2T of the first nitride semiconductor layer 2, with respect to the first main surface 101 of the group III nitride semiconductor substrate 1. In Fig. 12, the topmost part 3T of the second nitride semiconductor layer 3 is higher than the topmost part 2T of the first nitride semiconductor layer 2. In other words, the second nitride semiconductor layer 3 covers at least a part of the tops 202 of the protruding parts 12 of the first nitride semiconductor layer 2.

[0051] By using this modification, in addition to the effects of the embodiment and the first to tenth modifications of the embodiment, the source electrode 5 can approach the two-dimensional electron gas layer immediately below the interface between the first nitride semiconductor layer 2 and the second nitride semiconductor layer 3. This makes it possible to reduce the contact resistance of the source electrode 5, reduce the on-resistance, and increase the maximum drain current. In addition, the manufacturing process becomes easier.

[0052] 13 shows a cross-sectional structure of a nitride semiconductor device 63 according to a twelfth modification of the embodiment. Specifically, Fig. 13 shows a cross-sectional structure in which the third nitride semiconductor layer 4 covers a part of the top 302 of the second nitride semiconductor layer 3 along the top 202 of the convex portion 12 of the first nitride semiconductor layer 2. In Fig. 13, the third nitride semiconductor layer 4 covers at least a part of the top 302 of the second nitride semiconductor layer 3.

[0053] By using this modification, in addition to the effects of the embodiment and the first to eleventh modifications of the embodiment, the third nitride semiconductor layer 4 and the second nitride semiconductor layer 3 can be entirely regrown on the first nitride semiconductor layer 2 without requiring a selective regrowth process, and then the third nitride semiconductor layer 4 can be removed by dry opening, which simplifies the manufacturing process.

[0054] 14 shows a cross-sectional structure of a nitride semiconductor device 64 according to a thirteenth modification of the embodiment. Specifically, Fig. 14 shows a cross-sectional structure in which the source electrode 5 is in direct contact with the first nitride semiconductor layer 2. In Fig. 14, the source electrode 5 is in direct contact with the first nitride semiconductor layer 2.

[0055] By using this modification, in addition to the effect of the twelfth modification of the embodiment, the source electrode 5 comes into direct contact with the top 202 of the convex portion 12 of the first nitride semiconductor layer 2, and therefore the contact resistance of the source electrode 5 can be reduced.

[0056] 15 shows a cross-sectional structure of a nitride semiconductor device 65 according to a fourteenth modification of the embodiment. The source electrode 5 has a bottom portion 5B located on the second nitride semiconductor layer 3 and an upper portion 5T on the opposite side of the bottom portion 5B. Specifically, Fig. 15 shows a cross-sectional structure of the source electrode 5 in which the width of the upper portion 5T is wider than the width of the bottom portion 5B in a cross-sectional view. In Fig. 15, the width of the upper portion 5T of the source electrode 5 is wider than the width of the bottom portion 5B in a cross-sectional view.

[0057] By using this modification, in addition to the effects of the embodiment and the first to thirteenth modifications of the embodiment, the resistance of the source electrode 5 can be reduced, the on-resistance can be reduced, and the maximum drain current can be increased. Furthermore, the effective cross-sectional length and cross-sectional area of ​​the source electrode 5 can be increased compared to the contact length (horizontal direction in the figure) between the source electrode 5 and the first nitride semiconductor layer 2. This, in turn, allows the device size to be reduced, resulting in cost reduction.

[0058] 16 shows a cross-sectional structure of a nitride semiconductor device 66 according to a fifteenth modification of the embodiment. Specifically, FIG. 16 shows a cross-sectional structure in which the average carrier concentration in the protruding portions 12 of the first nitride semiconductor layer 2 having the first conductivity type is lower than that in the first nitride semiconductor layer 2 other than the protruding portions 12. In FIG. 16, the average carrier concentration in the protruding portions 12 of the first nitride semiconductor layer 2 having the first conductivity type is lower than that in the first nitride semiconductor layer 2 other than the protruding portions 12. A low average carrier concentration means that the first conductivity type carrier concentration may vary within the protruding portions 12 or may be uniform, but the average carrier concentration in the protruding portions 12 is lower than the average carrier concentration in the first nitride semiconductor layer 2 other than the protruding portions 12. The convex portion 12 is defined as the region above a straight line L12 connecting the left and right sides of an intersection 204 between the side wall 203 of the convex portion 12 and the bottom portion 201 other than the convex portion 12.

[0059] By using this modification, in addition to the effects of the embodiment and the first to fifteenth modifications of the embodiment, the pinch-off characteristics of the gate can be improved because the carrier concentration in the protrusion 12 is low. Therefore, the threshold voltage can be set high, and the leakage current between the drain and source can also be reduced.

[0060] 17 shows a cross-sectional structure of a nitride semiconductor device 67 according to a sixteenth modification of the embodiment. Specifically, Fig. 17 shows a cross-sectional structure including a region 10 having a locally low concentration of the first conductivity type in a protruding portion 12 of a first nitride semiconductor layer 2 having a first conductivity type. In Fig. 17, the protruding portion 12 of the first nitride semiconductor layer 2 having a first conductivity type includes a region 10 having a locally low concentration of the first conductivity type. Note that the protruding portion 12 is defined as a region above a straight line L12 connecting the left and right sides of an intersection 204 between a sidewall 203 of the protruding portion 12 and a bottom portion 201 other than the protruding portion 12.

[0061] Furthermore, the region 10 with a low concentration of the first conductivity type may be one of the multiple layers stacked as shown in FIG. 17, or may be localized within the protrusion 12 of the first nitride semiconductor layer 2.

[0062] By using this modification, in addition to the effects of the embodiment and the first to fifteenth modifications of the embodiment, the pinch-off characteristics of the gate can be improved because there is a region 10 with a locally low carrier concentration in the protrusion 12. Therefore, the threshold voltage can be set high, and the leakage current between the drain and source can also be reduced.

[0063] [Manufacturing Method] Next, cross-sectional views of the structure shown in Fig. 13 are shown in Fig. 18A to Fig. 18F to explain a manufacturing method in the case where the first conductivity type is n-type. Note that this manufacturing method describes a minimum configuration, and is not limited to this. Furthermore, the order of steps in this manufacturing method is not limited to this.

[0064] First, a first nitride semiconductor layer 2 having a first conductivity type and made of n-GaN is formed above the first principal surface 101 of a Group III nitride semiconductor substrate 1 made of n-GaN, the first principal surface 101 being back-to-back with a known epitaxial growth technique such as MOCVD or HVPE. Other examples of Group III nitride semiconductor substrate 1 include n-InN, n-InGaN, n-AlN, n-AlGaN, and n-AlInGaN. The first nitride semiconductor layer 2 may also be a single layer or multiple layers made of other materials such as n-InN, n-InGaN, n-AlN, n-AlGaN, and n-AlInGaN. This first nitride semiconductor layer 2 serves as a channel layer for the nitride semiconductor device 63, and therefore must have a low resistance to vertically flowing current. Therefore, it is necessary to make the resistance low to some extent, but on the other hand, it is necessary to pinch off by the gate described later, so an appropriate n-type impurity concentration is required. A specific n-type impurity concentration is, for example, 1E15 cm －３ ~1E18cm －３The n-type impurity concentration of the first nitride semiconductor layer 2 may be in the range of 1E18 cm 3 or 1E18 cm 4. The n-type impurity of the first nitride semiconductor layer 2 may be doped with Si, Ge, O, or the like during epitaxial growth. Alternatively, the n-type impurity may be unintentionally doped (UID)-GaN. As shown in FIGS. 16 and 17, a low carrier concentration region 9 or a low concentration region 10 of the first conductivity type may be present above the first nitride semiconductor layer 2. In this case, the low carrier concentration region 9 or the low concentration region 10 of the first conductivity type becomes a region to be depleted in the nitride semiconductor device 58, and therefore the n-type impurity concentration of the first nitride semiconductor layer 2 is 1E18 cm 3 or 1E18 cm 4. －３ It may be higher than this.

[0065] Next, as shown in FIG. 18A, an appropriate resist pattern 11 is formed on the first nitride semiconductor layer 2.

[0066] Next, regions other than the resist pattern 11 are dry-etched using an inductively coupled plasma reactive ion etching (ICP-RIE) method or the like to form convex portions 12 as shown in FIG. 18B . The convex portions 12 are defined as regions above a straight line L12 connecting the left and right sides of an intersection 204 between the sidewalls 203 of the convex portions 12 of the first nitride semiconductor layer 2 and the bottom portions 201 other than the convex portions 12. The sidewalls 203 of the convex portions 12 must be forward tapered, i.e., the tops of the convex portions 12 must be narrower than the bottoms. In this case, the taper angle 13, which is the angle between the sidewalls 203 and the straight line L12, is, for example, 80 degrees or less. Conversely, if the taper angle 13 is too shallow, the device dimensions will be too large, resulting in increased costs and poor pinch-off characteristics. For this reason, the taper angle 13 is, for example, 40 degrees or more.

[0067] The forward tapered shape of the sidewalls 203 of the protrusions 12 is formed by tapering the sidewalls 113 of the resist pattern 11 in advance by post-baking or the like and then dry-etching them, or by using isotropic dry etching conditions or the like. Next, the resist pattern 11 on the second nitride semiconductor layer 3 is completely removed by a known ashing method, organic cleaning method, sulfuric acid / hydrogen peroxide cleaning method or the like. The lateral length (the length in the left-right direction in the drawing) of the tops 202 of the protrusions 12 of the first nitride semiconductor layer 2 is suitably about 0.2 μm or more and 1.0 μm or less from the viewpoints of ease of processing and complete depletion (pinch-off) from the sides.

[0068] 18C , a second nitride semiconductor layer 3 made of AlGaN having a larger band gap than the first nitride semiconductor layer is formed by a known epitaxial growth technique such as MOCVD so as to cover the surface on the first main surface 101 side of the first nitride semiconductor layer 2, i.e., the surface facing the same direction as the first main surface 101 (specifically, the tops 202 of the protrusions 12, the sidewalls 203 of the protrusions 12, and the bottoms 201 other than the protrusions 12). Here, the second nitride semiconductor layer 3 may also be made of, for example, a Group III nitride semiconductor such as GaN, InGaN, AlN, or AlInGaN. Furthermore, a third nitride semiconductor layer 4 of a second conductivity type different from the first conductivity type, in this case p-type Group III nitride semiconductor p-GaN, is continuously formed so as to cover the surface 301 of the second nitride semiconductor layer 3, using a known epitaxial growth technique such as MOCVD. Here, other Group III nitride semiconductors such as InN, InGaN, AlN, AlGaN, and AlInGaN may also be formed as the third nitride semiconductor layer 4. When Mg is used as the p-type impurity of the third nitride semiconductor layer 4, Cp ２ Mg and the like are simultaneously flowed for doping. The concentration of this p-type impurity is set to 1E19 cm 3 in order to make the third nitride semiconductor layer 4 p-type. －３ Above, if possible, 5E19cm －３ The above doping amounts are preferably used.

[0069] When the second nitride semiconductor layer 3 is made of AlGaN, the lateral growth rate of the second nitride semiconductor layer 3 is slow at a normally used Al composition ratio of 15% to 30%. Therefore, when the taper angle of the sidewalls 203 of the protrusions 12 is in the range of 40 degrees to 80 degrees, the film thickness of the second nitride semiconductor layer 3 growing vertically from the sidewalls 203 of the protrusions 12 is inevitably thinner than the film thickness of the second nitride semiconductor layer 3 growing vertically (upward in the figure) from the tops 202 of the protrusions 12 and the bottoms 201 other than the protrusions 12, as shown in Figure 9 or 10 .

[0070] Furthermore, when third nitride semiconductor layer 4 is made of GaN or InGaN, since it does not contain Al, the lateral growth rate is fast and the surface of protrusion 12 is somewhat flattened as shown in Fig. 18C. Furthermore, depending on the growth conditions, film thickness, and dimensions of the protrusion of third nitride semiconductor layer 4, the first main surface 101 side of the nitride semiconductor device according to the present disclosure, i.e., the surface facing the same direction as first main surface 101, may be completely flattened.

[0071] When the nitride semiconductor device according to the present disclosure is operated in normally-off mode, the second nitride semiconductor layer 3 made of AlGaN has a thickness of, for example, 30 nm or less, and preferably 20 nm or less, on the side wall 203 of the protrusion 12 in the direction perpendicular to the side wall 203, when the Al composition ratio is, for example, 20%.

[0072] The third nitride semiconductor layer 4 made of p-GaN has a thickness of, for example, 80 nm or more, and preferably about 200 nm. The thickness of the third nitride semiconductor layer 4 refers to the thickness in the direction perpendicular to the first major surface 101 (upward in the drawing).

[0073] 18D, an appropriate resist pattern 14 is formed on the third nitride semiconductor layer 4. Then, the region other than the resist pattern 14 is dry-etched using a known inductively coupled plasma reactive ion etching (ICP-RIE) method or the like to dry-etch the third nitride semiconductor layer 4 above the protrusions 12, thereby forming recesses 15.

[0074] Next, the resist pattern 14 on the third nitride semiconductor layer 4 is completely removed by a known ashing method, organic cleaning method, sulfuric acid / peroxide cleaning method, or the like.

[0075] Next, activation annealing of the p-type impurities is performed by a known annealing technique in a gas atmosphere such as nitrogen at 700° C. to 900° C. for about 10 to 60 minutes, thereby activating about 1% of the p-type impurities and making the third nitride semiconductor layer 4 p-type.

[0076] 18E, the recess portion 15 may stop at the surface of the second nitride semiconductor layer 3, or may stop halfway through the second nitride semiconductor layer 3. Alternatively, as shown in FIG. 14, the second nitride semiconductor layer 3 may be completely excavated so as to be in direct contact with the first nitride semiconductor layer 2. Alternatively, as shown in FIG. 11, the recess portion 15 may be in contact with both the second nitride semiconductor layer 3 and the first nitride semiconductor layer 2. When dry etching is stopped at or halfway through the surface of the second nitride semiconductor layer 3, a known selective dry etching technique may be used.

[0077] 18E , when the nitride semiconductor device is in normally-off operation, two-dimensional electron gas 8 is formed at the interface between the second nitride semiconductor layer 3 and the first nitride semiconductor layer 2 directly below the recess 15 due to the removal of the third nitride semiconductor layer 4. Furthermore, in other regions covered by the third nitride semiconductor layer 4 (sidewalls 203 of the protrusions 12 and bottom portions 201 other than the protrusions 12), two-dimensional electron gas is not formed when no voltage is applied due to the depletion layer of the p-n junction. However, as described above, the second nitride semiconductor layer 3 along the bottom portions 201 other than the protrusions 12 is thicker than the second nitride semiconductor layer 3 along the sidewalls 203 of the protrusions 12. Therefore, depending on the film thickness and composition ratio, two-dimensional electron gas may be formed when no voltage is applied. Furthermore, when the nitride semiconductor device is on, the concentration of the two-dimensional electron gas along the bottom 201 other than the protrusion 12 is necessarily higher than the concentration of the two-dimensional electron gas along the sidewall 203 of the protrusion 12 .

[0078] 18F, a source electrode 5 is formed using known photolithography, vapor deposition, lift-off, sputtering, dry etching, annealing (alloying), ashing, organic cleaning, sulfur-peroxide cleaning, or the like. The source electrode 5 is made of an electrode made of one or a combination of two or more metals such as Ti, Al, Mo, and Hf, which are in ohmic contact with the nitride semiconductor layer, and is electrically connected to the first nitride semiconductor layer 2.

[0079] Next, the gate electrode 6 is formed using known photolithography, vapor deposition, lift-off, sputtering, dry etching, ashing, organic cleaning, sulfur-peroxide cleaning, or the like. The gate electrode 6 may be an electrode made of one or a combination of two or more metals, such as Ti, Ni, Pd, Pt, Au, W, WSi, Ta, TiN, Al, Mo, Hf, and Zr. The gate electrode 6 may be in ohmic contact or Schottky contact with the third nitride semiconductor layer 4. The reliability of the gate electrode is higher when the gate electrode 6 is in ohmic contact with the third nitride semiconductor layer 4. For this reason, an electrode made of one or a combination of two or more metals, such as Ni, Pt, Pd, Au, Ti, Cr, In, Sn, and Al, which have low contact resistance, may be used.

[0080] Finally, using known techniques such as vapor deposition, sputtering, and annealing (alloying), a drain electrode 7 is formed on the second main surface of the III-nitride semiconductor substrate 1. The drain electrode 7 is made of an electrode made of one or a combination of two or more metals such as Ti, Al, Mo, and Hf, which is in ohmic contact with the nitride semiconductor layer (III-nitride semiconductor substrate 1), and is electrically connected to the III-nitride semiconductor substrate 1.

[0081] [Summary] A nitride semiconductor device according to a first aspect of the present disclosure comprises: a Group III nitride semiconductor substrate having first and second main surfaces facing each other; a first nitride semiconductor layer having a first conductivity type provided above the first main surface and having protrusions selectively provided with forward tapered sidewalls; a second nitride semiconductor layer formed so as to cover the sidewalls of the protrusions and intersections between the sidewalls and a bottom of the protrusions and having a band gap larger than that of the first nitride semiconductor layer; a third nitride semiconductor layer having a second conductivity type different from the first conductivity type and formed so as to cover a surface of the second nitride semiconductor layer; a gate electrode formed in direct contact with the third nitride semiconductor layer; a source electrode formed on the first nitride semiconductor layer at the protrusions; and a drain electrode provided on the second main surface side.

[0082] A nitride semiconductor device according to a second aspect of the present disclosure is the nitride semiconductor device according to the first aspect, wherein the second nitride semiconductor layer covers the top of the protrusion of the first nitride semiconductor layer.

[0083] A nitride semiconductor device according to a third aspect of the present disclosure is the nitride semiconductor device according to the first aspect, wherein the second nitride semiconductor layer covers the bottom portion of the first nitride semiconductor layer other than the convex portion.

[0084] A nitride semiconductor device according to a fourth aspect of the present disclosure is the nitride semiconductor device according to the first aspect, wherein the second nitride semiconductor layer covers both the top of the convex portion of the first nitride semiconductor layer and the bottom portion other than the convex portion.

[0085] A nitride semiconductor device according to a fifth aspect of the present disclosure is the nitride semiconductor device according to the second aspect, wherein the film thickness of the second nitride semiconductor layer is thinner on the sidewall of the convex portion of the first nitride semiconductor layer than on the top of the convex portion.

[0086] A nitride semiconductor device according to a sixth aspect of the present disclosure is the nitride semiconductor device according to the third aspect, wherein the film thickness of the second nitride semiconductor layer is thinner on the sidewall of the convex portion of the first nitride semiconductor layer than on the bottom portion other than the convex portion.

[0087] A nitride semiconductor device according to a seventh aspect of the present disclosure is the nitride semiconductor device according to the fourth aspect, wherein the film thickness of the second nitride semiconductor layer is thinner at each of the sidewalls of the convex portions of the first nitride semiconductor layer and the bottom portion other than the convex portions than at the top of the convex portions.

[0088] A nitride semiconductor device according to an eighth aspect of the present disclosure is the nitride semiconductor device according to the fourth aspect, wherein the film thickness of the second nitride semiconductor layer is thinner at each of the sidewalls of the convex portions of the first nitride semiconductor layer and the top of the convex portions than at the bottom portions other than the convex portions.

[0089] A nitride semiconductor device according to a ninth aspect of the present disclosure is the nitride semiconductor device according to the fourth aspect, wherein the film thickness of the second nitride semiconductor layer on the sidewall of the convex portion of the first nitride semiconductor layer is thinner than both the bottom other than the convex portion and the top of the convex portion.

[0090] A nitride semiconductor device according to a tenth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to ninth aspects, wherein the top of the third nitride semiconductor layer is lower than the top of the second nitride semiconductor layer.

[0091] A nitride semiconductor device according to an eleventh aspect of the present disclosure is the nitride semiconductor device according to any one of the first to tenth aspects, wherein the source electrode is in direct contact with both the first nitride semiconductor layer and the second nitride semiconductor layer.

[0092] A nitride semiconductor device according to a twelfth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to eleventh aspects, wherein the top of the second nitride semiconductor layer is higher than the top of the first nitride semiconductor layer.

[0093] A nitride semiconductor device according to a thirteenth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to twelfth aspects, wherein the third nitride semiconductor layer covers a portion of the top of the second nitride semiconductor layer.

[0094] A nitride semiconductor device according to a fourteenth aspect of the present disclosure is the nitride semiconductor device according to the thirteenth aspect, wherein the source electrode is in direct contact with the first nitride semiconductor layer.

[0095] A nitride semiconductor device according to a fifteenth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to fourteenth aspects, wherein the source electrode is wider at the top than at the bottom in a cross-sectional view.

[0096] A nitride semiconductor device according to a sixteenth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to fifteenth aspects, wherein the average carrier concentration within the convex portion of the first nitride semiconductor layer having the first conductivity type is lower than that of the first nitride semiconductor layer other than the convex portion.

[0097] A nitride semiconductor device according to a seventeenth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to sixteenth aspects, including a region having a low carrier concentration of the first conductivity type within the convex portion of the first nitride semiconductor layer having the first conductivity type.

[0098] A nitride semiconductor device according to an eighteenth aspect of the present disclosure is a nitride semiconductor device according to any one of the first to seventeenth aspects, wherein the forward taper angle of the sidewall of the convex portion made of the first nitride semiconductor layer having the first conductivity type is not less than 40 degrees and not more than 80 degrees.

[0099] While nitride semiconductor devices according to one or more aspects have been described above based on the embodiments, the present disclosure is not limited to these embodiments. As long as they do not deviate from the gist of the present disclosure, various modifications conceivable by those skilled in the art to the present embodiments and configurations constructed by combining components of different embodiments are also included within the scope of the present disclosure.

[0100] Furthermore, various modifications, substitutions, additions, omissions, etc. can be made to the above-described embodiments within the scope of the claims or their equivalents.

[0101] The present disclosure can be used as a semiconductor device that increases drain current and reduces on-resistance, for example, in a power device.

[0102] REFERENCE SIGNS LIST 1 Group III nitride semiconductor substrate 2 First nitride semiconductor layer 3 Second nitride semiconductor layer 4 Third nitride semiconductor layer 5 Source electrode 6 Gate electrode 7 Drain electrode 8 Two-dimensional electron gas 9 Low carrier concentration region 10 Region with low concentration of first conductivity type 11, 14 Resist pattern 12 Convex portion 13 Taper angle 15 Recessed portion

Claims

1. A nitride semiconductor device comprising: a Group III nitride semiconductor substrate having first and second main surfaces facing each other; a first nitride semiconductor layer having a first conductivity type provided above the first main surface and having a protrusion selectively provided with a forward tapered sidewall; a second nitride semiconductor layer formed so as to cover the sidewall of the protrusion and an intersection between the sidewall and a bottom of the protrusion and having a band gap larger than that of the first nitride semiconductor layer; a third nitride semiconductor layer having a second conductivity type different from the first conductivity type and formed so as to cover a surface of the second nitride semiconductor layer; a gate electrode formed in direct contact with the third nitride semiconductor layer; a source electrode formed on the first nitride semiconductor layer of the protrusion; and a drain electrode provided on the second main surface side.

2. The nitride semiconductor device according to claim 1, wherein said second nitride semiconductor layer covers the top of said protruding portion of said first nitride semiconductor layer.

3. The nitride semiconductor device according to claim 1, wherein said second nitride semiconductor layer covers said bottom portion other than said protruding portion of said first nitride semiconductor layer.

4. The nitride semiconductor device according to claim 1, wherein said second nitride semiconductor layer covers both the top of said convex portion of said first nitride semiconductor layer and the bottom portion other than said convex portion.

5. The nitride semiconductor device according to claim 2, wherein the second nitride semiconductor layer has a thickness thinner on the sidewall of the protruding portion of the first nitride semiconductor layer than on the top of the protruding portion.

6. The nitride semiconductor device according to claim 3, wherein the second nitride semiconductor layer has a thickness thinner on the sidewall of the protruding portion of the first nitride semiconductor layer than on the bottom portion other than the protruding portion.

7. The nitride semiconductor device according to claim 4, wherein the second nitride semiconductor layer has a thickness thinner at each of the sidewalls of the protruding portions of the first nitride semiconductor layer and at the bottom other than the protruding portions than at the top of the protruding portions.

8. The nitride semiconductor device according to claim 4, wherein the second nitride semiconductor layer has a thickness thinner at each of the sidewalls and the top of the convex portion of the first nitride semiconductor layer than at the bottom other than the convex portion.

9. The nitride semiconductor device according to claim 4, wherein the film thickness of the second nitride semiconductor layer on the sidewall of the convex portion of the first nitride semiconductor layer is thinner than both the bottom other than the convex portion and the top of the convex portion.

10. The nitride semiconductor device according to any one of claims 1 to 9, wherein the topmost part of the third nitride semiconductor layer is lower than the topmost part of the second nitride semiconductor layer.

11. The nitride semiconductor device according to any one of claims 1 to 9, wherein the source electrode is in direct contact with both the first nitride semiconductor layer and the second nitride semiconductor layer.

12. The nitride semiconductor device according to any one of claims 1 to 9, wherein the topmost part of the second nitride semiconductor layer is higher than the topmost part of the first nitride semiconductor layer.

13. The nitride semiconductor device according to any one of claims 1 to 9, wherein the third nitride semiconductor layer covers a portion of a top portion of the second nitride semiconductor layer.

14. The nitride semiconductor device according to claim 13, wherein the source electrode is in direct contact with the first nitride semiconductor layer.

15. The nitride semiconductor device according to claim 1, wherein the source electrode has a width at its top that is wider than its bottom in a cross-sectional view.

16. The nitride semiconductor device according to any one of claims 1 to 9, wherein an average carrier concentration within said convex portion of said first nitride semiconductor layer having said first conductivity type is lower than an average carrier concentration in said first nitride semiconductor layer other than said convex portion.

17. The nitride semiconductor device according to any one of claims 1 to 9, wherein the convex portion of the first nitride semiconductor layer having the first conductivity type includes a region having a low carrier concentration of the first conductivity type.

18. The nitride semiconductor device according to any one of claims 1 to 9, wherein a forward taper angle of the sidewall of the protrusion made of the first nitride semiconductor layer having the first conductivity type is not less than 40 degrees and not more than 80 degrees.

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