Power supply filter circuit, power supply arrangement, automated test equipment and method for actively filtering a supply voltage

Abstract

55 Power Supply Filter Circuit, Power Supply Arrangement, Automated Test Equipment and Method for Actively Filtering a Supply Voltage Abstract 5 A power supply filter circuit (100), comprises a transistor (120), a control capacitor (130) and a stabilization capacitor (140). A load path of the transistor is coupled between an input (110) of the power supply filter circuit and an output (112) of the power supply filter circuit. The control capacitor is coupled between a control terminal of the transistor and a reference potential conductor (GND). The stabilization capacitor is coupled between a source terminal 10 of the transistor and the reference potential conductor. The power supply filter circuit is configured to regulate a voltage across the load path of the transistor or a voltage between an input of the power supply filter circuit and an output of the power supply filter circuit. A Power Supply Arrangement, an Automated Test Equipment and Method for Actively Filtering a Supply Voltage are also described. 15 Figure 1

Description

[0001] Power Supply Filter Circuit, Power Supply Arrangement, Automated Test Equipment and Method for Actively Filtering a Supply Voltage

[0002] Description

[0003] Technical Field

[0004] Embodiments according to the invention are related to a power supply filter circuit.

[0005] Further embodiments according to the present invention are related to a power supply arrangement.

[0006] Further embodiments according to the invention are related to an automated test equipment.

[0007] Further embodiments according to the invention are related to a method for actively filtering a supply voltage comprising a ripple using a power supply filter circuit.

[0008] Some embodiments according to the invention are related to an active power supply filter for higher voltages.

[0009] Background of the Invention

[0010] In many applications, it is desirable to have a supply voltage with low ripple. However, energy efficient switching power converters often bring along a significant amount of ripple noise, partly due to the switching nature of the power conversion.

[0011] For example, in automated test equipment, there is demand for precise voltage and current measurements. There are also special requirement for the associated power supplies. For example, in some cases, DC / DC converters need adequate filtering to provide rail voltages with very low noise to the measurement circuitries.

[0012] It has been recognized that filter circuitries for higher currents at high voltages via passive components become normally uncomfortably big since density of devices (e.g. capacitors) decreases with increased rated voltage. Moreover, it has been recognized that standard linear regulators are not applicable for filtering at higher voltages since their limited voltage accuracy and the voltage tolerance of the DC / DC converters lead to need of the greater voltage headroom resulting in higher power dissipation inside the filter circuitry.

[0013] Accordingly, it is desired to have a concept which provides an improved tradeoff between a quality of a provided voltage, a power dissipation and an implementation complexity. of the Invention

[0014] An embodiment according to the invention creates a power supply filter circuit wherein the power supply filter circuit comprises a transistor (e.g. a power MOSFET or a bipolar transistor), a control capacitor and a stabilization capacitor. A load path (e.g. a drain-source path or a collector-emitter path) of the transistor is coupled between an input of the power supply filter circuit and an output of the power supply filter circuit. The control capacitor is coupled between a control terminal of the transistor (e.g. a gate terminal in case of a file effect transistor and a base terminal in case of a bipolar transistor) and a reference potential conductor (e.g. a ground line). For example, a load is coupled (or is to be coupled) between the output of the power supply filter circuit and the reference potential conductor, or wherein, for example, a load is coupled (or is to be coupled) between a source terminal of the transistor and the reference potential conductor. The stabilization capacitor is coupled between a source terminal (e.g. a source terminal in case of a field effect transistor or an emitter terminal in case of a bipolar transistor) of the transistor and the reference potential conductor. The power supply filter circuit is configured to regulate a voltage across the load path of the transistor (e.g. a drain-source voltage of the transistor in case of a field effect transistor, or a collector emitter voltage in the case of a bipolar transistor) or a voltage between an input of the power supply filter circuit and an output of the power supply filter circuit.

[0015] This embodiment is based on the finding that a good tradeoff between a quality of an output voltage, a power dissipation and an implementation complexity can be achieved by such a circuit. In particular, by having a load path of the transistor in between the input of the power supply filter circuit and the output of the power supply filter circuit, an effect of voltage fluctuations (e.g. noise) on the voltage applied to the input of the power supply filter circuit can be compensated, since the current flowing through the load path of the transistor is typically relatively insensitive to fluctuations of the voltage across the load path (e.g. collector-emitter-path or drain-source-path) of the transistor (at least if the transistor is operated at a “reasonable” operation point). However, it has been recognized that by regulating the voltage across the load path of the transistor (which typically implies some delay and a low pass characteristic), it is possible to have a well-defined voltage at the output of the power supply filter circuit (at least under the assumption that an average value of the voltage at the input of the power supply circuit is well-defined, e.g. well-regulated).

[0016] However, it has also been recognized that such a power supply filter circuit can be implemented with a relatively small voltage drop across the load path of the transistor, which implies a relatively small power consumption.

[0017] Moreover, it should be noted that both the control capacitor and the stabilization capacitor contribute to the quality of the output voltage present at the output of the power supply filter circuit. For example, the control capacitor, which is coupled between the control terminal of the transistor and the reference potential conductor (e.g. a ground line) keeps the potential at the control terminal of the transistor reasonably stable (at least on a short or medium time scale).

[0018] Since, in many cases, the output voltage at the output of the power supply filter circuit may be in a close relationship with the voltage present at the control terminal of the transistor, such that the stabilization of the voltage at the control terminal of the transistor by the control capacitor contributes to a stabilization of the output voltage at the output of the power supply filter circuit.

[0019] The regulation of the voltage across the load path of the transistor (or of the voltage between the input and the output of the power supply filter circuit) may have a limited bandwidth (or a certain regulation time constant), which helps to at least partially suppress noise which may be present in the voltage that is supplied to the input of the power supply filter circuit.

[0020] To conclude, the power supply filter circuit allows for a provision of a high quality output voltage, wherein noise and other distortions which may be included in the input voltage that is supplied to the input of the power supply filter circuit may be reduced or attenuated or even substantially suppressed. Moreover, a comparatively low voltage drop between the input and the output of the power supply filter circuit can be achieved by its configuration, wherein a good accuracy of the output voltage and a low power dissipation can be achieved by the regulation of the voltage across the load path of the transistor (or by the regulation of the voltage between the input and the output of the power supply filter circuit, e.g. in the case that there are multiple transistors coupled ins series, or that there are any additional components coupled in series with the transistor between the input and the output).

[0021] In a preferred embodiment, a capacitance of the control capacitor is larger than or equal to 10 times a transistor-internal capacitance between the control terminal of the transistor (e.g. a gate terminal in case of a field effect transistor, or a base terminal in case of a bipolar transistor) and the source terminal of the transistor (e.g. a source terminal in case of a field effect transistor, or an emitter terminal in case of a bipolar transistor), e.g. larger than or equal to 10 times a gate-source-capacitance of the transistor]. Alternatively, a capacitance of the control capacitor is larger than or equal to 20 times a transistor-internal capacitance between the control terminal of the transistor (e.g. a gate terminal in case of a field effect transistor, or a base terminal in case of a bipolar transistor) and the source terminal of the transistor (e.g. a source terminal in case of a field effect transistor, or an emitter terminal in case of a bipolar transistor), e.g. larger than or equal to 20 times a gate-source-capacitance of the transistor. Alternatively, a capacitance of the control capacitor is larger than or equal to 50 times a transistor-internal capacitance between the control terminal of the transistor (e.g. a gate terminal in case of a field effect transistor, or a base terminal in case of a bipolar transistor) and the source terminal of the transistor (e.g. a source terminal in case of a field effect transistor, or an emitter terminal in case of a bipolar transistor), e.g larger than or equal to 50 times a gate-source-capacitance of the transistor. Alternatively, a capacitance of the control capacitor is larger than or equal to 100 times a transistor-internal capacitance between the control terminal of the transistor (e.g. a gate terminal in case of a field effect transistor, or a base terminal in case of a bipolar transistor) and the source terminal of the transistor (e.g. a source terminal in case of a field effect transistor, or an emitter terminal in case of a bipolar transistor), e.g. larger than or equal to 100 times a gate-source- capacitance of the transistor.

[0022] It has been recognized that using such a dimension of the control capacitor, a particularly good quality of the output voltage at the output of the power supply filter circuit can be achieved. In particular, it has been recognized that the control capacitor is effective for a suppression of distortions on the output voltage of the power supply filter circuit if it is sufficiently large, e.g. significantly larger than the capacitance between the transistor- internal capacitance between the control terminal of the transistor and the source terminal of the transistor, wherein this source terminal of the transistor is typically, but not necessarily, coupled with the output of the power supply filter circuit.

[0023] In a preferred embodiment, the power supply filter circuit comprises a resistor which is coupled between an output of a regulator (e.g. an output of an operational amplifier that is used to implement a regulator) for regulating the voltage across the load path of the transistor (e.g. a drain-source voltage of the transistor in case of a field effect transistor, or a collector emitter voltage in the case of a bipolar transistor) or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit and a control terminal of the transistor. The resistor which is coupled between the output of the regulator and the control terminal of the transistor is configured to form, together with the control capacitor, a low pass filter (e.g. a low pass filter having a cutoff frequency which is smaller than or equal to 10 kHz).

[0024] Usage of such a resistor, which is coupled between the output of the regulator and the control terminal of the transistor, may contribute to a limitation of the bandwidth of the regulation loop, which in turn allows for a reduction or suppression of noise having a frequency that is larger than the bandwidth of the regulation loop. Moreover, usage of a resistor in between the output of the regulator and the control terminal of the transistor may also limit a current flow and therefore have to a avoid a destruction of the transistor and / or of the regulator.

[0025] In a preferred embodiment, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate the voltage across the load path of the transistor or the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit such that the transistor operates in a saturated area (of its output characteristic field).

[0026] By regulating the voltage across the load path of the transistor or the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit such that the transistor operates in a saturated area has the effect that the current flowing through the load path of the transistor is relatively insensitive to variations of the voltage across the load path of the transistor. Accordingly, noise or other distortions on the input voltage of the power supply filter circuits can be decoupled from the output of the power supply filter circuit. In other words, by regulating the voltage across the load path of the transistor in such a manner that the transistor operates in a saturated area, it can be ensured that the transistor comprises a comparatively high output impedance (i.e. operates substantially as a current source). Consequently, the high output impedance of the transistor, which is obtained by operating the transistor in the saturated area, has the effect that noise and other distortions on the input voltage of the power supply filter circuit are not forwarded to the output of the power supply filter circuit (or are only forwarded in a significantly attenuated form).

[0027] Furthermore, by stabilizing a potential at the control terminal of the transistor using the control capacitor, distortions of the output voltage of the power supply filter circuit can be further reduced. In other words, by regulating the voltage across the load path of the transistor (or the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit) such that the transistor operates the saturated area ensures to avoid that the voltage across the load path of the transistor gets too small. This is advantageous, because a very small voltage across the load path of the transistor would significantly degrade a suppression of noise and other distortions on the output voltage of the power supply filter circuit. Accordingly, a good quality of the output voltage of the power supply filter circuit can be ensured.

[0028] In a preferred embodiment, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate the voltage across the load path of the transistor to a target value (e.g. to a predetermined or fixed target value) which is smaller than or equal to 1 V.

[0029] Alternatively, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate the voltage across the load path of the transistor to a target value (e.g. to a predetermined or fixed target value) which is in a range between 0.3 V and 0.8 V.

[0030] Alternatively, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate the voltage across the load path of the transistor to a target value (e.g. to a predetermined or fixed target value) which is in a range between 0.4 V and 0.6 V. Alternatively, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate a voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit to a target value (e.g. to a predetermined or fixed target value) which is smaller than or equal to 1 V.

[0031] Alternatively, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate a voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit to a target value (e.g. to a predetermined or fixed target value) which is in a range between 0.3 V and 0.8 V.

[0032] Alternatively, the power supply filter circuit (e.g. a regulator of the power supply filter circuit) is configured to regulate a voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit to a target value (e.g. to a predetermined or fixed target value) which is in a range between 0.4 V and 0.6 V.

[0033] Using such a regulation of the voltage across the load path of the transistor, or of the voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit, a low power dissipation can be achieved. Furthermore, by ensuring that the transistor operates in the saturated area, but still with a relatively small voltage across its load path, a particularly good compromise between a quality of the output voltage and a power dissipation can be achieved. For example, by having a regulation of the voltage across the load path of the transistor, it can be achieved that the transistor always operates in a “lower” part of the saturated area, where a power dissipation is comparatively small, but where an output impedance of the transistor is still sufficiently large to achieve a good reduction of distortions.

[0034] Moreover, it should be noted that the same effect can be achieved by regulating the voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit, which may be reasonable if there is another circuit component coupled in series with the load path of the transistor between the input of the power supply filter circuit and the output of the power supply filter circuit.

[0035] In other words, generally speaking, it is advantageous to regulate the voltage across the load path of the transistor or the voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit in such a manner that a transistor reliably operates in the saturated area, but with a reasonably small voltage across its load path.

[0036] However, it has been recognized that the values mentioned above provide good results with many typical types of transistors.

[0037] In a preferred embodiment, the power supply filter circuit is configured such that a bandwidth of a control loop for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit is limited to a value of no more than 10 kHz, or to a value of no more than 5 kHz, or to a value of no more than 1000 Hz, or to a value of no more than 500 Hz, or to a value of no more than 200 Hz, or to a value of no more than 100 Hz, or to a value of no more than 50 Hz.

[0038] By adapting the supply filter circuit in such manner that the bandwidth of the control loop is limited to a certain frequency, it can be achieved that distortions on the input voltage of the power supply filter circuit having frequencies higher than the bandwidth of the control loop will be attenuated, while the output voltage follows variations of the input voltage having frequencies lower (or significantly lower) than the bandwidth of the control loop. Accordingly, the output voltage can follow intended (relatively slow) variations of the input voltage, while unintended (relatively fast) variations of the input voltage (e.g. due to noise or other distortions) do not significantly affect the output voltage.

[0039] Moreover, it has been found that depending on the application, the above-mentioned values for the limitation of the bandwidth of the control loop provide for a good characteristic of the power supply filter circuit, e.g. in terms of an attenuation of noise and distortions.

[0040] In a preferred embodiment, a control loop for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit (e.g. the above mentioned control loop for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit ) comprises (e.g. in a feedback path between a sink terminal of the transistor and an input of a regulator) a low pass filter, wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 10kHz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 5kHz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 1000Hz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 500Hz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 200Hz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 100Hz.The low pass filter may, for example comprise a low pass filter resistor and a low pass filter capacitor. The low pass filter may, for example, comprise a bypass arrangement, e.g. diodes configured to selectively bypass the low pass filter resistor if the voltage across the low pass resistor exceeds a threshold value, or if a magnitude (absolute value) of a voltage across the low pass resistor exceeds a threshold value.

[0041] By introducing a low pass filter into the control loop, the bandwidth of the control loop can be adjusted in a well-controlled manner, which in turn allows to define at which frequency there are transitions from a state in which the output voltage of the power supply filter circuit substantially follows variations of the input voltage of the power supply filter circuit, to a state in which variations of the input voltage (e.g. due to noise or other distortions) are attenuated in the output voltage. Accordingly, it can be achieved that, in a static or quasi-static case (i.e. for a constant input voltage or for a slow variation of the input voltage) the output voltage of the power supply filter circuit is in a predetermined and well-controlled relationship with the input voltage of the power supply filter circuit, while, for faster (e.g. noise-like) variations of the input voltage the output voltage does not (or only in a strongly attenuated manner) follow these variations. Consequently, a good and well-defined behavior of the power supply filter circuit can be achieved.

[0042] In a preferred embodiment, the power supply filter circuit is configured to provide (e.g. using a floating reference voltage source) a floating reference potential which is shifted with respect to a potential at the output of the power supply filter circuit by a predetermined value, and wherein the power supply filter circuit is configured to perform a regulation, in order to bring a potential at a sink terminal of the transistor (e.g. at a drain terminal) or a potential at the input of the power supply filter circuit and the floating reference potential in agreement (e.g. to effect that the potential at the sink (e.g. drain) terminal of the transistor or the potential at the input of the power supply circuit and the floating reference potential are at least approximately equal). Alternatively, the power supply filter circuit may be configured to provide (e.g. using a floating reference voltage source) a floating reference potential which is shifted with respect to a potential at a source terminal of the transistor by a predetermined value, and the power supply filter circuit may be configured to perform a regulation, in order to bring a potential at a sink terminal of the transistor (e.g. at a drain terminal in case of a field effect transistor, or at a collector terminal in the case of a bipolar transistor) or a potential at the input of the power supply filter circuit and the floating reference potential in agreement (e.g. to effect that the potential at the sink terminal of the transistor or the potential at the input of the power supply filter circuit and the floating reference potential are at least approximately equal).

[0043] Alternatively, the power supply filter circuit may be configured to provide (e.g. using a floating reference voltage source) a floating reference potential which is shifted with respect to a potential at the input of the power supply filter circuit by a predetermined value, and the power supply filter circuit may be configured to perform a regulation, in order to bring a potential at a source terminal of the transistor or a potential at the output of the power supply filter circuit and the floating reference potential in agreement (e.g. to effect that the potential at the source terminal of the transistor or the potential at the output of the power supply circuit and the floating reference potential are at least approximately equal).

[0044] Alternatively, the power supply filter circuit may be configured to provide (e.g. using a floating reference voltage source) a floating reference potential which is shifted with respect to a potential at a sink terminal of the transistor by a predetermined value, and the power supply filter circuit may be configured to perform a regulation, in order to bring a potential at a source terminal of the transistor (e.g. at a source terminal in case of a field effect transistor, or at an emitter terminal in the case of a bipolar transistor) or a potential at the output of the power supply filter circuit and the floating reference potential in agreement (e.g. to effect that the potential at the source terminal of the transistor or the potential at the output of the power supply filter circuit and the floating reference potential are at least approximately equal).

[0045] It has been found that using such an arrangement, the voltage difference across the load path of the transistor or the voltage difference between the input and the output of the power supply filter circuit can be regulated in an efficient manner. It has been found that a floating reference potential is advantageous in the present application, since both the voltage at the input of the power supply filter circuit and the voltage at the output of the power supply filter circuit may vary during an operation of the circuit. Moreover, it has been recognized that bringing two potentials, one of which is a floating reference potential, in agreement can be achieved efficiently using a regulation circuit which may, for example, use a difference amplifier (e.g. an operational amplifier).

[0046] Accordingly, it has been recognized that the above mentioned implementations provide a good accuracy and can be implemented with moderate effort.

[0047] In a preferred embodiment, the power supply filter circuit comprises a bypass path (e.g. formed by CR3 and CR4) in parallel to the load path of the transistor, wherein the bypass path is configured to be conductive in case a voltage across the load path of the transistor exceeds a predetermined threshold voltage (e.g. a threshold voltage of a diode, or a combined threshold voltage of a series circuit of a plurality of diodes) and to be non- conductive otherwise.

[0048] The bypass path may, for example, be configured to be conductive in a current direction which is parallel to a current direction through the load path of the transistor in an operational state of the power supply filter circuit. The bypass path may, for example, comprise a diode coupled in parallel with the load path of the transistor, or the bypass path may, for example, comprise a series connection of a plurality of diodes coupled in parallel with the load path of the transistor.

[0049] The bypass path may, for example, be configured to be non-conductive when a voltage across the load path of the transistor is smaller than 1 .5 times a regulation target voltage to which the voltage across the load path of the load path of the transistor is regulated, and the bypass path may, for example, be configured to be conductive when a voltage across the load path of the transistor is larger than 6 times a regulation target voltage to which the voltage across the load path of the transistor is regulated.

[0050] Alternatively or in addition, the bypass path may be configured to transition from a non- conductive state to a conductive state in a voltage range between 0.6V and 3V, or in a voltage range between 1 and 2 . It has been recognized that such a bypass path, which is in parallel to the load path of the transistor, allows for a fast startup of the circuit and also allows for fast variation of the output voltage, which may, for example, be desirable in testing applications when the output voltage of the power supply filter circuit has to be changed rapidly. Moreover, it has been recognized that a bypass path helps to reduce the power dissipation of the transistor and also to some degree protects the transistor from an excess voltage across the load path. Furthermore, it has been recognized that such a bypass path is reasonable due to the specific functionality of the circuit, which is intended to regulate the voltage across the load path of the transistor to a desired and relatively small value (e.g., to operate the transistor in the saturated area). Since, in typical applications, the fluctuations of the input voltage are relatively small, the “normal” fluctuations of the input voltage, which are to be attenuated, will not be sufficient to cause a significant current flow across the bypass path, such that the bypass path does not significantly degrade the effectiveness of the power supply filter circuit in suppressing distortions of the input voltage at the output of the power supply filter circuit. In other words, under the assumption that the bypass path is properly dimensioned, e.g., in such a manner that there is only a current flow through the bypass path if the voltage across the bypass path or the voltage between the input and the output of the power supply filter circuit is larger than the regulation target to which the voltage across the load path of the transistor or the voltage between the input and the output of the power supply filter circuit is regulated, and such that there is no current flow through the bypass path in case of normal fluctuations of the input voltage (e.g. due to noise or other distortions), the bypass path does not degrade the normal operation of the power supply filter circuit but is helpful in case that a fast change (e.g. increase) of the output voltage is desired.

[0051] To conclude, it has been found that the usage of the bypass path significantly improves some characteristics of the circuit without having a substantial negative effect on the suppression of noise and other distortions on the output voltage of the power supply filter circuit.

[0052] In a preferred embodiment, the power supply filter circuit comprises a low pass resistor (e.g. R2), a low pass capacitor (e.g. C2), an operational amplifier (e.g. U1), an integration capacitor (e.g. C3), and an output resistor (e.g. R8). The low pass resistor is coupled between a sink terminal (e.g. a drain terminal) of the transistor (e.g. Q1) and a first terminal of the low pass capacitor (e.g. C2). A second terminal of the low pass capacitor (e.g. C2) is coupled to the reference potential conductor (e.g. ground). A first input terminal of the operational amplifier (e.g. a non-inverting input terminal; e.g. “+”) is coupled with the first terminal of the low pass capacitor (e.g. directly of via one or more resistors, e.g. via R7). A second terminal of the operational amplifier (e.g. an inverting input terminal; e.g. is coupled with a source terminal of the transistor via one or more resistors (e.g. via R5 and R6, or via resistor R6 only), e.g. with a floating reference voltage source, e.g. comprising R3,R4,R5 and U2, in between the source terminal of the transistor and a voltage-to-current- conversion resistor R6, or, for example, without any further circuitry in between the source terminal of the transistor and the voltage-to-current-conversion resistor R6. The second terminal of the operational amplifier is coupled with an output terminal of the operational amplifier via capacitor (e.g. C3), which serves, for example, as an integration capacitor. The output terminal of the operational amplifier is coupled with a first terminal of the control capacitor (e.g. C1) via the output resistor (e.g. R8). The first terminal of the control capacitor (e.g. C1) is coupled with a control germinal (e.g. a gate terminal) of the transistor (e.g. Q1), e.g. directly or with a further resistor, e.g. R9, in between. The second terminal of the control capacitor is coupled with the reference potential conductor (e.g. GND). For example, a series connection of two diodes, e.g. CR3.CR4, is coupled in parallel with the load path of the transistor, e.g. in such a manner that anodes are at a side of a positive power supply (positive with respect to the reference potential conductor) coupled to the input of the power supply filter circuit, or such that cathodes are at a side of a negative power supply (negative with respect to the reference potential conductor) coupled to the input of the power supply filter circuit. For example, a diode, e.g. CR2, is coupled between the first terminal of the control capacitor and a potential which is increased with respect to a potential at the sink terminal of the transistor by a predetermined value (e.g. with an anode coupled to the first terminal of the control capacitor). For example, a diode, e.g. CR2, is coupled between the source terminal of the transistor and the first terminal of the control capacitor (e.g. with a cathode coupled to the first terminal of the control capacitor). For example, an antiparallel circuit of two diodes is coupled in parallel with the low pass resistor. For example, a diode is coupled between the first terminal of the control capacitor and a positive supply voltage terminal of the operational amplifier (e.g. with an anode coupled to the first terminal of the control capacitor). For example, a diode is coupled between the first terminal of the control capacitor and a negative supply voltage terminal of the operational amplifier (e.g. with a cathode coupled to the first terminal of the control capacitor). For example, a negative supply voltage terminal of the operational amplifier is coupled to the source terminal of the transistor. For example, a positive supply voltage terminal of the operational amplifier is coupled to a potential which is, in s static case, shifted with respect to a potential at a drain terminal of the transistor by a predetermined value (e.g. in case of a an active power supply filter circuit for positive voltage). For example, a negative supply voltage terminal of the operational amplifier is coupled to a potential which is, in a static case, shifted with respect to a potential at a drain terminal of the transistor by a predetermined value (and which, for example, follows the potential at the drain terminal of the transistor with a predetermined time constant). For example, a positive supply voltage terminal of the operational amplifier is coupled to a potential which is, in a static case, shifted with respect to the potential at the drain terminal of the transistor by a predetermined value (and which, for example, follows the potential at the drain terminal of the transistor with a predetermined time constant) (e.g. in case of an active power supply filter circuit for negative voltage).

[0053] It has been found that such a circuit brings along the desired results, i.e., a good attenuation (or suppression) of noise and distortions on the input voltage of the power supply circuit, while keeping the implementation effort reasonably small.

[0054] An embodiment according to the invention creates a power supply arrangement, wherein the power supply arrangement comprises a switching power converter (e.g. DC / DC converter), and wherein the power supply arrangement comprises a power supply filter circuit as described above. An output of the switching power converter is coupled to an input of the power supply filter circuit.

[0055] It has been recognized that the power supply filter circuit is well-suited to reduce noise and distortion caused by the operation of the switching power converter. Accordingly, a high power efficiency can be achieved by using the switching power converter for the provision of the input voltage of the power supply filter circuit, and the power supply filter circuit is well-suited to reduce noise and distortions caused by the switching power converter. For example, the power supply filter circuit can be dimensioned in such a manner that the output voltage of the power supply filter circuit can follow relatively slow variations of the input voltage of the power supply filter circuit (i.e. of the output voltage of the switching power converter) with high precision, while comparatively fast (undesired) variations of the input voltage of the power supply filter circuit which are caused by noise and / or other distortions generated by the switching power converter, can be attenuated (or suppressed) efficiently (e.g., with low power dissipation and a comparatively small circuitry).

[0056] For example, the regulation of the power supply filter circuit can be dimensioned in such a manner that the regulation does not follow relatively fast, noise like variations of the input voltage, but follows comparatively slow variations of the input voltage that may be caused by intentional adjustment or regulation of the input voltage. Thus, comparatively fast (e.g., noise like) variations of the input voltage of the power supply filter circuit result in a variation of the voltage across the load path of the transistor, but do not result in a significant variation of the output voltage of the power supply filter circuit. In contrast, slow variations of the input voltage of the power supply filter circuit do not result in a significant variation of the voltage across the load path of the transistor due to the regulation, and therefore result in a corresponding variation of the voltage at the output of the power supply filter circuit. This functionality can be achieved by an appropriate choice of a time constant of the regulation (or, equivalently, by an appropriate choice of a bandwidth of the control loop for the regulation of the voltage across the load path of the transistor or for the regulation of the voltage between the input and the output of the power supply filter circuit).

[0057] To conclude, by appropriately adapting the characteristics of the power supply filter circuit to the characteristics of the switching power converter, e.g., to the characteristics of the noise and distortions generated by the switching power converter, a high quality of the voltage (with low noise and distortions) can be achieved at the output of the power supply filter circuit.

[0058] In a preferred embodiment of the power supply arrangement, a regulation time constant (e.g. defined by an amount of time after which a change of the voltage across the load path caused by a step-wise change of the output voltage of the switching power converter is reduced down to 1 / e of is initial value due to the effect of the regulation) of a regulation loop for regulating the voltage across the load path of the transistor (e.g. a drain-source voltage of the transistor in case of a field effect transistor, or a collector emitter voltage in the case of a bipolar transistor) or the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit is larger, at least by a factor of 2, or at least by a factor of 5, or at least by a factor of 10, or at least by a factor of 20, or at least by a factor of 50, or at least be a factor of 100, or at least by a factor of 200, or at least by a factor of 500, or at least by a factor of 1000, than a period duration of the switching power converter.

[0059] It has been recognized that such a choice of the regulation time constant of the power supply filter circuit can bring along the effect that noise or other distortions of the input voltage that are caused by the operation of the switching power converter can be attenuated efficiently. It has been recognized, that, in many cases, distortions have a frequency that is equal to the switching frequency of the switching power converter or that is a multiple of the switching frequency of the switching power converter. Accordingly, by using the above mentioned choice of the regulation time constant, it can be achieved that the regulation is - intentionally - too slow to follow noise or distortions of the input voltage of the power supply filter circuit that originate from the switching operation of the switching power supply. Accordingly, the output voltage does not follow such noise and distortions caused by the switching operation of the switching power supply, wherein this type of noise and distortions may, in many cases, be dominant.

[0060] In a preferred embodiment of the power supply arrangement, a regulation of the voltage across the load path of the transistor (e.g. a drain-source voltage of the transistor in case of a field effect transistor, or a collector emitter voltage in the case of a bipolar transistor) or of the voltage between an input of the power supply filter circuit and the output of the power supply filter circuit is configured such that the regulation does not regulate out a change of the voltage across the load path of the transistor caused by a ripple voltage of the switching power converter or a change of the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit caused by a ripple voltage of the switching power converter by more than 50 percent (e.g. such that the voltage across the load path of the transistor follows the ripple voltage at least to an amount of 50 percent) or does not regulate out a change of the voltage across the load path of the transistor caused by a ripple voltage of the switching power converter or a change of the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit caused by a ripple voltage of the switching power converter by more than 20 percent (e.g. such that the voltage across the load path of the transistor follows the ripple voltage at least to an amount of 80 percent) or does not regulate out a change of the voltage across the load path of the transistor caused by a ripple voltage of the switching power converter or a change of the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit caused by a ripple voltage of the switching power converter by more than 10 percent (e.g. such that the voltage across the load path of the transistor follows the ripple voltage at least to an amount of 90 percent).

[0061] By dimensioning the power supply filter circuit in such a manner that the regulation does not regulate out changes of the voltage across the load path of the transistor of the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit caused by a ripple voltage of the switching power converter to a large degree, it can be achieved that this ripple voltage of the switching power supply does not significantly affect the output voltage of the power supply filter circuit. Accordingly, a good quality of output voltage of the power supply filter circuit can be achieved.

[0062] Wording it differently, the ripple voltage of the switching power converter is, to a large degree, “absorbed” by changes of the voltage across the load path of the transistor, wherein such changes of the voltage across the load path of the transistor typically do not result in significant variations of the current following through the load path of the transistor, since the transistor is operated in the saturated area, as described above. Consequently, it is possible to obtain a good quality output voltage using a power efficient switching power supply by combining the power efficient switching power supply with the power supply filter circuit and by appropriately dimensioning the revelation of the power supply filter circuit.

[0063] An embodiment according to the invention creates an automated test equipment, wherein the automated test equipment comprises a power supply arrangement as outlined above (or, generally speaking, as outlined herein). The automated test equipment is configured to programmably (e.g. under the control of a test program) vary a voltage provided by the switching power converter, to thereby set a voltage at the output of the power supply filter circuit to a desired value. The power supply filter circuit comprises a fast change mechanism configured to selectively bypass a load path of the transistor (e.g. using diodes CR3 and CR4) and / or to bypass a low pass filter in a regulation loop for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit (e.g. using diodes CR1).

[0064] It has been found that the power supply filter circuit is very well-suited for usage in automated test equipment, since the power supply filter circuit allows for a provision of a high quality (e.g. low noise and / or low ripple) output voltage using compact and power efficient circuitry. As mentioned above, a power efficient switching power converter can be used to provide the input voltage of the power supply filter circuit, and the power supply filter circuit can provide a good quality output voltage without the need for very space consuming passive filter components, like large capacitors and / or inductors, or the like. However, the power supply filter circuit still allows for relatively fast variations of the output voltage which may, in some cases, be desirable in an automated test equipment for testing characteristics of a device under test under varying supply voltage conditions. For example, a fast charge mechanism of the power supply filter circuit may support such a functionality. Consequently, it has been recognized that the advantageous characteristics of the power supply filter circuit make it well-suited for usage in an automated test equipment, wherein it is even possible, e.g., using the fast change mechanism, to have a good timing characteristic of the power supply filter circuit that allows for fast test cycles.

[0065] To conclude, it has been recognized that the power supply filter circuit is good choice for an application in automated test equipment.

[0066] An embodiment according to the invention creates a method for actively filtering a supply voltage comprising a (e.g. periodic) ripple using a power supply filter circuit, wherein the power supply filter circuit comprises a transistor (e.g. a power MOSFET or a bipolar transistor), a control capacitor and a stabilization capacitor, wherein a load path (e.g. a drain-source path or a collector-emitter path) of the transistor is coupled between an input of the power supply filter circuit and an output of the power supply filter circuit, wherein the control capacitor is coupled between a control terminal of the transistor (e.g. a gate terminal in case of a file effect transistor and a base terminal in case of a bipolar transistor) and a reference potential conductor (e.g. a ground line), wherein, for example, a load is coupled (or is to be coupled) between the output of the power supply filter circuit and the reference potential conductor, or wherein, for example, a load is coupled (or is to be coupled) between a source terminal of the transistor and the reference potential conductor, wherein the stabilization capacitor is coupled between a source terminal (e.g. a source terminal in case of a field effect transistor or an emitter terminal in case of a bipolar transistor) of the transistor and the reference potential conductor. The method comprises stabilizing a potential difference between the control terminal of the transistor and the reference potential conductor using the control capacitor, in order suppress (at least partially) a generation of fluctuations of the potential at the control terminal of the transistor by the ripple on the supply voltage that is applied at the input of the power supply filter circuit. The method comprises regulating a voltage across the load path of the transistor (e.g. a drain-source voltage of the transistor in case of a field effect transistor, or a collector emitter voltage in the case of a bipolar transistor) or a voltage between the input of the power supply filter circuit and the output of the power supply filter circuit with a regulation time constant which is longer, at least by a factor of 10, or at least by a factor of 20, or at least by a factor of 50, or at least by a factor of 100, than a period duration of the ripple on the supply voltage that is applied at the input of the power supply filter circuit. An output voltage is obtained at the output of the power supply filter circuit. This method is based on the same consideration as the above described power supply filter circuit. Moreover, the method may optionally be supplemented by any of the features, functionalities and details disclosed herein, also with respect to the apparatuses.

[0067] Brief Description of the

[0068] Embodiments according to the present invention will subsequently be described taking reference to the enclosed figures, in which:

[0069] Fig. 1 shows a block schematic diagram of a power supply filter circuit, according to an embodiment of the present invention;

[0070] Fig. 2 shows a block schematic diagram of a power supply arrangement, according to an embodiment of the present invention;

[0071] Fig. 3 shows a block schematic diagram of an automated test equipment, according to an embodiment of the present invention;

[0072] Fig. 4 shows a block schematic diagram of a power supply filter circuit, according to an embodiment of the present invention;

[0073] Fig. 5a shows a graphic representation of a characteristic curve of a power MOSFET, which can be used in embodiments according to the present invention;

[0074] Fig. 5b shows a graphic representation of a LTSpice simulation model used for plotting the characteristic curve;

[0075] Fig. 6a shows a graphic representation of a signal at an input of the power supply filter circuit, e.g., at the input of an active filter according to an embodiment of the present invention;

[0076] Fig. 6b shows a graphic representation of a signal at an output of the power supply filter circuit, e.g., at an output of an active filter according to an embodiment of the present invention; Fig. 7 shows a block schematic diagram of an active power supply filter for a positive voltage according to an embodiment of the present invention;

[0077] Fig. 8 shows a block schematic diagram of an active power supply filter for a negative voltage, according to an embodiment of the present invention;

[0078] Fig. 9 shows a schematic of an a power supply filter for a positive voltage, according an embodiment of the present invention; and

[0079] Fig. 10 shows a schematic of an active power supply filter for a negative voltage, according to an embodiment of the present invention.

[0080] Detailed Description of the Embodiments

[0081] 1. Power Supply Filter Circuit According to Fig. 1

[0082] Fig. 1 shows a block schematic diagram of a power supply filter circuit 100 according to an embodiment of the present invention. The power supply filter circuit 100 is configured to receive an input voltage at an input 110 and to provide an output voltage at output 112. Moreover, it should be noted that the power supply filter circuit may, for example, be coupled with a reference potential conductor, e.g. with a ground line, wherein the input voltage at the input 110 and the output voltage at the output 112 may be referenced to the potential of the reference potential conductor.

[0083] The power supply filter circuit 100 comprises a transistor 120 which may, for example, be a MOSFET transistor, a bipolar transistor or any other type of transistor. In many cases, a power MOSFET transistor may be a good choice. The power supply filter circuit 100 also comprises a control capacitor 130 and a stabilization capacitor 140. A load path of the transistor (e.g. a drain-source-path of the transistor, in case of a field-effect transistor, or a collector-emitter-path of the transistor, in case of a bipolar transistor) is coupled between the input 110 of the power supply filter circuit 100 and the output 112 of the power supply filter circuit 100. The control capacitor 130 is coupled between a control terminal of the transistor (e.g. a gate terminal of the transistor in case of a field-effect transistor, or a base terminal of the transistor in case of a bipolar transistor) and a reference potential conductor 150. For example, the reference potential conductor may be a ground line. For example, a load (not shown in Fig. 1) is coupled (or is to be coupled) between the output 112 of the power supply filter circuit 110 and the reference potential conductor 150. Alternatively, for example, a load (not shown in Fig. 1) is coupled (or is to be coupled) between a source terminal of the transistor and the reference potential conductor 150. The stabilization capacitor 140 is coupled between a source terminal of the transistor (e.g. a source terminal in case of a field-effect transistor or an emitter terminal in case of a bipolar transistor) and the reference potential conductor 150.

[0084] The power supply filter circuit is configured to regulate a voltage across the load path of the transistor (e.g. a drain-source voltage of the transistor in the case of a field-effect transistor, or a collector-emitter voltage in the case of a bipolar transistor) or a voltage between the input 110 of the power supply filter circuit and the output 112 of the power supply filter circuit. For example, this regulation of the voltage across the load path of the transistor or between the input of the power supply filter circuit and the output of the power supply filter circuit may be effected by a regulation 160, wherein this regulation 160 may, for example, be coupled to the input 110 and to the output 112 of the power supply filter circuit or to the load path terminals of the transistor 120, and wherein this regulation 160 may, for example, provide a control signal (e.g. a control voltage) that is applied to the control terminal of the transistor 120.

[0085] Regarding this issue, it should be noted that, in many cases, the voltage at the input 110 of the power supply filter circuit may be identical to the voltage at a first load path terminal of the transistor 120, and that the voltage at the output 112 of the power supply filter circuit may be identical to the voltage at a second load path terminal of the transistor 120. However, in other embodiments, multiple transistors may be coupled in series, or some components (like, for example, a shunt resistor for a current measurement) may be coupled in between the input 110 of the power supply filter circuit and a first load path terminal of the transistor 120 and / or in between a second load path terminal of the transistor and the output 112 of the power supply filter circuit 110.

[0086] Regarding the functionality of the power supply filter circuit 100, it should be noted that the regulation of the voltage across the load path of the transistor or the regulation of the voltage between the input 110 and the output 112 of the power supply filter circuit brings along the effect that the voltage at the output 112 of the power supply filter circuit follows at least sufficiently slow variations of the voltage at the input 110 of the power supply filter circuit. However, the fact that the load path of the transistor 120 is circuited in between the input 110 of the power supply filter circuit and the output 112 of the power supply filter circuit brings along an attenuation (or even suppression) of noise and distortions on the input voltage that is present at the input 110 of the power supply filter circuit 100. Moreover, the fact that the regulation typically comprises a regulation time constant brings along the advantageous effect that voltage at the output 112 of the power supply filter circuit typically does not follow fast, noise-like fluctuations of the voltage at the input 110 of the power supply filter circuits, such that the power supply filter circuit brings along a significant reduction of noise and distortions.

[0087] Also, I should be noted that the power supply filter circuit 100 can be designed in a very power-efficient manner, which means that a power dissipation of the power supply filter circuit can be kept reasonably small. Also, it has been found that the (physical) size of the components of the power supply filter circuit can be kept reasonably small without significantly compromising the quality of the output voltage at the output 110 of the power supply filter circuit. In other words, the power supply filter circuit 100 typically does not need excessively large passive components, like very large capacitors or inductances. However, it has been found that both the control capacitor 130 and the stabilization capacitor 140 provide a significant contribution to the quality of the output voltage at the output of the power supply filter circuit, wherein the control capacitor 130 helps to reduce fluctuations of the voltage at the control terminal of the transistor 120, which in turn results in a particularly good quality of the voltage at the output 112 of the power supply filter circuit.

[0088] Thus, it becomes apparent that the power supply filter circuit 100 provides for a particularly good comprise between a quality of the output voltage at the output 112, a power dissipation, an implementation effort and a space consumption.

[0089] In the following, some optional aspects will be described which should preferably, but not necessarily, be considered in the implementation of the power supply filter circuit.

[0090] For example, it is preferred that a capacitance of the control capacitor 130 is chosen to be sufficiently large. It has been found that it is advantageous if the capacitance of the control capacitor is larger than or equal to 10 times a transistor-internal capacitance between the control terminal of the transistor (e.g. a gate terminal in case of a field-effect transistor, or a base terminal in case of a bipolar transistor) and the source terminal of the transistor (e.g. a source terminal in case of a field-effect transistor, or an emitter terminal in the case of a bipolar transistor). For example, it is has been recognized that it is advantageous if the capacitance of the control capacitor 130 is larger than or equal to ten times a gate source capacitance of the transistor 120. However, larger choices of the control capacitor 130 may further increase the quality of the output voltage at the output 112 of the power supply filter circuit (wherein larger capacitances of the control capacitor 130 slow down the regulation and increase the implementation effort). However, it has been found that a sufficiently large choice of the capacitance of the control capacitor 130 is typically advantageous.

[0091] Furthermore, it has been recognized that, in some embodiments, it is advantageous to have a resistor coupled in between an output of a regulator (e.g., the regulator 160 that effects the regulation of the voltage across the load path of the transistor or of the voltage between the input 110 and the output 120 of the power supply filter circuit) and the control terminal of the transistor. It has been recognized that such a transistor may contribute to a low pass characteristic of the regulation loop and may also help to avoid the flow of an excessively large current through the control terminal of the transistor.

[0092] Furthermore, it has been recognized that it is particularly advantageous to operate the transistor 120 in a saturated area, and that this can be achieved by an appropriate regulation of the voltage across the load path of the transistor or by an appropriate regulation of the voltage between the input 110 and the output 112 of the power supply filter circuit. Operating the transistor 120 in the saturated area results in a high output impedance (load path impedance) of the transistor 120, which brings along a good attenuation (or suppression) of distortions in the voltage at the output 112 of the power supply filter circuit.

[0093] It has been found that it is advantageous to regulate the voltage across the load path of the transistor or the voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit to a target value that is smaller than or equal to 1 V. Using such a regulation, the power dissipation of the power supply filter circuit can be kept reasonably small. Moreover, it has been recognized that, for many types of transistors, it is particularly advantageous to have a target voltage for the voltage across the load path of the transistor, or for the voltage between the input 110 and the output 112 of the power supply filter circuit, which lies between 0.3 V and 0.8 V, or between 0.4 V and 0.6 V. Such a target value ensures, for many types of transistors, that the transistor operates in the saturated area and that the power dissipation of the power supply filter circuit is kept at a very large value. Consequently, the choice of such target values for the regulation brings along a particularly good compromise between a quality of the output voltage at the output 112 of the power supply filter circuit and the power dissipation. It has also been recognized that it is advantageous to design the power supply filter circuit in such a manner that the bandwidth of the control group for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit is limited. By limiting the bandwidth of the control loop, it can be achieved that the output voltage at the output 112 of the power supply filter circuit 100 does not follow variations of the input voltage at the input 110 having a frequency that is higher than the bandwidth of the control loop (or only follows such variations of the voltage at the input 110 in a substantially attenuated manner). Accordingly, the frequency to which the bandwidth of the control loop is limited determines which portion of the noise and distortions on the input voltage at the input 110 is attenuated in the voltage at the output 112. It has been recognized that, depending on the specific application and also depending on the quality of the voltage at the input 110, it is reasonable to limit the bandwidth of the control loop to a value of no more than 10 kHz, or to a value of no more than 5 kHz, or to a value of no more than 1 kHz, or to a value of no more than 500 Hz, or to a value of no more than 200 Hz, or to a value of no more than 100 Hz, or to a value of no more than 50 Hz.

[0094] Moreover, it has been recognized that it is advantageous to limit the bandwidth of the control loop using a low pass filter, since usage of a low pass filter results in a well-defined limitation of the bandwidth. For example, it has been recognized that, depending on the application and depending on the characteristics of the input voltage at the input 110, the usage of a low pass filter having a cutoff frequency which is smaller than or equal to 10 kHz, or having a cutoff frequency which is smaller than or equal to 5 kHz, or having a cutoff frequency which is smaller than or equal to 1 kHz, or having a cutoff frequency which is smaller than or equal to 500 Hz, or having a cutoff frequency which is smaller than or equal to 200 Hz, or having a cutoff frequency which is smaller than or equal to 100 Hz is appropriate.

[0095] By using a dedicated low pass filter, a well-defined characteristic of the control loop (for regulating the voltage across the load path of the transistor or for regulating the voltage between the input 110 and the output 112 of the power supply filter circuit 100) can be achieved, which in turn results in a well-defined characteristic of the reduction of noise and distortions in the voltage at the output 112 of the power supply filter circuit. However, it should be noted that the power supply filter circuit 100 according to Fig. 1 may optionally be supplemented by any of the features, functionalities and details discussed herein, both individually and taken in combination.

[0096] 2. Power Supply Arrangement According to Fig. 2

[0097] Fig. 2 shows a block schematic diagram of a power supply arrangement 200 according to an embodiment of the present invention.

[0098] The power supply arrangement 200 comprises a switching power converter 210 and a power supply filter circuit 220. For example, an output 212 of the switching power converter 210 may be coupled to an input 222 of the power supply filter circuit 220. The output 224 of the power supply filter circuit 220 may, for example, be coupled to an output 214 of the power supply arrangement and may therefore provide the output voltage of the power supply arrangement. For example, a reference potential conductor of the power supply filter circuit 220 may be coupled with a reference potential conductor of the switching power converter 210, and may also be coupled with a reference potential conductor 216 of the power supply arrangement 200.

[0099] In particular, it should be noted that the power supply filter circuit 220 may, for example, correspond to the power supply filter circuit 100 according to Fig. 1 .

[0100] Furthermore, it should be noted that the power supply filter circuit 220 may, for example, be adapted to the characteristics of the switching power converter 210 and also to the characteristics of a load, which may, for example, be coupled between the output 214 of the power supply arrangement and the reference potential conductor 216 of the power supply arrangement 200.

[0101] For example, the power supply filter circuit 220 may be adapted to attenuate or suppress noise and distortions which are present in the output voltage of the switching power converter 210, such that the voltage at the output 224 of the power supply filter circuit 220 comprises a reduced amount of noise and distortions when compared to a voltage at the input 222 of the power supply filter circuit. Accordingly, the power supply arrangement 200 allows for the usage of a switching power converter 210 comprising a high efficiency, wherein noise and / or distortions in the output voltage of the switching power converter 210, which is present at the output 212 of the switching power converter 210, are attenuated or even suppressed by the power supply filter circuit 220, such that a high quality output voltage is provided at the output 214 of the power supply arrangement.

[0102] The usage of the active power supply filter circuit 220 reduces the demand for the quality of the output voltage of the switching power converter 210, which allows for an implementation of the switching power converter 210 with low implementation effort and high efficiency, wherein a required space (or volume) of the switching power converter 210 can be kept reasonably low. Moreover, the power supply filter circuit 220, which corresponds to the power supply filter circuit 100, allows for a reaction of noise and / or distortions with low power dissipation and typically also with a low implementation effort and a small space (or volume) consumption.

[0103] In particular, the power supply filter circuit 220 can be designed in such a manner that it attenuates or suppresses the most relevant portions of the noise and distortion that are provided by the switching power converter 210 while still allowing the output voltage 214 of the power supply arrangement to follow changes of the output voltage at the output 212 of the switching power converter 210. Accordingly, by the combination of the switching power converter 210 and the power supply filter circuit 220, a good quality of the output voltage at the output 214 of the power supply arrangement 200 can be achieved, wherein, at the same time, a high efficiency, a low power dissipation and a low implementation effort are provided.

[0104] As an example, a graphic representation of an output voltage of the switching power converter is shown at reference numeral 270, and a graphic representation of an output voltage of the power supply filter circuit is shown at reference numeral 272. In both cases, an abscissa describes a time, and an ordinate describes the voltage. It can be seen that the output voltage of the switching power converter comprises a substantial amount of distortions, while the output voltage of the power supply filter circuit only comprises a small amount of distortions, an amplitude of which is significantly smaller than an amplitude of the distortions on the output voltage of the switching power converter.

[0105] Moreover, it should be noted that it is advantageous to choose a regulation time constant of the regulation within the power supply filter circuit 220 in a manner that is adapted to characteristics of the switching power converter 210 and / or to characteristics of the output voltage at the output 212 of the switching power converter 210. For example, it may be advantageous to adapt a regulation time constant of a regulation loop for regulating the voltage across the load path of the transistor of the power supply filter circuit or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit to be larger than a period duration of the switching power converter. For example, it may be advantageous if said regulation time constant is larger, at least by a factor of 2, or at least by a factor of 5, or at least by a factor of 10, or at least by a factor of 20, or at least by a factor of 50, or at least by a factor of 100, or at least by a factor of 200, or at least by a factor of 500, or at least by a factor of 1000, than a period duration of the switching power converter. For example, since, in many cases, some distortions at the output 212 of the switching power converter 210 are caused by the switching, and may have a periodicity which is related to the duration of the switching period of the switching power converter 210, it may be advantageous to choose the regulation time constant of the regulation within the power supply filter circuit to be in a relationship with said duration of the switching period. By choosing the regulation time constant of the power supply filter circuit 220 to be significantly larger than the duration of the switching period of the switching power converter 210, distortions having a periodicity which is related to the duration of the switching period can be well-attenuated (or even suppressed) by the power supply filter circuit.

[0106] To conclude, a good adaptation of the power supply filter circuit to the characteristics of the switching power converter allows to obtain a high quality of the output voltage at the output 214 of the power supply arrangement.

[0107] Moreover, it should be noted that the power supply arrangement 200 may optionally be supplemented by any of the features, functionalities and details disclosed herein, both individually and taken in combination.

[0108] 3. Automated Test Equipment According to Fig. 3

[0109] Fig. 3 shows a block schematic diagram of an automated test equipment 300, according to an embodiment of the present invention. The automated test equipment 300 comprises a power supply arrangement 310 which may, for example, correspond to the power supply arrangement 200 according to Fig. 2. For example, the power supply arrangement 300 may receive a control signal for the switching power converter, wherein this control signal may define a desired voltage setting and / or a defined voltage variation and may, for example, originate from a test processor of the automated test equipment of from any other control unit of the automated test equipment. Moreover, the output voltage at an output 312 of the power supply arrangement may, for example, be provided at an output port 320 of the automated test equipment. The output voltage at the output port 320 of the automated test equipment may, for example, be routed to a device under test, e.g. on a load board that is attached to the automated test equipment.

[0110] For example, the automated test equipment is configured to programmably set or vary a voltage provided by the switching power converter of the power supply arrangement 310, to thereby set a voltage at the output of the power supply filter circuit to a desired value. This voltage at the output of the power supply filter circuit may then be forwarded to the output port 320 of the automated test equipment, and may constitute a supply voltage for a device under test.

[0111] The power supply filter circuit may, for example, comprise a fast change mechanism configured to selectively bypass a load path of the transistor and / or to bypass a low pass filter in a regulation loop for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit. Accordingly, it may be possible to rapidly reach a desired voltage at the output port 320 of the automated test equipment, even though the power supply filter circuit “normally” counteracts rapid changes of the output voltage at the output port 320. Consequently, it is possible to provide a good quality output voltage at the output port of the automated test equipment while still having fast (short) test cycles.

[0112] Moreover, it should be noted that the automated test equipment 300 may optionally be supplemented by any of the features, functionalities and details disclosed herein, both individually and taken in combination.

[0113] 4. Power Supply Filter Circuit According to Fig. 4

[0114] Fig. 4 shows a block schematic diagram of a power supply filter circuit according to an embodiment of the invention. The power supply filter circuit is designated with 400 and comprises an input (or voltage input) 410 and comprises an output or voltage output 412. Fig. 4 shows, as an example, a high current, high voltage source 480, wherein output 482 of the high current, high voltage source 480 is coupled to the input 410 of the power supply filter circuit 400. For example, the high current, high voltage source may be, or may comprise, a DC / DC converter. It can be assumed that the high current, high voltage source 480 provides a DC supply voltage VDC, onto which a noise voltage VNOISE is overlapped. Accordingly, it can be assumed that the voltage at the input 410 of the power supply filter circuit 400 may, for example, be a high noise supply voltage.

[0115] Moreover, it can be assumed that a load 490 is coupled to the output 412 of the power supply filter circuit 400, e.g. between the output 412 of the power supply filter circuit 400 and a reference potential conductor.

[0116] The power supply filter circuit 400 comprises a MOSFET 420, wherein a drain terminal of the MOSFET 420 is coupled with the input 410 of the power supply filter circuit and wherein a source terminal of the MOSFET 420 is coupled with the output 412 of the power supply filter circuit 400. Accordingly, a load path (drain-source path) of the MOSFET is in between the input 410 and the output 412 of the power supply filter circuit 400. It should be noted that in the present embodiment the MOSFET 420 is an N-channel MOSFET.

[0117] The power supply filter circuit 400 further comprises a control capacitor 430, wherein a first terminal of the control capacitor 430 is coupled with a gate terminal of the MOSFET 420, and wherein a second terminal of the control capacitor 430 is coupled with a reference potential conductor, e.g. with a ground conductor GND. The power supply filter circuit 400 further comprises a stabilization capacitor 440, wherein a first terminal of the stabilization capacitor 440 is coupled with the source terminal of the MOSFET 420, and wherein a second terminal of the stabilization capacitor is coupled with the reference potential conductor (e.g. with the ground conductor GND).

[0118] The power supply filter circuit 400 also comprises a regulator 460, wherein the regulator 460 is configured to regulate a difference between a low pass filtered version 470 of the input voltage at the input 410 (or of the voltage at the drain terminal of the MOSFET 420) and a reference voltage 472. For example, the regulator 460 may be configured to perform the regulation in order to bring the difference between the low pass filtered version 470 of the input voltage and the reference voltage 472 towards zero (or to zero). For example, the low pass filtered version 470 of the input voltage is derived from the input voltage at the input 410 of the power supply filter circuit 400 or from the voltage at the drain terminal of the MOSFET 420 using a low pass filter 474, wherein said low pass filter 474 may, for example, comprise a low pass filter resistor 474a and a low pass filter capacitor 474b. For example, the low pass filter resistor 474a may be coupled in series between an input 474c of the low pass filter and an output 474d of the low pass filter. The low pass filter capacitor 474b may, for example, be coupled between the output 474d of the low pass filter 474 and the ground conductor GND. For example, the reference voltage 472 may be derived from the output voltage at the output 412 of the power supply filter circuit 420 or from the voltage at the source terminal of the MOSFET 420 using a potential shift, wherein this potential shift may, for example, be effected by a floating voltage reference 476. For example, the floating voltage reference 476 may take the function of a voltage source which is coupled in between the output 412 of the power supply filter circuit (or the source terminal of the MOSFET 420) and an input of the regulator 460. The power supply filter circuit 400 may comprise a subtraction functionality 478 that allows to regulate the difference between the low pass filtered version 470 of the input voltage and the reference voltage 472 towards a desired target value (e.g. towards zero) or to the desired target value (e.g to zero). An output of the regulator 460 is coupled with the gate terminal of the MOSFET 420.

[0119] In the following, the functionality of the power supply circuit 400, which may be considered as an active power supply filter, will be described. However, it should be noted that the MOSFET 420 may correspond to the transistor 120, that the control capacitor 430 may correspond to the control capacitor 130, that the stabilization capacitor 440 may correspond to the stabilization capacitor 140 and that the regulator 460, the low pass filter 474 and the floating voltage reference 476, and the (optional) subtraction functionality 478 may correspond to the regulation 160.

[0120] As can be seen from Fig. 4, the output voltage of the high current high voltage source 480 is applied to the input 410 of the power supply filter circuit 400 and that the load 490 is coupled to the output 412 of the power supply filter circuit 400. A supply current provided by the high current high voltage source 480 flows towards the load 490 through the drainsource path of MOSFET 420. Moreover, it should be noted that the current that flows through the drain source path of the MOSFET 420 is typically relatively insensitive to changes of the drain source voltage of the MOSFET 420, provided that MOSFET 420 is operated in the active area of its output characteristic field. Due to the effect of control capacitor 430 and of the stabilization capacitor 440, and also due to the limited bandwidth of the regulation loop, relatively fast fluctuations of the voltage at the input 410 of the power supply filter circuit 400, which may be caused by noise and / or distortions of the supply voltage provided by the high current high voltage source 480, do not significantly affect the voltage at the output 412 of the power supply filter circuit, but rather merely result in a variation of the drain source voltage of the MOSFET 420. In other words, the high output impedance of the MOSFET 420 results in a decoupling of noise and distortions that are present on the input voltage of the power supply filter circuit 400 from the output 412 of the power supply filter circuit. The control capacitor 430 and the stabilization capacitor 440 contribute to maintaining the gate source voltage of the MOSFET 420 substantially constant in the presence of such noise and / or distortions on the voltage at the input 410 of the power supply filter circuit, which contributes to the provision of a low noise / low distortion voltage at the output 412 of the power supply filter circuit.

[0121] However, it should also be noted that the (average) drain source voltage of the MOSFET 420 is regulated using the regulator 460, wherein the target drain source voltage is, for example, determined by the floating voltage reference 476. Accordingly, the regulator 460 may, effectively, provide the gate voltage of the MOSFET 420 to bring the (average) drain source voltage of the MOSFET 420 towards the target drain source voltage. This target drain source voltage is typically chosen such that the MOSFET 420 operates in an active area of its output characteristic field, and such that a voltage drop across drain source path of the MOSFET 420 is reasonably low. Consequently, the voltage at the output 412 of the power supply filter 400 follows the (average) voltage at the input 410 of the power supply filter circuit (e.g., with a good steady-state accuracy). However, due to the limited bandwidth of the regulation loop for regulating the drain source voltage of the MOSFET 420, which is, for example, predominately determined by the low pass filter 474, the drain source voltage of the MOSFET 420 is intentionally not kept constant in the case of fast fluctuations of the voltage at the input 410 of the power supply filter circuit (wherein such fast fluctuations of the voltage at the input 410 of the power supply filter circuit may, for example, be caused by a noise and distortions).

[0122] In other words, the regulation that regulates the drain source voltage of the MOSFET 420 to the desired value is intentionally too slow to follow fast fluctuations of the input voltage at the input 410 of the power supply filter circuit, wherein, as a consequence, such fast fluctuations of the input voltage at the input 410 of the power supply filter circuit only result in a variation of the drain source voltage of the MOSFET 420 without substantially affecting the voltage at the output 412 of the power supply filter circuit.

[0123] In the following, the functionality of the circuit will be further explained taking reference to Figs. 5a, 5b, 6a and 6b. For example Fig. 5a shows a graphic representation of a characteristic curve of a power MOSFET (e.g. of type BSC320N20NS3), as simulated by LTSpice. The graphic representation of the characteristic curve of the power MOSFET e.g., of the power MOSFET 420, is designated with 500. An abscissa 510 describes the drain source voltage, and an ordinate 512 describes the drain current. The graphic representation 500 shows output curves 520, 522, 524 for different gate source voltages. As can be seen, for a drain source voltage of 0.5 volt, the power MOSFET operates in a saturated area (with a high output impedance) over a wide range of gate source voltages.

[0124] For example, the drain source voltage of 0.5 volt may be chosen as a regulation target (e.g., for the regulator 460), wherein such a regulation of the (average) drain source voltage has the effect that the power MOSFET is operated in the saturated area over a wide range of gate source voltages (and consequently over a wide range of gate source currents). Moreover, it can be assumed that the drain source voltage of the MOSFET 420 varies around the average value of 0.5 volt defined by the regulation target due to fluctuations of the input voltage at the input 410 of the power supply filter circuit caused by noise or other distortions. However, the regulation target (e.g., of 0.5 V) is preferably chosen in such a manner that for any “normal” fluctuations of the input voltage at the input 410 of the power supply filter circuit, the transistor 420 remains in a saturated area, with a high output impedance (i.e., with a small slope of the drain current over the drain source voltage). As a consequence of such a dimensioning, fast (high-frequent) fluctuations of the input voltage do not significantly affect the output voltage at the output 412 of the power supply filter circuit but only result in fluctuations of the drain source voltage of the MOSFET 420.

[0125] Thus, a good attenuation of noise and distortions on the input voltage of the power supply filter circuit can be achieved, in particular for noise and distortions having frequencies that are higher than the bandwidth of the regulation loop. In contrast, relatively slow variations of the average input voltage of the power supply filter circuit will have the effect that the output voltage of the power supply filter circuit follows these slow variations of the average input voltage, with a voltage shift defined, for example, by the floating voltage reference 476. Thus, the operation point (in particular the average drain source voltage voltage of the MOSFET) will remain constant in such a case.

[0126] As an additional remark, it should be noted that the characteristic curve of the power MOSFET shown in Fig. 5a has been determined using a LTSpice simulation model as shown in Fig. 5b, at reference number 550. In other words, the output characteristic curve of the power MOSFET, which is shown in Fig. 5a, has been created using a variation of the drain source voltage of the power MOSFET, wherein the gate source voltage is set to a plurality of, for example, three discrete values.

[0127] However, it should be noted that different power MOSFETs comprise similar characteristics, even though some details may vary.

[0128] In the following, an effectiveness of the power supply filter circuit 400 will be illustrated taking reference to Figs. 6a and 6b. For example, Fig. 6a and 6b show graphic representations of a noise on the input voltage (Fig. 6a) and on the output voltage (Fig. 6b) of the power supply filter circuit 400. The noise was measured by an oscilloscope, with a resolution of 5mil ivolt / div at a time resolution of 500ps / div. A 20MHz filter bandwidth was used.

[0129] For example, Fig. 6a shows a graphic representation of a noise at the active filter input. An abscissa 610 describes a time and an ordinate 612 describes a voltage. As can be seen, a peak-to-peak voltage of the distortion at the active filter input is approximately 32 mV. Fig. 6b shows a graphic representation of the noise measured at an active filter output. An abscissa 620 describes the time and ordinate 622 describes the voltage. As can be seen in Fig. 6b, a peak-to-peak voltage of the noise is approximately 6 mV. Thus, it can be recognized that the power supply filter circuit 400 can attenuate the noise at the active filter output when compared to the noise at the active filter input by approximately a factor of five (in terms of a peak-to-peak voltage).

[0130] However, it is apparent that different effects (and effectiveness) can be achieved using a different dimensioning of the power supply filter circuit. Moreover, the attenuation of the noise and / or other distortion naturally also depends on the frequency content of the noise and / or of the distortions.

[0131] Moreover, it should be noted that the power supply filter circuit 400 according to Fig. 4 may optionally be amended in different manners.

[0132] For example, the MOSFET may optionally be replaced by a bipolar transistor. Also, the polarity of the voltages may naturally be reversed, wherein the transistor type may be changed from an N-channel transistor to a P-channel transistor. Moreover, the structure of the regulator may be modified, wherein it should be noted that the structure shown in Fig. 4 should be considered as an abstract example only. Furthermore, any of the features, functionalities and details described herein may optionally be introduced into the power supply filter circuit 400 according to Fig. 4.

[0133] Also, features discussed with respect to the power supply filter circuit 400 may optionally be introduced into any other embodiments, both individually and taken in combination.

[0134] 5. Power Supply Filter Circuit According to Fig. 7

[0135] Fig. 7 shows a block schematic diagram of a power supply filter circuit, according to another embodiment of the present invention. The power supply filter circuit 700 is designated with 700.

[0136] The power supply filter circuit 700 is similar to the power supply filter circuit 400. For example, the power supply filter circuit 700 comprises an input 710 which corresponds to the input 410, and an output 712 which corresponds to the output 412. The power supply filter circuit 700 also comprises a MOSFET 720, which corresponds to the MOSFET 420. The power supply filter circuit 700 further comprises a control capacitor 730 which corresponds to the control capacitor 430 and the stabilization capacitor 740 that corresponds to the stabilization capacitor 440.

[0137] It should be noted that it is assumed that the input voltage at the input 710 of the power supply filter circuit 700 is positive with respect to a reference potential at reference potential conductor (or ground conductor) GND. Accordingly, the MOSFET 720 is preferably an N- channel MOSFET (NMOS).

[0138] Moreover, it should be noted that an actual implementation of the regulator 760, which provides the gate voltage for the MOSFET 720, differs slightly from the regulator 460, even though a fundamental functionality remains unchanged. The regulation, which provides the gate voltage for the MOSFET 720, comprises, for example, an integral regulator, which is formed using a differential amplifier (e.g. an operational amplifier) 762, an integration capacitor 764 and a resistor 766. For example, a reference voltage 772 is provided, which is shifted with respect to the voltage at the source terminal of the MOSFET 720 (or, eguivalently, with respect to the voltage at the output 712 of the power supply filter circuit) by a predetermined value, e.g., by VREF. For example, a floating voltage reference 776 may be used, wherein a first terminal of said floating voltage reference 776 (e.g., a positive terminal) may be coupled to an input (e.g., an inverting input) of the differential amplifier 762 via the resistor 766. A second terminal (e.g. a negative terminal) of the floating voltage reference 776 may, for example, be coupled with the source terminal of the MOSFET 720 (or, equivalently, with the output 712 of the power supply filter circuit 700). The integration capacitor 762 may, for example, be coupled between the second input (e.g. the inverting input) of the differential amplifier 762 and the output of the differential amplifier 762, wherein the output of the differential amplifier 762 is also coupled with the gate terminal of the MOSFET 720.

[0139] A low pass filter 774 may, for example, be coupled between the drain terminal of the MOSFET 720 (or, equivalently, the input 710 of the power supply filter circuit 700) and a first input (e.g. a non-inverting input) of the differential amplifier 762. The low pass filter 774 may, for example, comprise a low pass filter resistor 774a and a low pass filter capacitor 774b. For example, the low pass filter resistor 774a is coupled in between the drain terminal of the MOSFET 720 and the first (e.g. non-inverting) input of the differential amplifier 762, and the low pass filter capacitor 774b is coupled between the first (e.g. non-inverting) input of the differential amplifier 762 and the reference potential conductor (or ground conductor) GND.

[0140] Accordingly, the voltage at the first (e.g. non-inverting) input of the differential amplifier 762 is a low pass filtered version of the voltage at the input of the power supply filter circuit 700 (or, equivalently, of the voltage at the drain terminal of the MOSFET), and the voltage at a first terminal of the resistor 766 is a voltage-shifted version of the voltage at the output 712 of the power supply filter circuit 700 (or, equivalently, of the voltage at the source terminal of the MOSFET 720). Accordingly, the regulation, which is performed using the differential amplifier 762 (and which is supported by the integrating capacitor 764) is operative to bring a potential at the drain terminal of the MOSFET 720 in agreement with the voltage-shifted potential at the first terminal of the floating voltage reference 776. Accordingly, as a consequence, the regulation is operative to bring the voltage between the drain terminal of the MOSFET 720 and the source terminal of the MOSFET 720 in agreement with the voltage of the floating voltage reference 776. Thus, as an effect, the drain source voltage is regulated to be equal to the reference voltage VREF at least in steady state conditions. The low pass filter 774 intentionally prevents a fast regulation, which helps to reject noise of the supply voltage that is applied to the input 710 of the power supply filter circuit. However, it should be noted that the power supply filter circuit 700 according to Fig. 7 may optionally be supplemented by any of the features, functionalities, and details disclosed herein, both individually and taken in combination.

[0141] 6. Power Supply Filter Circuit According to Fig. 8

[0142] Fig. 8 shows a block schematic diagram of a power supply filter circuit 800, according to an embodiment of the invention. The power supply filter circuit 800 according to Fig 8 is similar to the power supply filter circuit 700 according to Fig. 7. The power supply filter circuit 800 comprises an input 810, which corresponds to the input 710, and an output 812, which correspond to the output 712. Moreover, the power supply filter circuit 800 comprises a MOSFET 820, which takes a similar functionality like the MOSFET 720, but which is of an opposite type (P-channel MOSFET or “PMOS”). The power supply filter circuit 800 also comprises a control capacitor 830, which corresponds to the control capacitor 730, and a stabilization capacitor 840, which corresponds to the stabilization capacitor 740. The power supply filter circuit 800 also comprises a regulator 860, which is similar to the regulator 760, but which comprises a different circuit structure.

[0143] It should be noted that the power supply filter circuit 800 is configured to filter an input voltage which is negative with respect to a reference potential at the reference potential conductor (or ground conductor) GND. Accordingly, a P-channel MOSFET 820 is used, rather than an N channel MOSFET.

[0144] The regulation comprises a differential amplifier (e.g. an operational amplifier) 862, wherein an output of the differential amplifier, (e.g. of the operational amplifier) is coupled to the gate of the MOSFET 820. An integration capacitor 864 is coupled between a second (e.g. inverting) input of the differential amplifier 862 and the output of the differential amplifier 862. Moreover, it should be noted that the source terminal of the MOSFET 820 is coupled with the second (e.g. inverting) input of the differential amplifier 862 via a resistor 866, wherein the resistor 866 converts the voltage difference between the source terminal of the MOSFET 820 and the second (e.g. inverting) input of the differential amplifier 862 into a current that is integrated on the integration capacitor 864.

[0145] The voltage at the drain terminal of the MOSFET 820 is shifted, e.g., in a positive direction, using a floating voltage reference 876. Accordingly, a shifted version of the voltage at the drain terminal of the MOSFET 820 is present at a first terminal 872 of the floating voltage reference 876. The first terminal of the floating voltage reference 876 is coupled with the first input (e.g. non-inverting input) of the differential amplifier 862 via a low pass filter 874, wherein a low pass filter resistor 874a is coupled between the first terminal of the floating voltage reference 876 and the first input (e.g. non-inverting) input of the differential amplifier 862. The low pass filter capacitor 874b is coupled between the first input (e.g. non-inverting input) of the differential amplifier 862 and the reference potential conductor or ground conductor GND. The second terminal of the floating voltage reference 876 is coupled to the drain terminal of the MOSFET 820 (or, equivalently, to the input 810 of the power supply filter circuit). Accordingly, a shifted and low pass filtered version of the voltage at the drain terminal of the MOSFET 820 is applied to the first input of the differential amplifier 862.

[0146] The differential amplifier, when taken in combination with the integration capacitor 864, performs a regulation functionality. The regulation functionality is operative to bring the potential at the first input of the differential amplifier 862 and the potential at the second input of the differential amplifier into agreement, which effectively means that the regulation brings the gate source voltage of the MOSFET 820 towards a voltage defined by the floating voltage reference 876 (or to the voltage defined by the floating voltage reference 876). Accordingly, a similar basic functionality is achieved like for the power supply filter circuit 700.

[0147] However, it should be noted that the power supply filter circuit 800 may optionally be supplemented by any of the features, functionalities and details disclosed herein, both individually and taken in combination.

[0148] 7. Power Supply Filter Circuit According to Fig. 9

[0149] Fig. 9 shows a schematic diagram of a power supply filter circuit according to an embodiment of the present invention. The power supply filter circuit 900 according to Fig. 9 comprises an input 910, which may correspond to the input 410, 710, 810. The power supply filter circuit 900 also comprises an output 912, which may correspond to the output 412, the output 712 and the output 812.

[0150] For example, the output 910 is intended for the application of a positive voltage (positive with respect to a reference potential at a reference potential conductor or ground conductor GND), wherein this positive voltage may, for example, be provided by a DC / DC converter. A load is to be coupled between the output 912 and the reference potential conductor or ground conductor GND. An N-channel MOSFET 920 is coupled between the input 910 and the output 912, wherein a drain terminal of the MOSFET 920 is coupled with the input and wherein a source terminal of the MOSFET 920 is coupled with the output 912. A bypass circuit 922 is coupled in parallel with the drain source path of the MOSFET 920, wherein this bypass circuit 920 may, for example, comprise a series circuit of two (or more) diodes. For example, an anode of a first diode 922a is coupled with the drain terminal of the MOSFET 920, a cathode of the first diode 922a is coupled with an anode of a second diode 922b, and a cathode of the second the diode 922b is coupled with the source terminal of the MOSFET 920. Accordingly, the diodes are directed to be conductive in the “normal” current flow direction through the drain source path of the MOSFET 920 (from the drain terminal to the source terminal). Thus, the bypass circuit 922 becomes conductive when the drain source voltage of the MOSFET 920 exceeds the sum of the threshold voltages of the diodes 922a, 922b. In other words, when the voltage at the input 910 of the power supply filter circuit exceeds the voltage at the output 912 of the power supply filter circuit 900 by more than the sum of the threshold voltages of the diodes 922a, 922b, a current will flow through the bypass circuit 922, bypassing the drain source path of the MOSFET 920. Thus, the drain source voltage of the MOSFET 920 will typically not significantly exceed the sum of the threshold voltages of the diodes 922a, 922b of the bypass circuit 922. However, it should be noted that the bypass circuit could, for example, comprise only a single diode, or could comprise a series circuit of more than two diodes.

[0151] The power supply filter circuit 900 also comprises a control capacitor 930 and a stabilization capacitor 940, wherein the control capacitor 930 corresponds to the control capacitors 430, 730, 830, and wherein the stabilization capacitor 940 corresponds to the stabilization capacitors 440, 740, 840. However, it should be noted that a gate resistor 932 is coupled between a first terminal of the control capacitor 930 and the gate terminal of the MOSFET 920. The power supply filter circuit 900 also comprise a regulator 960, which comprises, as a core component, a differential amplifier or operational amplifier 962. An integration capacitor 964 is coupled between a second, inverting input of the differential amplifier 972 and an output of the differential amplifier 972. A further resistor 965 is coupled between the output of the differential amplifier 962 and the first terminal of the control capacitor 930 (wherein the second terminal of the control capacitor 930 is coupled with the reference potential conductor or ground conductor GND). The power supply filter circuit 900 comprises a low pass filter 974, wherein an input of the low pass filter is coupled with the drain terminal of the MOSFET 920, and wherein an output of the low pass filter is coupled with the first (non-inverting) input of the differential amplifier 962 via a resistor 975. The low pass filter comprises a low pass filter resistor 974a, which is coupled between the drain terminal of the MOSFET 920 and the output of the low pass filter. The low pass filter 974 further comprises a low pass filter capacitor 974b which is coupled between the output of the low pass filter 974 and the reference potential conductor or ground conductor GND. Thus, the low pass filter 974 comprises a first-order RC low pass filter.

[0152] However, the low pass filter 974 also comprises a bypass circuit 974c, wherein the bypass circuit 974c comprises an antiparallel circuit of two diodes, which is coupled in parallel with the low pass filter resistor 974a. Accordingly, the bypass circuit 974c becomes conductive and bypasses the low pass filter resistor 974a if the voltage across the low pass filter resistor 974a becomes larger than a threshold voltage of a respective diode. Accordingly, it is achieved that the low pass filter capacitor 974 is quickly reloaded if the voltage at the drain terminal of the MOSFET 920 quickly changes by more than the threshold voltage of the respective diode of the bypass circuit 974c. However, when the difference between the voltage at the drain terminal of the MOSFET 920 and the voltage at the first terminal of the low pass filter capacitor 974 becomes smaller than the threshold voltage of the respective diodes of the bypass circuit 974c, the bypass circuit 974c becomes substantially non- conductive and the low pass filter resistor 974a becomes effective again. Accordingly, a reload time constant for reloading the low pass filter capacitor 974b is significantly reduced by the bypass circuit 974c for the case of large quick variations of the drain voltage of the MOSFET 920, but the low pass filter becomes effective with a time constant defined by the resistance of the low pass filter resistor 974a and by the capacitance of the low pass filter capacitor 974b as soon as the voltage at the first terminal of the low pass filter capacitor 974b is sufficiently close to the voltage at the drain terminal of the MOSFET 920. Worded yet differently, the bypass circuit 974c only becomes effective in the case of fast and large (larger than the threshold voltage of the diodes of the bypass circuit 974c) variations of the voltage at the drain terminal of the MOSFET 920.

[0153] The power supply filter circuit 900 further comprises a floating voltage reference 976. The floating voltage reference 976 comprises a Zener diode 976a and a bias resistor 976b, wherein the bias resistor 976b and the Zener diode 976a are coupled in series between a positive supply voltage of the differential amplifier 962a and the source terminal of the MOSFET 920 (wherein the source terminal of the MOSFET 920 is coupled with a (negative) supply voltage terminal of the differential amplifier 962, and with the anode of the Zener diode 976a). Accordingly, a potential at a first terminal (e.g. a cathode) of the Zener diode 976a is shifted (e.g. in a positive direction) with respect to the potential at the source terminal of the MOSFET 920 by a value defined by the Zener voltage of the Zener diode. A series circuit of two resistors 976c, 976d is coupled in parallel with the Zener diode 976a, and a tap between the resistors 976c, 976d is coupled with the second (inverting) input of the differential amplifier 962 via a resistor 964. Accordingly, the voltage at the tap between the resistors 976c, 976d is shifted with respect to the voltage at the source terminal of the MOSFET 920 by a fraction of the Zener voltage of the Zener diode 976a, wherein this fraction is defined (primarily) by the values of the resistors 976c, 976d.

[0154] Accordingly, the regulation operates to bring the voltage at the tap between the resistors 976c, 976d an agreement with the voltage at the output of the low pass filter 974. Accordingly, in a stationary case, the drain source voltage of the transistor 920 is regulated to a value which is determined by the Zener voltage of the Zener diode 976a and also by the values of the resistors 976c, 976d.

[0155] As a further remark, it should be noted that the power supply filter circuit 900 comprises a voltage source 990, which provides a supply voltage for the differential amplifier 962, which is larger than the voltage at the drain terminal of the MOSFET 920. The power supply filter circuit 900 also comprises a capacitor 992 which is coupled between the positive supply voltage terminal and the negative supply voltage terminal of the differential amplifier 962 and helps to stabilize the supply voltage of the differential amplifier 962. Furthermore, there are diodes 994, 996, which limit the voltage at the first terminal of the control capacitor 930 to range that it is approximately between the negative supply voltage of the differential amplifier 962 and the positive supply voltage of the differential amplifier 962.

[0156] To conclude, the power supply filter circuit 900 according to Fig. 9 comprises a similar functionality when compared to the other supply voltage filter circuits disclosed herein, but additionally comprises the bypass circuit 922 and the bypass circuit 974c. Consequently, a startup of the circuitry is accelerated, and a variation of the voltage at the output 912 of the power supply filter circuit is also accelerated (e.g. by bypassing the low pass filter resistor 974a). Moreover, it should be noted that the power supply filter circuit 900 may optionally be supplemented by any of the features, functionalities and details disclosed herein, both individually and taken in combination.

[0157] 8. Power Supply Filter Circuit According to Fig. 10

[0158] Fig. 10 shows a schematic of a power supply filter circuit 1000 according to an embodiment of the invention.

[0159] The power supply filter circuit 1000 is similar to the other power supply filter circuits as disclosed herein and comprises an input 1010 and an output 1012. The power supply filter circuit 1000 is intended for the application of a negative voltage at the input 1010 (e.g. negative with respect to a reference potential at a reference potential conductor or ground conductor GND). For this reason, the power supply filter circuit 1000 comprises a P-channel MOSFET 1020, wherein a source terminal of the MOSFET 1020 is coupled to the output 1012 and wherein a drain terminal of the MOSFET 1020 is coupled to the input 1010.

[0160] The power supply filter circuit 1000 also comprises a bypass circuit 1022, which comprises a series connection of two diodes 1022a, 1022b. For example, a cathode of a first diode 1022a may be coupled to the drain terminal of the MOSFET, an anode of the first diode 1022a may be a coupled to a cathode of the second diode 1022b and an anode of the second diode 1022b may be coupled to the source terminal of the MOSFET 1020. Accordingly, the current flow direction through the bypass circuit 1022 may be identical to the “normal” current flow direction through the drain-source path of the MOSFET 1020. Accordingly, the bypass circuit 1022 may limit the source drain voltage of the MOSFET 1020 substantially to the sum of the threshold voltages of the diodes 1022a, 1022b.

[0161] The power supply filter circuit 1000 also comprises a control capacitor 1030 and a stabilization capacitor 1040, wherein the control capacitor 1030 corresponds to the control capacitor 930 and wherein the stabilization capacitor 1040 corresponds to the stabilization capacitor 940. Moreover, the power supply filter circuit 1000 comprises a resistor 1032 which corresponds to the resistor 932. The power supply filter circuit 1000 also comprises a regulator 1060 which comprises a differential amplifier 1062. An integration capacitor 1064 is coupled between a second (inverted) input of the differential amplifier (e.g. operational amplifier) 1062 and the output of the differential amplifier 1062. Moreover, a resistor 1065 is coupled between the output of the differential amplifier 1062 and the first terminal of the control capacitor 1030, wherein the resistor 1065 may correspond to the resistor 965.

[0162] A “floating voltage reference” 1076 is coupled between the drain terminal of the MOSFET 1020 and an input of a low pass filter 1074. For example, the floating voltage reference 1076 comprises a series connection of two resistors which are coupled between the drain terminal of the MOSFET 1020 and a potential that is elevated with respect to the potential at the drain terminal of the MOSFET 1020 by a predetermined value (e.g. by 10 V) (e.g. by virtue of a floating voltage source). Accordingly, a voltage at a tap between the resistors 1076a, 1076b is shifted (e.g. in a positive direction) when compared to the voltage at the drain terminal of the MOSFET 1020 by a predetermined voltage (at least in a stationary situation). The tap between the resistors 1076a, 1076b is coupled to a first terminal of a low pass filter resistor 1074a, wherein a second terminal of the low pass filter resistor 1074a is coupled to a first terminal of a low pass filter capacitor 1074b. A second terminal of the low pass filter capacitor is coupled to the reference potential conductor or ground conductor GND. The first terminal of the low pass filter capacitor also constitutes the output of the low pass filter and is coupled to the first (non-inverting) input of the differential amplifier 1062.

[0163] A second input (e.g. an inverting input) of the differential amplifier 1062 is coupled with the source terminal of the MOSFET via a resistor. Moreover, it should be noted than an antiparallel circuit of diodes is coupled between the source terminal of the MOSFET 1020 and the first (non-inverting) input of the differential amplifier 1062, which limits the deviation of the voltage at the first (non-inverting) input of the differential amplifier 1062 from the voltage at the source terminal of the MOSFET 1020 substantially to the threshold voltage of said diodes 1074c, 1074d.

[0164] As an additional remark, it should be noted that there are capacitors 1092, 1093 stabilizing the supply voltage of the differential amplifier 1062 and diodes 1094, 1096 limiting the voltage at the first terminal of the control capacitor 1030 substantially to a range between a negative supply voltage of the differential amplifier 1062 and a positive supply voltage of the differential amplifier 1062.

[0165] The voltage at the input of the low pass filter 1074 is shifted with respect to the voltage at the drain terminal of the MOSFET 1020 by a predetermined value, which is of the order of 0.5 V. The low pass filter 1074 is coupled between a tap for this shifted voltage and the first input (non-inverting input of the differential amplifier 1062). The voltage at the first input (non-inverting input of the differential amplifier 1062) is limited to a range around the voltage at the source terminal of the MOSFET 1020. Accordingly, the regulation operates to bring the drain-source voltage of the MOSFET to a value which is defined by the shift between the voltage at the drain terminal of the MOSFET and the voltage at the input of the low pass filter 1074 (at least in a stationary case).

[0166] Regarding the functionality of the power supply filter circuit 1000, reference is also made to the discussion of the above power supply filter circuit as disclosed herein.

[0167] Moreover, it should be noted that the power supply filter circuit 1000 may optionally be supplemented by any of the features, functionalities and details disclosed herein.

[0168] 9. Conclusions

[0169] Embodiments according to the invention create an active power supply filter for higher voltages. In other words, embodiments according to the invention create an active filter circuitry for high voltage power supply applications where very low noise is required and standard passive filtering methods need too much board space.

[0170] It can also be said that the invention describes an alternative method for active filtering noisy DC supply voltages, interesting for higher voltages where high density of the circuitry on the printed circuit board (PCB) is desired or needed.

[0171] The block diagram of the circuit may, for example, be seen in Fig. 4.

[0172] In the following, a functional description will be provided. The block diagram of Fig. 4 gives a principle overview of this power supply, filter- and load-circuitry. The filtering itself is done mainly by these three components: a power-MOSFET between IN and OUT (e.g. N-MOS for a positive supply-voltage, e.g. a P-MOS for a negative supply voltage) and two capacitances CCTRL and a CSTAB-

[0173] The MOSFET preferably works in the saturated area at a certain VDs- The characteristic diagram of a power-MOSFET (as shown in Fig. 5a) shows a typical MOSFET behavior. A typical working area for the active filter is marked by a box 530. In this area, the MOSFET acts almost like a current source for a certain VGS (a change of VDS of some 10 mV causes a minor change of IDS or VGS respectively)(wherein VGS is the gate-source voltage, and wherein VDS is the drain source voltage, and wherein IDS is the drain current).

[0174] The VDS (drain source voltage) is determined, for example, by the floating reference ( DS equal VREF) and should, for example, be chosen as low as possible to minimize the power dissipation in the MOSFET but should be high enough to let the noise to be filtered out dispose. A VGS equal 0.5 V (or VDS equal 0.5V) might be a good choice as a starting point.

[0175] Gate-to-GND-voltage VCTRL should preferably be held very stable by CCTRL (or must be held very stable in some cases). From a filtering point of view, this voltage can, for example, be assumed to be static (it is, for example, adjusted very slowly by the regulation circuitry). A CCTRL of some Micro- Farad is preferred (or in some embodiments even needed) to stabilize the output voltage.

[0176] The adjustment of VDS is done by the regulator. Both, the VIN and the VOUT (e.g. the input voltage and the output voltage) should be monitored (or in some embodiments even need to be monitored) as inputs for the regulation of the VDS (drain source voltage). The VIN should preferably be filtered (or in some embodiments needs to be filtered), e.g. by a low-pass- filter with a bandwidth as low as possible (smaller than 100 Hz preferably) to get a very clean reference signal.

[0177] As a regulator, normally an OpAmp (e.g. an operational amplifier) is used which can, for example, be minimalistic in terms of bandwidth and power consumption.

[0178] In the following, a typical application will be described. The above described filtering method is tested on a DC / DC converter-trial-board for a project. The DC / DC-converter generates - 65V and -2 A, the VDS in the filter circuit is adjusted to 0.5 V. Fig. 6a shows a voltage at an active filter input. Fig. 6b shows a voltage at an active filter output. In both cases, the noise is measured by scope, resolution 5 mV / DIV, time resolution 500 ms / DIV, 20 MHz filter bandwidth.

[0179] Figs. 7 and 8 show more detailed block diagrams, wherein Fig. 7 shows a block diagram of an active power supply filter for positive voltage, and wherein Fig. 8 shows a block diagram of an active power supply filter for negative voltage. Figs. 9 and 10 show further implementation details. In particular, Fig. 9 shows a schematic of an active power supply filter for positive voltage, and Fig. 10 shows a schematic of an active power supply filter for negative voltage.

[0180] To conclude, a concept has been disclosed which provides for a good tradeoff between voltage quality, implementation effort and power dissipation.

Claims

Claims1. A power supply filter circuit (100;220; 400; 700; 800; 900; 1000), wherein the power supply filter circuit comprises a transistor (120;420;720;820;920;1020), a control capacitor (130;430;730;830;930;1030) and a stabilization capacitor (140;440;740;840;940;1040), wherein a load path of the transistor is coupled between an input (110;410;710;810;910;1010) of the power supply filter circuit and an output (112;412;712;812;912;1012) of the power supply filter circuit, wherein the control capacitor is coupled between a control terminal of the transistor and a reference potential conductor (GND); wherein the stabilization capacitor is coupled between a source terminal of the transistor and the reference potential conductor; wherein the power supply filter circuit is configured to regulate a voltage across the load path of the transistor or a voltage between an input of the power supply filter circuit and an output of the power supply filter circuit.

2. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to claim 1 , wherein a capacitance of the control capacitor (130;430;730;830;930;1030) is larger than or equal to 10 times a transistor-internal capacitance between the control terminal of the transistor (120;420;720;820;920;1020) and the source terminal of the transistor, or wherein a capacitance of the control capacitor is larger than or equal to 20 times a transistorinternal capacitance between the control terminal of the transistor and the source terminal of the transistor, or wherein a capacitance of the control capacitor is larger than or equal to 50 times a transistorinternal capacitance between the control terminal of the transistor and the source terminal of the transistor, orwherein a capacitance of the control capacitor is larger than or equal to 100 times a transistor-internal capacitance between the control terminal of the transistor and the source terminal of the transistor.

3. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to claim 1 or 2, wherein the power supply filter circuit comprises a resistor (932,965; 1032,1065) which is coupled between an output of a regulator (960; 1060) for regulating the voltage across the load path of the transistor or for regulating the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit and a control terminal of the transistor, wherein the resistor which is coupled between the output of the regulator and the control terminal of the transistor is configured to form, together with the control capacitor, a low pass filter.

4. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 3, wherein the power supply filter circuit is configured to regulate the voltage across the load path of the transistor (120;420;720;820;920;1020) or the voltage between the input (110;410;710;810;910;1010) of the power supply filter circuit and the output (112;412;712;812;912;1012)of the power supply filter circuit such that the transistor operates in a saturated area.

5. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 4, wherein the power supply filter circuit is configured to regulate the voltage across the load path of the transistor (120;420;720;820;920; 1020) to a target which is smaller than or equal to 1V , orwherein the power supply filter circuit is configured to regulate the voltage across the load path of the transistor to a target value which is in a range between 0.3V and 0.8V, or wherein the power supply filter circuit is configured to regulate the voltage across the load path of the transistor to a target value which is in a range between 0.4V and 0.6V, or wherein the power supply filter circuit is configured to regulate a voltage difference between the input (110;410;710;810;910;1010) of the power supply filter circuit and the output (112;412;712;812;912;1012) of the power supply filter circuit to a target value which is smaller than or equal to 1 V, or wherein the power supply filter circuit is configured to regulate a voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit to a target value which is in a range between 0.3V and 0.8V, or wherein the power supply filter circuit is configured to regulate a voltage difference between the input of the power supply filter circuit and the output of the power supply filter circuit to a target value which is in a range between 0.4V and 0.6V,.

6. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 5, wherein the power supply filter circuit is configured such that a bandwidth of a control loop (474.476, 478, 460;774, 776, 762, 764, 766; 876,874,862,864,866; 974,976,962,964,966,975; 1074,1076,1062,1064,1066) for regulating the voltage across the load path of the transistor (120;420;720;820;920;1020) or for regulating the voltage between the input (110;410;710;810;910;1010) of the power supply filter circuit and the output (112;412;712;812;912;1012) of the power supply filter circuit is limited to a value of no more than 10kHz, or to a value of no more than 5 kHz, or to a value of no more than 1000Hz , or to a value of no more than 500Hz, or to a value of no more than 200 Hz, or to a value of no more than 100Hz, or to a value of no more than 50Hz.

7. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 6,wherein a control loop (474.476, 478, 460;774, 776, 762, 764, 766; 876,874,862,864,866; 974,976,962,964,966,975; 1074,1076,1062,1064,1066) for regulating the voltage across the load path of the transistor (120;420;720;820;920;1020) or for regulating the voltage between the input (110;410;710;810;910;1010) of the power supply filter circuit and the output (112;412;712;812;912;1012) of the power supply filter circuit comprises a low pass filter (474;774;874;974;1074), wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 10kHz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 5kHz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 1000Hz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 500Hz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 200Hz, or wherein the low pass filter comprises a cutoff frequency which is smaller than or equal to 100Hz.

8. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 7, wherein the power supply filter circuit is configured to provide a floating reference potential which is shifted with respect to a potential at the output (112;412;712;812;912;1012) of the power supply filter circuit by a predetermined value, and wherein the power supply filter circuit is configured to perform a regulation, in order to bring a potential at a sink terminal of the transistor (120;420;720;820;920;1020) or a potential atthe input (110;410;710;810;910;1010) of the power supply filter circuit and the floating reference potential in agreement; or wherein the power supply filter circuit is configured to provide a floating reference potential which is shifted with respect to a potential at a source terminal of the transistor (120;420;720;820;920;1020) by a predetermined value, and wherein the power supply filter circuit is configured to perform a regulation, in order to bring a potential at a sink terminal of the transistor or a potential at the input (110;410;710;810;910;1010) of the power supply filter circuit and the floating reference potential in agreement; or wherein the power supply filter circuit is configured to provide a floating reference potential which is shifted with respect to a potential at the input (110;410;710;810;910;1010) of the power supply filter circuit by a predetermined value, and wherein the power supply filter circuit is configured to perform a regulation, in order to bring a potential at a source terminal of the transistor or a potential at the output (112;412;712;812;912;1012) of the power supply filter circuit and the floating reference potential in agreement; or wherein the power supply filter circuit is configured to provide a floating reference potential which is shifted with respect to a potential at a sink terminal of the transistor by a predetermined value, and wherein the power supply filter circuit is configured to perform a regulation, in order to bring a potential at a source terminal of the transistor or a potential at the output (112;412;712;812;912;1012) of the power supply filter circuit and the floating reference potential in agreement.

9. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 8, wherein the power supply filter circuit comprises a bypass path (922,1022) in parallel to the load path of the transistor (120;420;720;820;920;1020),wherein the bypass path is configured to be conductive in case a voltage across the load path of the transistor exceeds a predetermined threshold voltage and to be non-conductive otherwise.

10. Power supply filter circuit (100;220; 400; 700; 800; 900; 1000) according to one of claims 1 to 9, wherein the power supply filter circuit comprises a low pass resistor (974a), a low pass capacitor (974b), an operational amplifier (962), an integration capacitor (964), and an output resistor (965), wherein the low pass resistor is coupled between a sink terminal of the transistor (920) and a first terminal of the low pass capacitor (974b), wherein a second terminal of the low pass capacitor (974b) is coupled to the reference potential conductor (GND), wherein a first input terminal of the operational amplifier is coupled with the first terminal of the low pass capacitor, wherein a second terminal of the operational amplifier is coupled with a source terminal of the transistor via one or more resistors (966,976d); wherein the second terminal of the operational amplifier is coupled with an output terminal of the operational amplifier via capacitor (964); wherein the output terminal of the operational amplifier is coupled with a first terminal of the control capacitor (930) via the output resistor (965), wherein the first terminal of the control capacitor (930) is coupled with a control germinal of the transistor (920), wherein the second terminal of the control capacitor (930) is coupled with the reference potential conductor.

11. A power supply arrangement (200), wherein the power supply arrangement comprises a switching power converter (210), and wherein the power supply arrangement comprises a power supply filter circuit (100;220; 400;700;800;900;1000) according to one of claims 1 to 10, wherein an output (212) of the switching power converter (210) is coupled to an input (222) of the power supply filter circuit.

12. Power supply arrangement (200) according to claim 11 , wherein a regulation time constant of a regulation loop for regulating the voltage across the load path of the transistor or the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit is larger, at least by a factor of 20, or at least by a factor of 50, or at least be a factor of 100, or at least by a factor of 200, or at least by a factor of 500, or at least by a factor of 1000, than a period duration of the switching power converter.

13. Power supply arrangement (200) according to claim 11 or 12, wherein a regulation of the voltage across the load path of the transistor or of the voltage between an input of the power supply filter circuit and the output of the power supply filter circuit is configured such that the regulation does not regulate out a change of the voltage across the load path of the transistor caused by a ripple voltage of the switching power converter or a change of the voltage between the input of the power supply filter circuit and the output of the power supply filter circuit caused by a ripple voltage of the switching power converter by more than 50 percent [e.g. such that the voltage across the load path of the transistor follows the ripple voltage at least to an amount of 50 percent], or by more than 20 percent [e.g. such that the voltage across the load path of the transistor follows the ripple voltage at least to an amount of 80 percent], or by more than 10 percent [e.g. such that the voltage across the load path of the transistor follows the ripple voltage at least to an amount of 90 percent].

14. Automated test equipment (300), wherein the automated test equipment comprises a power supply arrangement (200) according to one of claims 11 to 13, wherein the automated test equipment is configured to programmably vary a voltage provided by the switching power converter(210), to thereby set a voltage at the output (224) of the power supply filter circuit (220) to a desired value; wherein the power supply filter circuit comprises a fast change mechanism (922,974c; 1022,1074c, 1074d) configured to selectively bypass a load path of the transistor (920; 1020) and / or to bypass a low pass filter (974; 1074) in a regulation loop (974,976,962,964,966,975; 1074,1076,1062,1064,1066) for regulating the voltage across the load path of the transistor (920; 1020) or for regulating the voltage between the input (910;1010) of the power supply filter circuit and the output (912;1012) of the power supply filter circuit.

15. A Method for actively filtering a supply voltage comprising a ripple using a power supply filter circuit, wherein the power supply filter circuit comprises a transistor, a control capacitor and a stabilization capacitor, wherein a load path of the transistor is coupled between an input of the power supply filter circuit and an output of the power supply filter circuit, wherein the control capacitor is coupled between a control terminal of the transistor and a reference potential conductor wherein the stabilization capacitor is coupled between a source terminal of the transistor and the reference potential conductor; wherein the method comprises stabilizing a potential difference between the control terminal of the transistor and the reference potential conductor using the control capacitor, in ordersuppress a generation of fluctuations of the potential at the control terminal of the transistor by the ripple on the supply voltage that is applied at the input of the power supply filter circuit; and wherein the method comprises regulating a voltage across the load path of the transistor or a voltage between the input of the power supply filter circuit and the output of the power supply filter circuit with a regulation time constant which is longer, at least by a factor of 2, or at least by a factor of 5, or at least by a factor of 10, or at least by a factor of 20, or at least by a factor of 50, or at least by a factor of 100, than a period duration of the ripple on the supply voltage that is applied at the input of the power supply filter circuit; and wherein an output voltage is obtained at the output of the power supply filter circuit.

Images