Alignment mark used in wafer bonding process, wafer bonding method using same, and method for measuring wafer alignment error by using same

Abstract

The present invention relates to an alignment mark and a wafer bonding method using same, the alignment mark being used for aligning a first semiconductor wafer and a second semiconductor wafer in a wafer bonding process for aligning and coupling the first semiconductor wafer to the second semiconductor wafer having been flipped, so that surfaces thereof on which semiconductor elements are formed face each other. The present invention provides alignment marks used in a wafer bonding process, which comprise: a first alignment mark formed in a predetermined first area of the first semiconductor wafer and having a first center of symmetry; and a second alignment mark formed in a predetermined second area of the second semiconductor wafer and having a second center of symmetry, wherein the second area overlaps the first area when the first semiconductor wafer and the flipped second semiconductor wafer are combined, the first center of symmetry overlaps the second center of symmetry when the first semiconductor wafer and the flipped second semiconductor wafer are aligned, and a difference between the first center of symmetry and the second center of symmetry indicates an alignment error between the first semiconductor wafer and the flipped second semiconductor wafer.

Description

Alignment marks used in wafer bonding processes, wafer bonding methods using these marks, and wafer alignment error measurement methods using these marks.

[0001] The present invention relates to an alignment mark used for aligning a first semiconductor wafer and a second semiconductor wafer in a wafer bonding process in which a first semiconductor wafer and a flipped second semiconductor wafer are aligned and bonded so that the surfaces on which semiconductor elements are formed face each other, a wafer bonding method using the same, and a wafer alignment error measuring method using the same.

[0002] In the past, integration of semiconductor devices was achieved through miniaturization of patterns on the XY plane, but recently, integration of semiconductors is being achieved by stacking patterns in the Z-axis direction.

[0003] Furthermore, semiconductor integration is being achieved using wafer bonding technology, which joins two semiconductor wafers formed with semiconductor devices into one. For example, a method is being used to bond a semiconductor wafer formed with memory devices to a semiconductor wafer formed with logic devices, electrically connecting the pads of the memory devices to the pads of the logic devices.

[0004] At this time, if misalignment occurs between semiconductor wafers, there is a problem that the pads of the memory elements and the pads of the logic elements are not electrically connected.

[0005] To solve these problems, a method is being used in which alignment marks are formed on each semiconductor wafer and the semiconductor wafers are aligned using these alignment marks.

[0006] For example, U.S. Patent Publication No. US 2023 / 0135060 A1 discloses a method for aligning a first wafer and a second wafer by aligning a first alignment mark on a first wafer and a second alignment mark on a second wafer.

[0007] However, to measure alignment between wafers in the semiconductor wafer bonding process, it is necessary to obtain an image of the alignment marks by penetrating the silicon wafers used as substrates for forming semiconductor devices. This requires the use of infrared illumination. However, infrared illumination significantly reduces optical resolution. Therefore, to accurately measure alignment while maintaining the size of the alignment marks, modifications to the alignment mark design are inevitable.

[0008] In addition, Korean Patent No. 10-2440758 discloses an overlay mark capable of generating an aperiodic symmetric signal to accurately measure overlay errors even when the overlay error is very large. When generating a periodic signal, it is difficult to determine if the overlay error is more than one period. The overlay mark of Korean Patent No. 10-2440758 generates an aperiodic symmetric signal by varying the spacing between bars. This requires at least four bars per area. Since the limit width and spacing of the bars are determined by the optical resolution, there was a problem that the size of the overlay mark capable of generating an aperiodic symmetric signal would increase if infrared band illumination was used.

[0009] [Prior Art Literature]

[0010] U.S. Patent Publication No. US 2023 / 0135060A1

[0011] Korean Patent Publication No. 10-2011-0135104

[0012] Korean Patent No. 10-2440758

[0013] The present invention is intended to improve the above-described problems, and aims to provide a new alignment mark that is small in size and can easily measure alignment errors even when the alignment errors are large, as an alignment mark used in a wafer bonding process.

[0014] In order to achieve the above-described object, the present invention provides an alignment mark used in a wafer bonding process for aligning and bonding a first semiconductor wafer and a flipped second semiconductor wafer, the alignment mark comprising: a first alignment mark formed in a predetermined first region of the first semiconductor wafer and having a first center of symmetry; and a second alignment mark formed in a predetermined second region of the second semiconductor wafer and having a second center of symmetry, wherein when bonding the first semiconductor wafer and the flipped second semiconductor wafer, the second region overlaps the first region, and when the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first center of symmetry and the second center of symmetry overlap, and a difference between the first center of symmetry and the second center of symmetry indicates an alignment error between the first semiconductor wafer and the flipped second semiconductor wafer.

[0015] Here, the first alignment mark comprises a first bar pattern including a plurality of first bars spaced apart along a first direction; a second bar pattern including a plurality of second bars spaced apart along the first direction and having 180-degree rotational symmetry with the first bar pattern, and a first mark structure disposed at the center of the alignment mark;

[0016] A fifth bar pattern is disposed on a first diagonal line with the first mark structure interposed therebetween; and a sixth bar pattern is included, wherein the fifth bar pattern and the sixth bar pattern have 180-degree rotational symmetry, the fifth bar pattern includes a plurality of fifth bars disposed at intervals along a second direction orthogonal to the first direction, and the sixth bar pattern includes a third mark structure including a plurality of sixth bars disposed at intervals along the second direction.

[0017] And the second alignment mark that is flipped over includes a third bar pattern that is offset from the first bar pattern in the second direction and includes a plurality of third bars that are spaced apart along the first direction; a second mark structure that includes a fourth bar pattern that is spaced apart along the first direction and is positioned to face the third bar pattern with the first mark structure interposed therebetween, and has 180-degree rotational symmetry with the third bar pattern;

[0018] A seventh bar pattern disposed on a second diagonal line intersecting the first diagonal line with the first mark structure interposed therebetween; and an eighth bar pattern, wherein the seventh bar pattern and the eighth bar pattern have 180-degree rotational symmetry, the seventh bar pattern includes a plurality of seventh bars disposed at intervals along the second direction, and the eighth bar pattern includes a fourth mark structure including a plurality of eighth bars disposed at intervals along the second direction.

[0019] And each bar pattern included in the first alignment mark and the second alignment mark includes at least two bars having different widths.

[0020] In addition, the present invention provides an alignment mark used in a wafer bonding process in which the spacing between bars included in each bar pattern included in the first alignment mark and the second alignment mark is constant.

[0021] In addition, an alignment mark used in a wafer bonding process is provided, in which the width of a bar positioned at the center among bars belonging to each bar pattern included in the first alignment mark and the second alignment mark is wider than the width of bars positioned at the periphery.

[0022] In addition, each bar pattern included in the first alignment mark and the second alignment mark includes three bars, the bar positioned in the center has a first width, the bars positioned in the periphery have a second width, and the first width is wider than the second width, thereby providing an alignment mark used in a wafer bonding process.

[0023] Additionally, the first bars and the second bars provide alignment marks used in a wafer bonding process that are connected to each other along the second direction.

[0024] In addition, the alignment mark is identifiable in an optical measuring device that uses infrared rays as an illumination source and provides an alignment mark used in a wafer bonding process having an area of ​​20㎛×20㎛ or less.

[0025] Additionally, each bar included in each bar pattern included in the first alignment mark and the second alignment mark provides an alignment mark used in a wafer bonding process consisting of a plurality of segmented micro-elements.

[0026] Additionally, the above microscopic elements provide alignment marks used in the wafer bonding process, which are parallel lines or squares.

[0027] Additionally, the plurality of segmented micro-elements provide alignment marks used in a wafer bonding process having narrow widths and spacings that cannot be optically resolved by an optical measuring device that photographs the alignment marks.

[0028] Additionally, among the bars belonging to each bar pattern included in the first alignment mark and the second alignment mark, a bar positioned at the center provides an alignment mark used in a wafer bonding process composed of a plurality of divided micro-elements.

[0029] In addition, the present invention provides a wafer bonding method using the alignment mark described above, comprising: a step of forming the first alignment mark in the first region of the first semiconductor wafer and forming the second alignment mark in the second region of the second semiconductor wafer; a step of adjusting the relative position between the first semiconductor wafer and the second semiconductor wafer so that the first alignment mark and the second alignment mark are aligned; and a step of bonding the first semiconductor wafer and the second semiconductor wafer.

[0030] In addition, the present invention provides a wafer alignment error measuring method using the alignment mark described above, comprising the steps of: obtaining an alignment mark image; selecting two areas of the first alignment mark that are 180 degrees symmetrical with respect to the center of the obtained alignment mark image; projecting two-dimensional images of the two areas into one dimension to obtain a pair of graphs representing each area; and comparing the pair of graphs to obtain an offset value between the first alignment mark and the center of the alignment mark image.

[0031] In addition, the step of obtaining the alignment mark image provides a wafer alignment error measurement method, which is a step of obtaining an alignment mark image in which the first to eighth bar patterns are displayed darker than background areas by adjusting the wavelength or focus position of the illumination used in the step of obtaining the alignment mark image.

[0032] The alignment mark according to the present invention can generate an aperiodic symmetric signal. Therefore, even when the alignment error is large, it can be easily measured. Furthermore, since the widths of the bars are adjusted differently to generate an aperiodic symmetric signal, the alignment mark according to the present invention can generate an aperiodic symmetric signal with just three bars. Therefore, when infrared light is used as illumination, the size of the alignment mark can be reduced.

[0033] Figure 1 shows a first semiconductor wafer on which a first alignment mark is formed.

[0034] Figure 2 shows a second semiconductor wafer on which a second alignment mark is formed.

[0035] Figure 3 is a drawing for explaining a method for checking the alignment error between a first semiconductor wafer and a flipped second semiconductor wafer.

[0036] Figure 4 is a drawing showing an example of an alignment mark image.

[0037] Figure 5 shows the first alignment mark illustrated in Figure 4.

[0038] Figure 6 shows the second alignment mark illustrated in Figure 4.

[0039] Fig. 7 is a drawing for explaining the effect of reducing the size of the alignment mark shown in Fig. 4.

[0040] Figure 8 is a drawing for explaining a method for measuring alignment error.

[0041] Figure 9 is a diagram showing another example of graphs for measuring alignment errors.

[0042] FIG. 10 is a drawing showing an alignment mark according to another embodiment of the present invention.

[0043] Figure 11 is a drawing showing other examples of the first bar pattern.

[0044] FIG. 12 is a drawing showing a part of an alignment mark according to another embodiment of the present invention.

[0045] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. However, the embodiments of the present invention may be modified into various other forms, and the scope of the present invention should not be construed as being limited to the embodiments described below. The embodiments of the present invention are provided to more completely explain the present invention to those with average knowledge in the art. Therefore, the shapes of elements in the drawings are exaggerated to emphasize a clearer description, and elements indicated by the same reference numerals in the drawings represent the same elements.

[0046] Fig. 1 is a drawing showing a first semiconductor wafer on which a first alignment mark is formed, and Fig. 2 is a drawing showing a second semiconductor wafer on which a second alignment mark is formed.

[0047] The first semiconductor wafer (1) and the second semiconductor wafer (2) may include a silicon wafer and a plurality of pattern layers forming a semiconductor device. Wafers other than silicon wafers may also be used.

[0048] As illustrated in Fig. 1, a first alignment mark (10) is formed in a predetermined area of ​​a first semiconductor wafer (1). A plurality of first alignment marks (10) may be formed on the first semiconductor wafer (1).

[0049] As illustrated in Fig. 2, a second alignment mark (20) is formed in a predetermined area of ​​a second semiconductor wafer (2). A plurality of second alignment marks (20) may be formed on the second semiconductor wafer (2).

[0050] The area where the second alignment mark (20) is formed overlaps with the area where the corresponding first alignment mark (10) is formed when combining the first semiconductor wafer (1) and the flipped second semiconductor wafer (2).

[0051] In FIGS. 1 and 2, the first alignment mark (10) and the second alignment mark (20) are shown as being formed on the top layer and exposed to the outside, but another layer may be formed on the first alignment mark (10) and the second alignment mark (20).

[0052] Figure 3 is a drawing for explaining a method for obtaining an alignment mark image.

[0053] As illustrated in FIG. 3, the first alignment mark (10) and the second alignment mark (20) that are overlapped are photographed simultaneously using a camera (5) to obtain an alignment mark image that includes both the first alignment mark (10) and the flipped second alignment mark (20). Then, the alignment error can be confirmed by analyzing the obtained alignment mark image. The lighting used for photographing may be lighting that has high reflectivity for the first alignment mark (10) and the second alignment mark (20), low reflectivity for the second semiconductor wafer (2), and high transmittance. For example, when a silicon wafer is used as the second semiconductor wafer (2), the wavelength band of the lighting is preferably 900 nm to 2000 nm. This is because, although there is a difference depending on the thickness of the silicon wafer, an edge region of light transmittance is formed where the transmittance rapidly changes (increases) from about 900 nm.

[0054] When the first alignment mark (10) is embedded in the first semiconductor wafer (1), the light may also have high transmittance to the first semiconductor wafer (1). The light passes through the second semiconductor wafer (2) and is reflected at the second alignment mark (20) and the first alignment mark (10).

[0055] The alignment mark image can be acquired during the alignment process, as illustrated in FIG. 3, or can be acquired after bonding of the first semiconductor wafer (1) and the second semiconductor wafer (2) is completed. If acquired during the alignment process, the measured alignment error can be used to align the first semiconductor wafer (1) and the second semiconductor wafer (2). If acquired after bonding is completed, the measured alignment error can be used to determine whether the bonded wafer is defective.

[0056] The first semiconductor wafer (1) and the second semiconductor wafer (2) are fixed to a stage, table, vacuum chuck, etc. that can move in the X, Y, and Z directions, so that the plane movement for alignment and the distance adjustment between the first semiconductor wafer (1) and the second semiconductor wafer (2) for bonding are possible.

[0057] Fig. 4 is a drawing showing an example of an alignment mark image, Fig. 5 shows the first alignment mark shown in Fig. 4, and Fig. 6 shows the second alignment mark shown in Fig. 4. Fig. 5 shows the first alignment mark (10) as seen from the top surface of the first semiconductor wafer (1). Fig. 6 shows the second alignment mark (20) as seen from the back surface of the second semiconductor wafer (2).

[0058] The alignment mark (30) includes a first alignment mark (10) and a flipped second alignment mark (20). In the step of measuring the alignment error, an alignment mark image in which the first alignment mark (10) and the flipped second alignment mark (20) are overlapped can be obtained, as shown in Fig. 4.

[0059] The COI in Fig. 4 represents the center of the alignment mark image. For example, if the size of the alignment mark image is 100×100 pixels, the XY coordinates of the center (COI) of the alignment mark image may be (50 pixels, 50 pixels).

[0060] In FIG. 4, for convenience, the symmetry center (COS1) of the first alignment mark (10), the symmetry center (COS2) of the second alignment mark (20), and the center (COI) of the alignment mark image are all illustrated as being aligned. However, if there is an alignment error, the symmetry center (COS1) of the first alignment mark (10) and the symmetry center (COS2) of the second alignment mark (20) do not coincide with each other. And regardless of the presence or absence of an alignment error, the center (COI) of the alignment mark image may be different from the symmetry center (COS1) of the first alignment mark (10) and the symmetry center (COS2) of the second alignment mark (20).

[0061] The alignment error between the first semiconductor wafer (1) and the flipped second semiconductor wafer (2) can be measured by measuring the offset between the center of symmetry (COS1) of the first alignment mark (10) and the center of symmetry (COS2) of the second alignment mark (20).

[0062] When the alignment error between the first semiconductor wafer (1) and the flipped second semiconductor wafer (2) is 0 (zero), the symmetry center (COS1) of the first alignment mark (10) and the symmetry center (COS2) of the second alignment mark (20) coincide with each other. The difference between the symmetry center (COS1) of the first alignment mark (10) and the symmetry center (COS2) of the second alignment mark (20) represents the alignment error between the first semiconductor wafer (1) and the flipped second semiconductor wafer (2).

[0063] As shown in FIGS. 4 and 5, the first alignment mark (10) includes a first mark structure (100) and a third mark structure (300).

[0064] As shown in FIGS. 4 and 6, the second alignment mark (20) includes a second mark structure (200) and a fourth mark structure (400).

[0065] The first mark structure (100) is positioned at the center of the alignment mark (30). The first mark structure (100) includes a first bar pattern (110) and a second bar pattern (120). In the present embodiment, the first bar pattern (110) and the second bar pattern (120) are connected to each other. The first mark structure (100) has 180 degrees of rotational symmetry with respect to the center of symmetry (COS1) of the first alignment mark (10).

[0066] In this embodiment, the first bar pattern (110) and the second bar pattern (120) are used to find the center of the X-axis direction of the first alignment mark (10).

[0067] The first bar pattern (110) includes a plurality of first bars (112a, 112b) formed long in the Y-axis direction. The first bars (112a, 112b) are arranged at intervals along the X-axis direction. The intervals between the first bars (112a, 112b) may be constant. The first bar pattern (110) is symmetrical with respect to the Y-axis center line (coincident with the Y-axis) passing through the center of the first alignment mark (10).

[0068] The first bar pattern (110) includes first bars (112a, 112b) having different widths. In the present embodiment, the first bars (112a, 112b) become narrower as they get farther from the center line in the Y-axis direction. That is, the width of the first bar (112a) located in the center is wider than the first bars (112b) located on both sides. Conversely, the width of the first bar located in the center may be narrower than the widths of the first bars located on both sides, but it is preferable that the width of the first bar (112a) located in the center is wider in that the size of the alignment mark (30) can be reduced. This is because the spacing between the bars cannot be reduced any further due to the limitations of the resolution of the optical measuring device, and the widths of the two first bars located on both sides, rather than one first bar, must be increased beyond the minimum width.

[0069] The second bar pattern (120) also includes a plurality of second bars (122a, 122b) formed long in the Y-axis direction. The second bars (122a, 122b) are arranged at intervals along the X-axis direction. The second bar pattern (120) is symmetrical with respect to the Y-axis direction center line (coincident with the Y-axis) passing through the center of the first alignment mark (10). The second bars (122a, 122b) are also arranged so that their widths become narrower as they get farther from the Y-axis direction center line.

[0070] In this embodiment, the first bars (112a, 112b) and the second bars (122a, 122b) are connected to each other in the Y-axis direction, but the first bars (112a, 112b) and the second bars (122a, 122b) may be separated from each other.

[0071] The first bars (112a, 112b) and the second bars (122a, 122b) are shown as having three each, but there may be four or more if there is no size limitation.

[0072]

[0073] The second mark structure (200) includes a third bar pattern (210) and a fourth bar pattern (220). The second mark structure (200) has 180-degree rotational symmetry with respect to the center of symmetry of the second alignment mark (20). The third bar pattern (210) and the fourth bar pattern (220) are arranged vertically with the first mark structure (100) interposed therebetween.

[0074] In this embodiment, the third bar pattern (210) and the fourth bar pattern (220) are used to find the center of the X-axis direction of the second alignment mark (20). And the first mark structure (100) and the second mark structure (200) are used to measure the X-axis direction alignment error between the first semiconductor wafer (1) and the second semiconductor wafer (2).

[0075] The third bar pattern (210) includes a plurality of third bars (212a, 212b) formed long in the Y-axis direction. The third bars (212a, 212b) are arranged at intervals along the X-axis direction. The third bar pattern (210) is symmetrical with respect to the Y-axis center line (coincident with the Y-axis) passing through the center of the third bar pattern (210). The width of the third bars (212a, 212b) becomes narrower as they get farther from the Y-axis center line.

[0076] The fourth bar pattern (220) also includes a plurality of fourth bars (222a, 222b) formed long in the Y-axis direction. The fourth bars (222a, 222b) are arranged with intervals along the X-axis direction. The fourth bar pattern (220) is symmetrical with respect to the Y-axis center line (which coincides with the Y-axis) passing through the center of the fourth bar pattern (220). The intervals between the fourth bars (222a, 222b) become narrower as they get farther from the Y-axis center line.

[0077] The third bars (212a, 212b) and the fourth bars (222a, 222b) are shown as three each, but there may be four or more if there is no size limitation.

[0078] The number and spacing of the third bars (212a, 212b) and the fourth bars (222a, 222b) and the first bars (112a, 112b) and the second bars (122a, 122b) are shown to be the same, but the number and spacing may be different.

[0079]

[0080] The third mark structure (300) includes a fifth bar pattern (310) and a sixth bar pattern (320). The third mark structure (300) has a 180-degree rotational symmetry with respect to the center of symmetry (COS1) of the first alignment mark (10). The fifth bar pattern (310) and the sixth bar pattern (320) are arranged along the first diagonal line (D1) with the first mark structure (100) interposed therebetween. In FIGS. 4 and 5 , the fifth bar pattern (310) is arranged at the upper left, and the sixth bar pattern (320) is arranged at the lower right.

[0081] The fifth bar pattern (310) includes a plurality of fifth bars (312a, 312b) formed long in the X-axis direction. The fifth bars (312a, 312b) are arranged at intervals along the Y-axis direction. The width of the fifth bars (312a, 312b) becomes narrower as they get farther from the center line of the fifth bar pattern (310).

[0082] The sixth bar pattern (320) also includes a plurality of sixth bars (322a, 322b) formed long in the X-axis direction. The sixth bars (322a, 322b) are arranged at intervals along the Y-axis direction. The width of the sixth bars (322a, 322b) becomes narrower as they move away from the center of the sixth bar pattern (320).

[0083] The fifth bars (312a, 312b) and the sixth bars (322a, 322b) are shown as three each, but there may be four or more.

[0084]

[0085] The fourth mark structure (400) includes a seventh bar pattern (410) and an eighth bar pattern (420). The fourth mark structure (400) has a 180-degree rotational symmetry with respect to the center of symmetry of the second alignment mark (20). The seventh bar pattern (410) and the eighth bar pattern (420) are arranged along the second diagonal line (D2) with the first mark structure (100) interposed therebetween. The first diagonal line (D1) and the second diagonal line (D2) intersect each other. In FIGS. 4 and 6 , the seventh bar pattern (410) is arranged at the upper right, and the eighth bar pattern (420) is arranged at the lower left.

[0086] In this embodiment, the seventh bar pattern (410) and the eighth bar pattern (420) are used to find the Y-axis direction center of the second alignment mark (20). And the third mark structure (300) and the fourth mark structure (400) are used to measure the Y-axis direction alignment error between the first semiconductor wafer (1) and the second semiconductor wafer (2).

[0087] The seventh bar pattern (410) includes a plurality of seventh bars (412a, 412b) formed long in the X-axis direction. The seventh bars (412a, 412b) are arranged at intervals along the Y-axis direction. The width of the seventh bars (412a, 412b) becomes narrower as they get farther from the center line of the seventh bar pattern (410).

[0088] The eighth bar pattern (420) also includes a plurality of eighth bars (422a, 422b) formed long in the X-axis direction. The eighth bars (422a, 422b) are arranged at intervals along the Y-axis direction. The width of the eighth bars (422a, 422b) becomes narrower as they get farther from the center line of the eighth bar pattern (420).

[0089] The seventh bars (412a, 412b) and the eighth bars (422a, 422b) are shown as three each, but there may be four or more.

[0090]

[0091] Fig. 7 is a drawing for explaining the size reduction effect of the alignment mark illustrated in Fig. 4. Fig. 7 is drawn based on the minimum spacing between bars being 1.5 μm, the minimum width of the bars being 1.5 μm, and the wide spacing distinct from the minimum spacing and the wide width distinct from the minimum width being 2.4 μm, according to the limitations of the optical measuring device.

[0092] As illustrated in (a) of Fig. 7, the alignment mark according to the present invention can form a symmetrical aperiodic signal with three bars. However, as illustrated in (b) of Fig. 7, at least four bars are required to form a symmetrical aperiodic signal by varying the intervals between bars of the same width. The aperiodic signal on the right can be obtained by a method of projecting a bar pattern image. The X-axis of the graph can be an X-axis direction pixel value, and the Y-axis can be an average intensity value of gray values ​​of pixels having the same X-axis direction pixel value.

[0093] Therefore, when using bars with the same width, in order to convey the same level of information as the alignment mark (30) of FIG. 4, an alignment mark that is 3 μm larger in the X-axis direction and 6 μm larger in the Y-axis direction than the alignment mark of the present invention must be used. If the size of the alignment mark according to the present invention is 20 μm x 20 μm, when using bars with the same width, an alignment mark with an area of ​​23 μm x 26 μm, which is about 50% larger, is required. In this way, when the size of the alignment mark must be minimized, it is very advantageous to use the alignment mark of the present invention. The alignment mark according to the present invention may have an area of ​​20 μm x 20 μm or less as an alignment mark identified in an optical measuring device that uses infrared rays as an illumination source.

[0094]

[0095] Below, a method for measuring X-axis alignment error using the alignment mark image shown in Fig. 4 is described.

[0096] A method for measuring alignment error may include the following steps:

[0097] First, the difference between the X value of the center of symmetry (COS1) of the first alignment mark (10) and the X value of the center (COI) of the acquired alignment mark image is obtained (S11).

[0098] As shown in Fig. 4, an area (A1) at the center of the acquired alignment mark image is selected, and an area (A2) that is 180 degrees symmetrical with respect to the center (COI) of the acquired alignment mark image is selected.

[0099] Next, the two-dimensional images of the two selected areas (A1, A2) are each projected into one dimension. That is, the gray values ​​of pixels with the same X value in the two-dimensional image are added, the average of the gray values ​​is calculated, or the gray values ​​are normalized. Then, as shown in (a) and (b) of Fig. 8, graphs (G) showing the change in gray value according to the X value are generated. X1 , G X2 ) can be drawn respectively. At this time, the graph representing the A2 area (G X2 ) may be a graph obtained by projecting a two-dimensional image of area A2 and then flipping it left and right.

[0100] Since the gray level of the first bars (112a, 112b) is different from the gray level of the background area between the first bars (112a, 112b), as shown in (a) of Fig. 8, a graph (G) in which peaks appear at the positions of the first bars (112a, 112b) X1 ) can be obtained.

[0101] If the X value of the center of symmetry (COS1) of the first alignment mark (10) and the X value of the center (COI) of the acquired alignment mark image are the same, the two graphs (G X1 , G X2 ) should be almost identical to each other.

[0102] If the X value of the center of symmetry (COS1) of the first alignment mark (10) and the X value of the center (COI) of the acquired alignment mark image are not the same, the two graphs (G X1 , G X2 ) are offset. And this offset value (ΔX) represents the difference between the X value of the center of symmetry (COS1) of the first alignment mark (10) and the X value of the center (COI) of the acquired alignment mark image.

[0103] In addition, the signal obtained by projecting an area including both the first bar pattern (110) and the second bar pattern (120) and the signal obtained by rotating the area 180 degrees around the center (COI) of the alignment mark image and then projecting it can be compared to obtain the difference between the X value of the center of symmetry (COS1) of the first alignment mark (10) and the X value of the center (COI) of the acquired alignment mark image.

[0104] Also, the graph (G) as shown in Fig. 9 X1 ` , G X2 ` ) can also be used to obtain the offset value (ΔX) in the same way. The graph (G) shown in Fig. 9 X1 ` , G X2 ` ) can be obtained by projecting an alignment mark image in which the background area is brighter (gray level is higher) than the first to eighth bar patterns. Such an alignment mark image with inverted gray level can be obtained by adjusting the wavelength and / or focus position of the illumination used in the process of obtaining the alignment mark image.

[0105] The graph (G) shown in Fig. 9 X1 ` , G X2 `) has the advantage of displaying four peaks, just like when four bars are used. In addition, since the width of the dark area formed by the bar located at the center of the bar pattern is wide, the influence from the adjacent bright area is reduced, so that the boundary between the bar located at the center and the background area becomes clearer, and the contrast of the bar pattern can be improved. As illustrated in Fig. 8, it is difficult to expect such an effect when the width of the bright area at the center is wide and the width of the dark area is narrow to the minimum width.

[0106] Next, the difference between the X value of the center of symmetry (COS2) of the second alignment mark (20) and the X value of the center (COI) of the acquired alignment mark image is obtained. In this step, an area (A3) including the third bar pattern (210) is selected from the acquired alignment mark image, and an area (A4) that is 180 degrees symmetrical with respect to the center (COI) of the acquired alignment mark image is selected. Then, graphs representing the two selected areas (A2, A4) are drawn, and these are used to obtain the difference between the X value of the center of symmetry (COS2) of the second alignment mark (20) and the X value of the center (COI) of the acquired alignment mark image.

[0107] Next, the alignment error value in the X-axis direction is obtained by using the difference between the X value of the symmetry center (COS1) of the first alignment mark (10) obtained previously and the X value of the center (COI) of the acquired alignment mark image and the difference between the X value of the symmetry center (COS2) of the second alignment mark (20) and the X value of the center (COI) of the acquired alignment mark image.

[0108] By changing only the projection direction, the difference between the Y value of the center of symmetry (COS1) of the first alignment mark (10) and the Y value of the center of symmetry (COI) of the acquired alignment mark image can be obtained using the signals from the fifth bar pattern (310) and the sixth bar pattern (320) in the same way, and the difference between the Y value of the center of symmetry (COS1) of the second alignment mark (20) and the Y value of the center of symmetry (COI) of the acquired alignment mark image can be obtained using the signals from the seventh bar pattern (410) and the eighth bar pattern (420), and using this, the alignment error value in the Y-axis direction can be obtained.

[0109] Hereinafter, a wafer bonding method for aligning and bonding a first semiconductor wafer (1) and an inverted second semiconductor wafer (2) using the above-described alignment marks will be described.

[0110] First, as shown in FIGS. 1 and 2, a first alignment mark (10) and a second alignment mark (20) are formed in predetermined areas of a first semiconductor wafer (1) and a second semiconductor wafer (2), respectively.

[0111] The second alignment mark (20) is formed in a predetermined area of ​​the second semiconductor wafer (2) so as to overlap with the first alignment mark (10) in an inverted state when combining the first semiconductor wafer (1) and the inverted second semiconductor wafer (2).

[0112] Next, as illustrated in FIG. 3, the first semiconductor wafer (1) and the second semiconductor wafer (2) are temporarily aligned so that the surfaces on which the semiconductor elements of the first semiconductor wafer (1) and the second semiconductor wafer (2) are formed face each other. In this step, the coordinates of the first alignment mark (10) and the coordinates of the second alignment mark (20) are individually measured, and temporary alignment can be performed using these coordinates.

[0113] Next, using the camera (5), an alignment mark image (e.g., the image of FIG. 4) in which the first alignment mark (10) and the second alignment mark (20) overlap is acquired.

[0114] And by analyzing the alignment mark image, the alignment error between the first symmetry center (COS1) and the second symmetry center (COS2) of the first alignment mark (10) and the second alignment mark (20) is calculated.

[0115] And using this alignment error, the first alignment mark (10) and the second alignment mark (20) are aligned. If the first symmetry center (COS1) and the second symmetry center (COS2) overlap (if the alignment error is 0), the first alignment mark (10) and the second alignment mark (20) can be considered aligned. If the first alignment mark (10) and the second alignment mark (20) are aligned, the first semiconductor wafer (1) and the second semiconductor wafer (2) are also aligned.

[0116] Next, the aligned first semiconductor wafer (1) and second semiconductor wafer (2) are bonded.

[0117] FIG. 10 is a drawing showing an alignment mark according to another embodiment of the present invention.

[0118] The alignment mark of this embodiment differs from the embodiment illustrated in FIG. 4 only in that the first bars (512a, 512b) and the second bars (522a, 522b) constituting the first bar pattern (510) and the second bar pattern (520) of the first mark structure (500) are separated vertically.

[0119] The alignment error can be measured using the alignment mark of this embodiment in the same manner as the alignment error measurement method using the alignment mark illustrated in Fig. 4.

[0120] Figure 11 is a drawing showing other examples of the first bar pattern.

[0121] As illustrated in (a) and (b) of FIG. 11, the bars (612a, 612b, 712a, 712b) constituting the first bar pattern (610, 710) may be composed of a plurality of segmented micro-elements (614a, 614b, 714a, 714b). The micro-elements (614a, 614b, 714a, 714b) may be parallel lines (614a, 614b) or squares (714a, 714b).

[0122] Using micro-elements (614a, 614b, 714a, 714b) has the advantage of being able to increase signal strength by utilizing constructive interference and destructive interference. In particular, when using infrared band illumination, the problem of resolution deterioration may occur, so it is necessary to increase signal strength. In addition, there is the advantage of being able to reduce the loading effect that affects the uniformity and precision of the etching process during the etching process. The width and spacing of the micro-elements (614a, 614b, 714a, 714b) can be determined by the performance of the optical measuring device. It is preferable that the micro-elements (614a, 614b, 714a, 714b) have a narrow width and spacing that cannot be optically resolved by the optical measuring device. When the first bar pattern (610, 710) is photographed using an optical measuring device, the microelements (614a, 614b, 714a, 714b) are not distinguishable, and it appears that there are only three bars (612a, 612b, 712a, 712b).

[0123] In addition, as shown in (c) of FIG. 11, among the bars (812a, 812b) constituting the first bar pattern (810), only the wide bar (812a) positioned at the center may be made of fine elements (814a).

[0124] The bars constituting the second to eighth bar patterns of FIGS. 4 and 10 may also be composed of a plurality of segmented micro-elements, as illustrated in FIG. 11.

[0125] Fig. 12 is a drawing showing the center of an alignment mark according to another embodiment of the present invention. The alignment mark illustrated in Fig. 12 differs from the alignment mark illustrated in Fig. 4 only in the shapes of the first bar pattern (910) and the second bar pattern (920) arranged in the center.

[0126] The alignment marks illustrated in Fig. 12 have a first bar pattern (910) and a second bar pattern (920) that are asymmetrical left-right and up-down. The left bar (912b) of the first bar pattern (910) is longer than the right bar (912c), and the left bar (922c) of the second bar pattern (920) is shorter than the right bar (922b).

[0127] This asymmetry of the alignment marks in Figure 12 can be helpful in detecting inconsistent variations that may occur during the deposition or etching process that forms the alignment marks. Furthermore, because the bias causing the asymmetry is in exactly opposite directions, it can help offset small errors that occur during measurement. It can also be useful in detecting and compensating for mechanical bias in lithography equipment.

[0128] The embodiments described above merely describe preferred embodiments of the present invention, and the scope of the present invention is not limited to the described embodiments, and various changes, modifications, or substitutions may be made by those skilled in the art within the technical spirit and scope of the claims of the present invention, and it should be understood that such embodiments fall within the scope of the present invention.

[0129] [Explanation of symbols]

[0130] 1: First semiconductor wafer

[0131] 2: First semiconductor wafer

[0132] 5: Camera

[0133] 10: First alignment mark

[0134] 20: Second alignment mark

[0135] 30: Alignment Mark

[0136] 100: First Mark Structure

[0137] 110: First Bar Pattern

[0138] 120: Second Bar Pattern

[0139] 200: Second Mark Structure

[0140] 210: Third Bar Pattern

[0141] 220: Fourth Bar Pattern

[0142] 300: Third Mark Structure

[0143] 310: Fifth Bar Pattern

[0144] 320: 6th Bar Pattern

[0145] 400: 4th Mark Structure

[0146] 410: 7th Bar Pattern

[0147] 420: 8th Bar Pattern

Claims

1. As an alignment mark used in a wafer bonding process for aligning and bonding a first semiconductor wafer and a flipped second semiconductor wafer, A first alignment mark formed in a predetermined first region of the first semiconductor wafer and having a first center of symmetry; A second alignment mark formed in a predetermined second region of the second semiconductor wafer and having a second center of symmetry, When combining the first semiconductor wafer and the flipped second semiconductor wafer, the second region overlaps the first region, When the first semiconductor wafer and the flipped second semiconductor wafer are aligned, the first symmetry center and the second symmetry center overlap, The difference between the first symmetry center and the second symmetry center represents an alignment error between the first semiconductor wafer and the flipped second semiconductor wafer, The above first alignment mark is, A first bar pattern comprising a plurality of first bars spaced apart along a first direction; a second bar pattern comprising a plurality of second bars spaced apart along the first direction and having 180-degree rotational symmetry with the first bar pattern, and a first mark structure disposed at the center of the alignment mark; A fifth bar pattern disposed on a first diagonal line with the first mark structure interposed therebetween; and a sixth bar pattern, wherein the fifth bar pattern and the sixth bar pattern have 180-degree rotational symmetry, the fifth bar pattern including a plurality of fifth bars disposed at intervals along a second direction orthogonal to the first direction, and the sixth bar pattern including a third mark structure including a plurality of sixth bars disposed at intervals along the second direction. The second alignment mark that is flipped over is, A third bar pattern including a plurality of third bars that are offset from the first bar pattern in the second direction and arranged at intervals along the first direction; A second mark structure including a fourth bar pattern that is arranged at intervals along the first direction and is arranged to face the third bar pattern with the first mark structure interposed therebetween, and has 180-degree rotational symmetry with the third bar pattern; A seventh bar pattern disposed on a second diagonal line intersecting the first diagonal line with the first mark structure in between; and an eighth bar pattern, wherein the seventh bar pattern and the eighth bar pattern have 180-degree rotational symmetry, the seventh bar pattern includes a plurality of seventh bars disposed at intervals along the second direction, and the eighth bar pattern includes a fourth mark structure including a plurality of eighth bars disposed at intervals along the second direction. An alignment mark used in a wafer bonding process, wherein each bar pattern included in the first alignment mark and the second alignment mark includes at least two bars having different widths.

2. In paragraph 1, An alignment mark used in a wafer bonding process in which the spacing between bars included in each bar pattern included in the first alignment mark and the second alignment mark is constant.

3. In paragraph 2, An alignment mark used in a wafer bonding process, wherein the width of the bar positioned in the center among the bars belonging to each bar pattern included in the first alignment mark and the second alignment mark is wider than the width of the bars positioned in the periphery.

4. In paragraph 3, An alignment mark used in a wafer bonding process, wherein each bar pattern included in the first alignment mark and the second alignment mark includes three bars, the bar positioned in the center has a first width, the bars positioned in the periphery have a second width, and the first width is wider than the second width.

5. In paragraph 1, The above first bars and the above second bars are alignment marks used in a wafer bonding process connected to each other along the second direction.

6. In paragraph 1, The above alignment mark is an alignment mark used in a wafer bonding process that is identifiable by an optical measuring device that uses infrared rays as an illumination source and has an area of 20㎛×20㎛ or less.

7. In paragraph 1, An alignment mark used in a wafer bonding process, wherein each bar included in each bar pattern included in the first alignment mark and the second alignment mark is composed of a plurality of divided micro-elements.

8. In paragraph 7, The above microscopic elements are alignment marks used in the wafer bonding process, which are parallel lines or squares.

9. In paragraph 7, The above-mentioned plurality of segmented micro-elements are alignment marks used in a wafer bonding process having narrow widths and spacings that cannot be optically resolved by an optical measuring device that photographs the alignment marks.

10. In paragraph 1, An alignment mark used in a wafer bonding process in which a bar positioned at the center among the bars belonging to each bar pattern included in the first alignment mark and the second alignment mark is composed of a plurality of divided micro-elements.

11. In paragraph 1, The above first bar pattern and the above second bar pattern are alignment marks used in a wafer bonding process that are asymmetrical with respect to the first direction and second direction reference lines.

12. A wafer bonding method using the alignment mark of paragraph 1, A step of forming the first alignment mark in the first region of the first semiconductor wafer and forming the second alignment mark in the second region of the second semiconductor wafer; A step of adjusting the relative position between the first semiconductor wafer and the second semiconductor wafer so that the first alignment mark and the second alignment mark are aligned; A wafer bonding method comprising a step of bonding the first semiconductor wafer and the second semiconductor wafer.

13. A method for measuring wafer alignment error using the alignment mark of paragraph 1, Steps for obtaining alignment mark images, A step of selecting two areas of the first alignment mark that are 180 degrees symmetrical to each other based on the center of the acquired alignment mark image, A step of projecting the two-dimensional images of the above two areas into one dimension to obtain a pair of graphs representing each area, A method for measuring wafer alignment error, comprising the step of comparing the pair of graphs to obtain an offset value between the first alignment mark and the center of the alignment mark image.

14. In paragraph 13, The step of obtaining the above alignment mark image is: A wafer alignment error measurement method, which is a step of adjusting the wavelength or focus position of the lighting used in the step of obtaining the alignment mark image, thereby obtaining an alignment mark image in which the first to eighth bar patterns are displayed darker than the background areas.

Images