Silicon member

Abstract

A silicon member is characterized by comprising a polycrystalline region, having a percentage of coincidence grain boundary in the crystal grain boundary of the polycrystalline region of 80% or greater, and having a recess depth from the surface of 0.5 μm or less. The percentage of the Σ3 grain boundary in the coincidence grain boundary is preferably 80% or greater. The percentage of the Σ9 grain boundary in the coincidence grain boundary is preferably from 3% to 20%. The percentage of random grain boundaries in the crystal grain boundary of the polycrystalline region is preferably 15% or less.

Description

Silicon parts

[0001] The present invention relates to a silicon member used in a corrosive environment such as a plasma processing apparatus. This application claims priority to Japanese Patent Application No. 2024-060406, filed on April 3, 2024, the contents of which are incorporated herein by reference.

[0002] Conventionally, in semiconductor manufacturing equipment such as plasma etching equipment used in semiconductor device manufacturing processes, components made of high-purity materials have been used to prevent deterioration of characteristics and yields. In particular, since silicon is the same material as device wafers, silicon components made of high-purity silicon material are widely used in semiconductor manufacturing equipment.

[0003] For example, in a plasma etching apparatus, an electrode plate connected to a high-frequency power source and a stand are arranged, for example, one above the other, facing each other within a chamber, and a silicon wafer is placed on the stand. A high-frequency voltage is applied while gas is circulated toward the silicon wafer through through-holes formed in the electrode plate, thereby generating plasma and performing processes such as etching on the silicon wafer.

[0004] In the above-mentioned plasma processing apparatuses and the like, silicon members made of high-purity silicon materials are widely used to suppress metal contamination in the chamber. Examples of silicon members include electrode plates, silicon rings, shower plates, etc. Here, raw materials for the silicon members include polycrystalline silicon, mono-like silicon, and single-crystalline silicon, as disclosed in Patent Document 1, for example.

[0005] Japanese Patent Application Publication No. 2014-141403 (A)

[0006] Recently, for example, in the semiconductor device manufacturing process, the silicon wafers to be used have been enlarged in area, and the silicon components mentioned above are also required to be larger in size. As it is difficult to use single crystal silicon as the material for large silicon components, polycrystalline silicon or mono-like silicon is used instead.

[0007] Here, in polycrystalline silicon and mono-like silicon, grain boundaries exist, and there is a risk that the grain boundaries will corrode preferentially in a corrosive environment (plasma and corrosive chemicals). If the grain boundaries corrode preferentially and a depression (e.g., a groove, trench, crack, slit, step, etc.) is formed, corrosion may accelerate in the depression, causing the depression to expand. Depending on the equipment and conditions used, if the depression exceeds approximately 1 mm, a defect called abnormal discharge may occur in the depression, reducing the processing distribution of the silicon wafer. Furthermore, in the above-mentioned silicon member, depressions are formed on the surface due to scratches and microcracks caused by grinding, polishing, etc., and there is a risk that the depressions will corrode preferentially in a corrosive environment (plasma and corrosive chemicals).

[0008] The present invention has been made in consideration of the above-mentioned circumstances, and aims to provide a silicon member that can suppress the occurrence of localized corrosion and extend its service life even when used in a corrosive environment.

[0009] In order to solve the above problems, the inventors conducted extensive research and found that coincidence grain boundaries have atoms partially bonded to each other, and that the bonding strength of the grain boundaries is stronger than that of random grain boundaries, making it possible to suppress preferential corrosion of the grain boundaries.Furthermore, they found that removing minute depressions such as polishing scratches and microcracks formed on the surface of a silicon member can suppress the progression of localized corrosion caused by the depressions, thereby extending the service life of the member.

[0010] The present invention has been made based on the above-mentioned findings, and a silicon member according to aspect 1 of the present invention is characterized in that it has a polycrystalline region consisting of a plurality of crystal grains, the proportion of coincidence grain boundaries among the crystal grain boundaries of the polycrystalline region is 80% or more, and the depth of a recess on the surface is 0.5 μm or less.

[0011] According to the silicon member of the first aspect of the present invention, the silicon member has a polycrystalline region consisting of a plurality of crystal grains, and the proportion of coincidence boundaries in the crystal grain boundaries of the polycrystalline region is 80% or more, thereby suppressing preferential corrosion of the grain boundaries. Furthermore, since the depth of the surface depressions is 0.5 μm or less, corrosion in the depressions can be suppressed. Therefore, even when used in a corrosive environment, local corrosion can be suppressed, and the service life can be extended.

[0012] A silicon member of Aspect 2 of the present invention is characterized in that, in the silicon member of Aspect 1, the proportion of Σ3 grain boundaries in the coincidence grain boundaries is 80% or more. According to the silicon member of Aspect 2 of the present invention, the proportion of Σ3 grain boundaries in the coincidence grain boundaries is 80% or more, and there are many Σ3 grain boundaries among the coincidence grain boundaries, which have a large number of atomic bonds and a high grain boundary bonding strength, and this can further suppress preferential corrosion of the grain boundaries even when used in a corrosive environment.

[0013] A silicon member of Aspect 3 of the present invention is characterized in that, in the silicon member of Aspect 1 or Aspect 2, the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less. According to the silicon member of Aspect 3 of the present invention, since the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less, many Σ9 grain boundaries with relatively strong grain boundary bonding strength are present in parts other than the Σ3 grain boundaries, and preferential corrosion of the grain boundaries can be further suppressed even when used in a corrosive environment.

[0014] A silicon member according to a fourth aspect of the present invention is characterized in that the proportion of random grain boundaries in the grain boundaries of the polycrystalline region is 20% or less in the silicon portion of any one of aspects 1 to 3. According to the silicon member according to the fourth aspect of the present invention, the proportion of random grain boundaries in the grain boundaries of the polycrystalline region is limited to 20% or less, so that preferential corrosion of the grain boundaries can be reliably suppressed even when the silicon member is used in a corrosive environment.

[0015] A silicon member of Aspect 5 of the present invention is characterized in that the total length of the grain boundaries within a 10 mm × 20 mm observation field is 50 cm or less in the silicon member of any one of Aspects 1 to 4. According to the silicon member of Aspect 5 of the present invention, since the total length of the grain boundaries within a 10 mm × 20 mm observation field is 50 cm or less, there are few grain boundaries, and the progress of localized corrosion can be suppressed even when the silicon member is used in a corrosive environment.

[0016] According to the present invention, it is possible to provide a silicon member that can suppress the occurrence of localized corrosion even when used in a corrosive environment, and that can extend the service life.

[0017] FIG. 1 is an explanatory diagram (top view) showing an example of a silicon member according to an embodiment of the present invention. FIG. 2 is an explanatory diagram (cross-sectional view) showing an example of a silicon member according to an embodiment of the present invention. FIG. 3 is a flow diagram showing an example of a method for manufacturing a silicon member according to an embodiment of the present invention. FIG. 4 is an explanatory diagram of a silicon ingot manufacturing apparatus used in the method for manufacturing a silicon member shown in FIG. 2. FIG. 5 is a schematic explanatory diagram of a crucible used in the silicon ingot manufacturing apparatus shown in FIG. 3. FIG. 5 is an observation result of a polycrystalline region of Inventive Example 1. FIG. 6 is an observation result of a polycrystalline region of Inventive Example 2. FIG. 7 is an observation result of a polycrystalline region of Inventive Example 2. FIG. 8 is an observation result of a polycrystalline region of Comparative Example 1. FIG. 9 is an observation result of a polycrystalline region of Comparative Example 1.

[0018] A silicon member according to an embodiment of the present invention will be described below with reference to the accompanying drawings. The silicon member according to this embodiment is a silicon member disposed in a chamber of a plasma processing apparatus, such as a plasma etching apparatus or a plasma CVD apparatus, used in a semiconductor device manufacturing process. In this embodiment, the silicon member is a silicon electrode plate having a structure in which a plurality of ventilation holes are formed in a plate-like member.

[0019] The silicon member 10 of this embodiment has a generally circular disk shape as shown in Fig. 1A. Note that vent holes are omitted in Fig. 1A and Fig. 1B. Here, the silicon member 10 of this embodiment is obtained by cutting a directionally solidified monolike silicon ingot perpendicular to the solidification direction, as will be described later, and has a single crystal region 11 located at the center of the disk and a polycrystalline region 12 located on the outer periphery of this single crystal region 11, as shown in Fig. 1A and Fig. 1B. In this embodiment, the area ratio of the single crystal region 11 located at the center of the disk is 30% or more.

[0020] In the silicon member 10 of this embodiment, the proportion of coincidence boundaries among the grain boundaries of the polycrystalline region 12 is 80% or more. That is, the proportion of the length of the coincidence boundaries to the total length of the grain boundaries present in the polycrystalline region 12 is 80% or more. In addition, in the silicon member 10 of this embodiment, the depth of recesses on the surface is 0.5 μm or less.

[0021] In the silicon member 10 of this embodiment, the proportion of Σ3 grain boundaries in the coincidence grain boundaries (the proportion of the Σ3 grain boundary length in the coincidence grain boundary length) is preferably 80% or more. Furthermore, in the silicon member 10 of this embodiment, the proportion of Σ9 grain boundaries in the coincidence grain boundaries (the proportion of the Σ9 grain boundary length in the coincidence grain boundary length) is preferably 3% or more and 20% or less.

[0022] In the silicon member 10 of this embodiment, the proportion of random grain boundaries in the grain boundaries of the polycrystalline region 12 (the proportion of the length of the random grain boundaries to the total length of the grain boundaries present in the polycrystalline region 12) is preferably 15% or less. Furthermore, in the silicon member 10 of this embodiment, the total length of the grain boundaries within an observation field of 10 mm × 20 mm (total grain boundary length) is preferably 50 cm or less.

[0023] The reason why the crystal structure of the silicon member 10 according to this embodiment is defined as described above will be explained below.

[0024] (Proportion of coincidence boundaries in the grain boundaries of the polycrystalline region: 80% or more) The grain boundaries present in the polycrystalline region 12 described above may be preferentially corroded in corrosive environments (plasma and corrosive chemicals). Here, a coincidence boundary is an ordered grain boundary in which atoms on the grain boundary are located on the lattice points of the crystals on both sides, and have an atomic arrangement in a shared relationship. This is a type of twin boundary, and in the case of a Σ3 coincidence boundary, if one of the crystals is rotated 180° about an axis perpendicular to a certain face, the grain boundary disappears and the crystal becomes a single crystal.

[0025] Since atoms at coincidence boundaries are partially bonded to each other, the bonding strength of the grain boundaries is stronger than that of random grain boundaries, making it possible to suppress preferential corrosion of the grain boundaries. Therefore, in this embodiment, the proportion of coincidence boundaries in the grain boundaries of the polycrystalline region 12 is set to 80% or more, thereby suppressing preferential corrosion of the grain boundaries. In this embodiment, the proportion of coincidence boundaries in the grain boundaries of the polycrystalline region 12 is preferably 85% or more, and more preferably 90% or more.

[0026] (Surface recess depth: 0.5 μm or less) If recesses are formed on the surface of the silicon member 10 due to scratches or microcracks caused by grinding, polishing, or the like, these recessed portions will corrode preferentially in a corrosive environment (plasma and corrosive chemicals). For this reason, in this embodiment, the recess depth on the surface of the silicon member 10 is limited to 0.5 μm or less. Note that in this embodiment, the recess depth on the surface of the silicon member 10 is preferably 0.25 μm or less, and more preferably 0.1 μm or less. Although not particularly limited, the recess depth on the surface of the silicon member 10 may be 0.001 μm or more, 0.005 μm or more, or 0.01 μm or more.

[0027] (Proportion of Σ3 grain boundaries in coincidence grain boundaries: 80% or more) In the Σ3 grain boundaries, atoms are bonded to one another at a rate of three, and since the number of atomic bonds is large and the bonding strength of the grain boundaries is strong among coincidence grain boundaries, preferential corrosion of the grain boundaries is further suppressed even in corrosive environments. For this reason, in this embodiment, the proportion of Σ3 grain boundaries in the coincidence grain boundaries is preferably 80% or more. Note that in this embodiment, the proportion of Σ3 grain boundaries in the coincidence grain boundaries is more preferably 85% or more, and even more preferably 90% or more.

[0028] (Proportion of Σ9 grain boundaries in coincidence grain boundaries: 3% or more and 20% or less) In Σ9 grain boundaries, atoms are bonded to each other at a rate of one in nine, and the bonding strength of the grain boundaries is relatively strong, which further suppresses preferential corrosion of the grain boundaries even in corrosive environments. Therefore, it is preferable that there are many Σ9 grain boundaries as coincidence grain boundaries other than the Σ3 grain boundaries. For this reason, in this embodiment, it is preferable that the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less. Note that in this embodiment, the proportion of Σ9 grain boundaries in the coincidence grain boundaries is more preferably 5% or more, and even more preferably 7% or more. Meanwhile, the proportion of Σ9 grain boundaries in the coincidence grain boundaries is more preferably 17% or less, and even more preferably 15% or less.

[0029] (Proportion of random grain boundaries in the grain boundaries of the polycrystalline region: 15% or less) Random grain boundaries have a lower grain boundary bonding strength than coincidence boundaries, and there is a risk that the grain boundaries will corrode preferentially in a corrosive environment. For this reason, it is preferable to limit the proportion of random grain boundaries in the grain boundaries of the polycrystalline region 12 to 15% or less. In this embodiment, the proportion of random grain boundaries in the grain boundaries of the polycrystalline region 12 is more preferably 10% or less, and even more preferably 5% or less. Furthermore, the proportion of random grain boundaries in the grain boundaries of the polycrystalline region 12 may be 0%.

[0030] (Total length of grain boundaries within a 10 mm × 20 mm observation field: 50 cm or less) As described above, in the polycrystalline region 12, the grain boundaries may corrode preferentially in a corrosive environment, so a short grain boundary length is preferable. Therefore, in this embodiment, the total length of grain boundaries within a 10 mm × 20 mm observation field measured by electron backscatter diffraction is preferably 50 cm or less. In this embodiment, the total length of grain boundaries within a 10 mm × 20 mm observation field is more preferably 30 cm or less, and even more preferably 20 cm or less. While not particularly limited, the total length of grain boundaries within a 10 mm × 20 mm observation field may be 0.1 cm or more, 1 cm or more, or 5 cm or more.

[0031] Next, a method for manufacturing the silicon member 10 according to this embodiment will be described with reference to FIGS.

[0032] As shown in FIG. 2, the method for manufacturing the silicon member 10 according to this embodiment includes a silicon ingot manufacturing step S01, a silicon ingot cutting step S02, a processing step S03, and a polishing step S04.

[0033] (Silicon ingot manufacturing process S01) First, a silicon ingot is manufactured as a material for the silicon member 10. The crystal structure is controlled by this silicon ingot manufacturing process S01. First, a silicon ingot manufacturing apparatus 20 used in the silicon ingot manufacturing process S01 will be described with reference to FIG.

[0034] This silicon ingot manufacturing apparatus 20 includes a crucible 30 in which silicon melt L is stored, a chill plate 22 on which this crucible 30 is placed, a lower heater 23 that supports this chill plate 22 from below, and an upper heater 24 that is disposed above the crucible 30. Insulating material 25 is provided around the crucible 30. The chill plate 22 has a hollow structure, and Ar gas is supplied to the inside through a supply pipe 26.

[0035] Here, the crucible 30 used in the silicon ingot manufacturing apparatus 20 of this embodiment will be described with reference to Fig. 4. The crucible 30 shown in Fig. 4 has a mold 31 and a silica layer 32 formed on the inner surface of the mold 31. The mold 31 is made of, for example, quartz or graphite.

[0036] As shown in Fig. 4, the silica layer 32 is provided inside the mold 31 and has a structure in which slurry layers 33 made of fine silica powder and colloidal silica having an average particle size of 1 µm to 200 µm and stucco layers 34 made of coarse silica powder having an average particle size of 100 µm to 1000 µm are alternately stacked in the thickness direction, with the slurry layer 33 being the innermost layer that comes into contact with the silicon ingot, and the total number of the stacked slurry layers 33 and stucco layers 34 being 6 or more. In this embodiment, as shown in Fig. 4, the slurry layer 33 is formed at a location that comes into contact with the inner surface of the mold 31, and the total number of the stacked slurry layers 33 and stucco layers 34 is 6.

[0037] If the total number of stacked slurry layers 33 and stucco layers 34 is less than six, the stress applied when removing the silicon ingot may not be fully relieved, resulting in cracks in the silicon ingot. For this reason, in this embodiment, the total number of stacked slurry layers 33 and stucco layers 34 is set to six or more. Furthermore, by setting the average particle size of the fine silica powder to be in the range of 1 μm to 200 μm, the fine silica powder can be mixed with colloidal silica to form a slurry, thereby successfully forming the above-mentioned slurry layer 33. Furthermore, by setting the average particle size of the coarse silica powder to be in the range of 100 μm to 1000 μm, the surface roughness is not increased more than necessary, making it easier to separate the silicon ingot from the mold 31.

[0038] In this embodiment, the thickness of the silica layer 32 (total thickness of the laminated slurry layer 33 and stucco layer 34) is preferably 1 mm or more, and more preferably 2 mm or more. On the other hand, the thickness of the silica layer 32 (total thickness of the laminated slurry layer 33 and stucco layer 34) is preferably 30 mm or less, and more preferably 25 mm or less.

[0039] Furthermore, the thickness of the slurry layer 33 is preferably 0.1 mm or more, and more preferably 0.2 mm or more. On the other hand, the thickness of the slurry layer 33 is preferably 5 mm or less, and more preferably 4 mm or less. On the other hand, the thickness of the stucco layer 34 is preferably 0.1 mm or more, and more preferably 0.2 mm or more. On the other hand, the thickness of the stucco layer 34 is preferably 5 mm or less, and more preferably 4 mm or less.

[0040] Next, a method for manufacturing a silicon ingot using the silicon ingot manufacturing apparatus 20 shown in FIG. 3 will be described.

[0041] First, a seed crystal plate is placed at the bottom of the crucible 30 shown in Figure 4 (seed crystal plate placement step). The seed crystal plate may be composed of a single crystal, and may be taken from a single crystal silicon ingot. Note that, although the crystal grows according to the crystal plane orientation of the seed crystal plate surface, there are no particular limitations on the crystal plane orientation of the seed crystal plate surface.

[0042] Next, silicon raw material is charged into the crucible 30 in which the seed crystal plate is placed (raw material charging step). Here, the silicon raw material is a mass called a "chunk" obtained by crushing high-purity silicon of 11N (purity 99.999999999). The particle size of this mass silicon raw material is, for example, 30 mm to 100 mm.

[0043] Next, the silicon raw material charged in the crucible 30 is heated by energizing the upper heater 24 and the lower heater 23. At this time, the output of the lower heater 23 is adjusted so that the seed crystal plate placed at the bottom of the crucible 30 does not completely melt, and the upper chunk of the seed crystal plate is mainly melted from above (silicon raw material melting process). This causes the silicon melt to accumulate in the crucible 30. If the seed crystal plate completely melts, liquid phase epitaxial growth cannot occur, and many crystal nuclei are generated at the bottom of the crucible, becoming polycrystalline, and a single crystal does not grow well. For this reason, it is necessary to control the temperature so that the seed crystal plate does not completely melt.

[0044] Next, the amount of current supplied to the lower heater 23 is further reduced, and Ar gas is supplied into the chill plate 22 via the supply pipe 26. This cools the bottom of the crucible 30. Furthermore, by gradually reducing the current supplied to the upper heater 24, the silicon melt in the crucible 30 undergoes crystal growth while retaining the crystal orientation of the seed crystal plate placed at the bottom of the crucible 30, resulting in a silicon ingot with a unidirectionally solidified structure and a single crystal portion (unidirectional solidification process). The casting conditions are preferably adjusted so that the solidification rate is within the range of 5 mm / h to 20 mm / h.

[0045] Here, in the unidirectional solidification process, the temperature gradient of the silicon melt becomes stronger in the vertical direction, which increases the proportion of coincidence grain boundaries in the polycrystalline region. Therefore, in this embodiment, it is preferable to control the outputs of the upper heater 24 and the lower heater 23 so that the temperature difference between the top and bottom of the furnace is 70°C or more. In this embodiment, the temperature measurement positions in the furnace at this temperature difference are near the top and bottom of the silicon ingot. Note that in this embodiment, the temperature difference between the top and bottom of the furnace is more preferably 80°C or more, and even more preferably 100°C or more. There is no particular upper limit to the temperature difference between the top and bottom of the furnace, but it is preferably 250°C or less, and more preferably 150°C or less.

[0046] After solidification is complete, the silicon ingot formed inside the crucible 30 is removed. In this manner, the silicon ingot of this embodiment is manufactured. In this silicon ingot, a single crystal region is formed in the center of the cross section perpendicular to the solidification direction, and a polycrystalline region is formed on the outer periphery of this single crystal region.

[0047] (Silicon Ingot Cutting Step S02) Next, the directionally solidified silicon ingot is cut perpendicular to the solidification direction as described above to obtain a disk material of a predetermined thickness.

[0048] (Processing step S03) Next, the disk material is machined to have the shape and size of the product, and the surface is polished.

[0049] (Polishing Step S04) Next, the surface of the disc material is polished to a surface recess depth of 0.5 μm or less. In this polishing step S04, for example, an Oscar-type polishing machine can be used, with a nonwoven polishing cloth and NaOH (silica slurry), TMAH (silica slurry), water (diamond slurry), or the like, as the abrasive solvent and abrasive. While the process program settings for polishing vary depending on the machine, typical settings include the polishing table rotation speed, polishing pressure, polishing liquid supply rate, and polishing time. When polishing a 600 mm diameter object as used in this study, each component of the machine is large. The approximate optimal setting ranges are a polishing table rotation speed of 5 rpm to 200 rpm, a polishing pressure of 5 kPa to 1 MPa, a polishing liquid supply rate of 100 mL / min to 10 L / min, and a polishing time of 10 minutes to 1,000 minutes.

[0050] Through the above steps, the silicon member 10 according to this embodiment is manufactured.

[0051] The silicon member 10 of this embodiment configured as described above has a polycrystalline region 12. Since the proportion of coincidence boundaries among the grain boundaries in the polycrystalline region 12 is 80% or more, preferential corrosion of the grain boundaries can be suppressed even in a corrosive environment. Furthermore, since the depth of the surface depressions is 0.5 μm or less, corrosion in the depressions can be suppressed. Therefore, even when the silicon member 10 is used in a corrosive environment, localized corrosion can be suppressed, and the service life of the silicon member 10 can be extended.

[0052] In the silicon member 10 of this embodiment, when the proportion of Σ3 grain boundaries among the coincidence grain boundaries is 80% or more, there are many Σ3 grain boundaries among the coincidence grain boundaries, which have a large number of atomic bonds and a high grain boundary bonding strength, and this can further prevent preferential corrosion of the grain boundaries even when used in a corrosive environment.

[0053] In the silicon member 10 of this embodiment, when the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less, Σ9 grain boundaries with a relatively strong grain boundary bonding strength are present, and preferential corrosion of the grain boundaries can be further suppressed even when used in a corrosive environment.

[0054] In the silicon member 10 of this embodiment, when the proportion of random grain boundaries among the crystal grain boundaries of the polycrystalline region 12 is 15% or less, preferential corrosion of the grain boundaries can be reliably suppressed even when used in a corrosive environment.

[0055] In the silicon member 10 of this embodiment, when the total length of the crystal grain boundaries within an observation field of 10 mm × 20 mm is 50 cm or less, there are few grain boundaries, and the progression of localized corrosion can be suppressed even when the silicon member 10 is used in a corrosive environment.

[0056] Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be modified as appropriate without departing from the technical spirit of the invention. For example, in the present embodiment, the silicon member has been described as a disk-shaped silicon electrode plate, but is not limited thereto and may be a ring-shaped member. Furthermore, in the present embodiment, the silicon member has been described as having a single crystal region, but may not have a single crystal region.

[0057] The results of confirmation experiments conducted to confirm the effectiveness of the present invention will be described below.

[0058] Using the silicon ingot manufacturing apparatus described in the embodiment section above, a directionally solidified silicon ingot (diameter 600 mm) was produced. At this time, the output of the upper heater and the lower heater was controlled to adjust the temperature difference between the top and bottom of the furnace to the value shown in Table 1. The obtained silicon ingot was cut perpendicular to the solidification direction to obtain a disk material.

[0059] The surface of the disk material was then polished using an Oscar polishing machine with the polishing solution shown in Table 1. The polishing cloth was a nonwoven fabric, the polishing platen rotation speed was 30 rpm, the polishing pressure was 50 kPa, the polishing solution supply rate was 1000 mL / min, and the polishing time was 200 minutes. By the above-mentioned process, the silicon members of the present invention and comparative examples shown in Table 1 were produced.

[0060] The obtained silicon members were evaluated as follows for the crystal grain boundaries in the polycrystalline region, the depth of the recesses on the surface, and the etching characteristics.

[0061] (Grain Boundaries in Polycrystalline Region) A silicon member was fabricated from the obtained 600 mm diameter disk material at a position of 175 mm radius (polycrystalline region), and an observation sample was taken. The crystalline structure was then observed using an EBSD device. The measurement range was 10 mm x 20 mm. Using the IPF map display, random grain boundaries and special grain boundaries (Σ3 grain boundaries, Σ9 grain boundaries, etc.) were identified from the grain boundary angles, and the length of each grain boundary was measured to calculate the total grain boundary length. The evaluation results are shown in Table 2. Examples of observation results using the EBSD device are shown in Figures 5A to 7B.

[0062] (Surface Indentation Depth) The depth of the surface indentations was measured using a white light interference microscope on a surface plate in a temperature-controlled room (for example, 23° C.) The measurement method is not limited to a white light interference microscope, and measurements can also be made using a laser microscope, a laser displacement measuring instrument, or a probe-type surface roughness measuring instrument, but a white light interference microscope can measure with a resolution of less than 1 nm.

[0063] (Etching Characteristics) Etching characteristics using fluorine gas were evaluated using a plasma etching device (ICP type etching device). The conditions were: stage diameter: φ150 mm, etching gas: SF6, RF: 2800 W, pressure: 10 Pa, and etching time: 30 minutes. Note that the "etching depth" in Table 2 is the amount of reduction in total thickness. Also, the "grain boundary progression etching depth" is the amount of depression progression. Here, the "grain boundary progression etching depth" was measured at three locations where grain boundary depressions were confirmed (grain boundary boundary 1, grain boundary boundary 2, and grain boundary boundary 3), and each measured value and its average value are listed.

[0064]

[0065]

[0066] In Comparative Example 1, the proportion of coincidence boundaries in the grain boundaries of the polycrystalline region was 73.5%, and etching progressed at the grain boundaries, resulting in localized corrosion. In Comparative Example 2, the proportion of coincidence boundaries in the grain boundaries of the polycrystalline region was 59.5%, and the recess depth was 0.759 mm, resulting in further etching at the grain boundaries, resulting in localized corrosion.

[0067] In Example 1, the proportion of Σ3 boundaries in the coincidence boundaries was 100.0%, the proportion of Σ9 boundaries in the coincidence boundaries was 0.0%, and the proportion of random boundaries in the grain boundaries in the polycrystalline region was 0.0%. In Example 2, the proportion of Σ3 boundaries in the coincidence boundaries was 84.4%, the proportion of Σ9 boundaries in the coincidence boundaries was 15.6%, and the proportion of random boundaries in the grain boundaries in the polycrystalline region was 0.0%.

[0068] As a result of the above, it was confirmed that the present invention can provide a silicon component that can suppress the occurrence of localized corrosion and extend its service life even when used in a corrosive environment.

[0069] According to the present invention, it is possible to provide a silicon member that can suppress the occurrence of localized corrosion and extend the service life.

[0070] 10 silicon member 12 polycrystalline region

Claims

1. A silicon component having a polycrystalline region consisting of multiple crystal grains, wherein the proportion of coincident grain boundaries among the crystal grain boundaries of said polycrystalline region is 80% or more, and the depth of recesses on the surface is 0.5 μm or less.

2. The silicon member according to claim 1, wherein the proportion of Σ3 grain boundaries in the coincidence grain boundaries is 80% or more.

3. A silicon member according to claim 1 or 2, characterized in that the proportion of Σ9 grain boundaries in the coincidence grain boundaries is 3% or more and 20% or less.

4. A silicon member according to claim 1 or 2, characterized in that the proportion of random grain boundaries in the crystal grain boundaries of said polycrystalline region is 15% or less.

5. A silicon member according to claim 1 or 2, characterized in that the total length of the crystal grain boundaries within an observation field of 10 mm x 20 mm is 50 cm or less.

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