Multilayer capacitor

Abstract

Provided is a multilayer capacitor comprising: a plurality of layered isotope electrode sheets; and a first external electrode of a first polarity and a second external electrode of a second polarity, which are electrically connected to the plurality of isotope electrode sheets so as to transmit, to an external load, the electrical energy generated in the plurality of layered isotope electrode sheets, wherein each of the plurality of isotope electrode sheets comprises: a first material layer including an insulator or a semiconductor; a second material layer which has an electrical conductivity higher than the electrical conductivity of the first material layer, and which forms an interface with the first material layer; and a radiation source disposed in the first material layer so as to be spaced apart from the interface.

Description

Multilayer capacitors

[0001] The present invention relates to a multilayer capacitor.

[0002] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0101654, dated July 31, 2024, and Korean Patent Application No. 10-2025-0103906, dated July 30, 2025, the entire contents of which are incorporated herein by reference.

[0003] Radiation emitted by radioactive isotopes can be absorbed through the surface of a pn junction semiconductor and converted into electrical energy. The radiation generates electron-hole pairs in the space charge region within the pn junction semiconductor, and the resulting carriers exhibit voltage-current characteristics.

[0004] The present invention provides a laminated capacitor capable of generating electric energy with high energy density.

[0005] The present invention provides a stacked capacitor comprising: a plurality of stacked isotope electrode sheets; and a first external electrode of a first polarity and a second external electrode of a second polarity electrically connected to the plurality of stacked isotope electrode sheets to transmit electric energy generated from the plurality of stacked isotope electrode sheets to an external load, wherein each of the plurality of isotope electrode sheets comprises: a first material layer comprising an insulator or a semiconductor; a second material layer having an electrical conductivity higher than an electrical conductivity of the first material layer and forming an interface with the first material layer; and a radiation source positioned within the first material layer and spaced apart from the interface.

[0006] Another aspect of the present invention provides a laminated capacitor comprising: a plurality of laminated isotope electrode sheets; and a first external electrode of a first polarity and a second external electrode of a second polarity electrically connected to the plurality of isotope electrode sheets so as to transmit electrical energy generated from the plurality of laminated isotope electrode sheets to an external load. Here, each of the plurality of isotope electrode sheets comprises: a semiconductor substrate; a radiation source penetrating the semiconductor substrate; and a metal oxide layer interposed between the radiation source and the semiconductor substrate, wherein the metal oxide has a band gap energy of 2.7 eV or more.

[0007] The laminated capacitor of the present invention has the effect of generating electric energy with high energy density.

[0008] The effects that can be obtained from the exemplary embodiments of the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly derived and understood by those skilled in the art to which the exemplary embodiments of the present disclosure pertain from the following description. In other words, unintended effects resulting from practicing the exemplary embodiments of the present disclosure can also be derived by those skilled in the art from the exemplary embodiments of the present disclosure.

[0009] FIGS. 1A and 1B are cross-sectional side views showing a laminated capacitor according to embodiments of the present invention.

[0010] FIGS. 2A to 2C are plan views each showing a form in which the radiation source is placed within a through-hole according to embodiments of the present invention.

[0011] FIGS. 3A and 3B are plan views each showing a form in which the radiation source is placed within a slit according to embodiments of the present invention.

[0012] Figures 4 to 6 are cross-sectional side views each showing a laminated capacitor according to different embodiments of the present invention.

[0013] FIG. 7 is a cross-sectional side view showing a laminated capacitor according to one embodiment of the present invention.

[0014] FIG. 8a is a cross-sectional side view showing a stacked capacitor according to another embodiment of the present invention.

[0015] FIG. 8b is a partially enlarged perspective view showing the first region, radiation source, and insulating layer of the laminated capacitor of FIG. 8a.

[0016] FIG. 9 is a cross-sectional side view showing a laminated capacitor according to another embodiment of the present invention.

[0017] FIGS. 10A to 10H are side views illustrating a method for manufacturing a laminated capacitor according to one embodiment of the present invention.

[0018] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention may be modified in various different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. It is preferable to interpret that the embodiments of the present invention are provided to more completely explain the present invention to those of ordinary skill in the art. Like numbers refer to like elements throughout. Furthermore, various elements and areas in the drawings are schematically drawn. Therefore, the present invention is not limited by the relative sizes or intervals depicted in the accompanying drawings.

[0019] While terms like "first" and "second" may be used to describe various components, these components are not limited by these terms. These terms are used solely to distinguish one component from another. For example, a first component could be referred to as a "second component," and vice versa, without departing from the scope of the present invention.

[0020] The terminology used in this application is only used to describe specific embodiments and is not intended to limit the inventive concept. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, it should be understood that the expressions “comprises” or “has” indicate the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not exclude in advance the possibility of the presence or addition of one or more other features, numbers, operations, components, parts, or combinations thereof.

[0021] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention pertains. Furthermore, it is to be understood that commonly used terms, such as those defined in dictionaries, should be interpreted to have a meaning consistent with their meaning within the relevant technical context, and should not be interpreted in an overly formal sense unless explicitly defined herein.

[0022] In some embodiments, where implementations are otherwise feasible, specific process sequences may be performed in a different order than described. For example, two processes described in succession may be performed substantially simultaneously, or in a reverse order from the described order.

[0023] In the accompanying drawings, variations in the shapes depicted may be expected, for example, depending on manufacturing techniques and / or tolerances. Therefore, embodiments of the present invention should not be construed as being limited to the specific shapes of the regions depicted herein, but should include, for example, changes in shapes resulting from the manufacturing process. All terms "and / or" used herein include each and every combination of one or more of the mentioned components. In addition, the term "substrate" used herein may mean the substrate itself, or a laminated structure including the substrate and a predetermined layer or film formed on the surface thereof. In addition, the "surface of the substrate" in this specification may mean the exposed surface of the substrate itself, or the outer surface of a predetermined layer or film formed on the substrate.

[0024]

[0025] FIG. 1a is a cross-sectional side view showing a laminated capacitor (1) according to one embodiment of the present invention.

[0026] Referring to FIG. 1a, the laminated capacitor (1) may include a plurality of laminated isotope electrode sheets (10).

[0027] Each of the above plurality of isotope electrode sheets (10) may include a first material layer (100), a second material layer (110), and a radiation source (200).

[0028] The first material layer (100) may be an insulator or a semiconductor. In some embodiments, the first material layer (100) may include a diamond substrate, a SiC substrate, a GaN substrate, a Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / B2O3 substrate, a Sm2O3 / Bi2O3 / GeO2 / B2O3 substrate, a sapphire substrate, or a combination thereof, which may be undoped substrates.

[0029] In some other embodiments, the first material layer (100) may include a diamond substrate, a SiC substrate, a GaN substrate, a Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / B2O3 substrate, a Sm2O3 / Bi2O3 / GeO2 / B2O3 substrate, a sapphire substrate, or a combination thereof, which may be substrates doped with a dopant.

[0030] In some other embodiments, the first material layer (100) may have a chemical formula of AMO3 (wherein A is at least one selected from the group consisting of La, Ba, Sr, and K, and M is at least one selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta, and Zr).

[0031] Specifically, the first material layer (100) is BaSnO3, BaHfO3, BaZrO3, BaHf 1-x Ti x O3 (where 0 <x<1), Ba 1-x La x SnO3 (where 0 <x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (where 0 <x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x and may include at least one selected from the group consisting of LaAlO3 (wherein 0 <x<1).

[0032] In some embodiments, the first material layer (100) may include a semiconductor substrate. In some embodiments, the first material layer (100) may include a non-conductive substrate.

[0033] In some embodiments, the second material layer (110) may include a metal oxide having a band gap energy of 2.7 eV or more. In some embodiments, the metal oxide may have a chemical formula of AMO3 (wherein A is at least one selected from the group consisting of La, Ba, Sr, and K, and M is at least one selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta, and Zr).

[0034] Specifically, the metal oxide is BaSnO3, BaHfO3, BaZrO3, BaHf 1-x Ti x O3 (where 0 <x<1), Ba 1-x La x SnO3 (where 0 <x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (where 0 <x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x and may include at least one selected from the group consisting of LaAlO3 (wherein 0 <x<1).

[0035] The above metal oxide is not only stable in high temperature and high humidity environments, but also has high carrier mobility, so it can efficiently absorb radiation emitted from a radiation source (200) and / or photons emitted from a photon generation layer (250) described later, thereby providing high energy conversion efficiency. In addition, since there is no inelastic collision in the carrier movement, there is no energy loss and it is advantageous for heat dissipation. For example, the above metal oxide has a 45 cm 2 / (V·s) or more, 80 cm 2 / (V·s) or more, 120 cm 2 / (V·s) or more, further 300 cm2 / (V·s) or higher carrier mobility can be achieved.

[0036] These metal oxides are bidirectionally doped materials and have the advantage of being able to provide high current or high voltage depending on the direction of the applied bias.

[0037] In some embodiments, the first material layer (100) may include a non-conductive substrate. In some embodiments, the first material layer (100) may include a semiconductor substrate.

[0038] Each of the plurality of isotope electrode sheets (10) includes a first surface and a second surface as main surfaces positioned opposite to each other in the thickness direction of the isotope electrode sheet (10). The first surface and the second surface may be an upper main surface and a lower main surface of the first material layer (100), respectively. The width direction C of the isotope electrode sheet (10) may extend in a direction perpendicular to the thickness direction T of the isotope electrode sheet (10). The plurality of isotope electrode sheets (10) may be stacked in a vertical direction V that is parallel to the thickness direction T.

[0039] The first material layer (100) may include a recessed portion, which is a cavity (105). In some embodiments, the recessed portion may be a hole or a trench. The recessed portion may have a shape extending inward between the main surfaces of the first material layer (100). The recessed portion may completely penetrate the first material layer (100) or may partially penetrate it.

[0040] The second material layer (110) may be disposed while forming an interface with the first material layer (100). The second material layer (110) may be disposed at least partially within the concave portion. In some embodiments, the second material layer (110) may be disposed within the concave portion.

[0041] The second material layer (110) may be a material having higher electrical conductivity than the first material layer (100). In some embodiments, the second material layer (110) may include a material having a smaller band gap than the first material layer (100). In some embodiments, the second material layer (110) may include a material having a band gap of about 2.7 eV or more, about 3.0 eV or more, or about 3.5 eV or more.

[0042] The radiation source (200) may be positioned within the first material layer (100). In some embodiments, the radiation source (200) may be positioned within the concave portion, spaced apart from the interface. In some embodiments, the radiation source (200) may be positioned within the first material layer (100), spaced apart from the interface.

[0043] In some embodiments, the second material layer (110) may be provided conformally within the recess. In this case, the second material layer (110) may have a recessed space that inherits the shape of the recessed space. In some embodiments, the radiation source (200) may be positioned within the recessed space.

[0044] In some embodiments, the radiation source (200) may be arranged to penetrate the first material layer (100). The second material layer (110) may be interposed between the first material layer (100) and the radiation source (200). Specifically, the second material layer (110) may be arranged on a side surface of the radiation source (200), and the first material layer (100) may be arranged on a side surface of the second material layer (110). The first material layer (100) includes a substrate doping region (120) doped with an impurity, and the substrate doping region (120) faces the second material layer (110).

[0045] The first material layer (100) may include a diamond substrate, a SiC substrate, a GaN substrate, a Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / B2O3 substrate, a Sm2O3 / Bi2O3 / GeO2 / B2O3 substrate, a sapphire substrate, or a combination thereof.

[0046] The second material layer (110) may include a metal oxide having a band gap energy of 2.7 eV or more. In some embodiments, the metal oxide may have a chemical formula of AMO3 (wherein A is at least one selected from the group consisting of La, Ba, Sr, and K, and M is at least one selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta, and Zr).

[0047] Specifically, the metal oxide is BaSnO3, BaHfO3, BaZrO3, BaHf 1-x Ti x O3 (where 0 <x<1), Ba 1-x La x SnO3 (where 0 <x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (where 0 <x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x and may include at least one selected from the group consisting of LaAlO3 (wherein 0 <x<1).

[0048] The above metal oxide is not only stable in high temperature and high humidity environments, but also has high carrier mobility, so it can efficiently absorb radiation emitted from a radiation source (200) and provide high energy conversion efficiency. In addition, there is no inelastic collision in the carrier movement, so there is no energy loss and it is advantageous for heat dissipation. For example, the above metal oxide is 45 cm 2 / (V·s) or more, 80 cm 2 / (V·s) or more, 120 cm 2 / (V·s) or more, further 300 cm 2 / (V·s) or higher carrier mobility can be achieved.

[0049] These metal oxides are bidirectionally doped materials and have the advantage of being able to provide high current or high voltage depending on the direction of the applied bias.

[0050] The second material layer (110) may be doped with a first conductivity type dopant. The substrate doping region (120) may be doped with a second conductivity type dopant. The second material layer (110) and the substrate doping region (120) may generate electron-hole pairs by radiation emitted from a radiation source (200).

[0051] In some embodiments, the first conductive dopant may be an n-type dopant and the second conductive dopant may be a p-type dopant. In some other embodiments, the first conductive dopant may be a p-type dopant and the second conductive dopant may be an n-type dopant. Those skilled in the art will understand that depending on the conductive type of the dopant doped in each region, one of the second material layer (110) and the substrate doped region (120) may act as a cathode and the other may act as an anode. That is, if the first conductive dopant is an n-type dopant and the second conductive dopant is a p-type dopant, the second material layer (110) may act as an anode and the substrate doped region (120) may act as a cathode. Conversely, if the dopant of the first conductive type is a p-type dopant and the dopant of the second conductive type is an n-type dopant, the second material layer (110) can act as a cathode and the substrate doped region (120) can act as an anode.

[0052] The region doped with the above n-type dopant may be, for example, a semiconductor region doped with nitrogen (N), phosphorus (P), arsenic (As), or antimony (Sb), which are elements of Group 15 of the periodic table, or may be a compound semiconductor doped with nitrogen (N), phosphorus (P), arsenic (As), or antimony, which are elements of Group 15 of the periodic table. In the present specification, a compound semiconductor means a semiconductor composed of two or more elements, and may be, for example, silicon carbide, silicon oxide, aluminum phosphide (AlP), aluminum arsenide (AlAs), gallium arsenide (GaAs), or gallium nitride (GaN).

[0053] The region doped with the above p-type dopant may be, for example, a semiconductor region doped with elements of Group 13 of the periodic table, such as boron (B), aluminum (Al), gallium (Ga), or indium (In), or may be a compound semiconductor doped with elements of Group 13 of the periodic table, such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0054] In some embodiments, the second material layer (110) and the substrate doped region (120) may include an organic material used in an organic layer that generates power by receiving light, such as in the field of solar cells. For example, the second material layer (110) and the substrate doped region (120) may include a thiophene compound. Meanwhile, the second material layer (110) and the substrate doped region (120) may be an organic-inorganic hybrid type by appropriately mixing the aforementioned inorganic and organic materials.

[0055] In some embodiments, a depletion region may be formed near the interface where the second material layer (110) and the substrate doping region (120) come into contact with each other.

[0056] In some embodiments, the radiation source (200) may be provided within a through-hole penetrating the first material layer (100). FIGS. 2A to 2C are plan views each showing a form in which the radiation source (200) is placed within a through-hole (101) according to embodiments of the present invention.

[0057] Referring to FIG. 2a, the first material layer (100) is provided with a plurality of through holes (101) penetrating the first material layer (100), and the radiation source (200) can be placed within the through holes (101).

[0058] The through-holes (101) may be formed by any method known to those skilled in the art. For example, the through-holes (101) may be formed by anisotropic etching, isotropic etching, laser irradiation, or the like. In some embodiments, the through-holes (101) may be formed by irradiating the substrate (100) with laser light. In some embodiments, the through-holes (101) may be formed by reactive ion etching (RIE).

[0059] In some embodiments, the through-holes (101) may be arranged according to a predetermined rule. In some embodiments, the through-holes (101) may be arranged so that each center is located at a vertex of a series of virtual equilateral triangles.

[0060] By arranging the centers of the above through holes (101) to be located at the vertices of virtual equilateral triangles, the number of radiation sources (200) that can be accommodated per unit area can be maximized.

[0061] In some embodiments, the second material layer (110) may be arranged to surround a side surface of the radiation source (200). In some embodiments, the substrate doping region (120) may be arranged to surround a side surface of the second material layer (110).

[0062] Referring to FIG. 2B, the side walls of the through-holes (101) may have a roughness. That is, the through-holes (101) may have concave and convex portions. The interface between the radiation source (200) and the second material layer (110) may have a roughness. In some embodiments, the interface between the second material layer (110) and the substrate doping region (120) may have a roughness.

[0063] The second material layer (110) may have a substantially constant lateral thickness as illustrated in FIG. 2B. Accordingly, the interface between the second material layer (110) and the substrate doping region (120) may have a shape corresponding to the interface between the radiation source (200) and the second material layer (110).

[0064] By having the side walls of the above through-holes (101) with an uneven surface, the contact area between the radiation source (200) and the second material layer (110) can be increased, thereby improving the efficiency of the radiation source (200). In addition, by having the interface between the second material layer (110) and the substrate doping region (120) with an uneven surface, the contact area between the second material layer (110) and the substrate doping region (120) can be increased, thereby improving the efficiency of the stacked capacitor (1).

[0065] Referring to Fig. 2c, each center of the through-holes (101) may be arranged to be located at the vertices of continuously arranged virtual isosceles triangles. As in Fig. 2a, each center of the through-holes (101) may not necessarily be located at the vertices of continuously arranged virtual equilateral triangles.

[0066] In some embodiments, the triangles in which the centers of the through-holes (101) are arranged may have different shapes. Accordingly, the through-holes (101) may be arranged somewhat irregularly.

[0067] In some embodiments, the radiation source (200) may be positioned within a slit penetrating the first material layer (100). FIGS. 3A and 3B are plan views each showing a form in which the radiation source (200) is positioned within a slit (102) according to embodiments of the present invention.

[0068] Referring to FIG. 3A, the first material layer (100) may include a plurality of slits (102) extending parallel in one direction. In addition, a radiation source (200) may be provided within the slits (102). In some embodiments, a side surface of the radiation source (200) may contact a side surface of the slits (102).

[0069] In some embodiments, the second material layer (110) may be arranged to face the elongated side surface of the radiation source (200). The second material layer (110) may face both elongated side surfaces of the radiation source (200). In some embodiments, the substrate doping region (120) may be arranged to face the elongated side surface of the second material layer (110).

[0070] In some embodiments, the second material layer (110) may be arranged to surround a side surface of the radiation source (200). In some embodiments, the substrate doping region (120) may be arranged to surround a side surface of the second material layer (110).

[0071] Referring to FIG. 3b, the side walls of the slits (102) may have a roughness. That is, the slits (102) may have concave and convex portions. The interface between the radiation source (200) and the second material layer (110) may have a roughness.

[0072] By having the side walls of the above slits (102) uneven, the contact area between the radiation source (200) and the second material layer (110) can be increased, thereby improving the efficiency of the radiation source (200).

[0073] Although the entire first material layer (100) is illustrated as a substrate doping region (120) in FIGS. 1A to 3B , the present invention is not limited thereto. In FIGS. 1A to 3B , regions of different conductivity types or dopant concentrations may exist within the first material layer (100), or regions that are not doped with a specific conductivity type may exist. In some embodiments, the first material layer (100) may not be doped with a dopant. In this case, the first material layer (100) may be an electrical insulator.

[0074] Referring back to FIG. 1A, the plurality of isotope electrode sheets (10) may be formed by stacking identical semiconductor dies. Each of the isotope electrode sheets (10) may include a first upper electrode (132) on the second material layer (110) and a first lower electrode (152) on the lower side of the second material layer (110). In addition, each of the isotope electrode sheets (10) may include a second upper electrode (134) on the upper side of the substrate doping region (120) and a second lower electrode (154) on the lower side of the substrate doping region (120).

[0075] Each of the first upper electrode (132), the first lower electrode (152), the second upper electrode (134), and the second lower electrode (154) can substantially function as a current collector. Each of the first upper electrode (132), the first lower electrode (152), the second upper electrode (134), and the second lower electrode (154) is not particularly limited in type, size, shape, etc., as long as it has electrical conductivity without causing physical and chemical changes in the isotope electrode sheet (10). For example, each of the first upper electrode (132), the first lower electrode (152), the second upper electrode (134), and the second lower electrode (154) can have a cylindrical shape, a tetrahedral shape, a hexahedral shape, a torus shape, or a pad shape. In addition, each of the first upper electrode (132), the first lower electrode (152), the second upper electrode (134), and the second lower electrode (154) may have a form in which the central portion is hollow. In addition, for example, each of the first upper electrode (132), the first lower electrode (152), the second upper electrode (134), and the second lower electrode (154) may include a metal material such as gold (Au), silver (Ag), platinum (Pt), stainless steel, copper (Cu), aluminum (Al), nickel (Ni), or titanium (Ti), or may include a transparent oxide such as fluorine (F)-doped tin oxide (FTO) or indium oxide (ITO, In2O3), or may include a carbon-based compound such as carbon nanotubes, graphene, or graphene oxide.

[0076] The above radiation source (200) may include a radioactive isotope. The radioactive isotope is not particularly limited to tritium, which emits beta rays upon decay. 3 H, tritium), Calcium-45( 45 Ca), nickel-63( 63Ni), copper-67( 67 Cu), strontium-90( 90 Sr), promethium-147( 147 Pm), osmium-194( 194 OS), thulium-171( 171 Tm), tantalum-182( 182 Ta), cadmium-115( 115 Cd), germanium-75( 75 Ge), cerium-141( 141 Ce), cerium-144( 144 Ce) and tungsten-185( 185 W) may include one or more selected from the group consisting of. Meanwhile, the radioactive isotope may emit only beta rays, or may emit alpha rays or gamma rays in addition to beta rays.

[0077] The first lower electrode (152) of the isotope electrode sheet (10) positioned above may be electrically connected to the first upper electrode (132) of the isotope electrode sheet (10) positioned below it. In some embodiments, the first lower electrode (152) of the isotope electrode sheet (10) positioned above and the first upper electrode (132) of the isotope electrode sheet (10) positioned below it may be connected by a connector (140) such as a solder ball.

[0078] In one example, the connector (140) may include a conductive material. Here, the conductive material may include one or more selected from the group consisting of tin (Sn), indium (In), bismuth (Bi), antimony (Sb), copper (Cu), silver (Ag), zinc (Zn), and lead (Pb), for example. The number, spacing, arrangement, shape, etc. of the connectors (140) are not limited to those illustrated and may be changed according to the design. Referring to FIG. 1, the connector (140) may have a solder ball or solder bump shape.

[0079] The space between two vertically adjacent isotope electrode sheets (10) can be filled with an insulator (160). The insulating layer (160) is not particularly limited as long as it is a material having electrical insulating properties, but may include, for example, one or more selected from the group consisting of silicate (e.g., TEOS), silicon nitride (SiN), hafnium oxide, hafnium silicon oxide, hafnium aluminum oxide, lanthanum oxide, lanthanum aluminum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, and aluminum oxide.

[0080] The plurality of isotope electrode sheets (10) can be housed within a housing (190). In addition, the plurality of isotope electrode sheets (10) can be electrically connected to an external load by a conductor that passes through the housing (190) and is drawn outward.

[0081] In some embodiments, the housing (190) may further include an electromagnetic interference (EMI) shield (not shown) capable of shielding electromagnetic waves. The EMI shield may be formed on at least a portion of the inner surface and / or the outer surface of the housing (190). The EMI shield may include, for example, a metal such as copper or aluminum, a conductive polymer such as polyaniline, or a magnetic material such as iron oxide. In addition, the EMI shield may be provided in the form of a sheet, mesh, coating layer, spray coating, non-woven fabric, tape, or fabric layer. By faithfully providing the EMI shield in the housing (190), the electromagnetic compatibility (EMC) of the multilayer capacitor (1) can be secured.

[0082] The first upper electrodes (132) of the isotope electrode sheet (10) arranged at the top of Fig. 1a may be electrically connected to each other and electrically connected to the first external electrode (15a) of the first polarity. In addition, the second lower electrode (132) of the isotope electrode sheet (10) arranged at the bottom of Fig. 1a may be electrically connected to the second external electrode (15b) of the second polarity. The first external electrode (15a) and the second external electrode (15b) may be exposed to the outside of the housing (190) so as to be connected to an external load.

[0083] In some embodiments, the second lower electrodes (132) of the isotope electrode sheet (10) disposed at the bottom in FIG. 1 may be electrically connected to each other while surrounding the first lower electrode (152). In some embodiments, the second lower electrodes (132) may be electrically connected to each other by a separate conductive line (not shown) and may be connected to the second external electrode (15b) exposed to the outside of the housing (190).

[0084] FIG. 1b is a cross-sectional side view showing a laminated capacitor (1a) according to another embodiment of the present invention.

[0085] Referring to FIG. 1b, the laminated capacitor (1a) may have a first isotope electrode sheet (11) and a second isotope electrode sheet (12) alternately and repeatedly laminated.

[0086] The above first isotope electrode sheet (11) is generally the same as the isotope electrode sheet (10) described with reference to Fig. 1a, so a detailed description thereof is omitted here.

[0087] The second isotope electrode sheet (12) is substantially identical to each component of the first isotope electrode sheet (11), but differs in that the conductivity type of the dopant is opposite. That is, if the second material layer (110) of the first isotope electrode sheet (11) is doped with a p-type, the second material layer (110) of the second isotope electrode sheet (12) may be doped with an n-type. Conversely, if the second material layer (110) of the first isotope electrode sheet (11) is doped with an n-type, the second material layer (110) of the second isotope electrode sheet (12) may be doped with a p-type.

[0088] Likewise, if the substrate doping region (120) of the first isotope electrode sheet (11) is doped with a p-type, the substrate doping region (120) of the second isotope electrode sheet (12) may be doped with an n-type. Conversely, if the substrate doping region (120) of the first isotope electrode sheet (11) is doped with an n-type, the substrate doping region (120) of the second isotope electrode sheet (12) may be doped with a p-type.

[0089] In some embodiments, the first material layer (100) is not doped with a dopant, in which case the substrate doping region (120) may not exist.

[0090] The stacked capacitor (1a) illustrated in Fig. 1b can obtain higher voltage electric energy because the number of unit cells corresponding to individual radiation sources (200) is increased by connecting them in series.

[0091] Fig. 4 is a cross-sectional side view showing a laminated capacitor (1b) according to one embodiment of the present invention.

[0092] The laminated capacitor (1b) illustrated in FIG. 4 is generally the same as the laminated capacitor (1) described with reference to FIGS. 1a to 3, but differs in that the plurality of isotope electrode sheets (10) are sealed by a molding member (192) and the plurality of isotope electrode sheets (10) are mounted on a controller chip (300). Therefore, the following description will focus on these differences and omit descriptions of common parts.

[0093] Referring to FIG. 4, the plurality of isotope electrode sheets (10) are mounted on a controller chip (300). In some embodiments, the controller chip (300) may include a power management integrated circuit (PMIC) that outputs electrical energy generated from the plurality of stacked isotope electrode sheets (10) to the outside according to a predetermined rule.

[0094] The above plurality of isotope electrode sheets (10) can be molded by a molding member (192). The molding member (192) can include, for example, an epoxy molding compound (EMC).

[0095] When the plurality of isotope electrode sheets (10) are gathered downward as shown in FIG. 4 and electrically connected to the controller chip (300), the first upper electrode (132) and the second upper electrode (134) of the uppermost isotope electrode sheet (10) may act as dummy electrodes. In some embodiments, at least one of the first upper electrode (132) and the second upper electrode (134) disposed at the uppermost of the plurality of isotope electrode sheets (10) may be exposed to the outside through the molding member (192).

[0096] In another embodiment, the first upper electrode (132) and the second upper electrode (134) positioned at the uppermost of the plurality of isotope electrode sheets (10) may be completely covered by the molding member (192).

[0097] The electric energy generated from the plurality of isotope electrode sheets (10) can be supplied to an external load through an external terminal (310a, 310b) provided to the controller chip (300). In Fig. 4, the plurality of isotope electrode sheets (10) are illustrated as being mounted on the upper portion of the controller chip (300), but the present invention is not limited thereto.

[0098]

[0099] FIG. 5 is a cross-sectional side view showing a laminated capacitor (1c) according to another embodiment of the present invention.

[0100] Referring to FIG. 5, the laminated capacitor (1c) may include a plurality of laminated isotope electrode sheets (10b).

[0101] The above isotope electrode sheet (10b) differs from the isotope electrode sheet (10) of Fig. 1a in that the lower electrodes (152, 154) and the connector (140) are omitted. Therefore, the following description will focus on these differences, and the description of the common parts will be omitted.

[0102] The above isotope electrode sheet (10b) includes a first upper electrode (132) and a second upper electrode (134) on the upper surface. In some embodiments, the isotope electrode sheets (10b) of the plurality of stacked isotope electrode sheets (10b) may all be identical semiconductor dies.

[0103] The first upper electrode (132) and the second upper electrode (134) of the isotope electrode sheet (10b) positioned at the bottom can be in direct contact with the bottom surfaces of the second material layer (110) and the substrate doping region (120) of the isotope electrode sheet (10b) positioned at the top thereof, respectively.

[0104] The above-mentioned stacked capacitor (1c) can be configured more compactly because the lower electrodes (152, 154) and connector (140) are omitted, thereby increasing the energy density.

[0105]

[0106] Fig. 6a is a cross-sectional side view showing a laminated capacitor (1d) according to another embodiment of the present invention. Fig. 6b is a plan view of an isotope electrode sheet (10c) of the laminated capacitor (1d) of Fig. 6a. Fig. 6c is a cross-sectional view taken along line XX of Fig. 6b.

[0107] Referring to FIG. 6a, the stacked capacitor (1d) may include a plurality of isotope electrode sheets (10c) stacked in a vertical direction.

[0108] The isotope electrode sheet (10c) illustrated in FIGS. 6A, 6B, and 6C has a major difference in the configuration of the cavity (105) compared to the isotope electrode sheet illustrated in FIG. 1A. As in the example illustrated in FIG. 6A, the cavity (105) has a recessed shape with a step. The cavity (105) may include a trench (103) formed on the first surface. Additionally, one or more through-holes (101) may extend from the bottom of the trench (103) to the second surface.

[0109] The above isotope electrode sheet (10c) may include a trench (103) extending along the upper surface of the first material layer (100) and a through-hole (101) extending from the bottom surface of the trench (103) to the lower surface of the first material layer (100). As illustrated in FIG. 6b, the trench (103) may extend long in the line of sight direction of FIG. 6a (i.e., the first direction R1), and the through-hole (101) may extend vertically from the bottom surface of the trench (103). In some embodiments, as exemplarily illustrated in FIGS. 6b and 6c, a plurality of through-holes (101) may be arranged along the first direction R1 for one trench (103).

[0110] A radiation source (200) may be provided inside the trench (103) and the plurality of through-holes (101). The radiation source (200) may include a first portion (210) extending in the longitudinal direction of the trench (103) inside the trench (103). In addition, the radiation source (200) may include a second portion (220) extending to the lower surface of the first material layer (100) within the through-hole (101).

[0111] The width direction dimension of the first portion (210) may be larger than the width direction dimension of the second portion (220). Here, the width direction R2 is a direction perpendicular to the first direction R1, which is the direction in which the trench (103) extends. The width direction dimension of the second material layer (110) and the radiation source (200) corresponding to the first portion (210) may be larger than the width direction dimension of the second material layer (110) and the radiation source (200) corresponding to the second portion (220).

[0112] The second material layer (110) of the first material layer (100) may have a generally constant thickness from the surface of the radiation source (200).

[0113] Fig. 7 is a cross-sectional side view showing a laminated capacitor (1e) according to one embodiment of the present invention. The laminated capacitor (1e) of Fig. 7 is different from the laminated capacitor (1) shown in Fig. 1a in that it further includes a photon generation layer (250) around the radiation source (200), and the following description will focus on this difference.

[0114] Referring to FIG. 7, the photon generation layer (250) may be any material layer capable of emitting photons in response to radiation particles, such as alpha rays, emitted from the radiation source (200). In some embodiments, the radiation source (200) may be a material that emits alpha rays, and since such materials have been described with reference to FIG. 1A, a detailed description thereof will be omitted herein.

[0115] For example, the photon generation layer (250) may employ materials such as Ba2Ca(BO3)2, BaHfO3, BaI2:Ce, BeO, BaF2, BaMgF4, Cs2LiLuCi6:Ce, K2YF5, KCaF3, YI3:Ce, etc., but is not limited thereto. Various examples of the photon generation layer (250) are disclosed at https: / scintillator.lbl.gov / inorganic-scintillator-library / .

[0116] The photon generation layer (250) can emit photons in response to alpha rays incident from the radiation source (200). The photons generated in the photon generation layer (250) can be incident on the junction region between the second material layer (110) and the substrate doping region (120), and electrical energy can be generated by the photons.

[0117] Fig. 8a is a cross-sectional side view showing a laminated capacitor (1f) according to another embodiment of the present invention. Fig. 8b is a partially enlarged perspective view showing the second material layer (110), the radiation source (200), and the insulating layer (162) of the laminated capacitor (1f). The laminated capacitor (1f) shown in Figs. 8a and 8b differs from the laminated capacitor (1) shown in Fig. 1a in that the radiation source (200) has an annular shape, and the following description will focus on this difference.

[0118] Referring to FIGS. 8A and 8B, the radiation source (200) may have a hollow tube shape. In some embodiments, the hollow central portion of the radiation source (200) may be filled with an insulating layer (162). In some other embodiments, the central portion may be filled with a first material layer (100) or a semiconductor layer derived therefrom. The radiation source (200) may extend along an interface with the second material layer (110) while having a substantially constant thickness.

[0119] Since the interior of the above radiation source (200) is filled with an insulating layer (162), the amount of radiation source required to form the radiation source (200) can be reduced. Since the price of the radiation source is high, by forming the radiation source (200) in a hollow shape in this way, the multilayer capacitor (1f) can be manufactured inexpensively.

[0120] Fig. 9 is a cross-sectional side view showing a laminated capacitor (1g) according to another embodiment of the present invention. The laminated capacitor (1g) shown in Fig. 9 is different from the laminated capacitor (1) shown in Fig. 1a in that the external electrodes (15a, 15b) are further specified, and the following description will focus on these differences.

[0121] Referring to FIG. 9, the laminated capacitor (1g) includes a first external electrode (15a) and a second external electrode (15b) to supply electric energy to an external load.

[0122] It includes conductors (15) extending within an insulator (164) to connect the first external electrode (15a) to the first upper electrodes (132) of the isotope electrode sheet (10). The conductors (15) can be electrically connected only to the first upper electrodes (132).

[0123] In some embodiments, the conductors (15) may include a first conductor (15h) and a second conductor (15v) extending in different directions within the insulator (164). The second conductor (15v) may electrically connect the first conductor (15h) and the first upper electrode (132). The first conductor (15h) may be physically and / or electrically connected to the first external electrode (15a). In some embodiments, the first conductor (15h) may extend horizontally and the second conductor (15v) may extend vertically, but the present invention is not limited thereto.

[0124] In some embodiments, the second upper electrodes (134) of the isotope electrode sheet (10) closest to the first external electrode (15a) may be omitted.

[0125] The second external electrode (15b) may also be electrically connected to the isotope electrode sheets (10) in a similar manner to the first external electrode (15a). A person skilled in the art will be able to envision the wiring connection between the second external electrode (15b) and the isotope electrode sheets (10) with reference to the wiring connection between the first external electrode (15a) and the isotope electrode sheets (10) described above.

[0126] FIGS. 10A to 10H are side views showing a method for manufacturing a laminated capacitor (1) according to one embodiment of the present invention.

[0127] Referring to FIG. 10A, a first material layer (100) is provided. The first material layer (100) may include, for example, a material having an energy band gap of about 2.5 eV or more. In some embodiments, the first material layer (100) may include a diamond substrate, a SiC substrate, a sapphire substrate, or a combination thereof.

[0128] The above first material layer (100) may be at least partially doped with a dopant. The dopant is a dopant of a desired conductivity type and may have a conductivity type opposite to that of the dopant doped into the metal oxide material layer (200 m) to be described later.

[0129] The dopant may be doped throughout the entire first material layer (100), or may be locally doped to form a well. In some embodiments, a region that is not doped with a specific conductive type may exist within the first material layer (100). The region doped with the dopant forms a substrate doped region (120).

[0130]

[0131] Referring to FIG. 10b, a plurality of recesses (100r) can be formed in the first material layer (100).

[0132] The above recess (100r) may be formed, for example, by deep reactive ion etching (DRIE). However, the present invention is not limited thereto. The above recess (100r) may be in the form of a hole or in the form of a trench extending in the viewing direction of FIG. 10b.

[0133] The side wall of the above recess (100r) includes the substrate doping region (120).

[0134] The aspect ratio of the above recess (100r) can be determined by considering the thickness of the second material layer (110) to be formed later, the film formation characteristics of the radiation source (200), etc.

[0135]

[0136] Referring to FIG. 10c, a metal oxide material layer (110m) can be formed with a predetermined thickness on the inside of the recess (100r) and the upper surface of the first material layer (100).

[0137] The metal oxide material layer (110m) may be formed by any known method. For example, the metal oxide material layer (110m) may be formed by a method such as physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD). However, the present invention is not limited thereto. A person skilled in the art will be able to select an appropriate deposition method by considering the type of material to be deposited, the characteristics of the precursor or source, the required step coverage, etc.

[0138] The metal oxide material layer (110m) may be formed of the same material as the second material layer (110) described above, and a detailed description thereof is omitted herein. As described above, the metal oxide material layer (110m) may be doped with dopants of a desired conductivity type. The substrate doping region (120) and the metal oxide material layer (110m) may form a pn junction at least on the sidewall of the recess (110r).

[0139] The metal oxide material layer (110m) may be conformally formed within the recess (110r). Here, the conformal formation of the metal oxide material layer (110m) means that the metal oxide material layer (110m) is formed to conform to the shape of the surface of the first material layer (100). That is, since the metal oxide material layer (110m) is formed with a substantially constant thickness, the shape of the metal oxide material layer (110m) may conform to the shape of the surface of the first material layer (100) underneath it. Even after the formation of the metal oxide material layer (110m), an unfilled space exists in the recess (110r).

[0140]

[0141] Referring to FIG. 10d, a radiation source material layer (200m) is formed on the unburied portion of the recess (110r) and the upper surface of the metal oxide material layer (110m).

[0142] The above-described radiation source material layer (200 m) can be formed by any known method. For example, the above-described radiation source material layer (200 m) can be formed by a method such as PVD, CVD, or ALD. However, the present invention is not limited thereto. A person skilled in the art will be able to select an appropriate deposition method by considering the type of material to be deposited, the characteristics of the precursor or source, the required step coating, etc.

[0143] The above radiation source material layer (200 m) may be made of the same material as the radiation source (200) described above, and a detailed description thereof is omitted here.

[0144] The above radiation source material layer (200m) can fill the remaining space of the recess (110r) after the metal oxide material layer (110m) fills it.

[0145]

[0146] Referring to FIG. 10e, the radiation source material layer (200m) and the metal oxide material layer (110m) are partially removed so that the upper surface of the first material layer (100) is exposed.

[0147] In some embodiments, a portion of the radiation source material layer (200 m) and the metal oxide material layer (110 m) present on the upper surface of the first material layer (100) may be removed.

[0148] The above radiation source material layer (200 m) and the above metal oxide material layer (110 m) can be partially removed and planarized by dry etching, wet etching, and / or chemical mechanical polishing (CMP).

[0149]

[0150] Referring to FIG. 10f, the lower portion of the first material layer (100) can be partially removed. The lower surface of the first material layer (100) can be removed until the lower surface of the radiation source (200) is exposed.

[0151] The lower portion of the first material layer (100) may be partially removed and planarized by dry etching, wet etching, and / or CMP. As the lower surface of the first material layer (100) is removed, the lower portions of the metal oxide material layer (110m) and the radiation source material layer (200m) may be partially removed. By partially removing the lower portion of the first material layer (100), the radiation source (200) penetrates the first material layer (100).

[0152]

[0153] Referring to FIG. 10g, in order to form an isotope electrode sheet (10), a first upper electrode (132) and a first lower electrode (152) may be formed on the upper and lower portions of the second material layer (110), respectively, and a second upper electrode (134) and a second lower electrode (154) may be formed on the upper and lower portions of the substrate doping region (120), respectively.

[0154] The above electrodes (132, 152, 134, 154) may be formed, for example, through electrolytic plating or electroless plating. If necessary, only some of the electrodes (132, 152, 134, 154) may be formed.

[0155]

[0156] Referring to FIG. 10h, the isotope electrode sheets (10) can be repeatedly stacked. The stacked isotope electrode sheets (10) can be electrically connected to each other by a connector (140).

[0157] In some embodiments, an insulator (160) may be provided between two adjacent isotope electrode sheets (10). The insulator (160) has been described above with reference to FIG. 1, and thus a detailed description thereof is omitted here.

[0158] Afterwards, when the laminated multiple isotope electrode sheets (10) are electrically connected and housed in a housing (190), a laminated capacitor (1) as shown in FIG. 1 can be obtained.

[0159] While the embodiments of the present invention have been described in detail above, those skilled in the art will appreciate that various modifications and variations can be made to the present invention without departing from the spirit and scope of the invention as defined in the appended claims. Therefore, modifications to future embodiments of the present invention will not depart from the scope of the invention.

Claims

a plurality of stacked isotope electrode sheets; and A first external electrode of a first polarity and a second external electrode of a second polarity electrically connected to the plurality of isotope electrode sheets so as to transmit electrical energy generated from the plurality of stacked isotope electrode sheets to an external load; Including, Each of the above multiple isotope electrode sheets: A first material layer comprising an insulator or semiconductor; A second material layer having an electrical conductivity higher than that of the first material layer and forming an interface with the first material layer; and A radiation source positioned within the first material layer and spaced apart from the interface; A laminated capacitor comprising: a plurality of stacked isotope electrode sheets; and A first external electrode of a first polarity and a second external electrode of a second polarity electrically connected to the plurality of isotope electrode sheets so as to transmit electrical energy generated from the plurality of stacked isotope electrode sheets to an external load; Including, Each of the above multiple isotope electrode sheets: semiconductor substrate; A radiation source penetrating the semiconductor substrate; and A metal oxide layer interposed between the radiation source and the semiconductor substrate; Including, A laminated capacitor in which the band gap of the metal oxide layer is smaller than the band gap of the semiconductor substrate. In the second paragraph, A laminated capacitor characterized in that the metal oxide comprises AMO3. (wherein A is at least one selected from the group consisting of La, Ba, Sr, and K, and M is at least one selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta, and Zr) In the second paragraph, The above metal oxides are BaSnO3, BaHfO3, BaZrO3, BaHf 1-x Ti x O3 (where 0 <x<1), Ba 1-x La x SnO3 (where 0 <x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (where 0 <x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x A multilayer capacitor characterized by comprising at least one selected from the group consisting of LaAlO3. In the second paragraph, A multilayer capacitor characterized in that the metal oxide comprises BaSnO3. In the second paragraph, A laminated capacitor characterized in that the semiconductor substrate comprises a diamond substrate, a SiC substrate, a GaN substrate, a Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / B2O3 substrate, a Sm2O3 / Bi2O3 / GeO2 / B2O3 substrate, a sapphire substrate, or a combination thereof. In the second paragraph, A laminated capacitor characterized in that the radiation source is placed within a through-hole penetrating the semiconductor substrate. In paragraph 7, A laminated capacitor characterized in that the semiconductor substrate includes a plurality of through-holes, and the radiation source is provided inside each of the plurality of through-holes. In paragraph 8, A laminated capacitor characterized in that the plurality of through-holes are arranged on the semiconductor substrate so that each center is located at a vertex of an imaginary equilateral triangle. In paragraph 7, A laminated capacitor characterized in that the metal oxide layer is arranged to surround a side surface of the radiation source, and the semiconductor substrate is arranged to surround a side surface of the metal oxide layer. In the second paragraph, A laminated capacitor characterized in that the above beta source is arranged within a slit penetrating the semiconductor substrate. In paragraph 11, A laminated capacitor characterized in that the semiconductor substrate includes a plurality of slits, and the radiation source is provided inside each of the plurality of slits. In paragraph 11, A laminated capacitor characterized in that the metal oxide layer is arranged to face the elongated side of the radiation source, and the semiconductor substrate is arranged to face the elongated side of the metal oxide layer. In the second paragraph, A laminated capacitor characterized in that the above laminated plurality of isotope electrode sheets are identical dies. In the second paragraph, A capacitor characterized in that the above-mentioned plurality of stacked isotope electrode sheets are electrically connected to each other by solder balls. In the second paragraph, A laminated capacitor characterized in that it further includes a controller chip provided on one side of the plurality of laminated isotope electrode sheets and capable of controlling the release of electric energy generated from the plurality of beta cell sheets. In paragraph 16, A laminated capacitor characterized in that the above laminated plurality of isotope electrode sheets are molded using a molding resin. In paragraph 17, A laminated capacitor characterized in that at least one dummy electrode is exposed through the molding resin. In the second paragraph, Each of the plurality of isotope electrode sheets includes a first electrode provided on the metal oxide layer and a second electrode provided on the semiconductor substrate, A laminated capacitor characterized in that the first electrode and the second electrode of one isotope electrode sheet are in contact with the metal oxide layer and the semiconductor substrate of the isotope electrode sheet disposed thereon, respectively. In the second paragraph, The above radiation sources are: a first portion provided in a trench extending along one surface of the semiconductor substrate; and A second portion extending from the bottom surface of the trench to the other surface of the semiconductor substrate; A laminated capacitor characterized by including: In paragraph 20, A laminated capacitor characterized in that the width dimension of the first portion is larger than the width dimension of the second portion. In paragraph 20, A laminated capacitor characterized in that the width dimension of the metal oxide layer corresponding to the first portion is larger than the width dimension of the metal oxide layer corresponding to the second portion. In the second paragraph, A laminated capacitor characterized in that the metal oxide layer includes a metal oxide having a band gap energy of 2.7 eV or more.

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