Piezoelectric device and preparation method therefor, and electronic device

By improving the thermal expansion coefficient and adhesion of the encapsulation protective layer, optimizing the cutting method, and combining thin film layer coverage and electroplated interconnect structure design, the delamination failure problem of piezoelectric devices was solved, improving the reliability and current density uniformity of the devices and ensuring long-term stability.

WO2026066855A1PCT designated stage Publication Date: 2026-04-02HUAWEI TECH CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-08-22
Publication Date
2026-04-02

AI Technical Summary

Technical Problem

Existing piezoelectric devices (such as filters) are prone to failure after temperature cycling tests, temperature shock tests and downstream manufacturing processes, mainly due to delamination failure, including the mismatch of thermal expansion coefficients between the encapsulation protective layer and the multilayer thin film substrate, low bonding strength, and chipping and crack propagation during the cutting process.

Method used

By improving the matching of the thermal expansion coefficient of the encapsulation protective layer material with the multilayer thin film substrate, the bonding force is enhanced, and the cutting method is optimized, such as using laser cutting. Combined with the structural design that covers the first area with the thin film layer and the electroplated interconnect part is directly connected to the substrate layer, delamination and cracking of the thin film layer during the cutting process are avoided.

Benefits of technology

It improves the reliability of piezoelectric devices, ensuring they do not fail after temperature cycling and shock testing, guaranteeing long-term reliability, and enhances the uniformity of current density and plating height, thereby increasing device yield.

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Abstract

Embodiments of the present application relate to the technical field of piezoelectric devices, and provide a piezoelectric device and a preparation method therefor, and an electronic device. The piezoelectric device comprises a substrate, transducers, and electroplated interconnection lines. The substrate comprises a base layer and a thin film layer, wherein the base layer comprises a first region and a second region, the thin film layer covers the first region, and the orthographic projection of the thin film layer on a reference plane is located outside the orthographic projection of the second region on the reference plane, and the reference plane is a plane where the length direction and the width direction of the substrate are located. Each electroplated interconnection line comprises a first electroplated interconnection line portion and a second electroplated interconnection line portion; each first electroplated interconnection line portion covers the second region; and the second electroplated interconnection line portions cover the surface of the thin film layer. In this way, the reliability of the piezoelectric device can be improved, and the piezoelectric device does not fail.
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Description

Piezoelectric device, method of manufacturing the same, and electronic device

[0001] The present application claims priority to the Chinese patent application No. 202411347349.2, filed on September 25, 2024, and entitled "Piezoelectric device, method of manufacturing the same, and electronic device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the technical field of piezoelectric devices, and in particular to a piezoelectric device, a method of manufacturing the same, and an electronic device. BACKGROUND

[0003] Currently, electronic devices such as mobile phones, tablets, and televisions are provided with piezoelectric devices, such as filters, to filter signals and improve communication quality. Compared with filters using single-layer substrates, filters using multi-layer thin film substrates have the advantages of high energy efficiency, low loss, low temperature sensitivity, and large bandwidth. However, due to the weak interfacial bonding force of the multi-layer thin film substrate, the reliability of such filters is low, and the filters are prone to failure. SUMMARY

[0004] Embodiments of the present application provide a piezoelectric device, a method of manufacturing the same, and an electronic device, which can improve the reliability of the piezoelectric device and ensure that the piezoelectric device does not fail.

[0005] A first aspect of the present application provides a piezoelectric device, which includes a substrate and a plated interconnection line. The substrate includes a base layer and a thin film layer. The base layer includes a first region and a second region. The thin film layer covers the first region and has a projection on a reference plane that is outside a projection of the second region on the reference plane. The reference plane is a plane in which a length direction and a width direction of the substrate lie. The plated interconnection line includes a first plated interconnection line portion and a second plated interconnection line portion. The first plated interconnection line portion covers the second region. The second plated interconnection line portion covers a surface of the thin film layer.

[0006] In view of the filter failure in the prior art, the present inventors have found that the filter failure is mainly delamination failure after careful analysis. The delamination reasons include: 1. The coefficient of thermal expansion (CTE) of the material of the packaging protective layer is mismatched with the coefficient of thermal expansion of the material of the multilayer film substrate, the difference between the coefficient of thermal expansion of the material of the packaging protective layer and the coefficient of thermal expansion of the material of the multilayer film substrate is too large, and a large stress is easily generated between the packaging protective layer and the multilayer film substrate to cause separation of the two. 2. The bonding strength between the packaging protective layer and the multilayer film substrate is low, and the packaging protective layer and the multilayer film substrate are easily separated. 3. The multiple filters are separated by using a knife wheel cutting method in the preparation process of the filter, and the knife wheel cutting causes chipping, crack propagation, etc. In view of the first two reasons, the present inventors can match the coefficient of thermal expansion of the material of the packaging protective layer with the coefficient of thermal expansion of the material of the multilayer film substrate and improve the bonding strength between the packaging protective layer and the multilayer film substrate after improving the CTE and the bonding strength of the material of the packaging protective layer. In view of the third reason, the chipping can be reduced by improving the cutting method, such as optimizing the cutting precision, reducing the blade shaking, increasing the frequency of knife sharpening, replacing the laser cutting, etc. However, after these improvement measures, the improved filter still fails after reliability testing.

[0007] In view of the failure of piezoelectric devices (such as filters) in the prior art after reliability tests such as thermal cycling (TC) and thermal shock (TS), or after experiencing downstream production processes (such as plastic packaging), or after long-term use, the present inventors have found that the filter failure is mainly delamination failure after careful analysis. The delamination reasons include: 1. The coefficient of thermal expansion (CTE) of the polyimide (PI) material is mismatched with the coefficient of thermal expansion of the substrate material. 2. The bonding strength of the polyimide material is low. 3. The multiple filters are separated by using a knife wheel cutting method in the preparation process of the filter, and the knife wheel cutting causes chipping, crack propagation, etc. In view of the first two reasons, the present inventors can match the CTE and improve the bonding strength after improving the CTE and the bonding strength of the PI material. In view of the third reason, the chipping can be reduced by improving the cutting method, such as optimizing the cutting precision, reducing the blade shaking, increasing the frequency of knife sharpening, replacing the laser cutting, etc. However, after these improvement measures, the improved filter still fails after reliability testing.

[0008] To this end, the present inventors have found that the edge fixed position of the filter can appear delamination, and the delamination position is concentrated at the interface of the thin film layer. After careful analysis, the delamination is caused by the structural defects of the filter in the prior art. Specifically, the electroplated interconnection line of the filter in the prior art is arranged on the surface of the thin film layer. During the preparation of the filter, the thin film layer between the electroplated interconnection line and the base layer cannot be etched and removed. When the knife wheel is cut, cracks and delamination occur at the interface of the thin film layer under the mechanical stress or thermal stress of the knife wheel cutting. The cracks spread after the reliability test, or after the downstream production process, or after long-term application, leading to device failure.

[0009] In view of this, the present embodiment provides a piezoelectric device (for example, a filter), in which the thin film layer covers the first region, and the orthogonal projection of the first region on the reference plane is located outside the orthogonal projection of the second region on the reference plane. The reference plane is the plane in which the length direction and the width direction of the substrate are located, that is, the thin film layer covers the first region and does not cover the second region. The first electroplated interconnection line part directly covers the second region of the base layer, that is, there is no thin film layer between the first electroplated interconnection line part and the base layer. Therefore, when the second electroplated interconnection line part between adjacent piezoelectric devices is cut off by cutting during the preparation of the piezoelectric device, the thin film layer will not be cut, and thus the piezoelectric device can improve the reliability of the piezoelectric device.

[0010] Therefore, the present inventors provide a new structure of piezoelectric device, which fundamentally avoids the cracks and delamination of the thin film layer, improves the reliability of the piezoelectric device, and does not fail after the reliability test such as temperature cycle test and temperature impact test or after the downstream production process, thereby ensuring the reliability of the device during long-term application.

[0011] In some possible implementation manners, the thin film layer includes an inclined body and a main body. The second electroplated interconnection line part includes a transition electroplated interconnection line part and a third electroplated interconnection line part. The two ends of the transition electroplated interconnection line part are connected to the first electroplated interconnection line part and the third electroplated interconnection line part, respectively. The transition electroplated interconnection line part covers the inclined body, and the third electroplated interconnection line part covers the main body.

[0012] In this way, the transition electroplated interconnection line part covering the inclined body is arranged between the first electroplated interconnection line part and the third electroplated interconnection line part, so that the electroplated interconnection line is smoothly transitioned, and the cracks and chemical corrosion of the electroplated interconnection line at the step formed by the thin film layer and the base layer can be avoided, thereby improving the uniformity of the current density and the uniformity of the electroplating height. The current density is positively correlated with the electroplating height, and the uniformity of the electroplating height is also improved after the uniformity of the current density is improved.

[0013] In some possible implementation manners, the inclined body has an inclined surface, the main body has a matching surface, the inclined surface is connected with the matching surface, an included angle between the inclined surface and the matching surface is obtuse, and an included angle between a surface where the base layer and the thin film layer are in contact and the inclined surface is acute. The transition electroplated interconnection line portion covers the inclined surface, and the third electroplated interconnection line portion covers the matching surface.

[0014] In this way, by inclining the inclined surface (or etching surface) of the thin film layer to the surface where the substrate and the thin film layer are in contact and to the matching surface, cracking of the electroplated interconnection line at the step formed by the thin film layer and the base layer and corrosion of residual chemicals can be avoided, and uniformity of current density and uniformity of electroplating height can be improved.

[0015] In some possible implementation manners, the piezoelectric device further includes a cut surface, and a distance between the inclined body and the cut surface gradually increases in a direction from the base layer to the main body.

[0016] In this way, cracking of the electroplated interconnection line at the step formed by the thin film layer and the base layer can be avoided, and uniformity of current density and uniformity of electroplating height can be improved.

[0017] In some possible implementation manners, a thickness of the inclined body in a thickness direction of the base layer gradually increases in a direction from the cut surface to the inclined body.

[0018] In this way, cracking of the electroplated interconnection line at the step formed by the thin film layer and the base layer can be avoided, and uniformity of current density and uniformity of electroplating height can be improved.

[0019] In some possible implementation manners, a width of the first electroplated interconnection line portion is greater than a width of the second electroplated interconnection line portion.

[0020] In this way, effectiveness of electrical connection between the electroplated interconnection line and the conductive pillar of the piezoelectric device can be increased, and mechanical stress transmission can be reduced. In addition, effective resistance of the electroplated interconnection line can be reduced, and consistency of current density and consistency of electroplating height can be improved, so that yield of the piezoelectric device can be improved.

[0021] In some possible implementation manners, the width of the first electroplated interconnection line portion gradually increases in a direction from the first region to the second region, or the width of the second electroplated interconnection line portion gradually increases in the direction from the first region to the second region.

[0022] In this way, consistency of current density and consistency of electroplating height can be further improved.

[0023] In some possible implementation manners, the thin film layer includes a passivation film layer and a piezoelectric film layer, the passivation film layer is located between the piezoelectric film layer and the base layer, and a part of the electroplated interconnection line is arranged on a surface of the piezoelectric film layer away from the passivation film layer.

[0024] In some possible implementation manners, the material of the piezoelectric film layer is lithium tantalate or lithium niobate, and / or the material of the passivation film layer is silicon dioxide.

[0025] In some possible implementation manners, the piezoelectric device further includes a transducer, a conductive sheet, a metal layer and a conductive column, the transducer and the conductive sheet are both arranged on the surface of the thin film layer away from the substrate layer, the conductive sheet is electrically connected with the transducer, the metal layer covers the conductive sheet, the conductive column is located on the side of the metal layer away from the first surface, one end of the electroplated interconnection line is electrically connected with the metal layer, and the metal layer is electrically connected with the conductive sheet and the conductive column respectively.

[0026] In some possible implementation manners, the material of the substrate layer is silicon, aluminum oxide or silicon carbide.

[0027] The second aspect of the present application provides a preparation method of a piezoelectric device, wherein the piezoelectric device includes a substrate and an electroplated interconnection line, the substrate includes a thin film layer and a substrate layer arranged in a stack, and the preparation method of the piezoelectric device includes:

[0028] The thin film layer in the cutting area is removed through an etching process;

[0029] The electroplated interconnection line is formed on the surface of the thin film layer and the first surface of the substrate layer in the cutting area.

[0030] In this way, by placing the step of etching the thin film layer before the step of forming the electroplated interconnection line, the electroplated interconnection line is in contact with the substrate layer, and the thin film layer is prevented from being affected by cutting vibration.

[0031] In some possible implementation manners, the thin film layer in the cutting area is removed through an etching process, including:

[0032] The protective adhesive layer located on the side of the thin film layer away from the substrate layer is formed;

[0033] Part of the protective adhesive layer is removed to form a gap;

[0034] The thin film layer in the gap is removed through an etching process to form an inclined surface;

[0035] The protective adhesive layer is removed after the inclined surface is formed.

[0036] The third aspect of the present application further provides an electronic device, which includes a circuit board and a piezoelectric device according to any one of the first aspect, and the piezoelectric device is electrically connected with the circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0037] FIG. 1 is an exploded schematic view of an electronic device according to an embodiment of the present application;

[0038] FIG. 2 is a sectional schematic view of a filter in the prior art;

[0039] Fig. 3 is a top view of the multi-layer film substrate, the conductive sheet and the metal layer at the dotted line in Fig. 2 of the two filters in the prior art;

[0040] Fig. 4 is a sectional view of the direction C-C in Fig. 3;

[0041] Fig. 5 is a sectional view of a piezoelectric device according to an embodiment of the present application;

[0042] Fig. 6 is a top view of the substrate, the conductive sheet and the metal layer at O in Fig. 5;

[0043] Fig. 7 is an enlarged view of P in Fig. 5;

[0044] Fig. 8 is a top view of the substrate, the conductive sheet and the metal layer of another piezoelectric device according to an embodiment of the present application;

[0045] Fig. 9A is a first schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0046] Fig. 9B is a second schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0047] Fig. 9C is a third schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0048] Fig. 9D is a fourth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0049] Fig. 9E is a fifth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0050] Fig. 9F is a sixth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0051] Fig. 9G is a seventh schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application;

[0052] Fig. 9H is an eighth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application.

[0053] Label explanation: 100, piezoelectric device; 110, substrate layer; 111, first surface; 1111, first region; 1112, second region; 120, thin film layer; 121, piezoelectric film layer; 122, passivation film layer; 123, inclined surface; 124, matching surface; 126, inclined face; 127, inclined body; 1271, inclined sub-body; 128, main body; 1281, main sub-body; 130, transducer; 140, electroplated interconnection line; 141, first electroplated interconnection line part; 142, second electroplated interconnection line part; 1421, transition electroplated interconnection line part; 1422, third electroplated interconnection line part; 150, conductive sheet; 160, metal layer; 170, conductive column; 180, solder ball; 190, encapsulation protective layer; 200, display screen; 300, middle frame; 400, back cover; 500, battery; 600, circuit board assembly; 700, circuit board; 10, protective adhesive layer; 20, metal interconnection line layer; X, length direction; Y, width direction; Z, thickness direction. DETAILED DESCRIPTION

[0054] The electronic device can be a consumer electronic product, a home electronic product, a vehicle-mounted electronic product, a financial terminal product, a communication electronic product. The consumer electronic product is, for example, a mobile phone, a pad, a notebook computer, an electronic reader, a personal computer (PC), a personal digital assistant (PDA), a desktop display, a smart wearable product (for example, a smart watch, a smart bracelet), a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a drone, and the like. The home electronic product is, for example, a smart door lock, a television, a remote controller, a refrigerator, a charging household small appliance (for example, a soybean milk machine, a sweeping robot), and the like. The vehicle-mounted electronic product is, for example, a vehicle-mounted navigation instrument, a vehicle-mounted high-density digital video disc (DVD), and the like. The financial terminal product is, for example, an automated teller machine (ATM) machine, a self-service terminal, and the like.

[0055] Exemplarily, the electronic device is taken as a mobile phone as an example below. As shown in FIG. 1, FIG. 1 is an explosion schematic diagram of an electronic device provided in an embodiment of the present application.

[0056] Continuing to refer to FIG. 1, the electronic device can include a display screen 200, a middle frame 300, a back cover 400, a battery 500, and a circuit board assembly 600. Among them, the back cover 400 and the display screen 200 are respectively located on both sides of the middle frame 300, and form a containing space with the middle frame 300. The containing space is provided with the battery 500, the circuit board assembly 600, a camera module and other devices.

[0057] The display screen 200 can be a liquid crystal display (LCD), an organic light emitting diode (OLED) display screen 200, etc.

[0058] As shown in FIG. 1, the circuit board assembly 600 can include a circuit board 700, a piezoelectric device 100, etc. The circuit board 700 can be a printed circuit board (PCB). The circuit board 700 is used to carry the piezoelectric device 100 and is electrically connected with the piezoelectric device 100.

[0059] Among them, the piezoelectric device 100 can be a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, a film bulk acoustic resonator (FBAR), a laterally excited bulk acoustic resonator (XBAR), a surface acoustic wave delay line, a surface acoustic wave convolver, a surface acoustic wave sensor, etc.

[0060] Hereinafter, the piezoelectric device 100 is taken as an example of a filter to be described. The piezoelectric device 100 is used to pass signals of a specific frequency and block signals of other frequencies, so as to improve signal quality.

[0061] In addition, the packaging form of the piezoelectric device 100 can be wafer level package (WLP), wafer-level chip-scale package (WLCSP), chip scale package (CSP), etc.

[0062] FIG. 2 is a cross-sectional view of a filter in the prior art, FIG. 3 is a top view of the cooperation of a multilayer film substrate, a conductive sheet and a metal layer at the dotted line in FIG. 2 of two filters in the prior art, and FIG. 4 is a cross-sectional view of the C-C direction in FIG. 3. In FIGS. 3 and 4, A is a cutting area, and B is an etching surface of the film layer 720.

[0063] In the prior art, as shown in FIG. 2, the filter 100' includes a multilayer thin film substrate 700, a plated interconnection line 730, a metal layer 740, a conductive pillar 750, an inter digital transducer 760, a packaging protective layer 770, a conductive sheet 780, and a solder ball 790. The multilayer thin film substrate 700 includes a base layer 710 and a thin film layer 720 stacked together, the base layer 710 is made of silicon, the thin film layer 720 includes a passivation layer 722 and a piezoelectric layer 721 stacked together, the passivation layer 722 is located between the base layer 710 and the piezoelectric layer 721, the piezoelectric layer 721 is made of lithium tantalate (LiTaO, abbreviated as LT), and the passivation layer 722 is made of silicon dioxide (SiO2). The inter digital transducer (IDT) 760 and the conductive sheet 780 are both disposed on the surface of the piezoelectric layer 721, the metal layer 740 covers the conductive sheet 780, the conductive pillar 750 is located on the side of the metal layer 740 away from the conductive sheet 780, and the two ends of the conductive pillar 750 are respectively connected with the solder ball 790 and the metal layer 740. One end of the plated interconnection line 730 is electrically connected with the metal layer 740, and the plated interconnection line 730 is located between the packaging protective layer 770 and the thin film layer 720, that is, the plated interconnection line 730 is disposed on the surface of the thin film layer 720 away from the base layer 710, and a part of the thin film layer 720 is located between the plated interconnection line 730 and the base layer 710. In the preparation process of the filter 100', the plated interconnection line 730 transmits electrons to the metal layer 740 through the electroplating process, so as to generate the conductive pillar 750 on the side of the metal layer 740 away from the thin film layer 720. The packaging protective layer 770 is made of polyimide (PI) material, and the packaging protective layer 770 forms a cavity accommodating the IDT together with the multilayer thin film substrate 700.

[0064] In the preparation process of the filter 100' in the prior art, the plated interconnection line 730 is first prepared on the surface of the thin film layer 720 away from the base layer 710, then part of the thin film layer 720 is removed (for example, the thin film layer 720 in the area A in FIG. 3 or FIG. 4 is removed) by etching to form a cutting area (as shown in A in FIG. 4 or FIG. 5), and finally the base layer 710, the plated interconnection line 730, and the thin film layer 720 located in the cutting area are cut by a knife wheel cutting method to obtain a plurality of filters 100' as shown in FIG. 2.

[0065] However, due to the weak bonding force of the multilayer thin film substrate 700, the reliability of the filter 100' in the prior art is low, and the filter 100' in the prior art will fail after experiencing reliability tests such as thermal cycling (TC) and thermal shock (TS) tests, or after experiencing downstream production processes (such as plastic packaging), or after long-term use.

[0066] In view of the failure of the filter 100' in the prior art, the present inventors have found that the failure of the filter 100' is mainly delamination. The delamination is caused by the following reasons: 1. The coefficient of thermal expansion (CTE) of the material of the encapsulation protective layer 770 is mismatched with the coefficient of thermal expansion of the material of the multilayer thin film substrate 700. The difference between the coefficient of thermal expansion of the material of the encapsulation protective layer 770 and the coefficient of thermal expansion of the material of the multilayer thin film substrate 700 is too large. A large stress is easily generated between the encapsulation protective layer 720 and the multilayer thin film substrate 700, which causes the separation of the encapsulation protective layer 720 and the multilayer thin film substrate 700. 2. The bonding strength between the encapsulation protective layer 770 and the multilayer thin film substrate 700 is low. The encapsulation protective layer 720 and the multilayer thin film substrate 700 are easily separated. 3. The multiple filters 100' are separated by using a knife wheel cutting method in the preparation process of the filter 100'. The knife wheel cutting causes chipping, crack propagation, etc. In view of the first two reasons, the present inventors improve the CTE and the bonding strength of the material of the encapsulation protective layer 770. The coefficient of thermal expansion of the material of the encapsulation protective layer 770 is matched with the coefficient of thermal expansion of the material of the multilayer thin film substrate 700. The bonding strength between the encapsulation protective layer 770 and the multilayer thin film substrate 700 is improved. In view of the third reason, the cutting method is improved, for example, the cutting precision is optimized, the blade shaking is reduced, the knife sharpening frequency is increased, the laser cutting is used instead, etc. The chipping is reduced. However, after these improvement measures, the improved filter 100' still fails after the reliability test.

[0067] Therefore, the present inventors have analyzed the improved filter 100' and found that delamination occurs at the edge fixing position of the filter 100'. The delamination position is concentrated at the substrate thin film interface. After careful analysis, the delamination is caused by the structural defects of the filter 100' in the prior art. Specifically, as shown in FIG. 4, the electroplated interconnection line 730 of the filter 100' in the prior art is arranged on the surface of the thin film layer 720. In the process of etching the thin film layer 720, the thin film layer between the electroplated interconnection line 730 and the substrate layer 710 cannot be etched and removed. In the process of knife wheel cutting, the mechanical stress or thermal stress of the knife wheel cutting causes cracks and delamination at the thin film interface of the thin film layer 720. The cracks are diffused after the reliability test, or after the downstream production process, or after long-term application, which causes the device to fail.

[0068] Therefore, the present application provides a piezoelectric device 100 with a new structure, which fundamentally avoids cracks and delamination of the thin film layer 120, improves the reliability of the piezoelectric device 100, and does not fail after reliability tests such as temperature cycle test and temperature impact test or after downstream production processes, thereby ensuring the long-term reliability of the device.

[0069] FIG. 5 is a cross-sectional view of a piezoelectric device according to an embodiment of the present application, FIG. 6 is a top view of the substrate, the conductive pad and the metal layer in FIG. 5, and FIG. 7 is an enlarged view of P in FIG. 5. FIGS. 5 to 7 are only used to illustrate the structure of the piezoelectric device 100 and do not limit the specific structure of the piezoelectric device 100.

[0070] As shown in FIG. 5, the piezoelectric device 100 provided by the present application can include a substrate, a transducer 130, a plated interconnection 140, a conductive pad 150, a metal layer 160, a conductive pillar 170, a solder ball 180 and a packaging protective layer 190. The substrate includes a base layer 110 and a thin film layer 120. The base layer 110 includes a first surface 111 and a second surface arranged opposite to each other. The thin film layer 120 is arranged on the first surface 111 of the base layer 110.

[0071] In the present application, the thin film layer 120 can include a plurality of stacked thin films. For example, as shown in FIG. 7, the thin film layer 120 can include two stacked thin films. Of course, the thin film layer 120 can also be composed of more than two thin films.

[0072] For example, as shown in FIG. 7, the thin film layer 120 can include a passivation film layer 122 and a piezoelectric film layer 121. The passivation film layer 122 is located between the piezoelectric film layer 121 and the base layer 110. The transducer 130 is arranged on the surface of the piezoelectric film layer 121 away from the passivation film layer 122. Part of the plated interconnection 140 is arranged on the surface of the piezoelectric film layer 121 away from the passivation film layer 122.

[0073] In some examples, the passivation film layer 122 can also be referred to as a passivation layer. In addition, in some embodiments, the piezoelectric film layer 121 can also be referred to as a piezoelectric layer or a piezoelectric material.

[0074] In some embodiments, the material of the passivation film layer 122 can be silicon dioxide. Since silicon dioxide has good temperature drift characteristics, it can improve the temperature drift characteristics of the entire piezoelectric device 100 and improve the performance of the piezoelectric device 100. Of course, the passivation film layer 122 can also be made of other materials, such as quartz.

[0075] In some embodiments, the piezoelectric film layer 121 can be made of lithium tantalate (LiTaO3, referred to as LT) or lithium niobate (LiNbO3, referred to as LN). Of course, the piezoelectric film layer 121 can also be made of other materials. In addition, the piezoelectric film layer 121 can be a single-layer structure or a multi-layer structure.

[0076] The substrate layer 110 provides support for the thin film layer 120 and ensures the overall strength of the piezoelectric device 100. The material of the substrate layer 110 can be silicon, aluminum oxide, silicon carbide, sapphire, quartz, etc. When single-crystal silicon is used as the substrate layer 110, there is a layer of polycrystalline silicon on the single-crystal silicon as a trap rich layer.

[0077] Referring back to FIG. 5, the conductive sheet 150 and the transducer 130 are both disposed on the surface of the thin film layer 120 facing away from the first surface 111, and the conductive sheet 150 is electrically connected to the transducer 130. The metal layer (which can also be referred to as a thickening layer) 160 covers the conductive sheet 150 and is electrically connected to the conductive sheet 150. The conductive pillar 170 (which can also be referred to as an under-bump metallization (UBM)) is disposed on the side of the metal layer 160 facing away from the first surface 111, one end of the conductive pillar 170 is connected to the metal layer 160, and the other end of the conductive pillar 170 is connected to the solder ball 180.

[0078] By way of example, the transducer 130 can be an inter-digital transducer (IDT), which is a metal pattern formed on the surface of the thin film layer 120 in the shape of two hands crossing each other, and its function is to achieve acoustic-electric conversion. In addition, the inter-digital transducer can also function as a filter. In the embodiments of the present application, the metal material and the process method used by the inter-digital transducer are not particularly limited. By way of example, the preparation of the inter-digital transducer can be completed by a lift-off process. By way of another example, in order to suppress spurious modes, the metal material used by the inter-digital transducer can be a metal material with a relatively high density, such as Au, Ta, W, or Cu. By way of another example, the surface of the inter-digital transducer is covered with a thin passivation layer, such as SiO2, to isolate water vapor and improve reliability.

[0079] The material of the conductive pillar 170 is a conductive material, for example, the conductive pillar 170 can be a copper pillar, in which case the material of the conductive pillar 170 is copper.

[0080] As shown in FIG. 5, the encapsulation protection layer 190 covers the surface of the electroplated interconnection line 140, the surface of the metal layer 160 not covered by the conductive column 170, and part of the surface of the substrate, and the encapsulation protection layer 190 forms a cavity containing the transducer 130 together with the substrate, and the conductive column 170, the electroplated interconnection line 140, the metal layer 160, and the conductive sheet 150 are all located inside the encapsulation protection layer 190.

[0081] The encapsulation protection layer 190 has a through hole, the conductive column 170 is arranged inside the through hole, and the metal layer 160 can be exposed through the through hole and electrically connected with the conductive column 170. The encapsulation protection layer 190 can prevent the influence of water vapor or the external environment on the internal structure of the piezoelectric device 100, and improve the reliability of the piezoelectric device 100. In addition, the encapsulation protection layer 190 and the substrate can form a cavity containing the transducer 130.

[0082] The encapsulation protection layer 190 can be an encapsulation structure formed by wafer level package (WLP), wafer-level chip-scale package (WLCSP), chip scale package (CSP), and the like. The specific structure of the encapsulation protection layer 190 is not specifically limited here.

[0083] As shown in FIG. 6, the base layer 110 includes a first region 1111 and a second region 1112, and the orthographic projections of the first region 1111 and the second region 1112 on a reference plane do not overlap, and the reference plane is a plane in which the length direction X and the width direction Y of the substrate are located. The thin film layer 120 covers the first region 1111, and the orthographic projection of the thin film layer 120 on the reference plane is located outside the orthographic projection of the second region 1112 on the reference plane.

[0084] The first region 1111 can be understood as a region on the first surface 111 covered by the thin film layer 120. The second region 1112 can be understood as a region on the first surface 111 not covered by the thin film layer 120, or in other words, the second region 1112 can also be understood as a region exposed by the base layer 110.

[0085] As shown in FIG. 5, the electroplated interconnection wire 140 includes a first electroplated interconnection wire part 141 and a second electroplated interconnection wire part 142. The first electroplated interconnection wire part 141 covers the second region 1112, and the orthographic projection of the first electroplated interconnection wire part 141 on the reference plane is located outside the orthographic projection of the first region 1111 on the reference plane. The second electroplated interconnection wire part 142 covers the surface of the thin film layer 120 and is electrically connected with the metal layer 160, and the orthographic projection of the second electroplated interconnection wire part 142 on the reference plane is located outside the second region 1112. Thus, part of the electroplated interconnection wire 140 is arranged on the first surface 111, and another part of the electroplated interconnection wire 140 is arranged on the surface of the thin film layer 120.

[0086] Since the first electroplated interconnection wire part 141 is arranged on the first surface 111 of the substrate layer 110, in the preparation process of the piezoelectric device 100, the thin film layer 120 is etched first to expose part of the first surface 111 of the substrate layer 110, and then the electroplated interconnection wire 140 is formed, so that part of the electroplated interconnection wire 140 is arranged on the first surface 111.

[0087] By covering the first region 111 with the thin film layer 120, and the orthographic projection of the first region 111 on the reference plane is located outside the orthographic projection of the second region 1112 on the reference plane, i.e., the thin film layer 120 covers the first region 1111 and does not cover the second region 1112; and the first electroplated interconnection wire part 141 directly covers the second region 1112 of the substrate layer 110, i.e., there is no thin film layer 120 between the first electroplated interconnection wire part 141 and the substrate layer 110, so that there is no thin film layer 120 between the etching surface of the thin film layer 120 (as shown by 123 in FIG. 7) and the cutting surface B of the piezoelectric device 100, in the preparation process of the piezoelectric device 100, the first electroplated interconnection wire part 141 between adjacent piezoelectric devices 100 is cut off by cutting, and the electroplated interconnection wire 140 between the two adjacent piezoelectric devices 100 is separated, so that the thin film layer 120 is not affected by the cutting vibration, the thin film layer 120 does not delaminate or crack, and the reliability of the piezoelectric device 100 can be improved.

[0088] The etching surface of the thin film layer 120 can be understood as the surface formed after the thin film layer 120 is etched. The purpose of etching the thin film layer 120 is to avoid the contact between the thin film layer 120 and the cutting equipment (such as a knife wheel) during the cutting process, and to prevent the thin film layer 120 from delaminating. In addition, the thin film layers 120 of the plurality of piezoelectric devices 100 are also separated, so as to obtain a plurality of piezoelectric devices 100 at the same time. In addition, the cutting surface B of the piezoelectric device 100 is the surface formed after the plurality of piezoelectric devices 100 are separated by the cutting process.

[0089] As shown in Figure 7, because the etched surface of the thin film layer 120 (shown as 123 in Figure 7) and the first surface 111 of the substrate layer 110 form a stepped structure, when the angle between the etched surface and the first surface 111 is close to a right angle of 90°, the electroplated interconnect 140, when grown at the stepped structure, is prone to defects such as cracking and breakage. This leads to increased resistance and decreased current density of the electroplated interconnect 140, resulting in poor current density consistency across the entire surface and poor electroplating height consistency, thus reducing the yield and reliability of the piezoelectric device 100. The current density consistency is positively correlated with the electroplating height consistency, where electroplating height refers to the height of the conductive pillar 170 generated by the electroplating process.

[0090] Therefore, in some possible implementations, as shown in FIG7, the thin film layer may include a tilted body 127 and a main body 128. The second electroplated interconnect portion 142 includes a transition electroplated interconnect portion 1421 and a third electroplated interconnect portion 1422. The two ends of the transition electroplated interconnect portion 1421 are connected to the first electroplated interconnect portion 141 and the third electroplated interconnect portion 1422, respectively. The transition electroplated interconnect portion 1421 covers the tilted body 127, and the third electroplated interconnect portion 1422 covers the main body 128. The tilted body 127 allows the electroplated interconnect 140 to smoothly transition at the step formed between the thin film layer 120 and the substrate layer 110, reducing or eliminating cracking or breakage defects at the growth position of the electroplated interconnect 140, ensuring that the resistance of the electroplated interconnect 140 does not increase and the current density does not decrease, thereby improving the current density uniformity of the entire surface, improving the electroplating height uniformity, and improving the yield and reliability of the piezoelectric device 100.

[0091] The cross-section of the inclined body 127 is similar to a right triangle, and the cross-section of the inclined body 127 is perpendicular to the base layer 110.

[0092] In some embodiments, as shown in FIG7, the inclined body 127 has an inclined surface 123, and the main body 128 has a mating surface 124. The inclined surface 123 is connected to the mating surface 124 and is located between the mating surface 124 and the first surface 111. The angle between the inclined surface 123 and the mating surface 124 (as shown by F in FIG7) is an obtuse angle, and the angle between the first surface 111, which contacts the substrate layer 110 and the thin film layer 120, and the inclined surface 123 (as shown by E in FIG7) is an acute angle. A transition electroplated interconnect portion 1421 covers the inclined surface 123, and a third electroplated interconnect portion 1422 covers the mating surface 124. The conductive sheet 150 and the transducer 130 are both disposed on the mating surface 124.

[0093] In this way, by inclining the inclined surface 123 (or etching surface) of the thin film layer to the first surface 111 of the substrate in contact with the thin film layer 120 and to the matching surface 124, the cracking of the electroplated interconnection line 140 at the step formed by the thin film layer 120 and the base layer 110 and the corrosion of residual chemicals can be avoided, and the uniformity of the current density and the uniformity of the electroplating height can be improved.

[0094] It should be noted that the inclined surface 123 is not an absolutely flat plane, but a relatively flat plane. At this time, the angle between the inclined surface 123 and the first surface 111 can be understood as the maximum angle between each point on the inclined surface 123 and the first surface 111. The angle between the inclined surface 123 and the matching surface 124 can be understood as the maximum angle between each point on the inclined surface 123 and the matching surface 124.

[0095] The size of the angle between the inclined surface 123 and the first surface 111 is not specifically limited here. Exemplarily, the angle between the inclined surface 123 and the first surface 111 can be less than or equal to 60°, so that the electroplated interconnection line 140 can be more smoothly transitioned between the first surface 111 and the inclined surface 123, and the probability of defects such as cracking or breaking of the electroplated interconnection line 140 can be further reduced.

[0096] It should be noted that the angle between the inclined surface 123 and the first surface 111 can also exceed 60°, for example, the angle between the inclined surface 123 and the first surface 111 can also be 65°, 70°, 80°, etc.

[0097] The size of the angle between the inclined surface 123 and the matching surface 124 is not specifically limited here. Exemplarily, the angle between the inclined surface 123 and the matching surface 124 can be greater than or equal to 120°, so that the electroplated interconnection line 140 can be more smoothly transitioned between the matching surface 124 and the inclined surface 123, and the probability of defects such as cracking or breaking of the electroplated interconnection line 140 can be further reduced.

[0098] It should be noted that the angle between the inclined surface 123 and the matching surface 124 can also be less than 120°, for example, the angle between the inclined surface 123 and the matching surface 124 can also be 110°, 115°, 118°, etc.

[0099] In some embodiments, continuing to refer to FIG. 7, the piezoelectric device 100 further includes a cutting surface B, and the distance (indicated by L in FIG. 7) between the inclined body 127 and the cutting surface B gradually increases in the direction from the base layer 110 to the main body 128 (such as the Z direction in FIG. 7), which can avoid the cracking of the electroplated interconnection line 140 at the step formed by the thin film layer 120 and the base layer 110, and improve the uniformity of the current density and the uniformity of the electroplating height.

[0100] In some embodiments, referring to FIG. 7, the thickness of the inclined body 127 in the thickness direction of the substrate layer 110 gradually increases in the direction of the cutting surface B to the inclined body 127 (e.g., the X direction in FIG. 7), which can avoid the cracking of the electroplated interconnection line 140 at the step formed by the substrate layer 110 and the thin film layer 120, and improve the uniformity of the current density and the uniformity of the electroplating height.

[0101] Referring to FIG. 7, the inclined body 127 includes a plurality of inclined sub-bodies 1271 arranged in the thickness direction of the substrate layer 110, and the main body 128 includes a plurality of main sub-bodies 1281 arranged in the thickness direction of the substrate layer 110. Therefore, each thin film includes an inclined sub-body 1271 and a main sub-body 1281.

[0102] As shown in FIG. 7, each inclined sub-body 1271 has an inclined surface in contact with the transition electroplated interconnection line portion 1421, and all the inclined surfaces 126 collectively form the inclined surface 123. The angle between the inclined surface 126 and the matching surface 124 is an obtuse angle, and the angle between the first surface 111 of the substrate layer 110 in contact with the thin film layer 120 and the inclined surface 126 is an acute angle, which can avoid the cracking of the electroplated interconnection line 140 at the step formed by the substrate layer 110 and the thin film layer 120, and improve the uniformity of the current density and the uniformity of the electroplating height.

[0103] It should be noted that the inclined surface 126 is not an absolutely flat surface, but a relatively flat surface. At this time, the angle between the inclined surface 126 and the first surface 111 can be understood as the maximum angle between each point on the inclined surface 126 and the first surface 111. The angle between the inclined surface 126 and the matching surface 124 can be understood as the maximum angle between each point on the inclined surface 126 and the matching surface 124.

[0104] In some embodiments, the angle between the inclined surface 126 and the first surface 111 can be less than or equal to 60°. Of course, the angle between the inclined surface 126 and the first surface 111 can be greater than 60°.

[0105] In some embodiments, the angles between the adjacent two inclined surfaces 126 and the first surface 111 can be different. For example, as shown in FIG. 5, the thin film layer 120 can include a piezoelectric film layer 121 and a passivation film layer 122. The angle between the inclined surface 126 of the piezoelectric film layer 121 and the first surface 111 can be less than the angle between the inclined surface 126 of the passivation layer and the first surface 111. In this way, the manufacturing difficulty of the inclined surface 126 of different thin films can be reduced, thereby reducing the manufacturing difficulty of the inclined surface 123 of the thin film layer 120.

[0106] Of course, the angle between the inclined surface 126 of the adjacent two thin films and the first surface 111 can be the same in other embodiments, in addition to being different.

[0107] In some embodiments, the angle between the inclined surface 126 and the matching surface 124 can be greater than or equal to 120°. Of course, the angle between the inclined surface 126 and the matching surface 124 can be less than 120°.

[0108] In some embodiments, continuing to refer to FIG. 7, the distance between the inclined sub-body 1271 and the cutting surface B (indicated by M in FIG. 7) gradually increases in the direction from the base layer 110 to the main body 128 (Z direction in FIG. 7), which can avoid the cracking of the electroplated interconnection line 140 at the step formed by the thin film layer 120 and the base layer 110, improve the uniformity of the current density and the uniformity of the electroplating height.

[0109] In some embodiments, continuing to refer to FIG. 7, the thickness of the inclined sub-body 1271 in the thickness direction of the base layer 110 (indicated by h in FIG. 7) gradually increases in the direction from the cutting surface B to the inclined body 127 (X direction in FIG. 7), which can avoid the cracking of the electroplated interconnection line 140 at the step formed by the thin film layer 120 and the base layer 110, improve the uniformity of the current density and the uniformity of the electroplating height.

[0110] FIG. 8 is a top view of another piezoelectric device substrate, conductive sheet and metal layer cooperation provided by an embodiment of the present application. FIG. 8 is only used to illustrate the width variation relationship of the electroplated interconnection line 140, and does not limit the specific structure of the electroplated interconnection line 140.

[0111] In order to further improve the consistency of the current density, in some possible implementation manners, the width of the first electroplated interconnection line part 141 is greater than the width of the second electroplated interconnection line part 142. Specifically, that is, as shown in FIG. 8, the width of the first electroplated interconnection line part 141 located on the left side of the boundary between the first region 1111 and the second region 1112 is greater than the width of the second electroplated interconnection line part 142 located on the right side of the boundary between the first region 1111 and the second region 1112, which can use the length or width dimension of the base layer 110 as much as possible to increase the width of the electroplated interconnection line 140, reduce the electroplating of the electroplated interconnection line 140, improve the consistency of the current density of the whole surface, improve the consistency of the electroplating height, and improve the yield of the piezoelectric device 100. In addition, the electrical connection effectiveness of the electroplated interconnection line 140 and the conductive column 170 can also be increased.

[0112] In some embodiments, as shown in FIG. 8, the width of the first electroplated interconnection line portion 141 gradually increases along the direction from the first region 1111 to the second region 1112 (e.g., the Y direction in FIG. 8), which can further improve the consistency of the current density and the consistency of the electroplating height.

[0113] Of course, in addition to the design shown in FIG. 8, in some other embodiments, the first electroplated interconnection line portion 141 can also be designed with a uniform width.

[0114] In some embodiments, as shown in FIG. 8, the width of the second electroplated interconnection line portion 142 gradually increases along the direction from the first region 1111 to the second region 1112 (e.g., the Y direction in FIG. 8), which can further improve the consistency of the current density and the consistency of the electroplating height.

[0115] FIG. 9A is a first schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, FIG. 9B is a second schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, FIG. 9C is a third schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, FIG. 9D is a fourth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, FIG. 9E is a fifth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, FIG. 9F is a sixth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, FIG. 9G is a seventh schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application, and FIG. 9H is an eighth schematic diagram of a method for manufacturing a piezoelectric device according to an embodiment of the present application.

[0116] The present application also provides a method for manufacturing a piezoelectric device 100, which can be used to manufacture the piezoelectric device 100 according to an embodiment of the present application. The method for manufacturing the piezoelectric device 100 includes the following steps:

[0117] S101, manufacturing an intermediate layer.

[0118] First, a substrate is provided, which includes a base layer 110 and a thin film layer 120 stacked together. Then, a conductive layer is formed on the surface of the thin film layer 120 away from the base layer 110. Then, a conductive piece 150 and a transducer 130 are formed on the surface of the thin film layer 120 away from the base layer 110 by semiconductor processes such as uniform coating, exposure, development, evaporation or magnetron sputtering, Lift-off, etc. to obtain an intermediate layer as shown in FIG. 9A.

[0119] The material of the conductive layer can be a conductive metal, and can also be other conductive materials. In addition, the material of the substrate layer 110 can be silicon, aluminum oxide, silicon carbide, sapphire, quartz, etc. The thin film layer 120 can include a passivation film layer 122 and a piezoelectric film layer 121 arranged in layers, the material of the passivation film layer 122 can be silicon dioxide, and the material of the piezoelectric film layer 121 can be LT. The transducer 130 is an IDT.

[0120] It should be noted that, in addition to preparing the transducer 130 and the conductive sheet 150 in the order of “uniform coating, exposure, development, evaporation or magnetron sputtering, Lift-off”, the intermediate layer shown in FIG. 9A can also be prepared in the order of evaporation or magnetron sputtering first, and then uniform coating, exposure, development, etching, and stripping.

[0121] S102, the thin film layer 120 in the cutting area is removed by an etching process to form an inclined surface 123.

[0122] Specifically, in the area corresponding to the cutting path, part or all of the thin film layer 120 can be removed by a dry etching process, so that the thin film layer 120 in the cutting area is removed to expose the first surface 111 of the substrate layer 110. At the same time, the angle between the etching surface (inclined surface 123) of the thin film layer 120 and the first surface 111 is set to an acute angle, for example, the angle between the etching surface and the first surface 111 can be 65°, and of course, it can also be other angles.

[0123] In some embodiments, the angle between the etching surface (inclined surface 123) of the thin film layer 120 and the first surface 111 can be set to an acute angle by adjusting the uniform coating process, development process, etching process, etc. Technical methods can specifically include the following steps:

[0124] S1021, a protective glue layer 10 located on the side of the thin film layer 120 away from the substrate layer 110 is formed, as shown in FIG. 9B.

[0125] Specifically, the protective glue layer 10 can be formed by a uniform coating process to obtain the structure shown in FIG. 9B. The thickness of the protective glue layer 10 can be 2-10 μm. The material of the protective glue layer 10 can be photoresist.

[0126] S1022, part of the protective glue layer 10 is removed to form a gap (as shown by U in FIG. 9C).

[0127] Specifically, by adjusting the exposure intensity, focal position and development conditions through the development process, the cross section of the developed protective glue layer 10 is in a top-cut morphology (Top-cut), a gap (as shown by U in FIG. 9C) is formed, and the structure shown in FIG. 9C is obtained.

[0128] S1023, the thin film layer 120 in the gap is removed by an etching process to form the inclined surface 123.

[0129] Specifically, the thin film layer 120 not protected by the protective adhesive layer 10 can be etched to form the inclined surface 123 inclined to the first surface 111 by dry etching or other methods (e.g., ICP etching, RIE, etc.), as shown in FIG. 9D.

[0130] S1024, after forming the inclined surface 123, the protective adhesive layer 10 is removed to obtain the structure shown in FIG. 9E.

[0131] S103, the metal interconnection line layer 20 is formed by semiconductor processes such as spin coating, exposure, development, evaporation, or magnetron sputtering. Of course, the metal interconnection line layer 20 can also be prepared by evaporation or magnetron sputtering first, and then spin coating, exposure, development, etching, and adhesive removal, etc., to obtain the structure shown in FIG. 9F.

[0132] Specifically, the metal interconnection line layer 20 includes the electroplated interconnection line 140 and the metal layer 160, and the metal layer 160 is electrically connected to the electroplated interconnection line 140. Therefore, in some embodiments, the metal layer 160 and the electroplated interconnection line 140 can be formed simultaneously by semiconductor processes such as spin coating, exposure, development, evaporation, or magnetron sputtering. Of course, the metal layer 160 and the electroplated interconnection line 140 can also be prepared separately.

[0133] S104, the upper cover assembly is formed, which includes the packaging protective layer 190, the conductive pillar 170, and the solder ball 180, to obtain the structure shown in FIG. 9G.

[0134] Specifically, the corresponding packaging protective layer 190 can be formed according to the corresponding packaging form, which is not limited here. In addition, the packaging protective layer 190 can include a two-layer structure, and the packaging protective layer 190 and the substrate can form a cavity accommodating the transducer 130.

[0135] The electroplated interconnection line 140 is used to transmit electrons to the metal layer 160, and then the conductive pillar 170 is electroplated on the surface of the metal layer 160 facing away from the thin film layer 120 by an electroplating process. After the conductive pillar 170 is formed, the solder ball 180 is connected to the side of the conductive pillar 170 facing away from the metal layer 160.

[0136] S105, the layer structure in the cutting area is cut to obtain a plurality of piezoelectric devices 100.

[0137] Specifically, at least one of knife wheel cutting and laser cutting can be used to cut the electroplated interconnection line 140, the substrate layer 110, and the packaging protective layer 190 in the cutting area, for example, as shown in FIG. 9H, the cutting is performed by a knife wheel (indicated by R in FIG. 9H), so that the plurality of piezoelectric devices 100 are separated to obtain a plurality of piezoelectric devices 100.

[0138] Therefore, in the preparation process of the piezoelectric device 100, the etching process of the thin film layer 120 is prior to the process of preparing the electroplated interconnection line 140, and the piezoelectric device 100 without the thin film layer 120 under the electroplated interconnection line 140 in the cutting area can be formed, so that the thin film layer 120 is not affected in the cutting process.

[0139] In the description of the embodiments of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "mount", "connect", "connection" should be understood in a broad sense, for example, can be fixedly connected, can be indirectly connected through an intermediate medium, can be the internal communication of two elements or the interaction relationship of two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0140] In the embodiments of the present application or the implied device or element must have a specific orientation, and therefore cannot be understood as a limitation of the embodiments of the present application. In the description of the embodiments of the present application, the meaning of "a plurality of" is two or more than two, unless otherwise specified.

[0141] The terms "first", "second", "third", "fourth" and the like (if any) in the specification and claims of the embodiments of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented, for example, in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0142] The term "a plurality of" herein refers to two or more. The term "and / or" herein is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " herein generally represents that the front and rear associated objects have an "or" relationship; in the formula, the character " / " represents that the front and rear associated objects have a "division" relationship.

[0143] It can be understood that the various numbers involved in the embodiments of the present application are only distinguished for the convenience of description, and do not limit the scope of the embodiments of the present application.

[0144] It can be understood that, in the embodiments of the present application, the size of the serial number of the above processes does not mean the order of execution, and the execution order of the processes should be determined according to their functions and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

Claims

1. A piezoelectric device (100), characterized by, The substrate comprises a base layer (110) and a thin film layer (120), the base layer (110) comprises a first region (1111) and a second region (1112), the thin film layer (120) covers the first region (1111), and the orthographic projection of the thin film layer (120) on a reference plane is located outside the orthographic projection of the second region (1112) on the reference plane, the reference plane is a plane in which a length direction and a width direction of the substrate are located. The electroplated interconnection line (140) comprises a first electroplated interconnection line part (141) and a second electroplated interconnection line part (142), the first electroplated interconnection line part (141) covers the second region (1112), and the second electroplated interconnection line part (142) covers the surface of the thin film layer (120). The thin film layer (120) comprises an inclined body (127) and a main body (128).

2. Piezoelectric device (100) according to claim 1, characterized in that The second electroplated interconnection line part (142) comprises a transition electroplated interconnection line part (1421) and a third electroplated interconnection line part (1422), the two ends of the transition electroplated interconnection line part (1421) are connected with the first electroplated interconnection line part (141) and the third electroplated interconnection line part (1422) respectively, the transition electroplated interconnection line part (1421) covers the inclined body (127), and the third electroplated interconnection line part (1422) covers the main body (128). The inclined body (127) has an inclined surface (123), the main body (128) has a matching surface (124), the inclined surface (123) is connected with the matching surface (124), the included angle between the inclined surface (123) and the matching surface (124) is obtuse, and the included angle between the surface of the base layer (110) and the inclined surface (123) is acute.

3. Piezoelectric device (100) according to claim 2, characterized in that The transition electroplated interconnection line part (1421) covers the inclined surface (123), and the third electroplated interconnection line part (1422) covers the matching surface (124). The piezoelectric device (100) further comprises a cutting surface (B), and the distance between the inclined body (127) and the cutting surface (B) gradually increases in the direction from the base layer (110) to the main body (128).

4. Piezoelectric device (100) according to claim 2 or 3, characterized in that In the direction from the cutting surface (B) to the inclined body (127), the thickness of the inclined body (127) in the thickness direction of the base layer (110) gradually increases.

5. Piezoelectric device (100) according to claim 4, characterized in that The width of the first electroplated interconnection line part (141) is greater than the width of the second electroplated interconnection line part (142).

6. Piezoelectric device (100) according to any one of claims 1 to 5, characterized in that In the direction from the first region (1111) to the second region (1112), the width of the first electroplated interconnection line part (141) gradually increases, or the width of the second electroplated interconnection line part (142) gradually increases.

7. Piezoelectric device (100) according to claim 6, characterized in that The piezoelectric device (100) comprises a substrate and an electroplated interconnection line (140), the substrate comprises a thin film layer (120) and a base layer (110) arranged in a stack, and the preparation method comprises:

8. A method of manufacturing a piezoelectric device (100), characterized by, The thin film layer (120) in the cutting region is removed through an etching process. ​ Forming a plated interconnection line (140) on the surface of the thin film layer (120) and the surface of the substrate layer (110) within the cutting region.

9. The production method according to claim 8, characterized by, The removing the thin film layer (120) within the cutting region by etching process comprises: forming a protective adhesive layer (10) on the side of the thin film layer (120) facing away from the substrate layer (110); removing part of the protective adhesive layer (10) to form a gap; removing the thin film layer (120) within the gap by etching process to form an inclined surface (123); removing the protective adhesive layer (10) after forming the inclined surface (123).

10. An electronic device, comprising: The piezoelectric device (100) as claimed in any one of claims 1 to 7, wherein the piezoelectric device (100) is electrically connected to a circuit board (700).

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