Semiconductor element testing device, method for evaluating semiconductor element, and method for manufacturing semiconductor device

Abstract

A semiconductor element testing device (100) comprises a stage (1) and a probe (4). A semiconductor element can be mounted on the stage (1). The probe (4) can be in contact with the semiconductor element (2). A surface (10) of the stage (1) includes a first region (Q1). The first region (Q1) is provided with protrusions (11).

Description

Semiconductor Device Testing Apparatus, Method for Evaluating Semiconductor Devices, and Method for Manufacturing Semiconductor Devices

[0001] The present disclosure relates to a semiconductor device testing apparatus, a method for evaluating semiconductor devices, and a method for manufacturing semiconductor devices.

[0002] Conventionally, a semiconductor device testing apparatus for evaluating the characteristics of semiconductor devices has been known (for example, Japanese Patent Application Laid-Open No. 2006-337247). The semiconductor device testing apparatus includes a stage provided with electrodes and a plurality of probes disposed above the stage. When evaluating the characteristics of a semiconductor device, the semiconductor device is mounted on the stage such that the collector electrode of the semiconductor device is connected to the electrode, and the probes are brought into contact with the emitter electrode and the control electrode of the semiconductor device. By applying a voltage to the control electrode and flowing a current between the collector electrode and the emitter electrode, the characteristics of the semiconductor device can be evaluated.

[0003] Japanese Patent Application Laid-Open No. 2006-337247

[0004] However, when there is a foreign object between the stage and the semiconductor device, there is a problem that the contact resistance fluctuates and the characteristics of the semiconductor device cannot be accurately evaluated.

[0005] The present disclosure has been made to solve the above problems, and an object of the present disclosure is to provide a semiconductor device testing apparatus capable of accurately evaluating the characteristics of a semiconductor device.

[0006] The semiconductor device testing apparatus according to the present disclosure includes a stage and probes. The semiconductor device can be mounted on the stage. The probes can contact the semiconductor device. The surface of the stage includes a first region. Protrusions are provided in the first region.

[0007] The method for evaluating a semiconductor device according to the present disclosure includes a step of preparing a semiconductor device and the semiconductor device testing apparatus, a step of bringing the probes into contact with the semiconductor device, a step of energizing the semiconductor device, a step of measuring an actual value of the current flowing through the semiconductor device, and a step of evaluating the actual value.

[0008] A method for manufacturing a semiconductor device according to this disclosure comprises the steps of preparing a semiconductor device, evaluating the characteristics of the semiconductor device using the semiconductor device, and commercializing the semiconductor device.

[0009] According to the above, a semiconductor device testing apparatus capable of accurately evaluating the characteristics of semiconductor devices can be obtained.

[0010] This is a schematic diagram of a semiconductor device test apparatus according to Embodiment 1. This is a schematic plan view of a semiconductor device according to Embodiment 1. This is a schematic plan view of a stage according to Embodiment 1. This is a schematic cross-sectional view of the stage along line segment IV-IV in Figure 3. This is a schematic cross-sectional view of modified stage 1. This is a schematic cross-sectional view of modified stage 2. This is a schematic cross-sectional view of modified stage 3. This is a flowchart of a semiconductor device evaluation method according to Embodiment 1. This is a graph showing the characteristics of a semiconductor device evaluated using a semiconductor device test apparatus equipped with a stage including a first region according to Embodiment 1. This is a graph showing the characteristics of a semiconductor device evaluated using a semiconductor device test apparatus equipped with a stage not including a first region according to Embodiment 1. This is a schematic diagram of a semiconductor device test apparatus according to Embodiment 2. This is a schematic diagram of a semiconductor device test apparatus according to Embodiment 3. This is a schematic cross-sectional view of a stage according to Embodiment 4. This is a schematic diagram of a protrusion in a semiconductor device test apparatus according to Embodiment 5. This is a flowchart of a semiconductor device manufacturing method according to Embodiment 6.

[0011] Embodiments of the present disclosure will be described below. Unless otherwise specified, the same or corresponding parts in the following drawings will be given the same reference numerals, and their descriptions will not be repeated.

[0012] Embodiment 1. Figure 1 is a schematic diagram of a semiconductor device testing apparatus 100 according to Embodiment 1. Figure 2 is a schematic plan view of a semiconductor device according to Embodiment 1. The semiconductor device testing apparatus 100 shown in Figure 1 is a semiconductor device testing apparatus 100 for evaluating the characteristics of a semiconductor device 2, and comprises a stage 1, a probe assembly, a control device 3, a drive circuit 32, a power supply 33, a voltage sensor 34, a current sensor 31, and a resistor 35.

[0013] The semiconductor element 2 can be mounted on the surface 10 of the stage 1. The semiconductor element 2 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0014] As shown in Figure 2, the semiconductor element 2 has a first main surface 21 and a second main surface 22. The first main surface 21 is the surface to which the probe can make contact. The second main surface 22 is the surface located opposite the first main surface 21. The semiconductor element 2 is mounted on the surface 10 of the stage 1 such that the second main surface 22 faces the stage 1.

[0015] As shown in Figures 1 and 2, a surface electrode 5 is provided on the first main surface 21. The surface electrode 5 includes a current sense electrode 51, a voltage sense electrode 52, a negative emitter electrode 53, and a control electrode 54. The current sense electrode 51, voltage sense electrode 52, negative emitter electrode 53, and control electrode 54 are spaced apart from each other. In other words, as shown in Figure 2, the current sense electrode 51, voltage sense electrode 52, negative emitter electrode 53, and control electrode 54 are formed as separate components. Note that the voltage sense electrode 52 and the emitter electrode 53 may be formed as a single unit.

[0016] A back electrode 6 is provided on the second main surface 22. The back electrode 6 includes a collector electrode 61 which is the positive electrode and a voltage sense electrode 62. The collector electrode 61 may be formed over the entire second main surface 22. When evaluating the characteristics of the semiconductor device 2, the collector electrode 61 contacts the stage electrode 14. The voltage sense electrode 62 contacts the sense electrode 15.

[0017] Here, a feature of the semiconductor device testing apparatus 100 according to this embodiment 1 is that, as shown in Figure 1, the surface 10 of the stage 1 is provided with a plurality of protrusions 11 so as to be uneven. If there is foreign matter between the semiconductor device 2 and the stage 1, the contact resistance between the stage electrode 14 and the collector electrode 61 may vary. In particular, if the shape of the stage electrode 14 is a planar shape, the planar stage electrode 14 and the planar collector electrode 61 will come into contact. In this case, if foreign matter is mixed in between the stage electrode 14 and the collector electrode 61, the contact resistance between the stage electrode 14 and the collector electrode 61 is likely to vary.

[0018] According to the semiconductor device testing apparatus 100 of this embodiment 1, since foreign matter is placed between the multiple protrusions 11, variations in contact resistance between the stage electrode 14 and the collector electrode 61 due to foreign matter are suppressed. As a result, the characteristics of the semiconductor device 2 can be accurately evaluated.

[0019] Figure 3 is a schematic plan view of stage 1 according to Embodiment 1. Figure 4A is a schematic cross-sectional view of stage 1 along line segment IV-IV in Figure 3. As shown in Figure 4A, the surface 10 of stage 1 includes a first region Q1. A projection 11 is provided in the first region Q1. As shown in Figures 1 and 4A, the semiconductor element 2 is arranged in the first region Q1.

[0020] In the first region Q1, the density of the protrusions 11 may be such that there is one protrusion every several hundred μm. That is, as shown in Figure 3, the distance L between adjacent protrusions 11 may be 100 μm or more and 900 μm or less, 200 μm or more and 800 μm or less, or 300 μm or more and 700 μm or less. As shown in Figure 3, multiple protrusions 11 may be arranged at equal intervals. The protrusions 11 may be point-shaped or linear, extending in one direction. In this way, the density and shape of the protrusions 11 may be appropriately changed depending on the location where the semiconductor device testing apparatus 100 is installed. If the location where the semiconductor device testing apparatus 100 is installed is a CR (Clean Room), the size of foreign matter present in the CR is 100 μm or less. Therefore, the distance L between adjacent protrusions 11 may be 100 μm or more.

[0021] Figures 4B, 4C, and 4D are schematic cross-sectional views of modified versions 1, 2, and 3 of Stage 1, respectively. As shown in Figure 4B, the shape of the projection 11 may be triangular. The projection 11 may be positioned on the surface 10 of Stage 1, or, as shown in Figure 4B, on the bottom surface of a recess 13 provided on the surface 10. If the projection 11 is positioned on the bottom surface of a recess 13, the projection 11 may be formed to protrude from the opening of the recess 13.

[0022] As shown in Figure 4B, the directions in which the surface 10 of stage 1 extends are defined as the x-direction and the y-direction. The y-direction is perpendicular to the x-direction. The direction perpendicular to the surface 10 is defined as the z-direction. That is, the z-direction is perpendicular to both the x-direction and the y-direction. The projections 11 may be arranged linearly extending in either the x-direction or the y-direction, or they may be arranged in a grid pattern extending in both the x-direction and the y-direction.

[0023] If the projection 11 is located on the bottom surface of the recess 13, the recess 13 and the projection 11 may be formed by machining. The projection 11 may be joined to the bottom surface of the recess 13 using solder so as not to impair electrical contact between the projection 11 and the stage 1.

[0024] As shown in Figure 4C, the projection 11 may be a support column whose tip portion 11a is formed by a curved surface. The tip portion 11a is the part furthest from the bottom surface of the recess 13 in the z direction and is the part that contacts the semiconductor element 2.

[0025] As shown in Figure 4D, the projection 11 may be a probe that can extend and retract along the z-direction, and may be configured to extend and retract from the bottom surface of the recess 13.

[0026] The projection 11 repeatedly comes into contact with the semiconductor element 2. Therefore, the projection 11 may wear down. To suppress wear of the projection 11, the tip of the projection 11 may be rounded. In other words, the shape of the tip of the projection 11 may be curved.

[0027] As shown in Figure 4A, Stage 1 includes a fixing mechanism 12, a stage electrode 14, and a sense electrode 15. The fixing mechanism 12 fixes the semiconductor element 2 to Stage 1. Specifically, the fixing mechanism 12 adsorbs the semiconductor element 2 placed on the surface 10 of Stage 1, thereby fixing the semiconductor element 2 to the surface 10 of Stage 1. The fixing mechanism 12 includes a suction tube formed inside Stage 1 and an adsorption device (not shown) connected to the suction tube. As shown in Figures 3 and 4A, an air intake port for the suction tube is formed on the surface 10 of Stage 1. Protrusions 11 do not need to be provided around the air intake port to prevent air leakage.

[0028] The probe assembly is positioned above the stage 1. The probe assembly is configured to move vertically. When the semiconductor element 2 is mounted on the stage 1, the probe assembly is positioned on the opposite side of the stage 1 from the semiconductor element 2. In other words, the semiconductor element 2 is positioned between the stage 1 and the probe assembly.

[0029] The probe assembly includes multiple probes 4. Specifically, the probes 4 include a current sense probe 41, a voltage sense probe 42, an emitter probe 43, and a control probe 44. As shown in Figure 1, there may be multiple emitter probes 43.

[0030] The probe 4 can come into contact with the semiconductor element 2. Specifically, when evaluating the characteristics of the semiconductor element 2, the current sense probe 41 comes into contact with the current sense electrode 51. The voltage sense probe 42 comes into contact with the voltage sense electrode 52. The emitter probe 43 comes into contact with the emitter electrode 53. The control probe 44 comes into contact with the control electrode 54.

[0031] As shown in Figure 1, the voltage sensor 34 is connected to the sense electrode 15 and the voltage sense probe 42. Specifically, the positive terminal of the voltage sensor 34 is connected to the sense electrode 15. The negative terminal of the voltage sensor 34 is connected to the voltage sense probe 42. The voltage sensor 34 measures the voltage between the emitter electrode 53 and the collector electrode 61.

[0032] The power supply 33 supplies current between the emitter electrode 53 and the collector electrode 61. Specifically, the power supply 33 is connected to the stage electrode 14 via a positive electrode wire 33a. The power supply 33 is connected to the resistor 35 via a negative electrode wire 33b. The resistor 35 is connected to the power supply 33 and the current sensor 31. The current sensor 31 is connected to the resistor 35 and the current sense probe 41. The current sensor 31 measures the current flowing between the current sense electrode 51 and the collector electrode 61. The resistance value R3 of the resistor 35 is, for example, 200Ω.

[0033] The negative electrode wire 33c is connected at the connection point p1 between the power supply 33 and the resistor 35. The negative electrode wire 33c is connected to each of the multiple emitter probes 43. The drive circuit 32 is connected to the control probe 44.

[0034] The control device 3 controls the operation of the drive circuit 32, stage 1, probe assembly, and power supply 33. The control device 3 acquires output values ​​from the current sensor 31, voltage sensor 34, and power supply 33.

[0035] Here, we will explain the case where the semiconductor device testing apparatus 100 is driven using a normal semiconductor device 2.

[0036] The control device 3 drives the fixing mechanism 12 of the stage 1 to fix the semiconductor element 2 to the surface 10 of the stage 1. As the semiconductor element 2 is attracted using the fixing mechanism 12, the stage electrode 14 is connected to the collector electrode 61. The voltage sense electrode 62 is connected to the sense electrode 15.

[0037] By placing the semiconductor element 2 on the first region Q1, the semiconductor element 2 is supported by the protrusion 11. At this time, variations in contact resistance between the stage electrode 14 and the collector electrode 61 due to foreign matter are suppressed.

[0038] The probe assembly is lowered using the control device 3. In this way, the probe 4 is brought into contact with the semiconductor element 2. Specifically, the current sense probe 41 is brought into contact with the current sense electrode 51. The voltage sense probe 42 is brought into contact with the voltage sense electrode 52. The emitter probe 43 is brought into contact with the emitter electrode 53. The control probe 44 is brought into contact with the control electrode 54.

[0039] The control device 3 applies a voltage to the control electrode 54 via the control probe 44 by driving the drive circuit 32. The control device 3 also supplies a constant current to the semiconductor element 2 by driving the power supply 33. In this way, electrical conduction paths are formed between the collector electrode 61 and the emitter electrode 53, between the collector electrode 61 and the voltage sense electrode 52, and between the collector electrode 61 and the current sense electrode 51.

[0040] Furthermore, electrical conduction paths are formed between the voltage sense electrode 62 and the emitter electrode 53, between the voltage sense electrode 62 and the voltage sense electrode 52, and between the voltage sense electrode 62 and the current sense electrode 51.

[0041] The voltage sensor 34 measures the voltage between the sense electrode 15 and the voltage sense probe 42. The internal resistance of the voltage sensor 34 is several megaohms. Therefore, almost no current flows through the voltage sense probe 42, which significantly reduces the voltage measurement error. As a result, the voltage sensor 34 can accurately measure the potential difference between the voltage sense electrode 52 and the voltage sense electrode 62.

[0042] Let the saturation voltage between the collector electrode 61 and the emitter electrode 53 be Vce(sat). The potential difference between the voltage sense electrode 52 and the voltage sense electrode 62 is the saturation voltage Vcs(sat). The voltage sensor 34 can accurately measure the saturation voltage Vce(sat).

[0043] The current supplied from the power supply 33 flows through the current path R1 in the order of the stage electrode 14, the collector electrode 61, the emitter electrode 53, and the emitter probe 43, and the current path R2 in the order of the stage electrode 14, the collector electrode 61, the current sense electrode 51, the current sense probe 41, the current sensor 31, and the resistor 35.

[0044] The resistance value R3 of the resistor 35 may be, for example, 100 Ω or 1 kΩ. Thus, the amount of current flowing through the current path R2 is about 1 / 10000 of the amount of current flowing through the current path R1.

[0045] Let the saturation voltage between the collector electrode 61 and the current sense electrode 51 be Vcs(sat). Let the measured value of the current amount measured by the current sensor 31 be the current amount Is. When the resistance value of the resistor 35 is the resistance value R3, the following formula (1) is satisfied.

[0046]

[0047] For example, when a constant current of 200 (A) is applied to the semiconductor element 2, the saturation voltage Vce(sat) is 1.5 (V), Vcs(sat) when a current of several mA is applied to the current sense electrode 51 is 1 (V), and the resistance value R3 of the resistor 35 is 100 Ω, the following formula (2) is satisfied.

[0048]

[0049] From formula (2), Is = 5 (mA). In this way, in the semiconductor element 2, by providing the current sense electrode 51 and the emitter electrode 53 separately and providing the resistor 35 in the current path R2 passing through the current sense electrode 51, the set value of the current amount Is can be determined so that the current amount Is flowing through the current path R2 is about 1 / 10000 of the current amount flowing through the current path R1.

[0050] Next, the evaluation method for the semiconductor element 2 will be described. Figure 5 is a flowchart of the evaluation method for the semiconductor element 2 according to Embodiment 1. First, a step (S1) is performed to prepare the semiconductor element 2 and the semiconductor element test apparatus 100. In this step (S1), the semiconductor element 2 is first placed in the first region Q1 of the surface 10 of the stage 1. Specifically, the semiconductor element 2 is mounted on the stage 1 such that the second main surface 22 on which the back electrode 6 is formed faces the stage 1. Next, the fixing mechanism 12 is driven to fix the semiconductor element 2 to the stage 1. In this way, the collector electrode 61 makes good contact with the stage electrode 14, and the voltage sense electrode 62 makes good contact with the sense electrode 15.

[0051] Next, step (S2) is performed to bring the probe 4 into contact with the semiconductor element 2. In step (S2), the probe assembly is lowered to bring the probe 4 into contact with the semiconductor element 2. Specifically, the current sense probe 41 is brought into contact with the current sense electrode 51. The voltage sense probe 42 is brought into contact with the voltage sense electrode 52. The emitter probe 43 is brought into contact with the emitter electrode 53. The control probe 44 is brought into contact with the control electrode 54.

[0052] Next, a step (S3) is performed to energize the semiconductor element 2. In this step (S3), a voltage is applied to the control electrode 54, and current flows through the current path R1 and the current path R2. By driving the power supply 33 with the control device 3, a constant current of, for example, 200A can be supplied to the semiconductor element 2.

[0053] Next, a step (S4) is performed to measure the actual value of the current flowing through the semiconductor element 2. In this step (S4), the current sensor 31 measures the actual value of the amount of current flowing through the current path R2. The measured value of the amount of current is transmitted to the control device 3.

[0054] Next, a step (S5) is performed to evaluate the measured value. In this step (S5), it is determined whether the measured value of the current amount measured by the current sensor 31 satisfies predetermined conditions. Specifically, the predetermined conditions may be that the deviation between the measured value and an appropriate value that takes into account the variation in the preset value of the current amount Is is within a predetermined range. The control device 3 stores the appropriate value of the current amount Is and information regarding the above predetermined requirements.

[0055] Here, we will explain how to calculate the appropriate value of the current Is. In current path R1, the contact resistance between the emitter electrode 53 and the emitter probe 43 is defined as contact resistance R43. In current path R2, the contact resistance between the current sense electrode 51 and the current sense probe 41 is defined as contact resistance R41. The resistance value of resistor 35 is defined as resistance value R3. The potential difference between current path R1 and current path R2 (for example, the potential difference between connection point p1 and connection point p2 in Figure 2) is equal. Therefore, the following equation (3) is satisfied.

[0056]

[0057] The contact resistance R43 is calculated based on the materials constituting the emitter electrode 53 and the emitter probe 43, the probe diameter at the tip of the emitter probe 43, the shape of the emitter probe 43, and the pressure applied to the tip of the emitter probe 43. Let ρ(43) be the resistance of the emitter probe 43, E(43) be the elastic modulus of the emitter probe 43, P(43) be the pressure applied to the tip of the emitter probe 43, and R(43) be the radius of curvature at the tip of the emitter probe 43. The contact resistance R43 satisfies the following equation (4).

[0058]

[0059] The contact resistance R41 is calculated based on the materials constituting the current sense electrode 51 and the current sense probe 41, the probe diameter at the tip of the current sense probe 41, the shape of the current sense probe 41, and the pressure applied to the tip of the current sense probe 41. Let ρ(41) be the resistance of the current sense probe 41, E(41) be the elastic modulus of the current sense probe 41, P(41) be the pressure applied to the tip of the current sense probe 41, and R(41) be the radius of curvature at the tip of the current sense probe 41. The contact resistance R41 satisfies the following equation (5).

[0060]

[0061] In equations (4) and (5), the resistances ρ(43) and ρ(41), the elastic moduli E(43) and E(41), and the radii of curvature R(43) and R(41) of the emitter probe 43 and the current sense probe 41 are measured in advance. The pressing pressures P(43) and P(41) of the emitter probe 43 and the current sense probe 41 are set in advance.

[0062] In this way, using the semiconductor device testing apparatus 100, the contact resistances R43 and R41 can be calculated before evaluating the characteristics of the semiconductor device 2. Then, using equation (3), the appropriate value of the current Is can be calculated from the contact resistances R43 and R41.

[0063] Based on the appropriate value, the control device 3 determines whether the measured value of the current is within a predetermined range (i.e., whether the deviation between the appropriate value and the measured value is within a predetermined range).

[0064] In the step of evaluating the measured values ​​(S5), either the step of evaluating the characteristics of the semiconductor element 2 (S6a) or the step of adjusting the semiconductor element test apparatus 100 (S6b) is performed based on the evaluation results of the measured values.

[0065] In the step of evaluating the measured values ​​(S5), if the measured values ​​do not meet predetermined conditions, a step of adjusting the semiconductor device testing apparatus 100 (S6b) is performed. Specifically, if the measured values ​​do not meet predetermined conditions, the control device 3 determines that the semiconductor device testing apparatus 100 is in an unhealthy state. As a result, in this step (S6b), the control device 3 first performs a step of notifying the operator that the semiconductor device testing apparatus 100 is unhealthy.

[0066] Next, a step is performed to adjust the contact resistance of the semiconductor element 2. The step of adjusting the contact resistance of the semiconductor element 2 may include adjusting the contact resistance between the semiconductor element 2 and the probe 4 by adjusting the pressing pressure of the probe 4 (emitter probe 43 and current sense probe 41), or it may include adjusting the contact resistance between the semiconductor element 2 and the surface 10 of the stage 1 by cleaning the surface 10 of the stage 1.

[0067] In the step of evaluating the measured values ​​(S5), if the measured values ​​meet predetermined conditions, the step of evaluating the characteristics of the semiconductor device (S6a) is performed. Specifically, if the measured values ​​meet predetermined conditions, the control device 3 determines that the semiconductor device test apparatus 100 is in a sound state. As a result, in this step (S6a), the electrical characteristics of the semiconductor device 2 are evaluated.

[0068] Specifically, the fixing mechanism 12 is driven to fix the semiconductor element 2 to the surface 10 of the stage 1. The probe assembly is lowered to bring the probe 4 into contact with the semiconductor element 2. Specifically, the current sense probe 41 is brought into contact with the current sense electrode 51. The voltage sense probe 42 is brought into contact with the voltage sense electrode 52. The emitter probe 43 is brought into contact with the emitter electrode 53. The control probe 44 is brought into contact with the control electrode 54. A voltage is applied to the control electrode 54, and a constant current is passed through the semiconductor element 2 to evaluate the electrical characteristics of the semiconductor element 2.

[0069] Figure 6 is a graph showing the characteristics of a semiconductor device 2 evaluated using a semiconductor device test apparatus 100 equipped with a stage 1 including the first region Q1 according to Embodiment 1. Figure 7 is a graph showing the characteristics of a semiconductor device 2 evaluated using a semiconductor device test apparatus 100 equipped with a stage 1 not including the first region Q1 according to Embodiment 1. Two semiconductor device test apparatuses 100 equipped with a stage 1 including the first region Q1 are prepared (Sample 1, Sample 2). Two semiconductor device test apparatuses equipped with a stage 1 not including the first region Q1 are prepared (Sample 3, Sample 4).

[0070] In Figure 6, the horizontal axis shows the current (in arbitrary units) flowing through the current sense probe 41 when the characteristics of the semiconductor device 2 are evaluated using sample 1. In Figure 6, the vertical axis shows the current (in arbitrary units) flowing through the current sense probe 41 when the characteristics of the semiconductor device 2 are evaluated using sample 2.

[0071] In Figure 7, the horizontal axis shows the current (in arbitrary units) flowing through the current sense probe 41 when the characteristics of the semiconductor device 2 are evaluated using sample 3. In Figure 7, the vertical axis shows the current (in arbitrary units) flowing through the current sense probe 41 when the characteristics of the semiconductor device 2 are evaluated using sample 4.

[0072] The measured current flowing through the current sense probe 41 was evaluated for 50 semiconductor elements 2. As shown in Figure 6, when the characteristics of the semiconductor elements 2 were evaluated using a semiconductor element test apparatus 100 equipped with a stage 1 including a first region Q1, it can be seen that the measured current values ​​are located near the 45-degree line. In other words, it is thought that the presence of protrusions 11 on the surface 10 of the stage 1 reduces the variation in contact resistance between the semiconductor elements 2 and the stage 1.

[0073] On the other hand, as shown in Figure 7, when the characteristics of the semiconductor element 2 are evaluated using a semiconductor element test apparatus 100 equipped with a stage 1 that does not include the first region Q1, it can be seen that the current measurement values ​​are located away from the 45-degree line. In other words, it appears that there is a large variation in the contact resistance between the semiconductor element 2 and the stage 1. Thus, it can be confirmed that the variation in contact resistance between the semiconductor element 2 and the stage 1 is suppressed by forming an uneven surface on the stage 1.

[0074] A semiconductor device testing apparatus 100 according to this disclosure comprises a stage 1 and a probe 4. A semiconductor device can be mounted on the stage 1. The probe 4 can contact the semiconductor device 2. The surface 10 of the stage 1 includes a first region Q1. The first region Q1 is provided with a projection 11.

[0075] In this way, foreign matter is placed between the multiple protrusions 11, thereby suppressing variations in contact resistance between the stage electrode 14 and the collector electrode 61 caused by the foreign matter. As a result, the characteristics of the semiconductor device can be accurately evaluated.

[0076] The semiconductor device testing apparatus 100 includes a power supply 33, a voltage sensor 34, and a current sensor 31. The semiconductor device 2 has a first main surface 21 and a second main surface 22. The first main surface 21 can contact the probe 4. The second main surface 22 faces the stage 1. A surface electrode 5 is provided on the first main surface 21. The surface electrode 5 includes an emitter electrode 53 and a current sense electrode 51. A back surface electrode 6 is provided on the second main surface. The back surface electrode 6 includes a collector electrode 61. The power supply 33 supplies current between the emitter electrode 53 and the collector electrode 61. The voltage sensor 34 measures the voltage between the emitter electrode 53 and the collector electrode 61. The current sensor 31 measures the current flowing between the current sense electrode 51 and the collector electrode 61. In this way, the characteristics of the semiconductor device 2 can be evaluated.

[0077] According to the semiconductor device testing apparatus 100 described above, the probe 4 includes an emitter probe 43 and a current sense probe 41. The emitter probe 43 is connected to the power supply 33 and can contact the emitter electrode 53. The current sense probe 41 is connected to the power supply 33 and can contact the current sense electrode 51. In this way, the characteristics of the semiconductor device 2 can be evaluated.

[0078] The semiconductor device testing apparatus 100 described above includes a drive circuit 32. The surface electrode 5 includes a control electrode 54. The probe 4 includes a control probe 44. The control probe 44 is connected to the drive circuit 32 and can contact the control electrode 54. In this way, the characteristics of the semiconductor device 2 can be evaluated.

[0079] A method for evaluating a semiconductor device 2 in accordance with this disclosure comprises the steps of: preparing the semiconductor device 2 and the semiconductor device testing apparatus 100 (S1); contacting the probe 4 with the semiconductor device 2 (S2); applying current to the semiconductor device 2 (S3); measuring the actual value of the current flowing through the semiconductor device 2 (S4); and evaluating the actual value (S5).

[0080] In this way, the integrity of the semiconductor device testing apparatus 100 can be evaluated by assessing the deviation of the measured current value from a predetermined optimal current value. As a result, the characteristics of the semiconductor device can be accurately evaluated.

[0081] The above-described method for evaluating the semiconductor device 2 comprises a step of evaluating the characteristics of the semiconductor device 2 (S6a) and a step of adjusting the semiconductor device test apparatus 100 (S6b). Based on the evaluation results of the measured values, either the step of evaluating the characteristics of the semiconductor device 2 (S6a) or the step of adjusting the semiconductor device test apparatus 100 (S6b) is performed.

[0082] In this way, the characteristics of the semiconductor device 2 can be accurately evaluated using the semiconductor device testing apparatus 100, which ensures soundness.

[0083] Embodiment 2. Figure 8 is a schematic diagram of the semiconductor device testing apparatus 100 according to Embodiment 2. Figure 8 corresponds to Figure 1. The semiconductor device testing apparatus 100 shown in Figure 8 basically has the same configuration as the semiconductor device testing apparatus 100 shown in Figure 1 and can obtain the same effects, but differs in that there is a flat region directly below the current sense.

[0084] Specifically, the surface 10 of stage 1 includes a second region Q2. The second region Q2 is flat. The second region Q2 is adjacent to the first region Q1. In a plan view of the surface 10 of stage 1, the second region Q2 overlaps with the current sense of the semiconductor element 2. The second region Q2 may be arranged so as to be surrounded by the first region Q1.

[0085] In semiconductor element 2, the area of ​​the current sense is very small, generally about 1 / 100,000 of the area of ​​the second main surface 22. Therefore, if a protrusion 11 is provided on the surface 10 of stage 1 that contacts the current sense, there is a risk that the current sense will not contact the protrusion 11. As a result, the current will not flow perpendicularly from the surface 10 of stage 1 towards the second main surface 22, but will flow along the path with the minimum electrical resistance. In other words, there is a risk that the current division ratio of current paths R1 and R2 will change.

[0086] According to the semiconductor device testing apparatus 100 of this embodiment 1, since the surface 10 of the stage 1 is a flat second region Q2 directly beneath the current sense, the current sense comes into contact with the surface 10 of the stage 1.

[0087] According to the semiconductor device testing apparatus 100 described above, the surface 10 of the stage 1 includes a flat second region Q2. The second region Q2 is adjacent to the first region Q1.

[0088] In this way, since the surface 10 of stage 1 is a flat second region Q2 directly beneath the current sense, the current sense reliably makes contact with the surface 10 of stage 1.

[0089] Embodiment 3. Figure 9 is a schematic diagram of the semiconductor device testing apparatus 100 according to Embodiment 3. Figure 9 corresponds to Figure 1. The semiconductor device testing apparatus 100 shown in Figure 9 basically has the same configuration as the semiconductor device testing apparatus 100 shown in Figure 1 and can obtain the same effects, but differs in that it includes a flat member 7. The flat member 7 can be arranged to cover a part of the first region Q1. Specifically, the flat member 7 has a flat surface on one side and an uneven surface on the other side. The uneven surface is configured to fit onto the protrusions 11 in the first region Q1. The flat surface is arranged to face the current sense of the semiconductor device 2. In this way, the protrusions 11 can be eliminated in any region of the first region Q1. In other words, the same effects as the semiconductor device testing apparatus 100 shown in Figure 8 can be obtained.

[0090] The current sensing position of the semiconductor element 2 varies depending on the type or size of the semiconductor element 2. Therefore, without changing the stage 1 according to the semiconductor element 2, the same effect as the semiconductor element testing apparatus 100 shown in Figure 8 can be obtained by changing the position of the flat member 7 according to the semiconductor element 2 being tested.

[0091] The semiconductor device testing apparatus 100 described above includes a flat member 7 positioned in the first region Q1. This allows any position within the first region Q1 to be made flat. As a result, the current sense can reliably contact the surface 10 of the stage 1.

[0092] Embodiment 4. Figure 10 is a schematic cross-sectional view of the stage according to Embodiment 4. Figure 10 corresponds to Figure 4A. The semiconductor device testing apparatus 100 shown in Figure 10 basically has the same configuration as the semiconductor device testing apparatus 100 shown in Figure 1 and can obtain the same effects, but differs in that the sense electrode 15 is located inside the fixing mechanism 12.

[0093] As described above, the stage 1 of the semiconductor device testing apparatus 100 has a fixing mechanism 12. The fixing mechanism 12 fixes the semiconductor device 2 to the stage 1. As shown in Figure 10, the fixing mechanism 12 includes a suction tube 12a formed inside the stage 1 and an adsorption device 12b connected to the suction tube 12a. The fixing mechanism 12 adsorbs the semiconductor device 2 placed on the surface 10 of the stage 1 and fixes the semiconductor device 2 to the first region Q1.

[0094] As mentioned above, stage 1 has a sense electrode 15. The voltage sense electrode 62 may be in contact with the sense electrode 15, or the collector electrode 61 may be in contact with the stage electrode 14 as shown in Figure 10.

[0095] The sense electrode 15 may be placed inside the suction tube 12a. A base 16 for fixing the probe including the sense electrode 15 may be placed inside the suction tube 12a. The probe including the sense electrode 15 may be connected to a voltage sensor 34 via the base 16. In this way, the voltage sensor 34 measures the voltage between the emitter electrode 53 and the collector electrode 61. The sense electrode 15 may be placed in one of the multiple suction tubes 12a, or it may be placed in all of the multiple suction tubes 12a. This way, poor contact between the semiconductor element 2 and the sense electrode 15 can be suppressed.

[0096] If the material constituting the suction tube 12a is metal, the suction tube 12a and the stage 1 are at the same potential, so the material constituting the base 16 may be an insulating material. If the material constituting the suction tube 12a is an insulating material, the material constituting the base 16 does not have to be an insulating material. In this way, the sense electrode 15 and the stage 1 are insulated in the vicinity of the semiconductor element 2.

[0097] As shown in Figure 4A, in the stage 1 according to Embodiment 1, a path is formed inside the stage 1 for a probe including a sense electrode 15 to pass through. The shape of this path is, for example, L-shaped. Therefore, the mechanism for the probe passing through this path becomes complex.

[0098] On the other hand, in the stage 1 according to this fourth embodiment, by arranging the sense electrode 15 inside the fixing mechanism 12, it is not necessary to form a path for the sense electrode 15 inside the stage 1. In other words, the additional processing required to form a path for the sense electrode 15 inside the stage 1 can be omitted. Furthermore, the mechanism of the probe arranged inside the fixing mechanism 12 can be simplified. The probe including the sense electrode 15 may be a general-purpose probe such as a spring probe.

[0099] The semiconductor device testing apparatus 100 described above includes a fixing mechanism 12. The fixing mechanism 12 fixes the semiconductor device 2 to the first region Q1. In this way, the fixing mechanism 12 adsorbs the semiconductor device 2 placed on the surface 10 of the stage 1 and fixes the semiconductor device 2 to the first region Q1.

[0100] According to the semiconductor device testing apparatus 100 described above, the stage 1 has a sense electrode 15. The sense electrode 15 is located inside the fixing mechanism 12. In this way, additional processing to form a path for the sense electrode 15 inside the stage 1 can be omitted.

[0101] Embodiment 5. Figure 11 is a schematic diagram of the projection 11 of the semiconductor device testing apparatus 100 according to Embodiment 5. The projection 11 of the semiconductor device testing apparatus 100 shown in Figure 11 basically has the same configuration as the projection 11 of the semiconductor device testing apparatus 100 shown in Figure 1, but differs in that it has a wave-returning structure. As shown in Figure 11, the projection 11 has a tip portion 11a and a return portion 11b. The return portion 11b is formed on the side surface of the projection 11. In this way, even if foreign matter is placed between multiple projections 11, it is prevented from being blown up again.

[0102] According to the semiconductor device testing apparatus described above, the protrusion 11 has a wave-returning configuration. This prevents foreign matter from being blown up.

[0103] Embodiment 6. Figure 12 is a flowchart of the method for manufacturing a semiconductor device according to Embodiment 6. First, a step (S11) for preparing the semiconductor element 2a is performed. In this step (S11), the semiconductor element 2a in wafer form is prepared. The semiconductor element 2a is manufactured by a wafer process.

[0104] Next, a step (S12) is performed to evaluate the characteristics of the semiconductor element 2a. In this step (S12), the characteristics of the semiconductor element 2a are evaluated using the semiconductor element testing apparatus 100 according to Embodiments 1 to 5. The semiconductor element 2a may be a semiconductor element 2a in wafer form, or a semiconductor element 2a in chip form that has been diced into individual pieces. In this step (S12), the dynamic characteristics of the semiconductor element 2a may also be evaluated. In this way, a semiconductor element 2 with accurately evaluated characteristics can be obtained.

[0105] Next, a process (S13) for commercializing the semiconductor element 2a may be carried out. In this process (S13), the semiconductor element 2 that passed the test in the process (S12) for evaluating the characteristics of the semiconductor element 2a is commercialized. The semiconductor element 2a may be diced into individual pieces and shipped as a semiconductor device, or the semiconductor element 2 may be mounted on a module and shipped as a semiconductor device. In this way, a semiconductor device containing a semiconductor element 2 whose characteristics have been accurately evaluated can be obtained.

[0106] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The basic scope of this disclosure is indicated by the claims rather than the foregoing description and is intended to include all modifications within the meaning and scope of the claims equivalents.

[0107] 1 Stage, 2 Semiconductor element, 2a Semiconductor element, 3 Control device, 4 Probe, 5 Surface electrode, 6 Back electrode, 7 Flat member, 10 Surface, 11 Projection, 11a Tip, 11b Return, 12 Fixing mechanism, 12a Suction tube, 12b Adsorption device, 13 Recess, 14 Stage electrode, 15 Sense electrode, 16 Base, 21 First main surface, 22 Second main surface, 31 Current sensor, 32 Drive circuit, 33 Power supply, 33a Positive electrode wire, 33b Negative electrode wire, 33c Negative electrode wire, 34 Voltage sensor, 35 Resistor, 41 Current sense probe, R(41) Radius of curvature, ρ(41) Resistance, E(41) Elastic modulus, P(41) Pressure, 42 Voltage sense probe, R(43) Radius of curvature, ρ(43) Resistance, E(43) Elastic modulus, P(43) Pressure, 43 Emitter probe, 44 Control probe, 51 Current sense electrode, 52 Voltage sense electrode, 53 Emitter electrode, 54 Control electrode, 61 Collector electrode, 62 Voltage sense electrode, 100 Semiconductor device test apparatus, L Distance, p1 Connection point, p2 Connection point, Q1 First region, Q2 Second region, R3 Resistance value, R41 Contact resistance, R43 Contact resistance.

Claims

1. A semiconductor device testing apparatus comprising a stage on which a semiconductor device can be mounted, and a probe that can contact the semiconductor device, wherein the surface of the stage includes a first region on which protrusions are provided.

2. The semiconductor device has a first main surface that can contact the probe and a second main surface that faces the stage, the first main surface is provided with a surface electrode including an emitter electrode and a current sense electrode, the second main surface is provided with a back surface electrode including a collector electrode, and the semiconductor device testing apparatus comprises a power supply that supplies current between the emitter electrode and the collector electrode, a voltage sensor that measures the voltage between the emitter electrode and the collector electrode, and a current sensor that measures the current flowing between the current sense electrode and the collector electrode, according to claim 1.

3. The semiconductor device testing apparatus according to claim 2, wherein the probe includes an emitter probe connected to the power supply and capable of contacting the emitter electrode, and a current sense probe connected to the power supply and capable of contacting the current sense electrode.

4. The semiconductor device testing apparatus according to claim 3, wherein the surface electrode includes a control electrode, the semiconductor device testing apparatus comprises a drive circuit, and the probe includes a control probe connected to the drive circuit and capable of contacting the control electrode.

5. The semiconductor device testing apparatus according to any one of claims 1 to 4, wherein the surface of the stage includes a flat second region adjacent to the first region.

6. The semiconductor device testing apparatus according to any one of claims 1 to 5, comprising a flat member disposed in the first region.

7. A semiconductor element testing apparatus according to any one of claims 1 to 6, comprising a fixing mechanism for fixing the semiconductor element in the first region.

8. The semiconductor device testing apparatus according to claim 7, wherein the stage has a sense electrode disposed inside the fixing mechanism.

9. A method for evaluating a semiconductor element, comprising the steps of: preparing a semiconductor element and a semiconductor element testing apparatus according to any one of claims 1 to 8; bringing the probe into contact with the semiconductor element; applying current to the semiconductor element; measuring the measured value of the current flowing through the semiconductor element; and evaluating the measured value.

10. A method for evaluating a semiconductor element according to claim 9, comprising the steps of evaluating the characteristics of the semiconductor element and adjusting the semiconductor element test apparatus, wherein either the step of evaluating the characteristics of the semiconductor element or the step of adjusting the semiconductor element test apparatus is performed based on the evaluation results of the measured values.

11. A method for manufacturing a semiconductor device, comprising the steps of: preparing a semiconductor device; evaluating the characteristics of the semiconductor device using a semiconductor device testing apparatus described in any one of claims 1 to 8; and manufacturing the semiconductor device into a product.

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