Device and method for detecting zero potential interval

A zero-potential, voltage signal technology, applied in the field of AC-to-DC converter architecture with power factor correction, can solve problems such as increased THD, high-frequency switching energy loss, growth, etc.

Active Publication Date: 2011-12-07
LEADTREND TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] However, even if the on-time increases slightly with the shortening of the off-time, once the off-time is too short, it will cause unnecessary high-frequency switching energy loss (switching loss)
Moreover, the on-time changes with the off-time (off-time), which may increase the THD instead

Method used

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  • Device and method for detecting zero potential interval
  • Device and method for detecting zero potential interval
  • Device and method for detecting zero potential interval

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Embodiment Construction

[0025] The content of the present invention will be explained below through examples. However, the embodiments of the present invention are not intended to limit the present invention to be implemented in any specific environment, application or special method as described in the embodiments. Therefore, the descriptions about the embodiments are only for the purpose of explaining the present invention rather than limiting the present invention. It should be noted that in the following embodiments and drawings, elements not directly related to the present invention have been omitted and not shown. For technical convenience, components that are the same or similar, or have similar functions, will use the same component symbols when explaining. However, it should be emphasized that the same labeled elements in different embodiments can be implemented by different elements.

[0026] Please refer to figure 2 , which is an AC-to-DC converter 50 implemented according to an embodi...

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Abstract

Device and method for detecting zero potential interval. The device for detecting the zero potential interval can detect whether an input voltage is close to zero potential through an auxiliary winding, and detect whether a main winding is almost completely releasing stored energy through the auxiliary winding.

Description

technical field [0001] The present invention relates to an AC to DC converter architecture, in particular to an AC to DC converter architecture with power factor correction (power factor correction, PFC). Background technique [0002] In most AC-to-DC converters, it is desirable to have the entire circuit exhibit a purely resistive behavior with respect to the AC input voltage. For this reason, many active PFC architectures have been developed today, and these PFC architectures can generate a corresponding AC input current when receiving an AC input voltage. [0003] For PFC, it is very important to generate a sine wave current with very low total harmonic distortion (THD). THD and power factor represent the operational performance of the PFC circuit. The highest value of power factor is 1, and in general practice, THD is acceptable as long as it is lower than 15%. [0004] For example, US Patent Nos. 7,375,995, 7,397,678, re40016, and 7,295,452, etc. all disclose part of...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H02M1/42H02M7/04
CPCY02B70/126Y02B70/10
Inventor吴宗修
OwnerLEADTREND TECH