Processor device and loop processing method thereof

A processor and loop body technology, applied in the direction of machine execution devices, etc., can solve the problems of large loop execution overhead and the processor loop control cannot be completely realized by hardware, etc., to achieve the effect of improving performance

Inactive Publication Date: 2012-06-20
INST OF ACOUSTICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The purpose of the present invention is to solve the problem that the processor loop control of the ultra-long instruction word cannot be completely realized by hardware and the loop execution overhead is large by adding an instruction and a cycle unit in the ultra-long instruction word processor

Method used

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  • Processor device and loop processing method thereof
  • Processor device and loop processing method thereof
  • Processor device and loop processing method thereof

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Embodiment Construction

[0019] The present invention realizes the zero overhead of the processor cycle execution of the ultra-long instruction word by adding a loop flag instruction (LP instruction) and a cycle unit in the prior art ultra-long instruction word processor.

[0020] The encoding format of the LP instruction and the definition of the instruction are described as follows.

[0021] The LP instruction syntax has a label (label), an unsigned parameter (uimmn) and a parallel flag symbol. The label (label) represents the label of the next instruction execution package after the end of the loop body, the unsigned parameter (uimmn) represents the number of cycles in the loop body, and the parallel flag symbol represents whether this instruction and the next instruction belong to the same instruction execution package , that is, whether it can be executed in parallel. Each instruction execution package in the program may include 1 to N instructions, and N is the number of multi-issues supported ...

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Abstract

The invention discloses a VLIW (Very Long Instruction Word) processor device and a loop processing method thereof. The VLIW processor device comprises a loop unit, an address sending unit and an instruction decoding unit, wherein the loop unit comprises a loop volume data calculating module, a loop counting module, a memory module and an instruction fetching address calculating module. The loop processing method comprises the following steps of: obtaining a loop mark instruction; extracting a loop parameter carried in the loop mark (LP) instruction; obtaining and storing loop volume data according to the address of the loop mark instruction and the loop parameter; taking the stored loop volume body data as current loop volume data; obtaining and executing the instruction according to a current instruction fetching address; and obtaining a next instruction fetching address according to the current instruction fetching address, and obtaining the current instruction fetching address by comparing the next instruction fetching address with the loop volume data. The problems that the loop control of a VLIW processor cannot be completely realized by hardware and the loop execution expense is high are solved, therefore, the performance of the VLIW processor is greatly increased.

Description

technical field [0001] The invention relates to a processor technology, in particular to a processor device and a cycle processing method thereof. Background technique [0002] With the rapid development of computer and information technology, digital signal processing (Digital Signal Processing, DSP) technology came into being and developed rapidly. DSP processors are widely used in data-intensive computing applications, such as image and video coding. The computational complexity and real-time characteristics of these applications put forward higher requirements on the performance of the processor. Most of the calculations in these applications are concentrated in loops and loop nests. [0003] In the application of DSP, if the DSP processor can realize the cycle of zero overhead, the performance of the DSP processor can be greatly improved. The so-called zero-overhead loop means that when the DSP processor executes the loop, it can execute a set of instructions without...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/30
Inventor 张铁军王东辉王琪洪缨侯朝焕
Owner INST OF ACOUSTICS CHINESE ACAD OF SCI
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