1177 results about "Dsp processor" patented technology

A MP3 player having an exercise meter is provided. The MP3 player includes a DSP processor for processing audio data and playing them; a vibration sensing component for generating a first signal following with a user's vibration and transmitting the first signal to the DSP processor; and a heartbeat sensor for sensing the heartbeat condition of the user to generate a second signal and transmit the second signal to the DSP processor. By using the DSP processor to process the first and the second signals to obtain the status of physical strength of the user, so that when the user carries the MP3 player for exercising, the MP3 player can play the music, and always monitor the exercising status of the user.

The invention belongs to the field of agricultural plant protection machinery, and provides a precise targeted spraying and weeding device. The spraying and weeding device comprises a farmland information acquisition and processing system, a spraying system and a control system. The spraying and weeding device finishes acquisition and processing of images in real time and identifies crops and weeds; a DSP (digital signal processor) sends weed positions and density information acquired after the images are processed to an ARM (advanced RISC machine) processor; and the ARM processor realizes combination of different spray heads and opening of an electromagnetic valve by combining the received speed, flow and pressure information and controlling so as to perform precise targeted spraying on the weeds. By adopting a targeted spraying weedicide mode, the device reduces weeding labor and consumption of pesticide, saves the cost and relieves the pollution of the pesticide to the environment.

An improved digital signal processing (DSP) processor architecture is presented in which word conditioning (e.g., rounding, saturation, etc.) and analysis operations (e.g., block floating point analysis) are implemented in the write datapath to memory. By moving word conditioning operations from the critical path to the write datapath, the throughput of common DSP functional blocks such as multiplier-accumulator (MAC) blocks may be improved. Delays may be further reduced by combining analysis operations with write or move operations.

A video transport stream over IP (TS/IP) server system comprises a set of video server blocks. A video server block comprises a pair of codecs and a primary FPGA, the codecs based on a fully programmable high speed DSP processor. The video server block further comprises a pair of VioIP engines for translating transport streams into IP packet streams. The video TS/IP server can perform transcoding, transrating and statistical multiplexing functions between ingress and egress transport streams. The video TS/IP server can ingress or egress HD-SDI and DVB-ASI data streams to or from an IP network via TS/IP. A host subsystem is embedded in a stand-alone embodiment. Multiple video TS/IP servers can be hosted by a PC in a PC host embodiment.

An extension to current multiple memory bank video processing architecture is presented. A more powerful memory controller is incorporated, allowing computation of multiple memory addresses at both the input and the output data paths making possible new combinations of reads and writes at the input and output ports. Matrix transposition computations required by the algorithms used in image and video processing are implemented in MAC modules and memory banks. The technique described here can be applied to other parallel processors including future VLIW DSP processors.

The invention discloses an omni-directional intelligent electric wheel chair, which comprises a chassis frame and a seat, wherein the two sides below the chassis frame are respectively hinged with an actuating arm of which the left and the right correspond; the actuating arm is connected with Mecanum wheels which can be used for forming a pair of front wheels and a pair of rear wheels; the two sides below the seat, the front part of the seat and the upper parts of the front wheels are respectively provided with an ultrasonic sensor; the outer sides of the Mecanum wheels are respectively provided with an infrared sensor; a handle of the seat is provided with a control box and an operating handle; the actuating arm is also provided with a drive control board; and a drive control board circuit is connected with a digital signal processor (DSP). Compared with the conventional two-wheeled rear-drive electric wheel chair, the omni-directional intelligent electric wheel chair provided by the invention has omni-directional moving abilities, such as lateral direction, slant direction and the like, and has larger movement flexibility; and environment around the wheel chair can be detected through the ultrasonic sensor and the infrared sensor, so as to provide a rider with information of a barrier which can hinder the wheel chair to move, realize that the rider can automatically avoid the barrier when driving the wheel chair or can brake the wheel chair, improve use safety of the wheel chair.

The invention discloses a vehicle detection system based on binocular stereo vision and a method thereof. The system comprises binocular parallel cameras, a DSP processor, communication and other modules. The system is vertically installed above a lane in a top-down mode so as to carry out real-time detection on road vehicles. The method comprises the following steps of (1) carrying out main point difference calibration on left and right cameras in advance and acquiring an accurate main point difference parameter; (2) collecting left and right images in real time so as to carry out detection and extraction of a foreground moving object; (3) carrying out stereo matching on an extracted and acquired foreground object area and acquiring a current frame parallax image; (4) carrying out subsequent processing on the acquired parallax image and removing a false detection area, simultaneously acquiring a two-dimensional ground plane mapping image; (5) through calculation, acquiring correlation parameters of a speed, a vehicle height, a vehicle model and the like. In the invention, the binocular cameras are used; a stereo vision principle is used so as to acquire depth information of the object; problems that a monocular vision technology is sensitive to light changes and is easy to be disturbed by shadow are solved.

The invention discloses a portable universal digital storage oscilloscope. The passive probe connects with the signal transforming conditioning circuit, analog-digital conversion ADC circuit, data path and high frequency control module, DSP processor system, data interface, and the signal transforming conditioning circuit connects with the trigger function generating circuit, data path and high frequency control module, and ADC circuit, and digital signal LCD display connects with the DSP processor system, and the signal transforming conditioning circuit, and the rechargeable battery and AC-DC power module connect with the intelligent power switch and distribution circuit, and DSP processor system. The invention uses four ADC chips to phase interleaving sampling, which increasing bandwidth, and lower cost; the external power and internal battery can automatically switch to supply power, to intelligently control the power distribution, with low power, small size, and can be used in various testing field handheld; the single machine completes the signal processing result and displaying, audio recording and storing the output, which can set up and update procedures through data interface, and it is a portable universal digital storage oscilloscope.

A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.

The invention discloses a four-axis full-automatic high-speed dispensing robot servo-control system. The four-axis full-automatic high-speed dispensing robot servo-control system is characterized in that an FPGA (Field Programmable Gata Array) processor is introduced in a single-chip DSP (Digital Signal Processor) so as to form a DSP-FPGA based dual-core processor, the dual-core processor concentratedly designs the traditional multi-controllers system realized by a singlechip and fully considers the function of a battery in the system so as to realize that one controller synchronously controls four axes, and a four-axis servo system of heaviest workload in a four-axis full-automatic high-speed dispensing robot servo controller system is controlled by the FPGA processor, so that the characteristic of faster data processing speed of the FPGA processor is fully played; a human-computer interface module, a path read module, an on-line output module, a data memory module, an I (Input)/O(Output) control module and an image acquisition and processing unit are controlled by the DSP, so that the DSP and the FPGA processor divide the work, the DSP is free from heavy workload, therefore the capacity of resisting disturbance of a dispensing robot is greatly enhanced.

An intelligent image smoke/flame/complex intelligent image smoke/flame sensor, and an intelligent image smoke/flame detection system formed of such an intelligent image smoke/flame/complex intelligent image smoke/flame sensor. The intelligent image smoke/flame sensor is formed of an image sensor, for example, CCD (Charge-coupled Device), a DSP Processor, an input/output circuit, an infrared lamp and filter assembly, a casing, a window glass, a front cover, and a rear cover. The intelligent image smoke/flame detection system accurately detects fire characteristics including smoke and flame, producing an early alarm to lower catastrophe.

The invention relates to a data encryption and decryption technology, in particular to a method adopting the parallel data processing of multi-crypto chips to improve the encryption and decryption speed of a system. A parallel data processing unit for the multi-crypto chips and a high-speed encryption method for the data have the following advantages that: the operation of the system does not occupy extra resource of a main CPU, all the encryption and decryption operations are performed in a DSP processor, and the extreme improvement of the encryption and decryption speed is realized through the parallel processing of a plurality of crypto chips and the DSP.

The invention relates to a technique for dynamically loading processor application programs and a hardware system for realizing the technique. The system mainly comprises a digital signal processor (DSP) 11, a field programmable gate array (FPGA) processor 17, a complex programmable logic device (CPLD) 16, a FLASH memory 13, a synchronous dynamic random access memory (SDRAM) 12, an interface chip14 and a power module 15, wherein fixed programs in the FLASH memory 13 comprise a DSP bootstrap program, a DSP management program and a plurality of FPGA and DSP application programs. A method for implementing the system has the characteristics that: dynamic loading and on-line updating of the FPGA application program and the DSP application program are realized by using the management program; the jump among the bootstrap program, the management program and the application programs is realized by the DSP technique so as to complete the dynamic loading function; and the FPGA is taken over bythe CPLD so as to configure a bus and the FPGA application program is loaded by combining the DSP.

A monitoring device comprises CPCI bus, DSP processor and hardware of eight channel synchronous high-speed data collection. The method includes realizing dynamic adaptive setting and adjusting of monitoring paramter according to equipment running state, carrying out monitoring data intelligent storage for providing real time monitoring in total running period of large scale rotating equipment.

The invention relates to a method for carrying out real-time identification and targeted spraying on cotton field weedsVisual system hardwares, comprising an additional light source, a CCD color video camera, an A/D converter, a DSP image processor, a D/A converter and an LCD (liquid crystal display) display; the additional light source can improve the situation in which light is not uniform or bright enough under natural conditions.The identification method comprises the following steps: a video camera installed at the front part of a weeding machine captures cotton field images in real time; after A/D conversion, the images are stored in a chip memory for being called by a DSP (Digital Signal Processor); the DSP extracts frame images from video streams and processes the frame images; green plants from soil backgrounds are segmented by the Cr characteristic method; the images are equally divided into four lines according to the arrangement of spray nozzles with each spray nozzle corresponding to a line; position features are used to recognize weeds among the lines; the weeds are recognized according to area and form features of blades; weeds position information is transmitted to a microcontroller; and the spray nozzles are opened to carry out accurate targeted spraying of weed killer to save pesticides and reduce pollution to the environment.

The invention discloses a full digital temperature controller applied to optical fiber gyroscope inertia measurement combination, comprising seven temperature sensors, one DSP processor, two photoelectric coupler, seven-channel switch power amplifier and power supply circuit, where the DSP processor compares eN=TN-tn to control PWM wave generation, where tn is working temperature collected real-timely by temperature sensor and TN is set temperature, so as to drive heating component to make automatic adjustment control of heating current, which forms a closed-loop feedback device. And the invention controls working temperatures of the heating component and the controlled object, making them work at constant temperature, thus overcoming the effect of environmental temperature change on output accuracy of inertia components.

The invention discloses a device and a method for controlling MPPT of a solar pvelectricity generating system. The device comprises an MPPT sampling circuit, a drive circuit, a current sampling circuit, a voltage sampling circuit and a DSP processor. The method comprises the following steps that: when a disturbance direction keeps constant for 3 times, a voltage disturbance value is multiplied by an exponent of 2 so as to rapidly track to the maximum power point; and when Udc swings near U PMAX, the voltage disturbance value is divided by the exponent of 2 so as to reduce the swing range of photovoltaic array voltage Udc and to make the Udc stabilized on the photovoltaic array output voltage U PMAX point corresponding to the maximum output power point. The device and the method avoid the phenomena of low tracking speed and swinging near the maximum work voltage in the prior maximum power point tracking technology.

The invention discloses an on-line programming FPGA reconfigurable device which comprises an FPGA, a configuration chip, a configuration chip controller and a DSP processor. The DSP processor gives out a control gating command character string to the configuration chip controller after receiving a reconfigurable command; the control gating command character string after being resolved by the configuration chip controller arranges the nCONFIG signal line of the configuration chip controller into a low level and arranges the nCE signal line into a high level, thereby leading the FPGA to releasethe control right on the configuration chip; then the DSP processor stores the received configuration data into the configuration chip; after the storage of the configuration data is accomplished, thenCONFIG signal line of the configuration chip controller is arranged into the high level and the nCE signal line is arranged into the low level, thereby leading the FPGA to re-obtain the control right on the configuration chip; and after the control right is re-obtained, the FPGA downloads the data in the configuration chip for re-configuration after the rising edge of the nCONFIG signal line isdetected, thereby accomplishing the on-line programming reconfiguration of FPGA.

One moveable goal detecting equipment and method based on artificial compound belongs to artificial compound moveable goal detecting system. It relates to camera, outline border, standing pole, Yunnan and DSP processor. The moveable goal detecting method uses moveable goal division arithmetic to pick up and identify moveable goal form the video frequency picture having moveable goal. The dynamic and static state parameter testing method uses some cameras to screen the moveable goal to calculate the coordinate under the appointed world coordinate system and draw the movement track and speed. The moveable goal tracking method is about dividing up the dynamic and static state parameter of moveable goal to judge its movement trend, and run Yunnan to follow moveable goal by serial port. The panorama creating method takes the method gray-level relativity method and put multi-way overlap pictures together one large-scale seamless picture. It owns large watch field, high distinguish rate and delicacy rate.

The invention discloses a multi-axis motion controller and a control method based on a three-core processor. The upper computer comprising an independent setting is used to receive the lower computer of the upper computer control command packet; the upper computer and the lower computer realize communication connection through the EtherCAT bus, and the lower computer is used for data processing and uploads the processing results through the EtherCAT bus to the upper computer; the lower computer includes an ARM processor, a DSP processor, an FPGA processor, and a peripheral module with a three-core processor as the control core. The peripheral module includes a power supply module, a servo motor control output module, and a servo motor status feedback module , encoder feedback module, AD/DA module, EtherCAT communication module, serial port communication module, control signal input and output module and human-computer interaction communication module. The motion controller makes full use of the superior resources of the upper and lower computers to realize high-speed and high-precision control and output, and controls the coordinated movement of each motor, so that the robot or manipulator can obtain higher positioning accuracy, thereby realizing precise motion control of the robot.

The invention provides a multi-channel ARINC429 bus interface which comprises a DSP (digital signal processor) module for receiving and transmitting the data of an ARINC429 bus interface module and a bus drive module, wherein the ARINC429 bus interface module is provided with two channel controllers, namely one transmitting channel controller for providing four channel data transmitting paths and one receiving channel controller for providing eight channel data receiving paths; when the DSP module transmits data, firstly the transmitting channel controller writes the data and command information to be transmitted, selects the transmitting channel number and sets the transmitting rate; the data is processed and packed in an FPGA (field programmable gate array); under the control of time sequence, the packed parallel data is converted into a serial digital signal and sent to the bus drive module; and through the drive circuit bus buffer, voltage comparison and waveform formation in the bus drive module, the digital signal is converted into an analog signal conforming to the ARINC429 bus level and sent to the preset transmitting channel.

The invention discloses a phased-array antenna beam control system based on a distribution-centralization type beam control mode. The system comprises a wave control computer, beam control modules, a digital phase shifter module and a BITE (Built-In Test Equipment) detection module. The phased-array antenna beam control system is used for controlling digital phase shifters of array units on the basis of wave control codes output by the beam control modules of a DSP (digital signal processor); in a distributed wave control mode, a plurality of array units are divided into a plurality of sub antenna arrays according to the number of bus interfaces, and each sub antenna array is provided with one beam control module; and in a centralized wave control mode, the wave control codes of the digital phase shifters of all the array units in the sub antenna arrays are generated by the beam control modules. According to the wave control computer, wave control codons are issued to a plurality of beam control modules through a bus, disposing-phase operation and phase compensation are carried out on the received wave control codons by the beam control modules, and then the wave control codes are obtained; phase control is carried out on the array units by the digital phase shifters according to the wave control codes; and the working state of the digital phase shifters is detected by the BITE detection module.

The invention discloses an obstacle avoidance system of a mountain farming robot on the basis of multi-sensor information fusion. The obstacle avoidance system mainly comprises a vision sensor module, an ultrasonic sensor module, an infrared sensor module, a data fusion module and a control module. DSPs (digital signal processors) of the various sensor modules process obstacle information, which is respectively acquired by the sensor modules, of peripheral environments; a DSP of the data fusion module receives obstacle information which is processed by the various sensor modules, and fuses the obstacle information according to a specific fusion rule, and fused data are transmitted to an ARM [advanced RISC (reduced instruction-set computer) machine] processor of the control module; and the ARM processor makes behavior decision and controls behavior, and obstacles around the mountain farming robot are avoided by means of controlling an actuator. The obstacle avoidance system has the advantages that the multi-sensor information is processed in parallel by the multiple DSPs, the data processing speed is increased, requirements on obstacle avoidance instantaneity and accuracy are met, and the robot can avoid the obstacles flexibly and reliably.

The invention relates to an embedded type door control work attendance checking machine with the function of face recognition, which belongs to the technical field of biological characteristic recognition. The door control work attendance checking machine adopts the technical scheme that an embedded type host DSP is used, and the machine comprises a CMOS infrared photography module used for capturing facial images, an infrared Led Module used as a constant light source, a Wiegand interface and a USB interface; besides, infrared light filters with narrow bands are arranged on the camera shot of the CMOS infrared photography module, and the band width of the infrared light filters with narrow bands only allows near infrared light emitted by the infrared Led Module to pass through and shields visible light and other kinds of infrared light in the sunlight; the DSP presents the simulated generation of door control Wiegand signals by an IO interface and is used as a standard output control means for door control. The machine adopts the infrared light filters with narrow bands and the infrared Led Module to thoroughly solve the problem of visible light influence, which troubles face recognition for a long time, and the machine has the advantages of unique convenience, untouchable performance and stability and can be widely applied to the field of door control work attendance check.

The invention discloses a voltage stabilization online monitoring phasor data measurement device and a voltage stabilization online monitoring phasor measurement method. The device comprises a synchronous clock unit, an acquisition unit, an input unit, a dual-port random access memory (RAM) transmission module, a data management unit and an output unit. A precise global positioning system (GPS) synchronous clock signal serves as a reference of a sampling process, so that phasors of each sampling channel are in a determined and uniformed phase relationship; a digital signal processor (DSP) is used for data acquisition and phasor calculation; an embedded real-time operating system and graphical user interface-based ARM9 takes charge of data management and communication, has the characteristics that the processing capacity is high, the real-time is high, the ARM9 is easy to upgrade and the like and improves the reliability, the network communication capacity and the expandability of the measurement device; tripping and closing are executed accurately and reliably according to an upper computer command; the DSP adopts an alpha-beta coordinate system-based phasor measurement algorithm,has the advantages of high computing speed, high suitability and high accuracy, and can accurately compute the information of a voltage/current signal phasor of a power grid; therefore, the problem of spectrum leakage when a signal frequency fluctuates greatly is avoided effectively, and the measurement precision of a non-power frequency input situation and a dynamic process is ensured.

The invention provides a FLASH-sharing device for multiprocessors and a firmware program loading and upgrading method. The device comprises at least one DSP (digital signal processor), at least one FPGA (field programmable gate array) processor, a FLASH memory and a FLASH management device, the FLASH management device is respectively in bidirectional control connection with the DSPs and the FPGA processors and is in control connection with the FLASH memory. Program loading channels of the FPGA processors and the DSPs are independent from each other, and whether the program loading of the FPGA processors is successfully started or not does not depend on the DSPs.