Flash-sharing device for multiprocessors and firmware program loading and upgrading method

A FLASH memory and multi-processor technology, applied in the direction of program loading/starting, program control devices, etc., can solve problems affecting FPGA program loading and other issues

Active Publication Date: 2012-10-10
SHANGHAI UNITED IMAGING HEALTHCARE
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to provide a kind of device that multiprocessor shares FLASH and firmwa

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  • Flash-sharing device for multiprocessors and firmware program loading and upgrading method
  • Flash-sharing device for multiprocessors and firmware program loading and upgrading method
  • Flash-sharing device for multiprocessors and firmware program loading and upgrading method

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Embodiment Construction

[0024] The device for sharing FLASH among multiple processors and the method for loading and upgrading firmware programs of the present invention will be further described in detail below.

[0025] Such as figure 1 Shown, a kind of device that multiprocessor shares FLASH, comprises a DSP processor 2 and an FPGA processor 3, a FLASH memory 1, and a FLASH management device 4; Described FLASH management device 4 is processed with described DSP respectively device 2, the FPGA processor 3 bidirectionally controls the connection, and the FLASH management device 4 controls the connection to the FLASH memory 1. In order to realize that DSP and FPGA share a FLASH, on the distribution of address lines, the low-end address line of described FLASH memory 1 is connected with the address line of described DSP processor 2 by FLASH management device 4, and the address line of described FLASH memory The highest two address lines are connected with the address lines of the FLASH management dev...

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Abstract

The invention provides a FLASH-sharing device for multiprocessors and a firmware program loading and upgrading method. The device comprises at least one DSP (digital signal processor), at least one FPGA (field programmable gate array) processor, a FLASH memory and a FLASH management device, the FLASH management device is respectively in bidirectional control connection with the DSPs and the FPGA processors and is in control connection with the FLASH memory. Program loading channels of the FPGA processors and the DSPs are independent from each other, and whether the program loading of the FPGA processors is successfully started or not does not depend on the DSPs.

Description

technical field [0001] The invention relates to data signal processing technology, in particular to a device for multi-processors sharing FLASH and a firmware program loading and upgrading method. Background technique [0002] In the field of data signal processing, there have been many researches on the problem of enabling multiprocessors on a single board to share non-volatile memory. Among them, Wang Hongyi and Chen Zengping of the ATR Key Laboratory of National University of Defense Technology published the document "DSP and FPGA Shared FLASH Configuration Method", which uses TI's 64 series chips and FPGA to share FLASH. Connected to the two EMIF interfaces of the DSP, after the DSP program loads the bootloader, the FPGA program code is loaded into the FPGA from the FLASH through another EMIF port; the article also mentions that the FLASH code can be upgraded online through the PCI interface, but the specific The implementation method was not disclosed. According to th...

Claims

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Application Information

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IPC IPC(8): G06F9/445
Inventor 周辉
Owner SHANGHAI UNITED IMAGING HEALTHCARE
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