On-line programming FPGA reconfigurable device

A bus and signal line technology, applied in the field of FPGA reconfigurable devices with online programming, can solve the problems of not meeting the original intention of reconfigurable design, waste of hardware resources, complicated design process, etc., to achieve flexible and convenient transmission or sharing, and hardware structure. Simple, small time slot effect

Inactive Publication Date: 2010-03-17
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The main task of this FPGA reconfigurable device design is to complete the design of the FPGA configuration controller. The selection of the controller is more flexible, but the design process is more complicated, and a large storage space is required to store

Method used

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  • On-line programming FPGA reconfigurable device
  • On-line programming FPGA reconfigurable device

Examples

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Embodiment

[0019] figure 1 It is a circuit principle block diagram of a specific embodiment of the FPGA reconfigurable device for online programming of the present invention. In this example, if figure 1 As shown, the FPGA reconfigurable device for online programming includes an FPGA 1 , a configuration chip 2 , a configuration chip controller 3 , a DSP processor 4 and a communication interface module 5 . In this embodiment, the communication between the DSP processor 4 and the upper computer 6 is through the communication interface module 5 and the reconstruction command and configuration data are transmitted to the DSP processor 4 with the cooperation of the FPGA.

[0020] In this embodiment, the configuration chip 2 is an EPCS, that is, a serial memory, whose nCS, DCLK, ASDI, and DATA signal lines are connected to the FPGA 1 for storing configuration data of the FPGA 1 . After the FPGA 1 is powered on or the FPGA configuration data in the configuration chip 2 is updated, the FPGA 1 ...

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Abstract

The invention discloses an on-line programming FPGA reconfigurable device which comprises an FPGA, a configuration chip, a configuration chip controller and a DSP processor. The DSP processor gives out a control gating command character string to the configuration chip controller after receiving a reconfigurable command; the control gating command character string after being resolved by the configuration chip controller arranges the nCONFIG signal line of the configuration chip controller into a low level and arranges the nCE signal line into a high level, thereby leading the FPGA to releasethe control right on the configuration chip; then the DSP processor stores the received configuration data into the configuration chip; after the storage of the configuration data is accomplished, thenCONFIG signal line of the configuration chip controller is arranged into the high level and the nCE signal line is arranged into the low level, thereby leading the FPGA to re-obtain the control right on the configuration chip; and after the control right is re-obtained, the FPGA downloads the data in the configuration chip for re-configuration after the rising edge of the nCONFIG signal line isdetected, thereby accomplishing the on-line programming reconfiguration of FPGA.

Description

technical field [0001] The invention relates to the technical field of FPGA control, in particular to an FPGA reconfigurable device for online programming that selects one of the operating modes by reconfiguring the FPGA control logic in a system with multiple operating modes. Background technique [0002] Reconfigurable architecture refers to the ability to use redistributed hardware resources to flexibly change its own architecture according to different application requirements, so as to provide a matching architecture for each specific application requirement. [0003] The reconfigurable system is to use the reconfigurable characteristics of FPGA to complete the change of the reconfigurable architecture, that is, the reconstruction of the working mode, so as to use the limited hardware resources to complete a variety of logic functions. This is the FPGA reconfigurable system. design principles. The so-called FPGA reconfiguration means that the configuration data of the ...

Claims

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Application Information

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IPC IPC(8): G05B19/05G05B19/418G06F13/40
CPCY02P90/02
Inventor 王志刚曹智渊王猛钱炳松
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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