Semiconductor light emitting device and method for manufacturing the same

By setting an insulating layer to block the side of the chip in the semiconductor light emitting device, the poor light shape and short life caused by side light emission are solved, and the effects of small luminous angle and high center light intensity are achieved, which are suitable for high-demand lighting applications.

CN108011005BActive Publication Date: 2024-12-06SHENZHEN DADAO SEMICON CO LTD
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Patent Information

Application Number
CN201711107833.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2017-11-10
Publication Date
2024-12-06
Estimated Expiration
2037-11-10

AI Technical Summary

Technical Problem

Existing semiconductor light emitting devices have problems such as poor light shape and short life due to side light emission, especially in harsh environments.

Method used

The structure includes a substrate, a semiconductor light emitting chip, a phosphor layer and an insulating layer. The insulating layer is located inside the phosphor layer or the substrate surface to block the side of the semiconductor light emitting chip, thereby reducing side light emitting light and enhancing the front light emitting intensity. The insulating layer material may include a combination of silicone, resin, glass glaze, etc., and is mixed with an inorganic powder to improve resistance.

Benefits of technology

It achieves a small luminous angle and high central light intensity, extends the life of semiconductor light emitting devices, and is suitable for applications where high central illuminance and small luminous angle are required.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a semiconductor light-emitting device and a manufacturing method thereof, wherein the semiconductor light-emitting device comprises a substrate, at least one positive electrode pad and at least one negative electrode pad arranged on the substrate, at least one semiconductor light-emitting chip arranged on the substrate, a phosphor layer arranged on the substrate and wrapping the semiconductor light-emitting chip, and an insulating layer arranged on the inner side of the phosphor layer; the positive electrode and the negative electrode of the semiconductor light-emitting chip are electrically connected to the positive electrode pad and the negative electrode pad respectively; the insulating layer is located between part or all of the inner surface of the phosphor layer and part or all of the substrate surface; and / or, between part or all of the inner surface of the phosphor layer and part or all of the side surface of the semiconductor light-emitting chip. The semiconductor light-emitting device of the present invention prevents the semiconductor light-emitting chip from emitting light from the side and enhances the front light emission of the semiconductor light-emitting chip by setting a structural layer to block the side surface of the semiconductor light-emitting chip, and is suitable for preparing lighting fixtures with high central light intensity requirements and small light emission angle requirements.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor light emitting devices, and in particular to a semiconductor light emitting device and a manufacturing method thereof. Background Art

[0002] With the improvement of luminous efficiency and the reduction of manufacturing costs, semiconductor light sources have been widely used in backlight, display and lighting. Semiconductor light sources include LED, COB, module, light board, light bar and other types. In the near future, semiconductor light sources may replace traditional light sources and become the main light source for general lighting.

[0003] Common semiconductor light source (semiconductor light emitting device) structure such as Figure 1 As shown, it includes a substrate 1, a phosphor layer 2 arranged on the substrate, a semiconductor light-emitting chip 3, a chip positive electrode 4a and a chip negative electrode 4b, a positive electrode pad 5a and a negative electrode pad 5b, a positive electrode pad 6a, a negative electrode pad 6b and a thermal conductive pad 7; the phosphor layer 2 covers the semiconductor light-emitting chip 3 on the substrate 1, the chip positive electrode 4a is electrically connected to the positive electrode pad 5a, the chip negative electrode 4b is electrically connected to the negative electrode pad 5b, and the positive electrode pad 6a and the negative electrode pad 6b are respectively connected to the positive electrode pad 5a and the negative electrode pad 5b.

[0004] Depend on Figure 1 As shown in the structure of the existing semiconductor light source, the semiconductor light emitting chip 3 often has a certain thickness (100-150 microns). After being wrapped with the phosphor layer 2, its light emitting surface includes not only the front side but also the side side. The side light emission can account for 10-30% of the total light emission, and the light emission angle is greater than 150 degrees. For applications requiring central illumination and a small light emission angle, the side light emission not only affects the front light emission, but also becomes stray light, affecting the light shape of the illuminated surface or causing serious glare.

[0005] In semiconductor light sources, silica gel is generally used as the base material of the phosphor layer. Since silica gel has a certain air permeability, water vapor, sulfide, halide, etc. in the environment will enter the surface of the semiconductor light-emitting chip, the surface of the substrate, and the welding point between the semiconductor light-emitting chip and the substrate through the silica gel-based phosphor layer, which will cause surface sulfidation and halogenation, resulting in serious light decay and even failure.

[0006] Therefore, due to the inherent defects and shortcomings of the above-mentioned semiconductor light source structure, it is impossible to solve the problems of front light intensity and small light-emitting angle of the semiconductor light-emitting device. The prepared semiconductor light-emitting device, especially when used in harsh environments, has problems such as short life, rapid attenuation, and poor reliability. Summary of the invention

[0007] The technical problem to be solved by the present invention is to provide a semiconductor light-emitting device and a manufacturing method thereof which can realize a small light-emitting angle and enhance the central light intensity.

[0008] The technical solution adopted by the present invention to solve the technical problem is: provide a semiconductor light-emitting device, including a substrate, at least one positive electrode pad and at least one negative electrode pad arranged on the substrate, at least one semiconductor light-emitting chip arranged on the substrate, a phosphor layer arranged on the substrate and wrapping the semiconductor light-emitting chip, and an insulating layer arranged inside the phosphor layer; the positive electrode and the negative electrode of the semiconductor light-emitting chip are electrically connected to the positive electrode pad and the negative electrode pad respectively;

[0009] The insulating layer is located between part or all of the inner surface of the phosphor layer and part or all of the surface of the substrate; and / or, the insulating layer is located between part or all of the inner surface of the phosphor layer and part or all of the side surface of the semiconductor light-emitting chip.

[0010] Preferably, the height of the insulating layer gradually decreases from one end adjacent to the side surface of the semiconductor light-emitting chip to the other end away from the side surface of the semiconductor light-emitting chip.

[0011] Preferably, the material of the insulating layer includes one or more combinations of silica gel, resin, glass glaze, liquid glass, ink and coating.

[0012] Preferably, the material of the insulating layer is further doped with inorganic powder; the inorganic powder includes one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.

[0013] Preferably, the material of the phosphor layer includes one or more combinations of silica gel, resin, glass glaze, ink and coating, and is doped with one or more phosphors.

[0014] Preferably, the semiconductor light emitting device further comprises at least one light shielding layer arranged on the phosphor layer; the light shielding layer is provided with at least one opening to expose a portion of the phosphor layer.

[0015] Preferably, the material of the shading layer includes one or more combinations of aluminum and its alloys, gold and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, glass glaze, ink, liquid glass, coating, titanium oxide, zinc oxide, silicon oxide, aluminum nitride, silicon nitride and aluminum oxide.

[0016] Preferably, the material of the shading layer includes one or more combinations of silica gel, resin, liquid glass, glass glaze, ink and paint, and is doped with inorganic powder; the inorganic powder includes one or more combinations of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.

[0017] The present invention also provides a method for manufacturing a semiconductor light emitting device, comprising the following steps:

[0018] S1. preparing a positive electrode pad and a negative electrode pad on a substrate;

[0019] S2, fixing a semiconductor light-emitting chip on the surface of the substrate, and electrically connecting the positive electrode and the negative electrode of the semiconductor light-emitting chip to the positive electrode pad and the negative electrode pad respectively;

[0020] S3, disposing an insulating liquid on part or all of the surface of the substrate and / or part or all of the side surfaces of the semiconductor light-emitting chip to form an insulating layer;

[0021] S4, placing a fluorescent liquid on part or all of the exposed surface and exposed side of the semiconductor light-emitting chip, and part or all of the surface of the insulating layer, to form a fluorescent powder layer that wraps the semiconductor light-emitting chip;

[0022] The insulating layer is located between part or all of the surface of the substrate and part or all of the inner surface of the phosphor layer; and / or, between part or all of the side surface of the semiconductor light-emitting chip and part or all of the inner surface of the phosphor layer.

[0023] Preferably, in step S3, the insulating layer is formed by the insulating liquid through one or more methods of spraying, dispensing, spin coating, and printing; the insulating liquid is an insulating glue liquid or an insulating slurry;

[0024] In step S4, the phosphor layer is formed by spraying, molding, film pressing, dispensing, evaporation, and printing the fluorescent liquid; the fluorescent liquid is fluorescent glue or fluorescent slurry.

[0025] Preferably, the manufacturing method further comprises the following steps:

[0026] S5, reserving an opening position on the phosphor layer, and providing a light shielding layer on the surface of the phosphor layer outside the opening position, wherein the opening position forms an opening of the light shielding layer, exposing a portion of the phosphor layer.

[0027] Beneficial effects of the invention: The semiconductor light-emitting device of the invention has a simple structure. By setting a structural layer to block the side of the semiconductor light-emitting chip, light is prevented from emitting from the side of the semiconductor light-emitting chip, yellow circles are avoided, and the front light of the semiconductor light-emitting chip is enhanced. It has the advantages of small light-emitting angle, concentrated light-emitting surface, and strong anti-attenuation ability. It is suitable for preparing lighting bulbs or lighting fixtures with high central light intensity requirements and small light-emitting angle requirements.

[0028] The method for manufacturing the semiconductor light emitting device of the present invention has a short process, a simple technique and a low manufacturing cost, and is suitable for large-scale industrial production in large areas. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0030] Figure 1 It is a schematic diagram of the structure of a semiconductor light source in the prior art;

[0031] Figure 2 is a schematic structural diagram of a semiconductor light emitting device according to a first embodiment of the present invention;

[0032] Figure 3 is a schematic structural diagram of a semiconductor light emitting device according to a second embodiment of the present invention;

[0033] Figure 4 is a schematic structural diagram of a semiconductor light emitting device according to a third embodiment of the present invention;

[0034] Figure 5 4 is a schematic structural diagram of a semiconductor light emitting device according to a fourth embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described in detail with reference to the accompanying drawings.

[0036] like Figure 2 As shown, the semiconductor light-emitting device of the first embodiment of the present invention comprises a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 arranged on the substrate 10, at least one semiconductor light-emitting chip 30 arranged on the substrate 10, a phosphor layer 40 arranged on the substrate 10 and wrapping the semiconductor light-emitting chip 30, and an insulating layer 50 arranged on the inner side of the phosphor layer 40 (the side facing the substrate 10 and the semiconductor light-emitting chip 30); the positive electrode 31 and the negative electrode 32 of the semiconductor light-emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22 respectively. The insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the surface of the substrate 10; and / or, the insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the side surface of the semiconductor light-emitting chip 30.

[0037] The substrate 10 has a first surface and a second surface opposite to each other, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 can be selectively arranged on the first surface and / or the second surface; the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, a semiconductor light emitting chip 30 is arranged on the substrate 10; the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are arranged on the first surface of the substrate 10.

[0038] The phosphor layer 40 wraps the surface and side of the semiconductor light emitting chip 30 away from the substrate 10. The structure of the phosphor layer 40 is not limited, and can be a single layer or multiple layers. The material of the phosphor layer 40 includes but is not limited to one or more combinations of silica gel, resin, glass glaze, ink and coating, and is doped with one or more phosphors.

[0039] The insulating layer 50 is disposed inside the phosphor layer 40 so that it covers the bottom of the phosphor layer 40, mainly to block the side of the semiconductor light-emitting chip 30, prevent the semiconductor light-emitting chip 30 from emitting light from the side, and enhance the light intensity of the surface. In a selective embodiment, the insulating layer 50 is disposed between the surface of the substrate 10 (the surface of the substrate 10 where the semiconductor light-emitting chip 30 is located) and the phosphor layer 40, so that the insulating layer 50 is located on the side of the semiconductor light-emitting chip 30 below the phosphor layer 40, and the side is blocked. In another selective embodiment, the insulating layer 50 is disposed between the side of the semiconductor light-emitting chip 30 and the phosphor layer 40, so that the insulating layer 50 blocks the side of the semiconductor light-emitting chip 30.

[0040] The semiconductor light-emitting chip 30 is provided with an insulating layer 50 on its side so that the side does not serve as a light-emitting surface, but a surface away from the substrate 10 forms a light-emitting surface with a small light-emitting angle, thereby increasing the amount of light emitted from the front of the semiconductor light-emitting chip 30 and being suitable for applications requiring central illumination and a small light-emitting angle.

[0041] In this embodiment, Figure 2 As shown, the insulating layer 50 is disposed on the side of the semiconductor light emitting chip 30 and extends to the surface of the substrate 10, and the height of the insulating layer 50 gradually decreases from one end adjacent to the side of the semiconductor light emitting chip 30 to the other end away from the side of the semiconductor light emitting chip 30. The highest height of the insulating layer 50 is not higher than the surface height of the semiconductor light emitting chip 30 (that is, it is not higher than the side height of the semiconductor light emitting chip 30).

[0042] The phosphor layer 40 covers the surface and side of the semiconductor light-emitting chip 30, and wraps the insulating layer 50 therein, so that the insulating layer 50 is located between the side of the semiconductor light-emitting chip 30, the surface (first surface) of the substrate 10, and the phosphor layer 40. The portion of the phosphor layer 40 covering the insulating layer 50 extends along the surface of the insulating layer 50, so that the phosphor layer 40 can be bent from the surface of the semiconductor light-emitting chip 30 to the insulating layer 50 on the side. The bending of the phosphor layer 40 blocks its side light-guiding effect and enhances the central light intensity.

[0043] The material of the insulating layer 50 includes, but is not limited to, one or more combinations of silica gel, resin, glass glaze, liquid glass, ink, and coating. As required, the insulating layer 50 may be further doped with inorganic powder; the inorganic powder includes one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder, and nitride powder, and the particle size of the above powder may be one or more of micron, submicron, and nanometer particle size. The insulating layer 50 may be added with corresponding powder according to the required anti-sulfurization, anti-halogenation, anti-oxidation, and anti-moisture requirements.

[0044] Furthermore, the semiconductor light emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 disposed on the substrate 10; the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22.

[0045] Specifically, in this embodiment, the positive electrode pad 23 and the negative electrode pad 24 are arranged on the second surface of the substrate 10; the positive electrode pad 23 is electrically connected to the positive electrode pad 21 through the first conductive column 231, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22 through the second conductive column 241. The first conductive column 231 can penetrate the substrate 10 to connect the positive electrode pad 21 and the positive electrode pad 23, or be arranged on the side of the substrate 10 to connect the positive electrode pad 21 and the positive electrode pad 23. The second conductive column 241 can penetrate the substrate 10 to connect the negative electrode pad 22 and the negative electrode pad 24, or be arranged on the side of the substrate 10 to connect the negative electrode pad 22 and the negative electrode pad 24.

[0046] A thermal conductive pad 25 may be further provided on the substrate 10 and may be connected to a heat dissipation device.

[0047] refer to Figure 2 The method for manufacturing a semiconductor light emitting device according to the first embodiment of the present invention comprises at least the following steps:

[0048] S1. Prepare a positive electrode pad 21 and a negative electrode pad 22 on a substrate 10, and also prepare a positive electrode pad 23 and a negative electrode pad 24.

[0049] The substrate 10 has a first surface and a second surface opposite to each other. The positive electrode pad 21 is located on the first surface and / or the second surface of the substrate 10 , and the negative electrode pad 22 is located on the first surface and / or the second surface of the substrate 10 .

[0050] The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. The positive electrode pad 23 and the positive electrode pad 21 can be located on the same or different surfaces of the substrate 10, and the two can be electrically connected through the first conductive column 231; the negative electrode pad 24 and the negative electrode pad 22 can be located on the same or different surfaces of the substrate 10, and the two can be electrically connected through the second conductive column 241.

[0051] S2. Fix the semiconductor light emitting chip 30 on the surface of the substrate 10, and electrically connect the positive electrode 31 of the semiconductor light emitting chip 30 to the positive electrode pad 21, and electrically connect the negative electrode 32 of the semiconductor light emitting chip 30 to the negative electrode pad 22.

[0052] In this embodiment, the semiconductor light emitting chip 30 is fixed on the first surface of the substrate 10 .

[0053] The connection method between the positive electrode 31 and the positive electrode pad 21 of the semiconductor light-emitting chip 30, and the connection method between the negative electrode 32 and the negative electrode pad 22 include but are not limited to one or more combinations of eutectic welding, bonding, reflow welding, ultrasonic welding, and metal wire interconnection.

[0054] S3 . Dispose an insulating liquid on part or all of the surface of the substrate 10 and / or part or all of the side surfaces of the semiconductor light emitting chip 30 to form an insulating layer 50 .

[0055] When preparing the insulating liquid, the materials used are one or more combinations of silica gel, resin, glass glaze, liquid glass, ink and coating, and are made into insulating glue or insulating slurry with or without inorganic powder as needed; the inorganic powder includes one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.

[0056] The insulating layer 50 may be formed by one or more methods including, but not limited to, spraying, dispensing, spin coating, and printing.

[0057] S4, placing the fluorescent liquid on the exposed surface and part or all of the exposed side of the semiconductor light-emitting chip 30, and part or all of the surface of the insulating layer 50, to form a fluorescent powder layer 40 that wraps the semiconductor light-emitting chip 30. The insulating layer 50 is located between part or all of the inner surface of the fluorescent powder layer 40 and part or all of the surface of the substrate 10; and / or, the insulating layer 50 is located between part or all of the inner surface of the fluorescent powder layer 40 and part or all of the side of the semiconductor light-emitting chip 30.

[0058] When preparing the fluorescent liquid, the material is one or more combinations of silica gel, resin, glass glaze, ink and coating to make a fluorescent glue or fluorescent slurry mixed with one or more fluorescent powders. The formation method of the fluorescent powder layer 40 includes but is not limited to one or more of spraying, molding, film pressing, dispensing, evaporation and printing.

[0059] During step S4, the substrate 10 may be heated as required to facilitate the wrapping of the phosphor layer 40. Of course, the substrate 10 may not be heated.

[0060] Combination Figure 2 In the manufacturing method of this embodiment, the insulating layer 50 is disposed on the side of the semiconductor light emitting chip 30 and extends to the first surface of the substrate 10; the height of the insulating layer 50 gradually decreases from one end adjacent to the side of the semiconductor light emitting chip 30 to the other end away from the side of the semiconductor light emitting chip 30. The phosphor layer 40 is disposed on the insulating layer 50 and the semiconductor light emitting chip 30, and the semiconductor light emitting chip 30 and the insulating layer 50 are wrapped therein.

[0061] like Figure 3 As shown, the semiconductor light-emitting device of the second embodiment of the present invention includes a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 arranged on the substrate 10, at least one semiconductor light-emitting chip 30 arranged on the substrate 10, a phosphor layer 40 arranged on the substrate 10 and wrapping the semiconductor light-emitting chip 30, an insulating layer 50 arranged on the inner side of the phosphor layer 40 (towards the side of the substrate 10 and the semiconductor light-emitting chip 30), and at least one shading layer 60 arranged on the phosphor layer 40.

[0062] The positive electrode 31 and the negative electrode 32 of the semiconductor light emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22, respectively. The insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the surface of the substrate 10; and / or, the insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the side surface of the semiconductor light emitting chip 30. At least one opening is provided on the light shielding layer 60 to expose part of the phosphor layer 40.

[0063] The substrate 10 has a first surface and a second surface opposite to each other, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 can be selectively arranged on the first surface and / or the second surface; the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, a semiconductor light emitting chip 30 is arranged on the substrate 10; the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are arranged on the first surface of the substrate 10.

[0064] The phosphor layer 40 wraps the surface and side of the semiconductor light emitting chip 30 away from the substrate 10. The structure of the phosphor layer 40 is not limited, and can be a single layer or multiple layers. The material of the phosphor layer 40 includes but is not limited to one or more combinations of silica gel, resin, glass glaze, ink and coating, and is doped with one or more phosphors.

[0065] The insulating layer 50 is disposed inside the phosphor layer 40 so that it covers the bottom of the phosphor layer 40, mainly to block the side of the semiconductor light-emitting chip 30, prevent the semiconductor light-emitting chip 30 from emitting light from the side, and enhance the light intensity of the surface. In a selective embodiment, the insulating layer 50 is disposed between the surface of the substrate 10 (the surface of the substrate 10 where the semiconductor light-emitting chip 30 is located) and the phosphor layer 40, so that the insulating layer 50 is located on the side of the semiconductor light-emitting chip 30 below the phosphor layer 40, and the side is blocked. In another selective embodiment, the insulating layer 50 is disposed between the side of the semiconductor light-emitting chip 30 and the phosphor layer 40, so that the insulating layer 50 blocks the side of the semiconductor light-emitting chip 30.

[0066] The semiconductor light-emitting chip 30 is provided with an insulating layer 50 on its side so that the side does not serve as a light-emitting surface, but a surface away from the substrate 10 forms a light-emitting surface with a small light-emitting angle, thereby increasing the amount of light emitted from the front of the semiconductor light-emitting chip 30 and being suitable for applications requiring central illumination and a small light-emitting angle.

[0067] In this embodiment, Figure 3 As shown, the insulating layer 50 is disposed on the side of the semiconductor light emitting chip 30 and extends to the surface of the substrate 10. The height of the insulating layer 50 can gradually decrease from one end adjacent to the side of the semiconductor light emitting chip 30 to the other end away from the side of the semiconductor light emitting chip 30, and the insulating layer 50 can also be a structural layer of equal height; the overall height is not higher than the surface height of the semiconductor light emitting chip 30.

[0068] The phosphor layer 40 covers the surface and side of the semiconductor light-emitting chip 30, and wraps the insulating layer 50 therein, so that the insulating layer 50 is located between the side of the semiconductor light-emitting chip 30, the surface (first surface) of the substrate 10, and the phosphor layer 40. The portion of the phosphor layer 40 covering the insulating layer 50 extends along the surface of the insulating layer 50, so that the phosphor layer 40 can be bent from the surface of the semiconductor light-emitting chip 30 to the insulating layer 50 on the side. The bending of the phosphor layer 40 blocks its side light-guiding effect and enhances the central light intensity.

[0069] The material of the insulating layer 50 includes, but is not limited to, one or more combinations of silica gel, resin, glass glaze, liquid glass, ink, and coating. As required, the insulating layer 50 may be further doped with inorganic powder; the inorganic powder includes one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder, and nitride powder, and the particle size of the above powder may be one or more of micron, submicron, and nanometer particle size. The insulating layer 50 may be added with corresponding powder according to the required anti-sulfurization, anti-halogenation, anti-oxidation, and anti-moisture requirements.

[0070] The light shielding layer 60 is disposed on the phosphor layer 40 to further shield the side of the semiconductor light emitting chip 30. The opening of the light shielding layer 60 is located on the surface of the semiconductor light emitting chip 30 and does not affect the light emission from the surface of the semiconductor light emitting chip 30. The size of the opening can be set according to the area of ​​the semiconductor light emitting chip 30 where light is required to be emitted.

[0071] The material of the light shielding layer 60 includes, but is not limited to, one or more combinations of aluminum and its alloys, gold and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, glass glaze, ink, liquid glass, paint, titanium oxide, zinc oxide, silicon oxide, aluminum nitride, silicon nitride, and aluminum oxide. Alternatively, the material of the light shielding layer 60 includes, but is not limited to, one or more combinations of silica gel, resin, liquid glass, glass glaze, ink, and paint, and is doped with inorganic powder; the inorganic powder includes one or more combinations of glass powder, ceramic powder, metal powder, alloy powder, oxide powder, and nitride powder with micron, submicron, and nanometer particle sizes.

[0072] The light shielding layer 60 has the function of preventing side light and also has the function of insulation. Corresponding powder can be added according to the required anti-sulfurization, anti-halogenation, anti-oxidation and anti-moisture requirements.

[0073] Furthermore, the semiconductor light emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 disposed on the substrate 10; the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22.

[0074] Specifically, in this embodiment, the positive electrode pad 23 and the negative electrode pad 24 are arranged on the second surface of the substrate 10; the positive electrode pad 23 is electrically connected to the positive electrode pad 21 through the first conductive column 231, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22 through the second conductive column 241. The first conductive column 231 can penetrate the substrate 10 to connect the positive electrode pad 21 and the positive electrode pad 23, or be arranged on the side of the substrate 10 to connect the positive electrode pad 21 and the positive electrode pad 23. The second conductive column 241 can penetrate the substrate 10 to connect the negative electrode pad 22 and the negative electrode pad 24, or be arranged on the side of the substrate 10 to connect the negative electrode pad 22 and the negative electrode pad 24.

[0075] A thermal conductive pad 25 may be further provided on the substrate 10 and may be connected to a heat dissipation device.

[0076] refer to Figure 3 The method for manufacturing a semiconductor light emitting device according to the second embodiment of the present invention comprises at least the following steps:

[0077] S1. Prepare a positive electrode pad 21 and a negative electrode pad 22 on a substrate 10, and also prepare a positive electrode pad 23 and a negative electrode pad 24.

[0078] The substrate 10 has a first surface and a second surface opposite to each other. The positive electrode pad 21 is located on the first surface and / or the second surface of the substrate 10 , and the negative electrode pad 22 is located on the first surface and / or the second surface of the substrate 10 .

[0079] The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. The positive electrode pad 23 and the positive electrode pad 21 can be located on the same or different surfaces of the substrate 10, and the two can be electrically connected through the first conductive column 231; the negative electrode pad 24 and the negative electrode pad 22 can be located on the same or different surfaces of the substrate 10, and the two can be electrically connected through the second conductive column 241.

[0080] S2. Fix the semiconductor light emitting chip 30 on the surface of the substrate 10, and electrically connect the positive electrode 31 of the semiconductor light emitting chip 30 to the positive electrode pad 21, and electrically connect the negative electrode 32 of the semiconductor light emitting chip 30 to the negative electrode pad 22.

[0081] In this embodiment, the semiconductor light emitting chip 30 is fixed on the first surface of the substrate 10 .

[0082] The connection method between the positive electrode 31 and the positive electrode pad 21 of the semiconductor light-emitting chip 30, and the connection method between the negative electrode 32 and the negative electrode pad 22 include but are not limited to one or more combinations of eutectic welding, bonding, reflow welding, ultrasonic welding, and metal wire interconnection.

[0083] S3 . Dispose an insulating liquid on part or all of the surface of the substrate 10 and / or part or all of the side surfaces of the semiconductor light emitting chip 30 to form an insulating layer 50 .

[0084] When preparing the insulating liquid, the materials used are one or more combinations of silica gel, resin, glass glaze, liquid glass, ink and coating, and are made into insulating glue or insulating slurry with or without inorganic powder as needed; the inorganic powder includes one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.

[0085] The insulating layer 50 may be formed by one or more methods including, but not limited to, spraying, dispensing, spin coating, and printing.

[0086] S4, placing the fluorescent liquid on the exposed surface and part or all of the exposed side of the semiconductor light-emitting chip 30, and part or all of the surface of the insulating layer 50, to form a fluorescent powder layer 40 that wraps the semiconductor light-emitting chip 30. The insulating layer 50 is located between part or all of the inner surface of the fluorescent powder layer 40 and part or all of the surface of the substrate 10; and / or, the insulating layer 50 is located between part or all of the inner surface of the fluorescent powder layer 40 and part or all of the side of the semiconductor light-emitting chip 30.

[0087] When preparing the fluorescent liquid, the material is one or more combinations of silica gel, resin, glass glaze, ink and coating to make a fluorescent glue or fluorescent slurry mixed with one or more fluorescent powders. The formation method of the fluorescent powder layer 40 includes but is not limited to one or more of spraying, molding, film pressing, dispensing, evaporation and printing.

[0088] During step S4, the substrate 10 may be heated as required to facilitate the wrapping of the phosphor layer 40. Of course, the substrate 10 may not be heated.

[0089] In the manufacturing method of this embodiment, the insulating layer 50 is arranged on the side of the semiconductor light-emitting chip 30 and extends to the first surface of the substrate 10; the height of the insulating layer 50 can gradually decrease from one end adjacent to the side of the semiconductor light-emitting chip 30 to the other end away from the side of the semiconductor light-emitting chip 30, and the insulating layer 50 can also be a structural layer of the same height; the overall height is not higher than the surface height of the semiconductor light-emitting chip 30.

[0090] The phosphor layer 40 is disposed on the insulating layer 50 and the semiconductor light emitting chip 30 , and wraps the semiconductor light emitting chip 30 and the insulating layer 50 therein.

[0091] S5 . Reserve an opening position on the phosphor layer 40 , and arrange a light shielding layer 60 on the surface of the phosphor layer 40 outside the opening position. The opening position forms an opening 61 of the light shielding layer 60 , exposing a portion of the phosphor layer 40 .

[0092] The light shielding layer 60 is formed by one or more methods including evaporation, spraying, spin coating, printing, and dispensing. The opening position corresponds to the surface of the semiconductor light emitting chip 30, so that the opening 61 is located on the surface of the semiconductor light emitting chip 30, so that the surface forms a light emitting surface; the light shielding layer 60 shields the side of the semiconductor light emitting chip 30 to prevent the side from emitting light.

[0093] like Figure 4As shown, the semiconductor light-emitting device of the third embodiment of the present invention comprises a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 arranged on the substrate 10, at least one semiconductor light-emitting chip 30 arranged on the substrate 10, a phosphor layer 40 arranged on the substrate 10 and wrapping the semiconductor light-emitting chip 30, and an insulating layer 50 arranged on the inner side of the phosphor layer 40 (the side facing the substrate 10 and the semiconductor light-emitting chip 30); the positive electrode 31 and the negative electrode 32 of the semiconductor light-emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22 respectively. The insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the surface of the substrate 10; and / or, the insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the side surface of the semiconductor light-emitting chip 30.

[0094] The substrate 10 has a first surface and a second surface opposite to each other, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 can be selectively arranged on the first surface and / or the second surface; the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, two (or more) semiconductor light emitting chips 30 are arranged on the substrate 10; the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are arranged on the first surface of the substrate 10.

[0095] The semiconductor light-emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 disposed on the substrate 10; the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. In this embodiment, the positive electrode pad 23 and the negative electrode pad 24 are respectively located on opposite sides of the two semiconductor light-emitting chips 30, and are respectively disposed on the positive electrode pad 21 and the negative electrode pad 22 to achieve electrical connection.

[0096] A conductive circuit 26 is provided between two opposing sides of the two semiconductor light emitting chips 30 . The conductive circuit 26 is disposed on the substrate 10 and is electrically connected to the positive electrode 31 and the negative electrode 32 corresponding to the two semiconductor light emitting chips 30 .

[0097] The phosphor layer 40 wraps the surface and side of the semiconductor light emitting chip 30 away from the substrate 10. The insulating layer 50 is arranged inside the phosphor layer 40 so as to cover the bottom of the phosphor layer 40, mainly to shield the side of the semiconductor light emitting chip 30 and prevent the semiconductor light emitting chip 30 from emitting light from the side, so as to enhance the light intensity of the surface.

[0098] Furthermore, in this embodiment, the phosphor layers 40 on each semiconductor light emitting chip 30 may be independent and unconnected, or the phosphor layers 40 on two adjacent semiconductor light emitting chips 30 may be connected as one. The insulating layers 50 of two adjacent semiconductor light emitting chips 30 may also be connected as one.

[0099] The configuration and material selection of the insulating layer 50 and the phosphor layer 40 can refer to the related description in the first embodiment, and will not be described in detail here.

[0100] like Figure 5 As shown, the semiconductor light-emitting device of the fourth embodiment of the present invention includes a substrate 10, at least one positive electrode pad 21 and at least one negative electrode pad 22 arranged on the substrate 10, at least one semiconductor light-emitting chip 30 arranged on the substrate 10, a phosphor layer 40 arranged on the substrate 10 and wrapping the semiconductor light-emitting chip 30, an insulating layer 50 arranged on the inner side of the phosphor layer 40 (towards the side of the substrate 10 and the semiconductor light-emitting chip 30), and at least one shading layer 60 arranged on the phosphor layer 40.

[0101] The positive electrode 31 and the negative electrode 32 of the semiconductor light emitting chip 30 are electrically connected to the positive electrode pad 21 and the negative electrode pad 22, respectively. The insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the surface of the substrate 10; and / or, the insulating layer 50 is located between part or all of the inner surface of the phosphor layer 40 and part or all of the side surface of the semiconductor light emitting chip 30. At least one opening is provided on the light shielding layer 60 to expose part of the phosphor layer 40.

[0102] The substrate 10 has a first surface and a second surface opposite to each other, and the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 can be selectively arranged on the first surface and / or the second surface; the positive electrode pad 21 and the negative electrode pad 22 are insulated from each other. In this embodiment, two (or more) semiconductor light emitting chips 30 are arranged on the substrate 10; the positive electrode pad 21, the negative electrode pad 22, and the semiconductor light emitting chip 30 are arranged on the first surface of the substrate 10.

[0103] The semiconductor light-emitting device further includes a positive electrode pad 23 and a negative electrode pad 24 disposed on the substrate 10; the positive electrode pad 23 and the negative electrode pad 24 are insulated from each other. The positive electrode pad 23 is electrically connected to the positive electrode pad 21, and the negative electrode pad 24 is electrically connected to the negative electrode pad 22. In this embodiment, the positive electrode pad 23 and the negative electrode pad 24 are respectively located on opposite sides of the two semiconductor light-emitting chips 30, and are respectively disposed on the positive electrode pad 21 and the negative electrode pad 22 to achieve electrical connection.

[0104] A conductive circuit 26 is provided between two opposing sides of the two semiconductor light emitting chips 30 . The conductive circuit 26 is disposed on the substrate 10 and is electrically connected to the positive electrode 31 and the negative electrode 32 corresponding to the two semiconductor light emitting chips 30 .

[0105] The phosphor layer 40 wraps the surface and side of the semiconductor light emitting chip 30 away from the substrate 10. The insulating layer 50 is arranged inside the phosphor layer 40 so as to cover the bottom of the phosphor layer 40, mainly to shield the side of the semiconductor light emitting chip 30 and prevent the semiconductor light emitting chip 30 from emitting light from the side, so as to enhance the light intensity of the surface.

[0106] The light shielding layer 60 is disposed on the phosphor layer 40 to further shield the side of the semiconductor light emitting chip 30. The opening of the light shielding layer 60 is located on the surface of the semiconductor light emitting chip 30 and does not affect the light emission from the surface of the semiconductor light emitting chip 30. The size of the opening can be set according to the area of ​​the semiconductor light emitting chip 30 where light is required to be emitted.

[0107] Furthermore, in this embodiment, the phosphor layers 40 on each semiconductor light emitting chip 30 may be independent and unconnected; or, the phosphor layers 40 on two adjacent semiconductor light emitting chips 30 may be connected as a whole. The insulating layer 50 and the light shielding layer 60 of two adjacent semiconductor light emitting chips 30 may also be connected as a whole.

[0108] The configuration and material selection of the insulating layer 50 , the phosphor layer 40 and the light shielding layer 60 may all refer to the relevant descriptions in the above-mentioned second embodiment, and will not be described in detail here.

[0109] In addition, the manufacturing methods of the semiconductor light emitting devices of the third embodiment and the fourth embodiment can also refer to the manufacturing methods of the first embodiment and the second embodiment, and will not be described in detail here.

[0110] In summary, the manufacturing method of the semiconductor light-emitting device of the present invention has a short process, a simple process, and a low manufacturing cost, and is suitable for large-scale industrial production.

[0111] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A semiconductor light emitting device, characterized in that: The invention comprises a substrate, at least one positive electrode pad and at least one negative electrode pad arranged on the substrate, at least one semiconductor light-emitting chip arranged on the substrate, a phosphor layer arranged on the substrate and wrapping the semiconductor light-emitting chip, an insulating layer arranged inside the phosphor layer, and at least one light-shielding layer arranged on the phosphor layer; the positive electrode and the negative electrode of the semiconductor light-emitting chip are electrically connected to the positive electrode pad and the negative electrode pad respectively; The insulating layer is located between part or all of the inner surface of the phosphor layer and part or all of the surface of the substrate; and / or, the insulating layer is located between part or all of the inner surface of the phosphor layer and part or all of the side surface of the semiconductor light-emitting chip; The phosphor layer wraps the surface and side of the semiconductor light-emitting chip away from the substrate, and the insulating layer shields the side of the semiconductor light-emitting chip inside the phosphor layer to prevent the semiconductor light-emitting chip from emitting light from the side; the height of the insulating layer gradually decreases from one end adjacent to the side of the semiconductor light-emitting chip to the other end away from the side of the semiconductor light-emitting chip; The portion of the phosphor layer covering the insulating layer extends along the surface of the insulating layer, so that the phosphor layer is bent from the surface of the semiconductor light-emitting chip to extend onto the insulating layer; the bending of the phosphor layer blocks its side light-guiding effect, thereby enhancing the central light intensity; The material of the insulating layer includes one or more combinations of ink and paint; the material of the phosphor layer includes one or more combinations of silica gel, resin, glass glaze, ink and paint, and is doped with one or more phosphors; at least one opening is provided on the shading layer, and the opening is located on the surface of the semiconductor light-emitting chip, exposing part of the phosphor layer.

2. The semiconductor light emitting device according to claim 1, characterized in that: The material of the insulating layer is also doped with inorganic powder; the inorganic powder includes one or more of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.

3. The semiconductor light emitting device according to any one of claims 1 to 2, characterized in that: The material of the shading layer includes one or more combinations of aluminum and its alloys, gold and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, glass glaze, ink, liquid glass, coating, titanium oxide, zinc oxide, silicon oxide, aluminum nitride, silicon nitride and aluminum oxide.

4. The semiconductor light emitting device according to claim 3, characterized in that: The material of the shading layer includes one or more combinations of silica gel, resin, liquid glass, glass glaze, ink and paint, and is mixed with inorganic powder; the inorganic powder includes one or more combinations of glass powder, ceramic powder, metal powder, alloy powder, oxide powder and nitride powder with micron, submicron and nanometer particle sizes.

5. A method for manufacturing a semiconductor light emitting device according to any one of claims 1 to 4, characterized in that: The following steps are involved: S1. preparing a positive electrode pad and a negative electrode pad on a substrate; S2, fixing a semiconductor light-emitting chip on the surface of the substrate, and electrically connecting the positive electrode and the negative electrode of the semiconductor light-emitting chip to the positive electrode pad and the negative electrode pad respectively; S3, disposing an insulating liquid on part or all of the surface of the substrate and / or part or all of the side surfaces of the semiconductor light-emitting chip to form an insulating layer; S4, placing a fluorescent liquid on part or all of the exposed surface and exposed side of the semiconductor light-emitting chip, and part or all of the surface of the insulating layer, to form a fluorescent powder layer that wraps the semiconductor light-emitting chip; The insulating layer is located between part or all of the surface of the substrate and part or all of the inner surface of the phosphor layer; and / or, between part or all of the side surface of the semiconductor light-emitting chip and part or all of the inner surface of the phosphor layer.

6. The manufacturing method according to claim 5, characterized in that: In step S3, the insulating layer is formed by the insulating liquid through one or more methods of spraying, dispensing, spin coating, and printing; the insulating liquid is an insulating glue liquid or an insulating slurry; In step S4, the phosphor layer is formed by spraying, molding, film pressing, dispensing, evaporation, and printing the fluorescent liquid; the fluorescent liquid is fluorescent glue or fluorescent slurry.

7. The manufacturing method according to claim 5, characterized in that: The manufacturing method further comprises the following steps: S5, reserving an opening position on the phosphor layer, and providing a light shielding layer on the surface of the phosphor layer outside the opening position, wherein the opening position forms an opening of the light shielding layer, exposing a portion of the phosphor layer.

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