Method for dynamically adjusting switching speed of switching device and switching device circuit

Abstract

The embodiment of the present application discloses a method for dynamically adjusting the switching speed of a switching device and a switching device circuit. The method includes: calculating the real-time turn-off delay time between the falling edge of the driving signal of the switching device and the turn-off of the switching device; comparing the real-time turn-off delay time with the reference turn-off delay time to obtain a first comparison result; based on the first comparison result, adjusting the gate drive voltage of the switching device, adjusting the gate drive current of the switching device, and adjusting the gate discharge current of the switching device, so that the real-time turn-off delay time is within the range of the reference turn-off delay time. The circuit includes a switching device, a gate drive voltage adjustment circuit, a gate drive current adjustment circuit, and a gate discharge current adjustment circuit. The embodiment of the present application can quickly reduce the time required for the recombination of excess carriers in the n-region of the switching device.

Description

Technical Field

[0001] The present application relates to the technical field of switching devices, and in particular to a method for dynamically adjusting the switching speed of a switching device and a switching device circuit. Background Art

[0002] The insulated gate bipolar transistor (IGBT) is a composite device of a bipolar junction transistor (BJT) and a field effect transistor (MOSFET), and has the advantages of both power transistors and field effect transistors. IGBT introduces the conductivity modulation effect of BJT into the high-resistance drift region of VDMOS (vertical double-diffused metal oxide semiconductor field effect transistor), greatly improving the conduction characteristics of the device. It also has the characteristics of high gate input impedance and fast switching speed of MOSFET, and is widely used in electronic technology, electrical transmission, switching power supplies and other occasions. However, due to the drift of electronic devices, IGBT leads to long current tailing and long dead time during use.

[0003] The disclosure of the above background technology content is only used to assist in understanding the inventive concept and technical solution of the present application. It does not necessarily belong to the prior art of the present application. In the absence of clear evidence that the above content has been disclosed on the filing date of the present application, the above background technology should not be used to evaluate the novelty and creativity of the present application. Summary of the invention

[0004] The present application provides a method for dynamically adjusting the switching speed of a switching device and a switching device circuit, which can quickly reduce the time required for the recombination of excess carriers in the n-region of the switching device.

[0005] In a first aspect, the present application provides a method for dynamically adjusting a switching speed of a switching device, comprising:

[0006] A1. Calculate the real-time shutdown delay time between the falling edge of the driving signal of the switching device and the shutdown of the switching device;

[0007] A2. Compare the real-time shutdown delay time with the reference shutdown delay time to obtain a first comparison result;

[0008] A3. Based on the first comparison result, adjust the gate drive voltage of the switching device, adjust the gate drive current of the switching device, and adjust the gate discharge current of the switching device, so that the real-time shutdown delay time is within the range of the reference shutdown delay time.

[0009] In some preferred embodiments,

[0010] Also includes:

[0011] A4, calculating the real-time turn-on delay time between the rising edge of the driving signal of the switch device and the turn-on of the switch device;

[0012] A5. Compare the real-time activation delay time with the reference activation delay time to obtain a second comparison result;

[0013] The A3 is:

[0014] Based on the first comparison result and the second comparison result, the gate drive voltage of the switching device is adjusted, the gate drive current of the switching device is adjusted, and the gate discharge current of the switching device is adjusted, so that the real-time shutdown delay time is within the range of the reference shutdown delay time.

[0015] In some preferred implementations, the A1 specifically includes: determining whether the switching device is turned off based on the on-current of the switching device.

[0016] In some preferred embodiments, A4 specifically includes: determining that the switching device is turned on based on the on-current of the switching device; the switching device is a transistor; and the transistor is an insulated gate bipolar transistor.

[0017] In some preferred embodiments, determining whether the switching device is turned off based on the on-current of the switching device includes: converting the on-current of the switching device into a first voltage, comparing the first voltage with a first reference voltage, and determining that the switching device is turned off if the first voltage is within the range of the first reference voltage.

[0018] In some preferred embodiments, determining whether the switching device is turned on based on the on-current of the switching device includes: converting the on-current of the switching device into a second voltage, comparing the second voltage with a second reference voltage, and determining that the switching device is turned on if the second voltage is within the range of the second reference voltage.

[0019] In some preferred embodiments, A1 also includes: turning off the first level signal when determining that the switching device is turned off, calculating the first time from the falling edge of the driving signal of the switching device to the falling edge of the first level signal, the first time being the real-time shutdown delay time.

[0020] In some preferred embodiments, A4 also includes: outputting a first level signal when determining that the switching device is turned on, calculating a second time from a rising edge of a driving signal of the switching device to a rising edge of the first level signal, the second time being the real-time turn-on delay time.

[0021] In some preferred embodiments, the switching device is an insulated gate bipolar transistor;

[0022] The adjusting the gate drive voltage of the switch device comprises: outputting a first adjustment signal to adjust the gate drive voltage of the switch device;

[0023] The adjusting the gate drive current of the switch device comprises: outputting a second adjustment signal to adjust the gate drive current of the switch device;

[0024] The adjusting the gate discharge current of the switching device includes: outputting a third adjustment signal to adjust the gate discharge current of the switching device.

[0025] In a second aspect, the present application provides a switching device circuit that can execute the above method.

[0026] In a third aspect, the present application further provides a switching device circuit, including a switching device, a gate drive voltage regulation circuit, a gate drive current regulation circuit, and a gate discharge current regulation circuit;

[0027] The gate drive voltage regulating circuit can regulate the gate drive voltage of the switching device;

[0028] The gate drive current regulating circuit can regulate the gate drive current of the switching device;

[0029] The gate discharge current regulating circuit can regulate the gate discharge current of the switching device.

[0030] In some preferred embodiments, a time delay comparison circuit is further included; the time delay comparison circuit is used to compare the voltage corresponding to the on-current of the switching device with a reference voltage.

[0031] In some preferred embodiments, the delay comparison circuit includes a comparator and a sampling resistor; one input end of the comparator is connected to one end of the sampling resistor; one end of the sampling resistor is connected to the switching device to collect the on-current of the switching device; and the other end of the sampling resistor is connected to ground.

[0032] In some preferred embodiments, the gate drive voltage regulation circuit includes a transistor.

[0033] In some preferred embodiments, the gate drive current regulating circuit includes a current regulating resistor.

[0034] In some preferred embodiments, the gate discharge current regulating circuit includes a discharge regulating resistor.

[0035] In some preferred embodiments, the switching device is an insulated gate bipolar transistor.

[0036] In some preferred embodiments, the switching device circuit is a flyback power adapter circuit.

[0037] In a fourth aspect, the present application provides a computer-readable storage medium, comprising: the computer-readable storage medium stores program instructions, and when the program instructions are executed by a processor of a computer, the processor executes the above method.

[0038] Compared with the prior art, the present invention has the following beneficial effects:

[0039] Dynamically adjusting the gate drive voltage, gate drive current and gate discharge current of the switching device can quickly reduce the time required for the recombination of excess carriers in the n-region, reduce current tailing and shorten the dead time, thereby increasing the operating frequency, reducing losses, and improving operating reliability and switching speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 shows the equivalent circuit of the IGBT;

[0041] Figure 2 Shows the basic structure of IGBT;

[0042] Figure 3 The change of the on-state current and gate voltage of the switching device after the switching device is turned off is shown;

[0043] Figure 4 The change of the channel current after the channel of the switching device is turned off is shown;

[0044] Figure 5 A schematic diagram of the structure of a switching device circuit according to an embodiment of the present application;

[0045] Figure 6 This is a control timing diagram of an embodiment of the present application;

[0046] Figure 7 A schematic flow chart of a method for dynamically adjusting the switching speed of a switching device according to an embodiment of the present application. DETAILED DESCRIPTION

[0047] In order to make the technical problems, technical solutions and beneficial effects to be solved by the embodiments of the present application clearer, the following Figures 1 to 7 It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0048] It should be noted that when a component is referred to as being "fixed to" or "disposed on" another component, it can be directly on the other component or indirectly on the other component. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element. In addition, connection can be used for fixing or for circuit connection.

[0049] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0050] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0051] The structure of IGBT is equivalent to the Darlington structure composed of n-channel MOSFET and pnp transistor; the drain of MOSFET is connected to the base of pnp transistor. The equivalent circuit and basic structure of IGBT are as follows Figure 1 and Figure 2 shown.

[0052] The turn-off waveform of IGBT is as follows: Figure 3As shown, it can be roughly divided into three stages: ① turn-off delay time td(off); ② time Δt from the voltage rising to 10% to the current falling to 90% during the turn-off process; ③ turn-off fall time tf. Therefore, the expression of IGBT turn-off time toff is as follows (1).

[0053] toff=td(off)+Δt+tf=(t1-t0)+(t2-t1)+(t3-t2) (1)

[0054] BJT is a current-controlled device, in which the operating current conducted by the emitter e and collector c is controlled by the smaller current introduced by the base b. The time td(off) and time Δt in the formula (1) are determined by the inherent parameters of the MOSFET. Therefore, for a certain IGBT, the time td(off) and time Δt are also fixed and unchanged. The change of the IGBT's turn-off time toff is determined by the current fall time tf. In order to make the IGBT switch from the forward conduction state to the forward blocking state, the gate capacitance must first be discharged through an external circuit to make the gate voltage drop below the MOSFET's turn-on voltage Vth. At this time, the channel inversion layer disappears and the channel current IMOS drops rapidly to zero.

[0055] refer to Figure 4 After the channel is turned off, the current of the device IGBT drops from I0 to I1 almost instantly. This process is called stage I. After stage I, the excess carrier holes in the n-region will disappear through recombination. This process is called stage II. Therefore, after the IGBT is turned off, the current drop time tf consists of two parts, namely the stage I current ΔI drop time and the stage II current I1 drop time. The stage I process occurs instantly and the time is very short. In stage II, the recombination process of excess carrier holes in the n-region is slow, which will cause the tail current phenomenon in the IGBT turn-off process. Therefore, the IGBT turn-off current drop time tf is mainly determined by the stage II current drop time. The stage II current drop time is the time required for the excess carriers in the n-region to recombine.

[0056] This embodiment provides a method for dynamically adjusting the switching speed of a switching device, which can reduce the current drop time in the above-mentioned stage II. The method can be executed by the switching device circuit of this embodiment. Figure 5 The switching device circuit of this embodiment is a typical flyback power adapter circuit, including a switching device S1, a gate drive voltage regulation circuit 10, a gate drive current regulation circuit 20, a gate discharge current regulation circuit 30 and a dynamic gate level compensation drive circuit 40.

[0057] The switch device S1 of this embodiment is an insulated gate bipolar transistor, that is, an IGBT. In other embodiments, the switch device may be other switch devices according to actual conditions.

[0058] In this embodiment, the gate drive voltage regulating circuit 10 is a circuit including a transistor T1, specifically a linear regulator (LDO, Low Dropout Regulator); one end of the gate drive voltage regulating circuit 10 is connected to the device power supply Vcc; the gate drive voltage regulating circuit 10 can play a role in voltage stabilization, and can stabilize the output voltage Vcc_g within a specified range. The gate drive current regulating circuit 20 is a current regulating resistor Rchz, specifically, the current regulating resistor Rchz is an adjustable charging resistor. The gate discharge current regulating circuit 30 is a discharge regulating resistor Rdis, specifically, the discharge regulating resistor Rdis is an adjustable discharge resistor.

[0059] One end of the gate drive current regulating circuit 20, that is, one end of the current regulating resistor Rch, is connected to an output end of the gate drive voltage regulating circuit 10, and the other end of the current regulating resistor Rch is connected to the gate of the switching device S1. That is, the current regulating resistor Rch connects the gate of the switching device S1 to the output end of the gate drive voltage regulating circuit 10, and can adjust the magnitude of the driving current flowing into the gate of the switching device S1.

[0060] One end of the gate discharge current regulating circuit 30 , ie, one end of the discharge regulating resistor Rdis, is connected to the gate of the switching device S1 , and the other end of the discharge regulating resistor Rdis is connected to the ground.

[0061] The dynamic gate level compensation driving circuit 40 is a digital logic control circuit, which can generate a driving signal and send the driving signal to the gate driving voltage regulating circuit 10, the gate driving current regulating circuit 20 and the gate discharge current regulating circuit 30. For example, the dynamic gate level compensation driving circuit 40 is connected to the gate driving voltage regulating circuit 10, the gate driving current regulating circuit 20 and the gate discharge current regulating circuit 30 respectively.

[0062] This embodiment is described in conjunction with the method of this embodiment. Figure 7 The method of this embodiment includes steps A1 to A3.

[0063] Step A1: Calculate the real-time turn-off delay time between the falling edge of the driving signal of the switch device and the turn-off of the switch device.

[0064] refer to Figure 6 The driving signal PWM_ctrl is used to control the on and off of the switch device S1, and has a rising edge and a falling edge. The rising edge of the driving signal PWM_ctrl can turn on the switch device S1, and the falling edge can turn off the switch device S1.

[0065] The dynamic gate-level compensation driving circuit 40 can determine whether the switch device S1 is turned off. For example, the switch device is turned off based on the on-current of the switch device S1; specifically, the switch device can be turned off when the on-current of the switch device S1 reaches a specified current value, or when the voltage corresponding to the on-current of the switch device S1 reaches a specified voltage value, so that the switch device can be detected when it is turned off; for an insulated gate bipolar transistor, the on-current of the switch device S1 is the collector-emitter current Ice of its BJT tube.

[0066] The dynamic gate level compensation driving circuit 40 starts timing from the falling edge of the driving signal PWM_ctrl and stops timing when it detects that the switch device S1 is turned off, so as to calculate the real-time turn-off delay time Toff_dly of the switch device S1.

[0067] Step A2: Compare the real-time shutdown delay time with the reference shutdown delay time to obtain a first comparison result.

[0068] According to the actual situation of the application scenario, the reference turn-off delay time Ton_dly_ref of the switch device circuit can be set. Of course, the reference turn-off delay time Ton_dly_ref can be fixed or adjustable.

[0069] After the dynamic gate level compensation driving circuit 40 calculates the real-time turn-off delay time Toff_dly of the switch device S1, the real-time turn-off delay time Toff_dly is compared with the reference turn-off delay time Ton_dly_ref to obtain a first comparison result. The first comparison result may be the difference between the real-time turn-off delay time Toff_dly and the reference turn-off delay time Ton_dly_ref, referred to as the turn-off delay difference Δtoff_dly. In this embodiment, Δtoff_dly=(Toff_dly-Ton_dly_ref).

[0070] Step A3: Based on the first comparison result, adjust the gate drive voltage of the switching device, adjust the gate drive current of the switching device, and adjust the gate discharge current of the switching device, so that the real-time turn-off delay time is within the range of the reference turn-off delay time.

[0071] The dynamic gate level compensation driving circuit 40 generates a first adjustment signal Vreg, a second adjustment signal Vrc and a third adjustment signal Vrdis according to the first comparison result, i.e., the turn-off delay difference Δton_dly. The first adjustment signal Vreg is a gate drive voltage adjustment signal; the second adjustment signal Vrc is a gate drive current adjustment signal; and the third adjustment signal Vrdis is a gate discharge current adjustment signal.

[0072] The dynamic gate level compensation driving circuit 40 outputs the first adjustment signal Vreg to the gate drive voltage adjustment circuit 10, adjusts the parameters of the gate drive voltage adjustment circuit 10, thereby changing the gate drive voltage of the switching device S1, that is, changing the voltage output from the gate drive voltage adjustment circuit 10 to the gate of the switching device S1. The dynamic gate level compensation driving circuit 40 outputs the second adjustment signal Vrc to the gate drive current adjustment circuit 20, adjusts the parameters of the gate drive current adjustment circuit 20, that is, the resistance value of the current adjustment resistor Rch, thereby changing the gate drive current of the switching device S1. The dynamic gate level compensation driving circuit 40 outputs the third adjustment signal Vrdis to the gate discharge current adjustment circuit 30, adjusts the parameters of the gate discharge current adjustment circuit 30, that is, the discharge adjustment resistor Rdis, thereby changing the gate discharge current of the switching device S1. The dynamic gate-level compensation driving circuit 40 adjusts the gate drive voltage regulating circuit 10, the gate drive current regulating circuit 20 and the gate discharge current regulating circuit 30, and finally makes the real-time turn-off delay time Toff_dly within the range of the reference turn-off delay time Ton_dly_ref, and also makes the turn-off time toff of the switch device S1 within the specified range. Among them, the reference turn-off delay time Ton_dly_ref can be a value or a range; then, making the real-time turn-off delay time Toff_dly within the range of the reference turn-off delay time Ton_dly_ref can be making the real-time turn-off delay time Toff_dly less than the reference turn-off delay time Ton_dly_ref, or making the real-time turn-off delay time Toff_dly fall within the reference turn-off delay time Ton_dly_ref.

[0073] Adjusting the gate drive voltage of the switching device, adjusting the gate drive current of the switching device and adjusting the gate discharge current of the switching device is a dynamic process, that is, step A1 to step A3 is a cyclic process, and the goal of adjustment is to gradually approach the final result so that the real-time turn-off delay time Toff_dly is within the range of the reference turn-off delay time Ton_dly_ref.

[0074] The turn-off time of a switching device such as an IGBT increases monotonically with the increase of voltage; and decreases with the increase of current. When the current is small, the turn-off time is very long; as the current increases, the turn-off time decreases rapidly. When the current is greater than a certain value, the turn-off time returns to the normal value of the product design (such as the normal value in the user manual) and slowly decreases as the current increases. Therefore, the method of this embodiment can ultimately reduce the turn-off time of the switching device.

[0075] The turn-on waveform of the gate voltage Vg of the switching device S1 has a Miller platform, and similarly, the turn-off waveform of the gate voltage Vg also has a Miller platform. The duration of the Miller platform will affect the turn-off time of the switching device S1. If the duration of the Miller platform of the turn-on waveform becomes shorter, then the duration of the Miller platform of the turn-off waveform will also become shorter, thereby shortening the turn-off time of the switching device S1. In other words, the turn-on delay time of the switching device S1 becomes shorter, and the turn-off delay time of the switching device S1 also becomes shorter. To this end, the method of this embodiment also includes steps A4 and A5.

[0076] Step A4: Calculate the real-time turn-on delay time between the rising edge of the driving signal of the switch device and the turn-on of the switch device.

[0077] The dynamic gate level compensation driving circuit 40 can determine whether the switch device S1 is turned on or turned on. For example, the dynamic gate level compensation driving circuit 40 determines that the switch device is turned on based on the on-current of the switch device S1; specifically, it can be detected that the switch device is turned on when the on-current of the switch device S1 reaches a specified current value, or when the voltage corresponding to the on-current of the switch device S1 reaches a specified voltage value, it can be detected that the switch device is turned on. In this way, it is possible to detect when the switch device is turned on.

[0078] The dynamic gate level compensation driving circuit 40 starts timing from the rising edge of the driving signal PWM_ctrl and stops timing when it detects that the switch device S1 is turned on, so as to calculate the real-time turn-on delay time Ton_dly of the switch device S1.

[0079] In this embodiment, in the conduction waveform of the switch device S1 , the end point of the Miller platform is the time point when the switch device S1 is turned on.

[0080] Step A5: Compare the real-time activation delay time with the reference activation delay time to obtain a second comparison result.

[0081] According to the actual situation of the application scenario, the reference turn-on delay time Ton_dly_ref of the switch device circuit can be set. Of course, the reference turn-on delay time Ton_dly_ref can be fixed or adjustable.

[0082] After the dynamic gate level compensation driving circuit 40 calculates the real-time turn-on delay time Ton_dly of the switch device S1, the real-time turn-on delay time Ton_dly is compared with the reference turn-on delay time Ton_dly_ref to obtain a second comparison result. The second comparison result may be the difference between the real-time turn-on delay time Ton_dly and the reference turn-on delay time Ton_dly_ref, referred to as the turn-on delay difference Δton_dly. In this embodiment, Δton_dly=(Ton_dly-Ton_dly_ref).

[0083] Based on the existence of step A4 and step A5, step A3 is specifically as follows: based on the first comparison result and the second comparison result, output the first adjustment signal Vreg to adjust the gate drive voltage of the switching device, output the second adjustment signal Vrc to adjust the gate drive current of the switching device, and output the third adjustment signal Vrdis to adjust the gate discharge current of the switching device, so that the real-time turn-off delay time Toff_dly is within the range of the reference turn-off delay time Ton_dly_ref.

[0084] The signal magnitudes of the output first adjustment signal Vreg, the second adjustment signal Vrc and the third adjustment signal Vrdis, that is, the voltage magnitudes, are related to the first comparison result Δton_dly and the second comparison result Δtoff_dly, as shown in equations (2) to (4).

[0085] Vreg=K1*f(Δton_dly,Δtoff_dly) (2)

[0086] Vrc=K2*f(Δton_dly,Δtoff_dly) (3)

[0087] Vrdis=K3*f(Δton_dly,Δtoff_dly) (4)

[0088] Among them, Vreg, Vrc and Vrdis are the voltage values ​​of the output first adjustment signal Vreg, the second adjustment signal Vrc and the third adjustment signal Vrdis respectively; K1, K2 and K3 are adjustment coefficients, which are dynamically changed and determine the adjustment degree of the first adjustment signal Vreg, the second adjustment signal Vrc and the third adjustment signal Vrdis respectively; f(Δton_dly, Δtoff_dly) is a function based on the first comparison result Δton_dly and the second comparison result Δtoff_dly. By constantly changing K1, K2 and K3, the ultimate adjustment purpose can be achieved.

[0089] This embodiment is further described.

[0090] The switch device circuit of this embodiment further includes a delay comparison circuit 50. The delay comparison circuit 50 is used to compare the voltage corresponding to the on-current of the switch device with the reference voltage.

[0091] The delay comparison circuit 50 includes a comparator U1 and a sampling resistor Rc; one input terminal of the comparator U1 is connected to one end of the sampling resistor Rc. One end of the sampling resistor Rc is connected to a current output terminal of the switch device S1, namely the source, and the other end of the sampling resistor Rc is connected to the ground.

[0092] Determining whether the switch device is turned on based on the on-current of the switch device includes: converting the on-current Ice of the switch device S1 into a second voltage, comparing the second voltage with a second reference voltage, and determining that the switch device is turned on if the second voltage is within the range of the second reference voltage.

[0093] For example, the sampling resistor Rc of the delay comparison circuit 50 collects the on-current Ice of the switching device S1 and converts it into a second voltage; the second voltage is input to the comparator U1; the comparator U1 compares the second voltage with a second reference voltage, wherein the second reference voltage is 0.1V; if the second voltage is within the range of the second reference voltage, for example, it exceeds 0.1V, the switching device S1 is determined to be turned on.

[0094] Step A4 also includes: determining that the switch device S1 outputs a first level signal Vcs_delay when it is turned on, calculating a second time from a rising edge of the drive signal PWM_ctrl of the switch device S1 to a rising edge of the first level signal Vcs_delay, the second time being a real-time turn-on delay time Ton_dly.

[0095] The comparator U1 outputs a first level signal Vcs_delay when determining that the switch device S1 is turned on. The first level signal Vcs_delay is a comparison result of the on-current Ice of the switch device S1 and the reference voltage 0.1V. The first level signal Vcs_delay is a high-low level signal. The first level signal Vcs_delay is input to the dynamic gate level compensation driving circuit 40, and the reference voltage Vcs_delay is input to the dynamic gate level compensation driving circuit 40. Figure 6 The dynamic gate level compensation driving circuit 40 calculates the second time from the rising edge of the driving signal PWM_ctrl of the switching device S1 to the rising edge of the first level signal Vcs_delay, that is, the real-time turn-on delay time Ton_dly.

[0096] Determining whether the switching device is turned off based on the on-current of the switching device specifically includes: converting the on-current Ice of the switching device S1 into a first voltage, comparing the first voltage with a first reference voltage, and determining that the switching device S1 is turned off if the first voltage is within the range of the first reference voltage.

[0097] For example, the sampling resistor Rc of the delay comparison circuit 50 collects the on-current Ice of the switching device S1 and converts it into a first voltage; the first voltage is input to the comparator U1; the comparator U1 compares the first voltage with a first reference voltage, wherein the first reference voltage is also 0.1V; if the first voltage is within the range of the first reference voltage, for example, less than 0.1V, the switching device S1 is determined to be turned off.

[0098] Step A1 also includes: turning off the first level signal Vcs_delay when determining that the switch device S1 is turned off, calculating a first time from a falling edge of the drive signal PWM_ctrl of the switch device S1 to a falling edge of the first level signal Vcs_delay, the first time being a real-time turn-off delay time Toff_dly.

[0099] The comparator U1 stops outputting the first level signal Vcs_delay when determining that the switch device S1 is turned off. The first level signal Vcs_delay is input to the dynamic gate level compensation driving circuit 40, referring to Figure 6 The dynamic gate level compensation driving circuit 40 calculates the first time from the falling edge of the driving signal PWM_ctrl of the switching device S1 to the falling edge of the first level signal Vcs_delay, that is, the real-time turn-off delay time Toff_dly.

[0100] This embodiment dynamically adjusts the gate drive voltage, gate drive current and gate discharge current of the switching device S1, which can quickly reduce the time required for the recombination of excess carriers in the n-region, reduce current tailing and shorten the dead time, thereby increasing the operating frequency, reducing losses and improving operating reliability.

[0101] Those skilled in the art can understand that all or part of the processes in the embodiment method can be completed by a computer program to instruct the relevant hardware, and the program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the various method embodiments. The aforementioned storage medium includes: ROM or random access memory RAM, magnetic disk or optical disk and other media that can store program codes.

[0102] The above content is a further detailed description of the present application in combination with specific / preferred implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, without departing from the concept of the present application, they can also make several substitutions or modifications to the described implementation methods, and these substitutions or modifications should be deemed to belong to the protection scope of the present application.

Claims

1. A method for dynamically adjusting the switching speed of a switching device, characterized in that: include: A1. Calculate the real-time shutdown delay time between the falling edge of the driving signal of the switching device and the shutdown of the switching device; A2. Compare the real-time shutdown delay time with the reference shutdown delay time to obtain a first comparison result; A3. Based on the first comparison result, adjust the gate drive voltage of the switching device, adjust the gate drive current of the switching device, and adjust the gate discharge current of the switching device, so that the real-time shutdown delay time is within the range of the reference shutdown delay time.

2. The method according to claim 1, characterized in that: Also includes: A4, calculating the real-time turn-on delay time between the rising edge of the driving signal of the switch device and the turn-on of the switch device; A5. Compare the real-time activation delay time with the reference activation delay time to obtain a second comparison result; The A3 is: Based on the first comparison result and the second comparison result, the gate drive voltage of the switching device is adjusted, the gate drive current of the switching device is adjusted, and the gate discharge current of the switching device is adjusted, so that the real-time shutdown delay time is within the range of the reference shutdown delay time.

3. The method according to claim 1, characterized in that: The A1 specifically includes: determining that the switching device is turned off based on the on-current of the switching device; the switching device is a transistor; and the transistor is an insulated gate bipolar transistor.

4. The method according to claim 2, characterized in that The A4 specifically includes: determining that the switching device is turned on based on the on-current of the switching device.

5. The method according to claim 3, characterized in that: Determining whether the switching device is turned off based on the on-current of the switching device includes: converting the on-current of the switching device into a first voltage, comparing the first voltage with a first reference voltage, and determining that the switching device is turned off if the first voltage is within the range of the first reference voltage.

6. The method according to claim 4, characterized in that: Determining whether the switching device is turned on based on the on-current of the switching device includes: converting the on-current of the switching device into a second voltage, comparing the second voltage with a second reference voltage, and determining that the switching device is turned on if the second voltage is within the range of the second reference voltage.

7. The method according to claim 5, characterized in that: The A1 also includes: turning off the first level signal when determining that the switch device is turned off, calculating the first time from the falling edge of the driving signal of the switch device to the falling edge of the first level signal, the first time being the real-time turn-off delay time.

8. The method according to claim 6, characterized in that: The A4 also includes: outputting a first level signal when determining that the switch device is turned on, calculating a second time from a rising edge of a driving signal of the switch device to a rising edge of the first level signal, the second time being the real-time turn-on delay time.

9. A switching device circuit, characterized in that: The method according to any one of claims 1 to 8 may be performed.

10. A computer-readable storage medium, characterized in that: include: The computer-readable storage medium stores program instructions, and when the program instructions are executed by a processor of a computer, the processor is caused to execute the method according to any one of claims 1 to 8.

Images