Thin film transistor, manufacturing method thereof and display panel

Abstract

The present invention provides a thin film transistor, a manufacturing method thereof and a display panel. The manufacturing method of the thin film transistor includes: a substrate; a gate layer and a gate insulating layer sequentially located on the substrate; a hydrogen-containing layer located on the gate insulating layer; a semiconductor layer located on the hydrogen-containing layer, the semiconductor layer including a source doping region and a drain doping region, the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer at intervals; a source electrode layer and a drain electrode layer are respectively located on the source doping region and the drain doping region. By forming a hydrogen-containing layer between the gate insulating layer and the semiconductor layer, the atomic structure in the gate insulating layer is optimized, the structural defects are reduced, the threshold voltage is reduced, and the on-state current is increased, so as to improve the device performance, thereby improving the yield and reliability of the panel.

Description

[Technical field]

[0001] The present invention relates to the field of display technology, and in particular to a thin film transistor, a manufacturing method thereof and a display panel. [Background technology]

[0002] In display panels such as Liquid Crystal Display (LCD) or Organic Light-Emitting Diode (OLED), each pixel is driven by a thin film transistor (TFT) integrated behind the pixel, so that high-speed, high-brightness and high-contrast display screen information can be achieved.

[0003] However, according to market demand, panels are gradually developing in the direction of high resolution and narrow bezels, and the size of the pixels of the panels is getting smaller and smaller, resulting in a smaller process window for product design, which puts higher device requirements on the structure and process of thin film transistors.

[0004] Therefore, the prior art has defects and needs to be improved and developed. [Summary of the invention]

[0005] The present invention provides a thin film transistor, a manufacturing method thereof and a display panel, so as to improve the electrical performance and process of the thin film transistor, thereby increasing the yield and reliability of the panel.

[0006] In order to solve the above problems, the present invention provides a thin film transistor, comprising: a substrate; a gate layer and a gate insulating layer sequentially located on the substrate; a hydrogen-containing layer located on the gate insulating layer; a semiconductor layer located on the hydrogen-containing layer, the semiconductor layer comprising a source doping region and a drain doping region, the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer at intervals; a source electrode layer and a drain electrode layer respectively located on the source doping region and the drain doping region.

[0007] The thickness of the hydrogen-containing layer ranges from 2 nm to 200 nm.

[0008] Wherein, the material of the hydrogen-containing layer includes silicon nitride.

[0009] Wherein, the material of the semiconductor layer includes hydrogenated amorphous silicon.

[0010] Wherein, the thin film transistor also includes:

[0011] a protective layer disposed on the semiconductor layer;

[0012] An electrode layer is located on the protective layer.

[0013] In order to solve the above problems, the present invention provides a method for manufacturing a thin film transistor, including: providing a substrate; forming a gate layer on the substrate; forming a gate insulating layer on the gate layer; forming a hydrogen-containing layer on the gate insulating layer; forming a semiconductor layer on the gate insulating layer, the semiconductor layer including a source doping region and a drain doping region, the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer; and forming a source electrode layer and a drain electrode layer on the source doping region and the drain doping region, respectively.

[0014] The semiconductor layer, the source electrode layer and the drain electrode layer are formed through the same mask.

[0015] The step of forming a hydrogen-containing layer on the gate insulating layer specifically includes:

[0016] A hydrogen-containing layer is formed on the gate insulating layer through a deposition process, and a dopant for forming the hydrogen-containing layer includes hydrogen.

[0017] After forming a source electrode layer and a drain electrode layer on the source doping region and the drain doping region respectively, the method further comprises:

[0018] forming a protective layer on the semiconductor layer;

[0019] A pixel electrode layer is formed on the protective layer.

[0020] In order to solve the above problems, the present invention provides a display panel, which includes a color filter substrate and an array substrate arranged opposite to the color filter substrate, wherein the array substrate includes at least one thin film transistor as described above.

[0021] The invention has the following beneficial effects: Different from the prior art, the present invention provides a thin film transistor, a manufacturing method thereof and a display panel, the manufacturing method of the thin film transistor comprising: a substrate; a gate layer and a gate insulating layer sequentially located on the substrate; a hydrogen-containing layer located on the gate insulating layer; a semiconductor layer located on the hydrogen-containing layer, the semiconductor layer comprising a source doping region and a drain doping region, the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer at intervals; a source electrode layer and a drain electrode layer are respectively located on the source doping region and the drain doping region. By forming a hydrogen-containing layer between the gate insulating layer and the semiconductor layer, the atomic structure in the gate insulating layer is optimized, the structural defects are reduced, the threshold voltage is reduced, and the on-state current is increased, so as to improve the device performance, thereby improving the yield and reliability of the panel.

Brief Description of the Drawings

[0022] Figure 1 A schematic flow chart of a method for manufacturing a thin film transistor provided by an embodiment of the present invention;

[0023] Figure 2a-2c It is a schematic diagram of the structures corresponding to each step in the manufacturing method provided in the embodiment of the present invention;

[0024] Figure 3The Vgs-Ids curve comparison diagrams of the thin film transistors in the prior art and the embodiments of the present invention are obtained respectively;

[0025] Figure 4 It is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. [Specific implementation method]

[0026] The present invention is further described in detail below in conjunction with the accompanying drawings and examples. It is particularly pointed out that the following examples are only used to illustrate the present invention, but are not intended to limit the scope of the present invention. Similarly, the following examples are only partial embodiments of the present invention rather than all embodiments, and all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention.

[0027] In addition, the terms first, second, third, etc. mentioned in the present invention can be used to describe various elements here, but these elements should not be limited to these terms. These terms are only used to distinguish these elements from each other. For example, without departing from the scope of the present application, the first can be called the second, and similarly, the second can be called the first. Therefore, the terms used are used to illustrate and understand the present invention, rather than to limit the present invention. In each of the accompanying drawings, units with similar structures are represented by the same reference numerals. For clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown in the accompanying drawings.

[0028] In addition, in each of the drawings, units with similar structures are denoted by the same reference numerals. When one component is described as being "connected to" another component, the two can be understood to be directly "connected" or one component can be indirectly "connected to" another component through an intermediate component.

[0029] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings.

[0030] like Figure 1 As shown, the present invention provides a method for manufacturing a thin film transistor. The method for manufacturing a thin film transistor is compared with Figure 2a to Figure 2c The structure diagram of the , the specific process is as follows:

[0031] Step S101: providing a substrate 110 .

[0032] Specifically, the base 110 may include a substrate (not shown in the figure) or a substrate and one or more layers of thin films on the substrate, without any particular limitation. The substrate may be a glass substrate. The one or more layers of thin films may be conductive films and / or functional films.

[0033] Step S102 : forming a gate layer 120 on the substrate 110 .

[0034] Specifically, after providing the substrate 110, a gate layer 120 may be formed on the substrate 110 by a deposition process. The gate layer 120 may be made of a conductive material, such as tungsten, aluminum or polysilicon, etc., without particular limitation.

[0035] Step S103 : forming a gate insulating layer 130 on the gate layer 120 .

[0036] In addition, it should be noted that Figure 2a to Figure 2c Only structures related to the embodiments of the present invention are shown. The thin film transistor of the present invention may further include other components and / or structures for realizing the complete functions of the thin film transistor.

[0037] Figure 2a The structure formed from step S101 to step S103 is shown, including: a substrate 110, and a gate layer 120 and a gate insulating layer 130 sequentially located on the substrate 110. After the gate layer 120 is formed, a gate insulating layer 130 may be formed on the gate layer 120. The gate insulating layer 130 may cover the gate layer 120, and the gate insulating layer 130 may be used to maintain the insulation between the gate layer 120 and the semiconductor layer 150. The material of the gate insulating layer 130 may be a non-conductive material with insulating properties, for example, the material of the gate insulating layer 130 may be silicon nitride (SiN x ).

[0038] Step S104 : forming a hydrogen-containing layer 140 on the gate insulating layer 130 .

[0039] Wherein, step S104: forming a hydrogen-containing layer 140 on the gate insulating layer 130 specifically includes:

[0040] The hydrogen containing layer 140 is formed on the gate insulating layer 130 through a deposition process, and a dopant forming the hydrogen containing layer 140 includes hydrogen (H2).

[0041] The material of the hydrogen-containing layer 140 includes silicon nitride.

[0042] Figure 2b The structure formed in step S104 includes a substrate 110 and a gate layer 120 , a gate insulating layer 130 and a hydrogen-containing layer 140 sequentially located on the substrate 110 .

[0043] Specifically, a hydrogen-containing layer 140 may be formed on the gate insulating layer 130 by a deposition process, for example, by plasma enhanced chemical vapor deposition. Generally, the material of the gate insulating layer 130 may be silicon nitride (SiN x The process of forming the gate insulating layer 130 may be to form the gate insulating layer 130 on the gate layer 120 through a deposition process, such as PECVD. x ) requires dopants of nitrogen source and silicon source. Generally, silane (SiH4) can be selected as the silicon source for forming the gate insulating layer 130, and ammonia (NH3) can be selected as the nitrogen source for forming the gate insulating layer 130. Therefore, a suitable dopant having silicon source and nitrogen source can be selected to form the gate insulating layer 130.

[0044] The hydrogen-containing layer 140 is a film layer containing hydrogen elements, and is not particularly limited as long as it contains hydrogen elements. The material of the hydrogen-containing layer 140 can be hydrogenated silicon nitride (SiN x :H). Among them, hydrogenated silicon nitride (SiN x The dopant for forming the hydrogen-containing layer 140 may include a silicon source, a nitrogen source, and a hydrogen source. The dopant for forming the hydrogen-containing layer 140 may include a hydrogen source, and the hydrogen source may include hydrogen (H2).

[0045] As can be seen from the above, the material of the gate insulating layer 130 can be silicon nitride, and the material of the hydrogen-containing layer 140 can be hydrogenated silicon nitride (SiN x :H). When the material of the gate insulating layer 130 is silicon nitride, the material of the hydrogen-containing layer 140 is hydrogenated silicon nitride (SiN x :H), the gate insulating layer 130 and the hydrogen-containing layer 140 can be formed separately in the same machine. For example, when forming the gate insulating layer 130, dopants including silane (SiH4) and ammonia (NH3) are used. After forming the gate insulating layer 130, hydrogen can be added as a dopant on the basis of the dopant used to form the gate insulating layer 130, so as to form the hydrogen-containing layer 140 on the gate insulating layer 130, which saves machine switching and is conducive to saving process steps and production costs.

[0046] The thickness W of the hydrogen-containing layer 140 ranges from 2 nm to 200 nm.

[0047] Specifically, as can be seen from the above, the hydrogen-containing layer 140 can be formed on the gate insulating layer by a deposition process. The hydrogen-containing layer 140 of a desired thickness can be formed by controlling the parameters in the deposition process, such as the working time for forming the hydrogen-containing layer 140. The thickness W of the hydrogen-containing layer 140 ranges from 2 nm to 200 nm.

[0048] Step S105 : forming a semiconductor layer 150 on the gate insulating layer 130 , wherein the semiconductor layer 150 includes a source doping region 151 and a drain doping region 152 , wherein the source doping region 151 and the drain doping region 152 are respectively disposed at two ends of the semiconductor layer 150 at intervals.

[0049] The material of the semiconductor layer 150 includes hydrogenated amorphous silicon (a-Si:H).

[0050] Specifically, when the material of the gate insulating layer 130 is silicon nitride and the material of the semiconductor layer 150 is hydrogenated amorphous silicon, correspondingly, the hydrogen-containing layer 140 and the semiconductor layer 150 both include hydrogen elements. By adding a hydrogen-containing layer 140 between the gate insulating layer 130 and the semiconductor layer 150, it can play a role of material transition, which is beneficial to reduce the material difference from the gate insulating layer 130 directly to the semiconductor layer 150, and the semiconductor layer 150 of hydrogenated amorphous silicon is beneficial to reduce structural defects, reduce the threshold voltage (Vth) of the thin film transistor, and increase the on-state current (Ion) of the thin film transistor, thereby improving the device performance.

[0051] Step S106: forming a source electrode layer 161 and a drain electrode layer 162 on the source doping region 151 and the drain doping region 152 respectively.

[0052] Figure 2c The structure formed by step S105 and step S106 includes: a substrate 110, and a gate layer 120, a gate insulating layer 130, a hydrogen-containing layer 140, and a semiconductor layer 150 sequentially located on the substrate 110. The semiconductor layer 150 includes a source doping region 151 and a drain doping region 152, the source doping region 151 and the drain doping region 152 are located on a side of the semiconductor layer 150 away from the substrate 110, and the source doping region 151 and the drain doping region 152 are respectively arranged at two ends of the semiconductor layer 150 at intervals.

[0053] Specifically, after forming the hydrogen-containing layer 140, a doped semiconductor layer 150 and a metal layer may be sequentially formed on the hydrogen-containing layer 140, respectively. The step of forming the doped semiconductor layer 150 further includes forming a source doping region 151 and a drain doping region 152 at both ends of the semiconductor layer 150, respectively, and the source doping region 151 and the drain doping region 152 are arranged at intervals and in the same layer. The source doping region 151 and the drain doping region 152 may be N-type doped. After forming the doped semiconductor layer 150 and the metal layer, two photolithography processes may be used to remove part of the doped semiconductor layer 150 to finally form the semiconductor layer 150, and to remove part of the metal layer to finally form the source electrode layer 161 and the drain electrode layer. The materials of the source electrode layer 161 and the drain electrode layer may be metal materials, such as tungsten, aluminum or copper.

[0054] In the embodiment of the present invention, by providing a hydrogen-containing layer 140 between the gate insulating layer 130 and the semiconductor layer 150, the Si-N atomic structure in the gate insulating layer 130 is optimized, the structural defects are reduced, the threshold voltage (Vth) of the thin film transistor is reduced, and the on-state current (Ion) of the thin film transistor is increased, thereby improving the device performance, and further improving the yield and reliability of the panel. In addition, in the embodiment of the present invention, it is only necessary to form an additional hydrogen-containing layer 140 on the gate insulating layer 130 after forming the gate insulating layer 130, and the complexity and difficulty of the process are not increased.

[0055] In addition, in the embodiment of the present invention, when the material of the gate insulating layer 130 is silicon nitride and the material of the hydrogen-containing layer 140 is hydrogenated silicon nitride, the gate insulating layer 130 and the hydrogen-containing layer 140 can be formed on the same machine, and only the reaction gas (i.e., dopant) for forming the semiconductor layer 150 and the hydrogen-containing layer 140 needs to be adjusted, without increasing the complexity and difficulty of the process. At the same time, by forming the gate insulating layer 130 and the hydrogen-containing layer 140 on the same machine, machine switching is saved, which is conducive to saving process steps and production costs.

[0056] Wherein, after forming the source electrode layer 161 and the drain electrode layer 162 on the source doping region 151 and the drain doping region 152 respectively in step S106, the method further includes:

[0057] forming a protective layer (not shown in the figure) on the semiconductor layer 150;

[0058] An electrode layer (not shown in the figure) is formed on the protective layer.

[0059] Specifically, a protective film layer and an electrode film layer can be formed on the semiconductor layer 150 in sequence by a deposition process, and then a portion of the protective film layer and the electrode film layer can be removed by two photolithography processes, thereby forming a protective layer and an electrode layer respectively. The material of the protective layer can be silicon oxide. The protective layer is also called a passivation layer (PV). The electrode layer can be a transparent electrode film, and the material of the electrode layer can be indium tin oxide (ITO) or indium gallium zinc oxide (IGZO).

[0060] The semiconductor layer 150 , the source electrode layer 161 , and the drain electrode layer 162 are formed by using the same mask.

[0061] Specifically, a five-time photolithography process (5mask process, mask is also called a photomask) can be used to form a thin film transistor including a protective layer and an electrode layer, wherein the five-time photolithography process refers to using a 5mask process (correspondingly, using 5 masks) to form a gate layer 120, a semiconductor layer 150, a source electrode layer 161 and a drain electrode layer 162, a protective layer, and an electrode layer. When a thin film transistor is formed using a 5mask process, two masks are required to form the semiconductor layer 150, the source electrode layer 161, and the drain electrode layer 162.

[0062] Specifically, as can be seen from the above, two masks can be used to remove part of the doped semiconductor layer 150 and the metal layer respectively through a photolithography process to form the semiconductor layer 150, the source electrode layer 161 and the drain electrode layer 162. However, when two masks are used to form the semiconductor layer 150, the source electrode layer 161 and the drain electrode layer 162, after the semiconductor layer 150 is formed, the photoresist layer used to form the semiconductor layer 150 needs to be removed, that is, additional exposure, etching and photoresist removal processes are required. In order to further save masks, reduce process steps and production costs, after the doped semiconductor layer 150 and the electrode layer are sequentially formed on the hydrogen-containing layer 140, a mask can be used (that is, a 4-mask process is used to form a thin film transistor including a protective layer and an electrode layer), and photoresist layers of different thicknesses are formed through a mask to remove part of the doped semiconductor layer 150 to finally form the semiconductor layer 150, to remove part of the metal layer, to finally form the source electrode layer 161 and the drain electrode layer 162. Since the semiconductor layer 150 and the source electrode layer 161 and the drain electrode layer 162 are formed by the same mask plate, the photoresist layer formed by the mask plate for forming the semiconductor layer 150 can continue to be used. Based on the photoresist layer, part of the metal layer is removed to finally form the source electrode layer 161 and the drain electrode layer 162. That is, after the semiconductor layer 150 is formed, no additional exposure, etching and photoresist removal processes are required, thereby reducing the process steps and production costs.

[0063] Specifically, in order to realize that the semiconductor layer 150, the source electrode layer 161, and the drain electrode layer 162 are formed by the same mask, the mask used to form the semiconductor layer 150 may be a half-tone mask or a gray tone mask. A half-tone mask is generally provided with a light-transmitting portion, a semi-transmitting portion, and a light-shielding portion on a transparent substrate, wherein the transmittance of the semi-transmitting portion is between that of the light-shielding portion and the light-transmitting portion. When a halftone mask is used to expose the photoresist on a substrate, light is irradiated onto the photoresist from the transparent and semi-transparent parts of the halftone mask to expose the photoresist, and then the exposed photoresist is developed. The photoresist at positions on the substrate corresponding to the shading, semi-transparent and transparent parts of the halftone mask will be completely retained, partially retained or completely removed, so that multiple photoresist layers with different thicknesses can be formed on a substrate at the same time, so as to realize the formation of the semiconductor layer 150, the source electrode layer 161 and the drain electrode layer 162 through the same mask.

[0064] Based on the method for manufacturing a thin film transistor described in the above embodiment of the present invention, the present invention further provides a thin film transistor, such as Figure 2c As shown, it includes: a substrate 110; a gate layer 120 and a gate insulating layer 130 sequentially located on the substrate 110; a hydrogen-containing layer 140 located on the gate insulating layer 130; a semiconductor layer 150 located on the hydrogen-containing layer 140, the semiconductor layer 150 includes a source doping region 151 and a drain doping region 152, and the source doping region 151 and the drain doping region 152 are respectively arranged at two ends of the semiconductor layer 150 at intervals; a source electrode layer 161 and a drain electrode layer 162 are respectively located on the source doping region 151 and the drain doping region 152.

[0065] Through the thin film transistor of the embodiment of the present invention, a hydrogen-containing layer 140 is disposed between the gate insulating layer 130 and the semiconductor layer 150, the Si-N atomic structure in the gate insulating layer 130 is optimized, the structural defects are reduced, the threshold voltage (Vth) of the thin film transistor is reduced, and the on-state current (Ion) of the thin film transistor is increased, thereby improving the device performance, and further improving the yield and reliability of the panel. In addition, in the embodiment of the present invention, it is only necessary to form a hydrogen-containing layer 140 on the gate insulating layer 130 after forming the gate insulating layer 130, without increasing the complexity and difficulty of the process.

[0066] The thickness of the hydrogen-containing layer 140 ranges from 2 nm to 200 nm.

[0067] Specifically, as can be seen from the above, the hydrogen-containing layer 140 can be formed on the gate insulating layer by a deposition process. The hydrogen-containing layer 140 of a desired thickness can be formed by controlling the parameters in the deposition process, such as the working time for forming the hydrogen-containing layer 140. The thickness of the hydrogen-containing layer 140 ranges from 2 nm to 200 nm.

[0068] The material of the hydrogen-containing layer 140 includes silicon nitride.

[0069] Specifically, when the material of the gate insulating layer 130 is silicon nitride and the material of the hydrogen-containing layer 140 is hydrogenated silicon nitride, the gate insulating layer 130 and the hydrogen-containing layer 140 can be formed on the same machine. Only the reaction gas (i.e., dopant) for forming the semiconductor layer 150 and the hydrogen-containing layer 140 needs to be adjusted, without increasing the complexity and difficulty of the process.

[0070] The material of the semiconductor layer 150 includes hydrogenated amorphous silicon.

[0071] Specifically, when the material of the gate insulating layer 130 is silicon nitride and the material of the semiconductor layer 150 is hydrogenated amorphous silicon, correspondingly, the hydrogen-containing layer 140 and the semiconductor layer 150 both include hydrogen elements. By adding a hydrogen-containing layer 140 between the gate insulating layer 130 and the semiconductor layer 150, it can play a role of material transition, which is beneficial to reduce the material difference from the gate insulating layer 130 directly to the semiconductor layer 150, and the semiconductor layer 150 of hydrogenated amorphous silicon is beneficial to reduce structural defects, reduce the threshold voltage (Vth) of the thin film transistor, and increase the on-state current (Ion) of the thin film transistor, thereby improving the device performance.

[0072] Wherein, the thin film transistor also includes:

[0073] a protective layer (not shown) located on the semiconductor layer 150;

[0074] An electrode layer (not shown) is located on the protective layer.

[0075] Specifically, the thin film transistor may further include a protective layer located on the semiconductor layer 150, and an electrode layer located on the protective layer. The material of the protective layer may be silicon oxide. The protective layer is also called a passivation layer (PV). The electrode layer may be a transparent electrode film, and the material of the electrode layer may be indium tin oxide (ITO) or indium gallium zinc oxide (IGZO).

[0076] Specifically, Figure 3 As shown in FIG. 1 , the Vgs-Ids curve comparison diagram of the thin film transistor in the prior art and the embodiment of the present invention is obtained respectively. Among them, the material of the hydrogen-containing layer 140 in the thin film transistor in the embodiment of the present invention is hydrogenated silicon nitride. Figure 3As shown, the horizontal axis is Vgs (the voltage between the gate and source of the TFT), the unit is V, and the vertical axis is Ids (the current between the drain and source of the TFT), the unit is A. Curve 1 is the Vgs-Ids change curve of the thin film transistor in the embodiment of the present invention, and curve 2 is the Vgs-Ids change curve of the thin film transistor in the prior art. Figure 3 It can be seen that under the same Vgs, the Ids corresponding to curve 1 is higher, and under the same Ids, the Vgs of curve 1 is smaller. Experimental data show that by forming the hydrogen-containing layer 140 between the gate insulating layer 130 and the semiconductor layer 150, the threshold voltage (Vth) of the thin film transistor can be reduced, and the on-state current (Ion) of the thin film transistor can be increased, thereby improving the device performance.

[0077] It should be understood that the thin film transistor of the embodiment of the present application, and the structure and manufacturing process of each component forming the thin film transistor can refer to the above-mentioned embodiment of the manufacturing method of the thin film transistor, which will not be repeated here.

[0078] Based on the thin film transistor and the manufacturing method thereof described in the above embodiments of the present invention, the present invention also provides a display panel, such as Figure 4 As shown, the display panel includes a color filter substrate 220 and an array substrate 210 arranged opposite to the color filter substrate 220, wherein the array substrate 210 includes at least one thin film transistor as any one of the above items (not shown in the figure).

[0079] In addition, it should be noted that Figure 4 Only structures related to the embodiments of the present invention are shown. The display panel of the present invention may further include other components and / or structures for realizing the complete functions of the display panel.

[0080] Specifically, Figure 4 As shown, the display panel includes a color filter substrate 220 (CF), and an array substrate 210 arranged opposite to the color filter substrate 220, wherein the array substrate 210 includes at least one thin film transistor as described above. The display panel also includes a liquid crystal layer 230 located between the color filter substrate 220 and the array substrate 210. The color filter substrate 220 includes a base substrate 221 and one or more layers of thin films located on the base substrate 221. The one or more layers of thin films may be conductive films and / or functional films. The color filter substrate 220 may include a base substrate 221, a color filter layer (RGB, not shown in the figure) and a flat layer (not shown in the figure) located on the base substrate 221, etc. The color filter layer (RGB) may include a red (R) filter layer (not shown in the figure), a green (G) filter layer (not shown in the figure) and a blue (B) filter layer (not shown in the figure).

[0081] Through the thin film transistor of the embodiment of the present invention, a hydrogen-containing layer is set between the gate insulating layer and the semiconductor layer, the Si-N atomic structure in the gate insulating layer is optimized, the structural defects are reduced, the threshold voltage (Vth) of the thin film transistor is reduced, and the on-state current (Ion) of the thin film transistor is increased, thereby improving the device performance. By applying at least one thin film transistor of the embodiment of the present invention to the array substrate of the display panel, the device performance of the display panel is improved, thereby improving the yield and reliability of the panel. In addition, in the embodiment of the present invention, it is only necessary to form a hydrogen-containing layer on the gate insulating layer after forming the gate insulating layer, and the complexity and difficulty of the process technology are not increased.

[0082] According to the above, the present invention provides a thin film transistor, a manufacturing method thereof and a display panel, the manufacturing method of the thin film transistor includes: a substrate; a gate layer and a gate insulating layer sequentially located on the substrate; a hydrogen-containing layer located on the gate insulating layer; a semiconductor layer located on the hydrogen-containing layer, the semiconductor layer includes a source doping region and a drain doping region, the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer; a source electrode layer and a drain electrode layer are respectively located on the source doping region and the drain doping region. By forming a hydrogen-containing layer between the gate insulating layer and the semiconductor layer, the atomic structure in the gate insulating layer is optimized, the structural defects are reduced, the threshold voltage is reduced, and the on-state current is increased, so as to improve the device performance, thereby improving the yield and reliability of the panel.

[0083] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A thin film transistor, characterized in that: include: substrate; A gate layer and a gate insulating layer are sequentially disposed on the substrate, wherein the gate insulating layer is made of silicon nitride, and the gate insulating layer is made of a silicon source and a nitrogen source but does not include hydrogen as a hydrogen source; A hydrogen-containing layer located on the gate insulating layer, wherein the material of the hydrogen-containing layer is hydrogenated silicon nitride, and the material for making the hydrogen-containing layer includes a silicon source, a nitrogen source, and hydrogen gas as a hydrogen source; A semiconductor layer located on the hydrogen-containing layer, the semiconductor layer comprising a source doping region and a drain doping region, the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer at intervals, and the material of the semiconductor layer comprises hydrogenated amorphous silicon; A source electrode layer and a drain electrode layer are respectively located on the source doping region and the drain doping region.

2. The thin film transistor according to claim 1, wherein: The thickness of the hydrogen-containing layer ranges from 2 nm to 200 nm.

3. The thin film transistor according to claim 1, wherein: The thin film transistor further includes: a protective layer located on the semiconductor layer; An electrode layer is located on the protective layer.

4. A method for manufacturing a thin film transistor, characterized in that: include: providing a substrate; forming a gate layer on the substrate; forming a gate insulating layer on the gate layer, wherein the material of the gate insulating layer is silicon nitride, and the manufacturing material of the gate insulating layer includes a silicon source and a nitrogen source but does not include hydrogen as a hydrogen source; forming a hydrogen-containing layer on the gate insulating layer, wherein the material of the hydrogen-containing layer is hydrogenated silicon nitride, and the material for making the hydrogen-containing layer includes a silicon source, a nitrogen source, and hydrogen gas as a hydrogen source; forming a semiconductor layer on the gate insulating layer, wherein the semiconductor layer comprises a source doping region and a drain doping region, wherein the source doping region and the drain doping region are respectively arranged at two ends of the semiconductor layer at intervals, and the material of the semiconductor layer comprises hydrogenated amorphous silicon; A source electrode layer and a drain electrode layer are formed on the source doping region and the drain doping region, respectively.

5. The method for manufacturing a thin film transistor according to claim 4, wherein: The semiconductor layer, the source electrode layer, and the drain electrode layer are formed through the same mask.

6. The method for manufacturing a thin film transistor according to claim 4, wherein: The step of forming a hydrogen-containing layer on the gate insulating layer specifically includes: A hydrogen-containing layer is formed on the gate insulating layer through a deposition process, and a dopant for forming the hydrogen-containing layer includes hydrogen.

7. The method for manufacturing a thin film transistor according to claim 4, wherein: After forming a source electrode layer and a drain electrode layer on the source doping region and the drain doping region respectively, the method further comprises: forming a protective layer on the semiconductor layer; A pixel electrode layer is formed on the protection layer.

8. A display panel, characterized in that: The display panel comprises a color filter substrate and an array substrate arranged opposite to the color filter substrate, wherein the array substrate comprises at least one thin film transistor according to any one of claims 1 to 3.

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