A Phase-locked Synchronization Method for Asymmetric Power Grid Based on Complex Vector Filter

Abstract

The present invention discloses an asymmetric power grid phase-locked synchronization method based on a complex vector filter. Aiming at the challenge that the control bandwidth of the rear-stage single synchronous coordinate system phase-locked loop in the traditional asymmetric power grid phase-locked synchronization technology based on a second-order generalized integrator is limited by the stability margin of the cascade system, the present invention introduces a first-order complex vector filter in a stationary coordinate system as a basic filtering unit, reconstructs the control structure of the front-stage positive and negative sequence filtering network, and adopts a feedback filtering architecture to suppress the control coupling effect of the front-stage filtering network and the rear-stage single synchronous coordinate system phase-locked loop, thereby achieving a significant improvement in the dynamic response capability of the rear-stage single synchronous coordinate system phase-locked loop under the premise of meeting the stability margin, thereby achieving accurate and rapid synchronization of the positive and negative sequence voltage components under asymmetric power grid conditions.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronic control, and in particular relates to an asymmetric power grid phase-locked synchronization method based on a complex vector filter. Background Art

[0002] Three-phase grid-connected converters usually use phase-locked synchronization technology to dynamically orient the real-time position of the controller coordinate system, thereby achieving synchronization with the public access point grid. According to the grid-connected guidelines, wind power, photovoltaic and other new energy grid-connected power generation equipment need to have the ability to ride through voltage asymmetric faults. Since the positive and negative sequence components of the grid voltage will suddenly change at the moment of asymmetric fault occurrence and fault recovery, this requires the phase-locked synchronization link of the grid-connected power electronic equipment to have a fast dynamic response capability to ensure that the positive and negative sequence components are quickly separated and locked separately after the grid voltage suddenly changes, so as to help the smooth execution of subsequent fault ride-through control strategies.

[0003] Since the single synchronous coordinate system phase-locked loop used under normal working conditions is extremely sensitive to the imbalance of input voltage, the method of adding a positive and negative sequence separation network at the input end of the single synchronous coordinate system phase-locked loop can be used to enhance the operating ability of the single synchronous coordinate system phase-locked loop under asymmetric grid voltage conditions, so as to achieve accurate separation and rapid synchronization of positive and negative sequence components. The traditional positive and negative sequence separation network directly connects the bandpass filter in the stationary coordinate system or the low-pass filter in the synchronous speed rotating coordinate system in series into the forward channel of the voltage separation network, thereby achieving rapid and accurate extraction of positive and negative sequence voltage components and having good dynamic performance. However, there is a control coupling effect between the front and rear cascaded positive and negative sequence filter networks and the single synchronous coordinate system phase-locked loop, which makes the control loop bandwidth of the subsequent single synchronous coordinate system phase-locked loop limited by the stability margin of the cascade system, resulting in the difficulty in improving the dynamic response capability of the single synchronous coordinate system phase-locked loop. Even if the positive and negative sequence network quickly and accurately separates the positive and negative sequence components, the subsequent single synchronous coordinate system phase-locked loop is difficult to quickly follow and lock, further limiting the subsequent fault ride-through control strategy execution of the converter. Summary of the invention

[0004] In order to overcome the shortcomings of the prior art and achieve fast and accurate synchronization of positive and negative sequence voltage components under asymmetric power grid conditions, the present invention proposes an asymmetric power grid phase-locked synchronization method based on a complex vector filter. By introducing a first-order complex vector filter in a stationary coordinate system as a basic filtering unit, the control structure of the front-stage positive and negative sequence filtering network is reconstructed, and the control coupling effect of the front-stage filtering network and the subsequent single synchronous coordinate system phase-locked loop is suppressed by adopting a feedback filtering control architecture. Under the premise of meeting the stability margin, the dynamic response capability of the subsequent single synchronous coordinate system phase-locked loop is greatly improved, thereby achieving accurate and fast synchronization of positive and negative sequence voltage components under asymmetric power grid conditions.

[0005] The asymmetric power grid phase-locked synchronization method based on a complex vector filter proposed by the present invention comprises the following steps:

[0006] 1) Sample the voltage v of each phase in the public grid connection point a 、v b and v c , after abc / αβ coordinate transformation, we get the voltage v in the stationary coordinate system α and v β , and define the voltage sampling value v αβ =v α +jv β , where v α With v β are the voltage values ​​of the α-axis and β-axis in the stationary coordinate system, v αβ is a complex vector, j is an imaginary unit;

[0007] 2) The negative sequence voltage detection value obtained from the last sampling The negative sequence voltage decoupling value is calculated by the negative sequence first order complex vector filter.

[0008]

[0009] Where s is the Laplace operator, is the angular frequency of the positive and negative components of the grid voltage detected by the positive sequence single synchronous coordinate system phase-locked loop after the last sampling calculation, ω P is the control bandwidth of the first-order complex vector filter;

[0010] 3) The positive sequence voltage detection value obtained from the last sampling The positive sequence voltage decoupling value is calculated by the positive sequence first-order complex vector filter.

[0011]

[0012] Where s is the Laplace operator, is the angular frequency of the positive and negative components of the grid voltage detected by the positive sequence single synchronous coordinate system phase-locked loop after the last sampling calculation, ω P is the control bandwidth of the first-order complex vector filter;

[0013] 4) The voltage sample value v αβ Subtract the negative sequence voltage decoupling value of this time Get the positive sequence voltage detection value of this sampling

[0014]

[0015] 5) The voltage sampling value v αβSubtract the current positive sequence voltage decoupling value Get the negative sequence voltage detection value of this sampling

[0016]

[0017] 6) Set the positive sequence voltage detection value It is sent to a single synchronous coordinate system phase-locked loop to obtain the amplitude, frequency and phase information of the positive sequence voltage;

[0018] 7) Set the negative sequence voltage detection value It is sent to another single synchronous coordinate system phase-locked loop to obtain the amplitude, frequency and phase information of the negative sequence voltage.

[0019] As a preferred solution of the present invention, in step 2) and step 3), the control bandwidth of the first-order complex vector filter determines the filtering effect of the complex vector filter, and is generally designed to be 0.707 times the rated angular frequency of the power grid.

[0020] As a preferred solution of the present invention, the single synchronous coordinate system phase-locked loops in step 6) and step 7) are completely the same.

[0021] Based on the above technical solution, the present invention has the following beneficial technical effects:

[0022] (1) The present invention adopts a first-order complex vector filter in a stationary coordinate system as a basic filtering unit, avoiding the use of rotating coordinate transformation and generalized integrator, etc., and only needs to design the bandwidth value to adjust the filtering effect of the filter. It has the advantages of simple control structure, less computing resources occupied, and convenient and easy design.

[0023] (2) The present invention adopts a positive-negative sequence separation network structure of a feedback channel series filter unit, which suppresses the control coupling effect between the filter dynamics and the subsequent single synchronous coordinate system phase-locked loop dynamics, greatly improves the interactive stability margin of the asymmetric phase-locked synchronization link, reduces the constraints of the previous positive-negative sequence separation network on the control bandwidth of the subsequent single synchronous coordinate system phase-locked loop, and achieves a significant improvement in the dynamic response capability of the subsequent single synchronous coordinate system phase-locked loop.

[0024] (3) The asymmetric power grid phase-locked synchronization method proposed in the present invention is applicable to grid-connected power electronic equipment with any hardware topology. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a control block diagram of an asymmetric power grid phase-locked loop based on a complex vector filter;

[0026] Figure 2 It is the block diagram of the implementation of the complex vector filter in the control loop in the real domain;

[0027] Figure 3 It is the time domain waveform diagram of the single-phase grounding fault of phase A in the three-phase power grid;

[0028] Figure 4 This is a stability comparison diagram between the traditional solution and the solution of the present invention;

[0029] Figure 5 It is a comparison chart of dynamic characteristics between the traditional solution and the solution of the present invention. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0031] Figure 1 This is a specific implementation block diagram of the asymmetric power grid phase-locked loop based on a complex vector filter proposed in the present invention, comprising a front-stage positive and negative sequence separation network and two independent single synchronous coordinate system phase-locked loops of the rear stage with exactly the same structure. Among them, the front-stage positive and negative sequence separation network corresponds to the execution of steps 1) to 5) of the present invention; the front-stage positive and negative sequence separation network of the present invention adopts a positive and negative sequence separation network structure of a feedback channel series filter unit, which suppresses the control coupling effect of the filter dynamics and the dynamics of the rear-stage single synchronous coordinate system phase-locked loop, greatly improves the interactive stability margin of the asymmetric phase-locked synchronization link, reduces the constraints of the front-stage positive and negative sequence separation network on the control bandwidth of the rear-stage single synchronous coordinate system phase-locked loop, and realizes a significant improvement in the dynamic response capability of the rear-stage single synchronous coordinate system phase-locked loop. The two single synchronous coordinate system phase-locked loops respectively execute steps 6) and 7) of the present invention.

[0032] exist Figure 2 The implementation of the complex vector filter in the control loop in the real domain is further explained in , where s is the Laplace operator, It is the angular frequency of the positive and negative components of the grid voltage detected by the positive sequence single synchronous coordinate system phase-locked loop after the last sampling calculation, which can ensure that the complex vector filter follows the change of the grid frequency in real time and accurately extracts the negative sequence component, ω P is the control bandwidth of the first-order complex vector filter, ω p0 is the rated angular frequency of the positive sequence component of the grid voltage, ω n0 The invention adopts the first-order complex vector filter in the stationary coordinate system as the basic filtering unit, avoiding the use of rotating coordinate transformation and generalized integrator, etc., and only needs to design the bandwidth value to adjust the filtering effect of the filter, which has the advantages of simple control structure, less computing resources, and convenient and easy design.

[0033] like Figure 1As shown, the asymmetric power grid phase-locked synchronization method based on the complex vector filter of the present invention specifically includes the following steps:

[0034] 1) Sample the voltage v of each phase in the public grid connection point a 、v b and v c , after abc / αβ coordinate transformation, we get the voltage v in the stationary coordinate system α and v β , and define the voltage sampling value v αβ =v α +jv β , where v α With v β are the voltage values ​​of the α-axis and β-axis in the stationary coordinate system, v αβ is a complex vector, j is an imaginary unit, and the definitions of other complex vectors with subscripts containing αβ are the same;

[0035] 1) The negative sequence voltage detection value obtained from the last sampling The negative sequence voltage decoupling value is calculated by the negative sequence first order complex vector filter

[0036]

[0037] 2) The positive sequence voltage detection value obtained from the last sampling The positive sequence voltage decoupling value is calculated by the positive sequence first order complex vector filter

[0038]

[0039] 3) The voltage sampling value v αβ Subtract the negative sequence voltage decoupling value Get the positive sequence voltage detection value of this sampling

[0040]

[0041] 4) The voltage sampling value v αβ Subtract the positive sequence voltage decoupling value Get the negative sequence voltage detection value of this sampling

[0042]

[0043] 5) Decouple the voltage positive sequence voltage It is sent to a single synchronous coordinate system phase-locked loop to obtain the amplitude, frequency and phase information of the positive sequence voltage;

[0044] 6) Decouple the voltage negative sequence voltage It is sent to another single synchronous coordinate system phase-locked loop to obtain the amplitude, frequency and phase information of the negative sequence voltage.

[0045] The verification was carried out in the scenario where a single-phase grounding fault occurred in the A phase of the three-phase power grid. The parameters were set as follows: the rated voltage of the normal power grid is 380V, the rated frequency is 50Hz, and after the fault occurs, the voltage of phase A drops to 0.5 times of the original voltage, and the voltage amplitudes of phases B and C remain unchanged. After the fault lasts for 200ms, the power grid returns to normal. The time domain waveform of the faulty power grid voltage is as follows: Figure 3 As shown, the complex vector filter bandwidth ω P =0.707·2π·50rad / s to achieve accurate positive and negative sequence component filtering effect and dynamic response speed.

[0046] The control loop damping ratio of the post-stage single synchronous coordinate system phase-locked loop is set to 0.707, and the control loop bandwidth is 70 Hz. Comparing the time domain waveforms of the traditional asymmetric phase-locked synchronization scheme based on the second-order generalized integrator and the scheme of the present invention, the asymmetric phase-locked synchronization scheme based on the second-order generalized integrator has already experienced unstable oscillation, while the scheme of the present invention can still maintain stable operation and quickly detect, separate and synchronize positive and negative sequence components at the moment of fault occurrence and clearing due to the weakened coupling between the pre-stage filter network and the post-stage single synchronous coordinate system phase-locked loop. Figure 4 shown.

[0047] Furthermore, two well-designed asymmetric phase-locked synchronization schemes are compared, one using an asymmetric phase-locked synchronization scheme based on a second-order generalized integrator and the other using the asymmetric phase-locked synchronization scheme proposed by the present invention. By comparing the time domain waveforms of the asymmetric phase-locked synchronization scheme based on a second-order generalized integrator and the scheme of the present invention, the scheme of the present invention is superior to the asymmetric phase-locked synchronization scheme based on a second-order generalized integrator in terms of dynamic performance, and can quickly detect, separate and synchronize positive and negative sequence components at the moment of fault occurrence and clearing, such as Figure 5 shown.

[0048] The above description of the embodiments is to facilitate the understanding and application of the present invention by those skilled in the art. It is obvious that those familiar with the art can easily make various modifications to the above embodiments and apply the general principles described herein to other embodiments without creative work. Therefore, the present invention is not limited to the above embodiments. Improvements and modifications made to the present invention by those skilled in the art based on the disclosure of the present invention should be within the scope of protection of the present invention, such as adopting different converter structures, different current inner loop control, etc. Therefore, the claims are intended to cover all variations within the true concept and scope of the present invention.

Claims

1. A phase-locked synchronization method for an asymmetric power grid based on a complex vector filter, characterized in that: The following steps are involved: 1) Sample the voltage v of each phase in the public grid connection point a 、v b and v c , after abc / αβ coordinate transformation, we get the voltage v in the stationary coordinate system α and v β , and define the voltage sampling value v αβ =v α +jv β , where v α With v β are the voltage values ​​of the α-axis and β-axis in the stationary coordinate system, v αβ is a complex vector, j is an imaginary unit; 2) The negative sequence voltage detection value obtained from the last sampling The negative sequence voltage decoupling value is calculated by the negative sequence first order complex vector filter. Where s is the Laplace operator, is the angular frequency of the positive and negative components of the grid voltage detected by the positive sequence single synchronous coordinate system phase-locked loop after the last sampling calculation, ω P is the control bandwidth of the first-order complex vector filter; 3) The positive sequence voltage detection value obtained from the last sampling The positive sequence voltage decoupling value is calculated by the positive sequence first-order complex vector filter. Where s is the Laplace operator, is the angular frequency of the positive and negative components of the grid voltage detected by the positive sequence single synchronous coordinate system phase-locked loop after the last sampling calculation, ω P is the control bandwidth of the first-order complex vector filter; 4) The voltage sampling value v αβ Subtract the negative sequence voltage decoupling value of this time Get the positive sequence voltage detection value of this sampling 5) The voltage sampling value v αβ Subtract the current positive sequence voltage decoupling value Get the negative sequence voltage detection value of this sampling 6) Set the positive sequence voltage detection value It is sent to a single synchronous coordinate system phase-locked loop to obtain the amplitude, frequency and phase information of the positive sequence voltage; 7) Set the negative sequence voltage detection value It is sent to another single synchronous coordinate system phase-locked loop to obtain the amplitude, frequency and phase information of the negative sequence voltage.

2. The asymmetric power grid phase-locked synchronization method based on complex vector filter according to claim 1 is characterized in that: In step 2) and step 3), the control bandwidth ω of the first-order complex vector filter is P It is 0.707 times the rated angular frequency of the power grid.

3. The asymmetric power grid phase-locked synchronization method based on complex vector filter according to claim 1, characterized in that: The single synchronous coordinate system phase-locked loops in step 6) and step 7) are exactly the same.

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