Photovoltaic cell piece, preparation method of grid line of photovoltaic cell piece and photovoltaic module

By designing gate lines and layer-by-layer printing technology of inverted trapezoidal structures, the problem of excessive contact area between gate lines and silicon wafers in photovoltaic cells is solved, and the photoelectric conversion efficiency and output power are improved.

CN119092564APending Publication Date: 2024-12-06ANHUI JINKO ENERGY CO LTD +1
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Patent Information

Application Number
CN202411360078.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-26
Publication Date
2024-12-06

AI Technical Summary

Technical Problem

The contact area between the gate lines of existing photovoltaic cells and the silicon wafer base is large, resulting in low photoelectric conversion efficiency.

Method used

Design a photovoltaic cell with an inverted trapezoidal cross-section of the gate line, the width of the first surface is smaller than the width of the second surface, and the gate line is drawn layer by layer by layer through the printing equipment to reduce the contact area between the gate line and the silicon wafer and the light-shielding area, while improving the conductivity of the gate line.

Benefits of technology

Without increasing the gate line resistance, the contact area between the gate line and the silicon wafer is reduced, the filling factor, open circuit voltage and short circuit current of the photovoltaic cell are improved, and the photoelectric conversion efficiency and output power are improved.

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Abstract

The embodiment of the invention provides a photovoltaic cell piece, a preparation method of a grid line of the photovoltaic cell piece and a photovoltaic module, the photovoltaic cell piece comprises a silicon wafer, the silicon wafer comprises a light facing surface and a backlight surface which are oppositely arranged along the thickness direction of the photovoltaic cell piece, and at least one of the light facing surface and the backlight surface is provided with the grid line; the grid line comprises a first surface and a second surface which are oppositely arranged along the thickness direction of the photovoltaic cell, and the first surface is fixedly connected with the silicon wafer; the width of the first surface is smaller than that of the second surface along the width direction of the grid line, so that the shading area of the grid line on the silicon wafer can be reduced, the filling factor, open-circuit voltage and short-circuit current of the photovoltaic cell can be improved, the metal recombination on the surface of the silicon wafer can be reduced, and the photoelectric conversion efficiency and the output power of the photovoltaic cell can be improved; and the performance of the photovoltaic cell is improved.
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Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic cells, and in particular to a photovoltaic cell sheet, a method for preparing a grid line of a photovoltaic cell sheet, and a photovoltaic module. Background Art

[0002] Photovoltaic cells are photoelectric semiconductor sheets that use sunlight to generate electricity directly. Photovoltaic cells include a silicon wafer base and a grid line arranged on the surface of the silicon wafer base. The main function of the grid line is to collect and transmit photogenerated carriers, thereby realizing the conversion of solar energy into electricity. In existing photovoltaic cells, the contact area between the grid line and the silicon wafer base is large, or it causes a large shading loss, resulting in a low photoelectric conversion efficiency of the photovoltaic cell. Summary of the invention

[0003] In view of this, the present application provides a photovoltaic cell, a method for preparing grid lines of a photovoltaic cell, and a photovoltaic module, so as to solve the problem of low photoelectric conversion efficiency of photovoltaic cells in the prior art.

[0004] In a first aspect, an embodiment of the present application provides a photovoltaic cell, comprising: a silicon wafer, comprising a light-facing surface and a backlight surface arranged opposite to each other along a thickness direction of the photovoltaic cell, at least one of the light-facing surface and the backlight surface being provided with a gate line; the gate line comprising a first surface and a second surface arranged opposite to each other along the thickness direction of the photovoltaic cell, the first surface being fixedly connected to the silicon wafer; along the width direction of the gate line, the width of the first surface is smaller than the width of the second surface.

[0005] In one possible implementation, the gate line includes a first gate line arranged on the light-facing surface, the first gate line includes a first sub-surface and a second sub-surface arranged relatively to each other along the thickness direction of the photovoltaic cell, the first sub-surface is the first surface, and the second sub-surface is the second surface; along the width direction of the first gate line, the width W1 of the first sub-surface is 12μm~16μm; and / or, along the width direction of the first gate line, the width W2 of the second sub-surface is 17μm~21μm.

[0006] In one possible implementation, the gate line includes a second gate line arranged on the backlight surface, the second gate line includes a third sub-surface and a fourth sub-surface arranged relatively to each other along the thickness direction of the photovoltaic cell sheet, the third sub-surface is the first surface, and the fourth sub-surface is the second surface; along the width direction of the second gate line, the width W3 of the third sub-surface is 28μm~32μm; and / or, along the width direction of the second gate line, the width W4 of the fourth sub-surface is 33μm~37μm.

[0007] In one possible implementation, the grid line includes a first side surface and a second side surface relatively distributed along its width direction, wherein the first side surface is connected to the first surface and the second surface at two ends along the thickness direction of the photovoltaic cell respectively, and the first side surface is an inclined plane; and / or the second side surface is connected to the first surface and the second surface at two ends along the thickness direction of the photovoltaic cell respectively, and the second side surface is an inclined plane.

[0008] In a possible implementation manner, the grid line has a center line in the thickness direction of the photovoltaic cell sheet, and the first side surface and the second side surface are symmetrical about the center line.

[0009] In one possible implementation, the gate lines include a first gate line arranged on the light-facing surface, and the thickness D1 of the first gate line is 6μm to 10μm along the thickness direction of the photovoltaic cell; and / or the gate lines include a second gate line arranged on the backlight surface, and the thickness D2 of the second gate line is 4μm to 8μm along the thickness direction of the photovoltaic cell.

[0010] In one possible implementation, the grid line includes a main grid, the main grid includes a main body and a plurality of welding points, along the length direction of the main grid, the main body has a plurality of first regions and a plurality of second regions that are staggered, and the plurality of welding points are arranged one by one in the plurality of second regions; along the thickness direction of the photovoltaic cell sheet, the total thickness D3 of the welding points and the second regions is greater than the thickness D4 of the first regions.

[0011] In a second aspect, an embodiment of the present application provides a method for preparing a grid line of a photovoltaic cell, comprising: the photovoltaic cell comprises a silicon wafer, the silicon wafer comprises a light-facing surface and a backlight surface relatively arranged along a thickness direction of the photovoltaic cell, at least one of the light-facing surface and the backlight surface is provided with a grid line; the grid line comprises a first surface and a second surface relatively arranged along the thickness direction of the photovoltaic cell, the first surface is used for fixed connection with the silicon wafer, and along the width direction of the grid line, the width of the first surface is smaller than the width of the second surface; the preparation method comprises: preparing the silicon wafer and printing paste; drawing the printing paste layer by layer on the light-facing surface and / or the backlight surface by a printing device, the width of each layer of the drawing structure being greater than the width of the previous layer of the drawing structure, so as to form the grid line.

[0012] In a possible implementation, the grid line includes a main grid, and the main grid includes a main body and multiple solder joints; when forming the main grid, the preparation method specifically includes: drawing the printing paste layer by layer on the light-facing surface and / or the backlight surface by a printing device, and the width of each layer of the drawing structure is greater than the width of the previous layer of the drawing structure, so as to form the main body; along the length direction of the main body, the printing paste is drawn on the main body at intervals by a printing device to form the solder joints.

[0013] In the third aspect, an embodiment of the present application provides a photovoltaic component, including a battery string, including a plurality of photovoltaic cells, two adjacent photovoltaic cells are connected by a welding strip, the photovoltaic cell is the photovoltaic cell described above, the photovoltaic cell includes a grid line, and the grid line is prepared by the preparation method described above; an encapsulation layer is used to cover the surface of the battery string; and a cover plate is used to cover the surface of the encapsulation layer away from the battery string.

[0014] In the present application, the cross-section of the gate line is an inverted trapezoidal structure. Compared with the gate line of the prior art with a positive trapezoidal structure (the width of the first surface is greater than the width of the second surface), the contact area between the gate line and the silicon wafer can be reduced without changing the cross-sectional area of ​​the gate line, that is, the shading area of ​​the gate line to the silicon wafer can be reduced without increasing the resistance of the gate line. When the resistance of the gate line is smaller, the series resistance of the photovoltaic cell will be smaller, and the fill factor and output power will be higher; and when the shading area of ​​the gate line is smaller, the effective light receiving area of ​​the photovoltaic cell will be larger, and the photoelectric conversion efficiency will be higher. Therefore, when the width of the first surface is smaller than the width of the second surface, it is beneficial to improve the fill factor, open circuit voltage and short circuit current of the photovoltaic cell, reduce the metal composite on the surface of the silicon wafer, thereby improving the photoelectric conversion efficiency and output power of the photovoltaic cell, and then improving the performance of the photovoltaic cell.

[0015] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0017] Figure 1 A schematic diagram of the structure of the photovoltaic cell provided in the present application in the first embodiment;

[0018] Figure 2 A schematic diagram of the structure of the photovoltaic cell provided in the present application in the second embodiment;

[0019] Figure 3 A schematic diagram of the structure of the photovoltaic cell provided in the present application in the third embodiment;

[0020] Figure 4 for Figure 2 Reflection light path diagram of the grating lines in;

[0021] Figure 5 for Figure 1 Schematic diagram of the structure of the photovoltaic cell in another perspective;

[0022] Figure 6 for Figure 5 A schematic diagram of the structure of the main grid of the photovoltaic cell;

[0023] Figure 7 A schematic diagram of the structure of the printing device required for the preparation method provided in this application;

[0024] Figure 8 This is a schematic diagram of the structure of the photovoltaic module provided in this application.

[0025] Reference numerals:

[0026] 100-battery string;

[0027] 110- Photovoltaic cells;

[0028] 120-welding strip;

[0029] 200-encapsulation layer;

[0030] 300-cover plate;

[0031] 1- Silicon wafer;

[0032] 11-light-facing side;

[0033] 12- Backlight surface;

[0034] 2-grid line;

[0035] 2a-first grid line;

[0036] 2b-second grid line;

[0037] 21- first surface;

[0038] 21a-first sub-surface;

[0039] 21b - third subsurface;

[0040] 22- second surface;

[0041] 22a-second sub-surface;

[0042] 22b- fourth subsurface;

[0043] 23- first side;

[0044] 23a- first sub-side;

[0045] 23b-third sub-lateral;

[0046] 24 - second side;

[0047] 24a - second sub-side;

[0048] 24b-Fourth sub-lateral;

[0049] 25- main grid;

[0050] 251-main body;

[0051] 251a-first area;

[0052] 251b-Second area;

[0053] 252-welding point;

[0054] 3- Workbench;

[0055] 4- Printing device. DETAILED DESCRIPTION

[0056] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0057] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0058] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0059] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0060] The embodiment of the present application provides a photovoltaic cell 110, which includes a silicon wafer 1. The silicon wafer 1 can be a single crystal silicon wafer or a multi-crystalline silicon wafer. Figure 1 As shown, the silicon wafer 1 includes a light-facing surface 11 and a backlight surface 12 which are arranged relatively along the thickness direction Z of the photovoltaic cell 110. The light-facing surface 11 is a side surface of the photovoltaic cell 110 facing the light source and used to receive direct sunlight. The backlight surface 12 is a side surface of the photovoltaic cell 110 facing away from the light source and used to receive sunlight reflected from the ground. At least one of the light-facing surface 11 and the backlight surface 12 is provided with a grid line 2. The grid line 2 includes a first surface 21 and a second surface 22 which are arranged relatively along the thickness direction of the photovoltaic cell 110. The first surface 21 is used to be fixedly connected to the silicon wafer 1. Along the width direction X of the grid line 2, the width of the first surface 21 is smaller than the width of the second surface 22.

[0061] In this embodiment, the cross section of the gate line 2 is an inverted trapezoidal structure. Compared with the gate line 2 of the prior art with a positive trapezoidal structure (the width of the first surface 21 is greater than the width of the second surface 22), the contact area between the gate line 2 and the silicon wafer 1 can be reduced without changing the cross-sectional area of ​​the gate line 2, that is, the light shielding area of ​​the gate line 2 to the silicon wafer 1 can be reduced without increasing the resistance of the gate line 2. When the resistance of the gate line 2 is smaller, the series resistance of the photovoltaic cell 110 will be smaller, and the filling factor and output power will be higher; and when the light shielding area of ​​the gate line 2 is smaller, the effective light receiving area of ​​the photovoltaic cell 110 will be larger, and the photoelectric conversion efficiency will be higher. Therefore, when the width of the first surface 21 is smaller than the width of the second surface 22, it is beneficial to improve the filling factor, open circuit voltage and short circuit current of the photovoltaic cell 110, reduce the metal compound on the surface of the silicon wafer 1, thereby improving the photoelectric conversion efficiency and output power of the photovoltaic cell 110, and further improving the performance of the photovoltaic cell 110.

[0062] The present embodiment does not limit the specific type of the photovoltaic cell 110. The types of the photovoltaic cell 110 include, but are not limited to, a passivated emitter rear cell (PERC) having grid lines 2 on both the light-facing surface 11 and the backlight surface 12, a tunnel oxide passivated contact cell (TOPCon), an intrinsic thin-film heterojunction cell (HJT), a perovskite cell, etc. It may also be an interdigitated back contact cell (IBC) having grid lines 2 only on the backlight surface 12.

[0063] For PERC cells, along the thickness direction, PERC cells include front surface metal silver electrode, front surface silicon nitride passivation layer, phosphorus layer emitter, P-type base silicon layer, local aluminum back field, metal aluminum back electrode, back passivation layer (Al2O3 / SiNx). PERC cells use a passivation film to passivate the back, replacing the full aluminum back field, enhancing the internal back reflection of light in the silicon base, reducing the recombination rate on the back, and increasing the efficiency of the cell by 0.5%-1%.

[0064] For TOPCon cells, along the thickness direction, TOPCon cells include metal silver electrodes, front surface silicon nitride passivation layers, boron-doped emitters, N-type base silicon layers, diffused doping layers, ultra-thin silicon oxide, doped polysilicon, silicon nitride, and metal silver electrodes. The back of the cell is composed of a layer of ultra-thin silicon oxide (1nm to 2nm) and a layer of phosphorus-doped microcrystalline amorphous mixed Si film, which together form a passivation contact structure. This structure can block the recombination of minority carrier holes and increase the open circuit voltage and short circuit current of the cell. The ultra-thin oxide layer allows majority electrons to tunnel into the polysilicon layer while blocking the recombination of minority carrier holes. The good passivation effect of ultra-thin silicon oxide and heavily doped silicon film causes the energy band on the silicon wafer surface to bend, thereby forming a field passivation effect, greatly increasing the probability of electron tunneling, reducing contact resistance, and increasing the open circuit voltage and short circuit current of the cell, thereby improving the cell conversion efficiency.

[0065] For HJT cells, along the thickness direction, the HJT cells include a front low-temperature silver electrode, a front conductive film, an N-type amorphous silicon film, an intrinsic amorphous silicon film, an N-type base silicon layer, an intrinsic amorphous silicon film, a P-type amorphous silicon film, a back conductive film, and a back low-temperature silver electrode.

[0066] For IBC cells, along the thickness direction, IBC cells include silicon nitride anti-layer, N+ front surface field, N-type base silicon layer, P+ emitter, N+ back field, aluminum oxide passivation layer, silicon nitride anti-reflection layer, and metal silver electrode. IBC cells use ion implantation technology to obtain P and N regions with good uniformity and precisely controllable junction depth. There is no grid line blocking on the front of the cell, which can eliminate the shading current loss of the metal electrode and achieve the maximum utilization of incident photons. The short-circuit current can be increased by about 7% compared with conventional solar cells; due to the back contact structure, there is no need to consider the grid line blocking problem, and the grid line ratio can be appropriately widened, thereby reducing the series resistance and having a high fill factor; the surface passivation and surface light trapping structure can be optimized to obtain a lower front surface recombination rate and surface reflection.

[0067] For perovskite cells, along the thickness direction, the perovskite cell includes substrate material, conductive film, electron transport layer (titanium dioxide), perovskite absorption layer (hole transport layer), and metal electrode. Perovskite materials have a high light absorption coefficient and a long carrier diffusion distance. After the photons absorbed by the perovskite material are converted into electrons, they are easily collected by the electrode with low loss, so they can generate higher photoelectric voltage and current, making perovskite show higher photoelectric conversion efficiency.

[0068] like Figure 1 As shown, the gate lines 2 include first gate lines 2a arranged on the light-facing surface 11 and / or second gate lines 2b arranged on the backlight surface 12, that is, the gate lines 2 can be arranged with the first gate lines 2a only on the light-facing surface 11, or with the second gate lines 2b only on the backlight surface 12, or with the first gate lines 2a arranged on the light-facing surface 11 and the second gate lines 2b also arranged on the backlight surface 12, and this embodiment does not impose any limitation on this.

[0069] Among them, Figure 2 As shown, the first grid line 2a includes a first sub-surface 21a and a second sub-surface 22a that are relatively arranged along the thickness direction Z of the photovoltaic cell 110, the first sub-surface 21a is the above-mentioned first surface 21, the second sub-surface 22a is the above-mentioned second surface 22, and it satisfies: along the width direction X of the first grid line 2a, the width W1 of the first sub-surface 21a is smaller than the width W2 of the second sub-surface 22a.

[0070] Specifically, the width W1 of the first sub-surface 21a is 12μm to 16μm; and / or the width W2 of the second sub-surface 22a is 17μm to 21μm. Specifically, W1 can be 12μm, 12.5μm, 13μm, 13.5μm, 14μm, 14.5μm, 15μm, 15.5μm or 16μm, or other values ​​within the above range, which is not limited in this embodiment; W2 can be 17μm, 17.5μm, 18μm, 18.5μm, 19μm, 19.5μm, 20μm, 20.5μm or 21μm, or other values ​​within the above range, which is not limited in this embodiment.

[0071] For W1, if W1 is too small (for example, less than 12μm), the contact area between the first grid line 2a and the light-facing surface 11 is too small, which will affect the structural stability of the first grid line 2a, and may also cause grid breakage, resulting in a decrease in the output power of the photovoltaic cell 110; if W1 is too large (for example, greater than 16μm), the contact area between the first grid line 2a and the light-facing surface 11 is too large, which will increase the shading area of ​​the first grid line 2a, increase the shading loss of the photovoltaic cell 110, and cause the photoelectric conversion efficiency and output power of the photovoltaic cell 110 to decrease.

[0072] For W2, if W2 is too small (for example, less than 17μm), the cross-sectional area of ​​the first gate line 2a is too small, which will increase the resistance of the first gate line 2a and cause the output power of the photovoltaic cell 110 to decrease; if W2 is too large (for example, greater than 21μm), the shading area of ​​the first gate line 2a will also increase, which will increase the shading loss of the photovoltaic cell 110 and cause the photoelectric conversion efficiency and output power of the photovoltaic cell 110 to decrease. At the same time, the cost of the photovoltaic cell 110 will also increase due to excessive use of material for the first gate line 2a.

[0073] Therefore, the width W1 of the first sub-surface 21a should meet 12μm~16μm and / or the width W2 of the second sub-surface 22a should meet 17μm~21μm to improve the photoelectric conversion efficiency and output power of the photovoltaic cell 110, while appropriately reducing the production cost of the photovoltaic cell 110.

[0074] like Figure 3 As shown, the second grid line 2b includes a third sub-surface 21b and a fourth sub-surface 22b which are relatively arranged along the thickness direction Z of the photovoltaic cell 110, the third sub-surface 21b is the above-mentioned first surface 21, and the fourth sub-surface 22b is the above-mentioned second surface 22, and it satisfies: along the width direction X of the second grid line 2b, the width W3 of the third sub-surface 21b is smaller than the width W4 of the fourth sub-surface 22b.

[0075] Since the backlight surface 12 is not directly exposed to the light source, the second gate line 2b has little effect on the light shielding of the silicon wafer 1, and the width of the second gate line 2b can be set relatively large. Specifically, the width W3 of the third sub-surface 21b is 28μm to 32μm; and / or the width W4 of the fourth sub-surface 22b is 33μm to 37μm. Specifically, W3 can be 28μm, 28.5μm, 29μm, 29.5μm, 30μm, 30.5μm, 31μm, 31.5μm or 32μm, or other values ​​within the above range, which is not limited in this embodiment; W4 can be 33μm, 33.5μm, 34μm, 34.5μm, 35μm, 35.5μm, 36μm, 36.5μm or 37μm, or other values ​​within the above range, which is not limited in this embodiment.

[0076] For W3, if W3 is too small (for example, less than 28μm), the contact area between the second gate line 2b and the backlight surface 12 is too small, which will cause the cross-sectional area of ​​the second gate line 2b to decrease, and then cause the resistance of the second gate line 2b to increase and reduce the output power of the photovoltaic cell 110; if W3 is too large (for example, greater than 32μm), the contact area between the second gate line 2b and the backlight surface 12 is too large, resulting in a reduction in the reflected light that the backlight surface 12 can receive, and the photoelectric conversion efficiency and output power of the photovoltaic cell 110 are reduced. At the same time, the cost of the photovoltaic cell 110 will increase due to the excessive use of material for the second gate line 2b.

[0077] For W4, if W4 is too small (for example, less than 33μm), the cross-sectional area of ​​the second grid line 2b is too small, which will increase the resistance of the second grid line 2b and cause the output power of the photovoltaic cell 110 to decrease; if W4 is too large (for example, greater than 37μm), the reflected light that can be received by the backlight surface 12 will be reduced, resulting in a decrease in the photoelectric conversion efficiency and output power of the photovoltaic cell 110. At the same time, the cost of the photovoltaic cell 110 will increase due to the excessive use of material for the second grid line 2b.

[0078] Therefore, the width W3 of the third sub-surface 21b should meet 28μm~32μm and / or the width W4 of the fourth sub-surface 22b should meet 33μm~37μm to improve the photoelectric conversion efficiency and output power of the photovoltaic cell 110, while appropriately reducing the production cost of the photovoltaic cell 110.

[0079] like Figure 2 As shown, along the thickness direction Z of the photovoltaic cell 110, the thickness D1 of the first grid line 2a is 6 μm to 10 μm; and / or, as Figure 3 As shown, along the thickness direction Z of the photovoltaic cell 110, the thickness D2 of the second grid line 2b is 4μm to 8μm. Specifically, D1 can be 6μm, 6.5μm, 7μm, 7.5μm, 8μm, 8.5μm, 9μm, 9.5μm or 10μm, or other values ​​within the above range, which is not limited in this embodiment; D2 can be 4μm, 4.5μm, 5μm, 5.5μm, 6μm, 6.5μm, 7μm, 7.5μm or 8μm, or other values ​​within the above range, which is not limited in this embodiment.

[0080] For the first gate line 2a, since the width W1 of the first sub-surface 21a and the width W2 of the second sub-surface 22a are relatively small, the thickness D1 of the first gate line 2a can be set larger to increase the cross-sectional area of ​​the first gate line 2a, thereby reducing the resistance of the first gate line 2a, and further improving the fill factor and output power of the photovoltaic cell 110 without causing an increase in the shading loss of the photovoltaic cell 110.

[0081] For the second gate line 2b, since the width W3 of the third sub-surface 21b and the width W4 of the fourth sub-surface 22b are relatively large, the thickness D2 of the second gate line 2b can be set smaller to reduce the material cost of the second gate line 2b without affecting the cross-sectional area of ​​the second gate line 2b, thereby improving the fill factor and output power of the photovoltaic cell 110 while appropriately reducing the production cost of the photovoltaic cell 110.

[0082] like Figure 1 As shown, the grid line 2 also includes a first side surface 23 and a second side surface 24 that are relatively distributed along the width direction X thereof, and the first side surface 23 is connected to the first surface 21 and the second surface 22 at two ends along the thickness direction Z of the photovoltaic cell 110, respectively, and the first side surface 23 is an inclined plane; and / or, the second side surface 24 is connected to the first surface 21 and the second surface 22 at two ends along the thickness direction of the photovoltaic cell 110, respectively, and the second side surface 24 is an inclined plane. Specifically, for the first grid line 2a, the first grid line 2a includes a first sub-side surface 23a and a second sub-side surface 24a that are relatively distributed along the width direction X thereof, and the first sub-side surface 23a is the above-mentioned first side surface 23, and the second sub-side surface 24a is the above-mentioned second side surface 24; for the second grid line 2b, the second grid line 2b includes a third sub-side surface 23b and a fourth sub-side surface 24b that are relatively distributed along the width direction X thereof, and the third sub-side surface 23b is the above-mentioned first side surface 23, and the fourth sub-side surface 24b is the above-mentioned second side surface 24.

[0083] like Figure 4As shown, taking the structure of the first grid line 2a as an example, when the light is reflected by the light-facing surface 11, the first sub-side surface 23a can reflect the reflected light again, so that part of the light can be incident on the silicon wafer 1 from the light-facing surface 11 again, that is, the first sub-side surface 23a can form a secondary reflection on the light, thereby improving the utilization rate of the light by the light-facing surface 11, and then improving the photoelectric conversion efficiency and output power of the photovoltaic cell 110. Moreover, the first sub-side surface 23a is an inclined plane, and compared with the curved surface structure, it has a larger reflection surface, so that the reflection effect of the secondary reflection can be improved, and the utilization rate of the light by the light-facing surface 11 can be further improved. Similarly, the second sub-side surface 24a can also form a secondary reflection on the light to improve the photoelectric conversion efficiency and output power of the photovoltaic cell 110. Moreover, the second sub-side surface 24a is an inclined plane, and can also have a larger reflection surface, so that the reflection effect of the secondary reflection can be improved. Therefore, when the first sub-side surface 23a and the second sub-side surface 24a are both inclined planes, it is beneficial to improve the photoelectric conversion efficiency of the photovoltaic cell 110. Correspondingly, for the second grid line 2b, the third sub-side surface 23b and the fourth sub-side surface 24b can form a secondary reflection of the light reflected by the backlight surface 12, thereby improving the utilization rate of the light by the backlight surface 12, and further improving the photoelectric conversion efficiency and output power of the photovoltaic cell 110, and when the third sub-side surface 23b and / or the fourth sub-side surface 24b are inclined planes, they can have a larger reflection surface, thereby improving the reflection effect of the secondary reflection, which is beneficial to improving the photoelectric conversion efficiency of the photovoltaic cell 110.

[0084] Therefore, the first side 23 and the fourth side 24 of the gate line 2 can form a secondary reflection of the light, thereby improving the utilization rate of the light by the silicon wafer 1, and when the first side 23 and / or the second side 24 are inclined planes, they can have a larger reflection surface, thereby improving the reflection effect of the secondary reflection, further improving the utilization rate of the light by the silicon wafer 1, and then improving the photoelectric conversion efficiency of the photovoltaic cell 110.

[0085] like Figure 4As shown, the grid line 2 has a center line in the thickness direction Z of the photovoltaic cell 110, and the first side surface 23 and the second side surface 24 are symmetrical about the center line, that is, the first side surface 23 and the second side surface 24 are symmetrically distributed along the width direction X of the photovoltaic cell 110, so that the cross-sectional area of ​​the grid line 2 is an isosceles trapezoidal structure, which is conducive to improving the structural stability of the grid line 2, ensuring that the first side surface 23 and the second side surface 24 have a good secondary reflection effect, thereby helping to improve the photoelectric conversion efficiency and output power of the photovoltaic cell 110, and further improve the performance of the photovoltaic cell 110. That is, when the first sub-side surface 23a and the second sub-side surface 24a are symmetrical about the center line of the first grid line 2a, it is conducive to improving the structural stability of the first grid line 2a, and improving the secondary reflection effect of the first sub-side surface 23a and the second sub-side surface 24a; when the third sub-side surface 23b and the fourth sub-side surface 24b are symmetrical about the center line of the second grid line 2b, it is conducive to improving the structural stability of the second grid line 2b, and improving the secondary reflection effect of the third sub-side surface 23b and the fourth sub-side surface 24b.

[0086] The grid line 2 may specifically include a main grid 25 and a secondary grid 26, that is, the photovoltaic cell 110 is provided with both the main grid 25 and the secondary grid 26, the secondary grid 26 is used to collect and guide the photocurrent generated in the silicon wafer 1; the main grid 25 and the secondary grid 26 are perpendicular to each other and electrically connected, and the main grid 25 is used to collect and output the photocurrent collected by the secondary grid 26. It should be noted that the structures of the main grid 25 and the secondary grid 26 both meet the size range of the grid line 2 described above, and the width of the secondary grid 26 should be smaller than the width of the main grid 25. Alternatively, the photovoltaic cell 110 may also be a gridless cell, that is, the grid line 2 only includes the secondary grid 26.

[0087] like Figure 5 As shown, when the photovoltaic cell 110 is provided with a main grid 25 and a secondary grid 26 at the same time, a plurality of secondary grids 26 can be distributed at intervals along the first direction L, and each secondary grid 26 extends along the second direction K, which can increase the current collection path and improve the current collection efficiency. At the same time, it can avoid the situation where the secondary grid 26 has a large current density, thereby reducing the loss caused by local overheating of the photovoltaic cell 110. When a certain secondary grid 26 is damaged, the photocurrent can also be collected through other secondary grids 26 to ensure that the photovoltaic cell 110 can work normally, thereby improving the stability and service life of the photovoltaic cell 110. A plurality of main grids 25 can be distributed at intervals along the second direction K, and each main grid 25 extends along the first direction L, which can effectively reduce the resistance, improve the current transmission efficiency of the photovoltaic cell 110, and reduce energy loss, thereby facilitating the improvement of the output power of the photovoltaic cell 110.

[0088] One of the first direction L and the second direction K is the length direction of the photovoltaic cell 110 , and the other is the width direction of the photovoltaic cell 110 .

[0089] like Figure 6 As shown, the main grid 25 includes a main body 251 and a plurality of welding points 252 located on the second surface 22. Along the length direction L of the main grid 25, the main body 251 has a plurality of first regions 251a and a plurality of second regions 251b that are staggered. The plurality of welding points 252 are arranged one by one in the plurality of second regions 251b. Along the thickness direction Z of the photovoltaic cell 110, the total thickness D3 of the welding points 252 and the second regions 251b is greater than the thickness D4 of the first region 251a. The welding points 252 are used to be welded to the welding strip to achieve the connection between the two photovoltaic cells 110. When the total thickness D3 of the welding points 252 and the second regions 251b is greater than the thickness D4 of the first region 251a, it is beneficial to increase the tensile stress at the welding points 252, thereby facilitating the connection strength between the welding points 252 and the welding strip.

[0090] It should be noted that the first gate line 2a located on the light-facing surface 11 may include a first main gate and a first sub-gate, the first main gate is the main gate 25 mentioned above, and the first sub-gate is the sub-gate 26 mentioned above; the second gate line 2b located on the backlight surface 12 may include a second main gate and a second sub-gate, the second main gate is the main gate 25 mentioned above, and the second sub-gate is the sub-gate 26 mentioned above.

[0091] When the structure of the grid line 2 is the structure described in the above embodiments, the performance effect of the photovoltaic cell 110 is shown in the following table:

[0092]

[0093] The type and quantity of the grid lines 2 on the photovoltaic cell 110 in the control group are exactly the same as the type and quantity of the grid lines 2 on the photovoltaic cell 110 in the experimental group, and only the cross-sectional shapes are different. In the control group: the light-facing surface and the backlight surface are both provided with grid lines with a cross-sectional structure of a regular trapezoid, wherein the thickness of the grid lines on the light-facing surface is 8 μm, the width of the first surface where the grid lines are connected to the light-facing surface is 18 μm, and the width of the second surface where the grid lines are away from the light-facing surface is 15 μm; the thickness of the grid lines on the backlight surface is 5 μm, the width of the first surface where the grid lines are connected to the backlight surface is 33 μm, and the width of the second surface where the grid lines are away from the backlight surface is 30 μm. In the experimental group: the light-facing surface 11 is provided with a first gate line 2a having an inverted trapezoidal cross-sectional structure, the thickness D1 of the first gate line 2a is 8μm, the width W1 of the first sub-surface 21a of the first gate line 2a is 15μm, and the width W2 of the second sub-surface 22a of the first gate line 2a is 18μm; the backlight surface 12 is provided with a second gate line 2b having an inverted trapezoidal cross-sectional structure, the thickness D2 of the second gate line 2b is 5μm, the width W3 of the third sub-surface 21b of the second gate line 2b is 30μm, and the width W4 of the fourth sub-surface 22b of the second gate line 2b is 33μm.

[0094] According to the experimental data in the above table, when the gate line 2 structure (experimental group) provided in this embodiment is adopted, the shading area of ​​the gate line 2 can be reduced, thereby increasing the light absorption rate of the photovoltaic cell 110, which is beneficial to improving the photoelectric conversion efficiency of the photovoltaic cell 110, reducing the unit consumption of the photovoltaic cell 110, and improving the efficiency of the photovoltaic cell 110. Moreover, it has no negative impact on the product yield of the photovoltaic cell 110, that is, it can improve the photoelectric conversion efficiency of the photovoltaic cell 110 while improving the product quality of the photovoltaic cell 110.

[0095] The embodiment of the present application further provides a method for preparing the grid line 2 on the photovoltaic cell 110, which is used to prepare the grid line 2 described in the above embodiments. The preparation method includes:

[0096] Step S1: Prepare silicon wafer 1 and print slurry.

[0097] In this step, firstly, a silicon wafer 1 of suitable size needs to be prepared, and then the silicon wafer 1 can be pre-processed, including but not limited to texturing, preparing emitters, etching, diffusion and cleaning. Figure 7 As shown, the pre-treated silicon wafer 1 can be placed on the workbench 3 for standby use, and at the same time, the printing slurry can be filled into a printing device (such as a printing pen) for standby use.

[0098] Step S2: Printing slurry is drawn layer by layer on the light-facing surface 11 and / or the backlight surface 12 by a printing device, and the width of each layer of the drawing structure is greater than the width of the previous layer of the drawing structure, so as to form the grid lines 2.

[0099] In this step, the printing slurry is sprayed or printed onto the light-facing surface 11 and / or the backlight surface 12 of the silicon wafer 1 in batches by a printing device, and a layer of gate line 2 is formed each time, and each layer of the structure is wider than the previous layer of the structure to form an inverted trapezoidal structure of the gate line 2, wherein the printing device can be controlled by a control device such as a computer to spray or print the printing slurry on a specified position of the silicon wafer 1 to achieve automated preparation of the gate line 2.

[0100] The present embodiment adopts a printing method to prepare the gate lines 2. Compared with the method of preparing the gate lines 2 by screen printing in the prior art, the present embodiment has higher flexibility and can be applied to gate lines 2 of different structures and sizes without the need to prepare a variety of templates, which is conducive to improving the preparation efficiency of the gate lines 2 and reducing the preparation cost of the gate lines 2. Moreover, the present embodiment adopts a layer-by-layer printing method to prepare the gate lines 2, that is, along the thickness direction A of the photovoltaic cell 110, the printing steps are completed in batches, which is convenient for preparing the gate lines 2 with an inverted trapezoidal structure, and at the same time, it is conducive to improving the preparation accuracy and printing quality of each layer structure of the gate lines 2.

[0101] Specifically, when printing layer by layer, the gate line 2 can be divided into 2 to 6 layers along the thickness direction Z of the photovoltaic cell 110, which can be 2 layers, 3 layers, 4 layers, 5 layers or 6 layers. The printing thickness of each layer can be kept consistent to ensure the uniformity of the gate line 2 structure; or, the printing thickness of each layer can be inconsistent, with the bottom layer close to the silicon wafer 1 having a thicker thickness and the high layer away from the silicon wafer 1 having a thinner thickness, which is beneficial to improving the structural stability of the gate line 2.

[0102] In addition, the printing slurry can use a high plastic slurry to reduce the fluidity of the slurry and ensure that the inverted trapezoidal structure of the grid line 2 is not easily destroyed. The grid line 2 after printing needs to be post-processed, including but not limited to drying, sintering, EL detection (electroluminescence detection) and other steps. If the grid line 2 needs to be set on both the light-facing surface 11 and the backlight surface 12, the grid line 2 can be first printed on one of the light-facing surface 11 and the backlight surface 12 and dried, and then printed on the other The grid line 2 is dried (that is, one of the first grid line 2a and the second grid line 2b can be printed first, and then the other is printed), and finally the above-mentioned post-processing steps are performed together.

[0103] When the grid line 2 includes a main grid 25, and a solder joint 252 is provided on the main grid 25, the method for preparing the main grid 25 includes: drawing the printing paste layer by layer on the light-facing surface 11 and / or the backlight surface 12 by a printing device, and the width of each layer of the drawing structure is greater than the width of the previous layer of the drawing structure to form a main body 251; then along the length direction L of the main body 251, the printing paste is drawn on the second area 251b of the main body 251 by a printing device at intervals to form solder joints 252, that is, compared with the preparation steps of the main grid 25 and the auxiliary grid 26 without the solder joint 252, one more printing step is required to increase the tensile stress of the solder joint 252. If the grid line 2 includes both the main grid 25 and the auxiliary grid 26, the main grid 25 and the auxiliary grid 26 of the main grid 25 can be prepared by printing layer by layer first, and finally the solder joint 252 can be prepared on the main body 251 by printing at intervals. Of course, in addition to the case where the main grid 25 includes the solder joint 252 as described in the above embodiment, if the user has a need to make the grid line 2 include areas with different heights, this can also be achieved through a similar method, which is beneficial to saving the amount of printing paste and saving the preparation cost of the grid line 2.

[0104] The screen printing method in the prior art can only prepare a grid line structure with the same height in each region, while the method for preparing the grid line 2 provided in this embodiment can prepare the grid line 2 into a structure with different heights in different regions, which has higher flexibility and higher preparation efficiency.

[0105] The present application also provides a photovoltaic module, such as Figure 8As shown, the photovoltaic module includes a battery string 100, an encapsulation layer 200 and a cover plate 300. The battery string 100 is composed of a plurality of photovoltaic cells 110 connected by welding strips 120. The photovoltaic cell 110 is the photovoltaic cell 110 described in the above embodiments. The photovoltaic cell 110 includes a grid line 2, which is prepared by the above-described preparation method. The encapsulation layer 200 is used to cover the surface of the battery string 100. The cover plate 300 is used to cover the surface of the encapsulation layer 200 away from the battery string 100.

[0106] Specifically, the photovoltaic cell 110 is electrically connected in the form of a whole piece or multiple pieces through a welding strip 120 to form a battery string 100, and multiple battery strings 100 are electrically connected in series and / or in parallel. The encapsulation layer 200 covers the front and back of the photovoltaic cell 110. Specifically, the encapsulation layer 200 can be an organic encapsulation film such as ethylene-vinyl acetate copolymer (EVA) film, polyethylene octene co-elastomer (POE) film, polyethylene terephthalate (PET) film or polyvinyl butyral (PVB). The cover plate 300 can be a cover plate 300 with a light-transmitting function such as a glass cover plate, a plastic cover plate, etc., and the surface of the cover plate 300 facing the encapsulation layer 200 can be a concave-convex surface, thereby increasing the utilization rate of the incident light.

[0107] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A photovoltaic cell, It is characterized in that include: A silicon wafer (1), comprising a light-facing surface (11) and a backlight surface (12) arranged opposite to each other along the thickness direction of the photovoltaic cell (110), wherein at least one of the light-facing surface (11) and the backlight surface (12) is provided with a grid line (2); The gate line (2) comprises a first surface (21) and a second surface (22) which are arranged opposite to each other along the thickness direction of the photovoltaic cell sheet (110), and the first surface (21) is fixedly connected to the silicon sheet (1); Along the width direction of the gate line (2), the width of the first surface (21) is smaller than the width of the second surface (22).

2. The photovoltaic cell according to claim 1, It is characterized in that The grid lines (2) include a first grid line (2a) arranged on the light-facing surface (11), the first grid line (2a) including a first sub-surface (21a) and a second sub-surface (22a) arranged opposite to each other along the thickness direction of the photovoltaic cell (110), the first sub-surface (21a) being the first surface (21), and the second sub-surface (22a) being the second surface (22); Along the width direction of the first gate line (2a), the width W1 of the first sub-surface (21a) is 12 μm to 16 μm; And / or, along the width direction of the first gate line (2a), the width W2 of the second sub-surface (22a) is 17 μm to 21 μm.

3. The photovoltaic cell according to claim 1, It is characterized in that The grid lines (2) include second grid lines (2b) arranged on the backlight surface (12), the second grid lines (2b) include a third sub-surface (21b) and a fourth sub-surface (22b) arranged opposite to each other along the thickness direction of the photovoltaic cell sheet (110), the third sub-surface (21b) is the first surface (21), and the fourth sub-surface (22b) is the second surface (22); Along the width direction of the second gate line (2b), the width W3 of the third sub-surface (21b) is 28 μm to 32 μm; And / or, along the width direction of the second gate line (2b), the width W4 of the fourth sub-surface (22b) is 33 μm to 37 μm.

4. The photovoltaic cell according to claim 1, It is characterized in that The grid line (2) comprises a first side surface (23) and a second side surface (24) which are relatively distributed along the width direction thereof, the first side surface (23) is respectively connected to the first surface (21) and the second surface (22) at two ends along the thickness direction of the photovoltaic cell (110), and the first side surface (23) is an inclined plane; And / or, the second side surface (24) is respectively connected to the first surface (21) and the second surface (22) at two ends along the thickness direction of the photovoltaic cell (110), and the second side surface (24) is an inclined plane.

5. The photovoltaic cell according to claim 4, It is characterized in that The grid line (2) has a center line in the thickness direction of the photovoltaic cell sheet (110), and the first side surface (23) and the second side surface (24) are symmetrical about the center line.

6. The photovoltaic cell according to claim 1, It is characterized in that The grid lines (2) include first grid lines (2a) arranged on the light-facing surface (11), and along the thickness direction of the photovoltaic cell (110), the thickness D1 of the first grid lines (2a) is 6 μm to 10 μm; And / or, the grid lines (2) include second grid lines (2b) arranged on the backlight surface (12), and along the thickness direction of the photovoltaic cell (110), the thickness D2 of the second grid lines (2b) is 4 μm to 8 μm.

7. The photovoltaic cell according to claim 1, It is characterized in that The grid line (2) comprises a main grid (25), the main grid (25) comprising a main body (251) and a plurality of welding points (252), along the length direction of the main grid (25), the main body (251) has a plurality of first regions (251a) and a plurality of second regions (251b) distributed in an alternating manner, and the plurality of welding points (252) are arranged one by one in the plurality of second regions (251b); Along the thickness direction of the photovoltaic cell sheet (110), the total thickness D3 of the welding point (252) and the second region (251b) is greater than the thickness D4 of the first region (251a).

8. A method for preparing a grid line of a photovoltaic cell. It is characterized in that The photovoltaic cell (110) comprises a silicon wafer (1), the silicon wafer (1) comprising a light-facing surface (11) and a backlight surface (12) arranged opposite to each other along the thickness direction of the photovoltaic cell (110), at least one of the light-facing surface (11) and the backlight surface (12) being provided with a grid line (2); the grid line (2) comprises a first surface (21) and a second surface (22) arranged opposite to each other along the thickness direction of the photovoltaic cell (110), the first surface (21) being used for being fixedly connected to the silicon wafer (1), and along the width direction of the grid line (2), the width of the first surface (21) is smaller than the width of the second surface (22); The preparation method comprises: Preparing the silicon wafer (1) and printing slurry; The printing paste is drawn layer by layer on the light-facing surface (11) and / or the backlight surface (12) by a printing device, and the width of each layer of the drawing structure is greater than the width of the previous layer of the drawing structure, so as to form the grid lines (2).

9. The method for preparing the grid line of the photovoltaic cell according to claim 8, It is characterized in that The grid line (2) comprises a main grid (25), and the main grid (25) comprises a main body (251) and a plurality of welding points (252); When forming the main grid (25), the preparation method specifically includes: The printing paste is drawn layer by layer on the light-facing surface (11) and / or the backlight surface (12) by a printing device, wherein the width of each drawn structure is greater than the width of the previous drawn structure, so as to form the main body (251); Along the length direction of the main body (251), the printing paste is drawn on the main body (251) at intervals by a printing device to form the welding points (252).

10. A photovoltaic module, It is characterized in that include: A battery string (100), comprising a plurality of photovoltaic cells (110), wherein two adjacent photovoltaic cells (110) are connected by a welding strip (120), wherein the photovoltaic cell (110) is the photovoltaic cell (110) according to any one of claims 1 to 7, and wherein the photovoltaic cell (110) comprises a grid line (2), wherein the grid line (2) is prepared by the preparation method according to claim 8 or 9; An encapsulation layer (200), used for covering the surface of the battery string (100); A cover plate (300) is used to cover a surface of the packaging layer (200) away from the battery string (100).

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