Manufacturing method of TCO thin film and manufacturing method of heterojunction cell

Abstract

The invention discloses a manufacturing method of a TCO thin film and a manufacturing method of a heterojunction cell, and relates to the technical field of photovoltaics. The manufacturing method of the TCO film comprises the following steps: manufacturing the first transparent conductive layer on the substrate by adopting an atomic layer deposition process, and depositing the second transparent conductive layer on the first transparent conductive layer by adopting a physical vapor deposition process or a rapid plasma deposition process. The atomic layer deposition process is low in reaction temperature and has no damage to the base material. The physical vapor deposition process or the rapid plasma deposition process is carried out on the first transparent conductive layer, even if the process temperature is relatively high and the energy is relatively large, the process cannot directly act on the base material under the isolation action of the first transparent conductive layer, so that the base material is not easy to damage, and the battery performance is ensured. The manufacturing method of the heterojunction battery provided by the embodiment of the invention comprises the step of manufacturing the TCO thin film on the silicon wafer by adopting the manufacturing method of the TCO thin film.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a method for manufacturing a TCO thin film and a method for manufacturing a heterojunction battery. Background Art

[0002] In amorphous silicon thin film heterojunction cells (HJT), the amorphous silicon thin film layer on both sides of the silicon wafer provides a good passivation contact effect, but its overall long-range disordered structure makes the carrier mobility in the layer low, and the battery current cannot be fully collected by the metal electrode. To solve this problem, a thin film that is both conductive and transparent can be used to transport charges. In practice, transparent conductive oxide (TCO) films are commonly used. High-quality TCO films can effectively improve the overall conversion efficiency of HJT cells.

[0003] The most commonly used method for depositing TCO thin films is the physical vapor deposition (PVD) process. Taking the magnetron sputtering process as an example, it uses high-energy particles to bombard the target material. The atoms on the surface of the target material gain energy and escape from the surface and then deposit on the surface of the substrate (semi-finished cell with amorphous silicon coating) to form an oxide film. However, high-energy particles can easily damage the substrate, causing the minority carrier lifetime of the silicon wafer to decrease, which in turn has a negative impact on the conversion efficiency of the heterojunction cell. Summary of the invention

[0004] The purpose of the present application is to provide a method for manufacturing a TCO thin film and a method for manufacturing a heterojunction battery. The method for manufacturing the TCO thin film can reduce damage to the substrate and improve the battery conversion efficiency.

[0005] In order to achieve the above objectives, in a first aspect, the present application provides a method for manufacturing a TCO thin film, comprising:

[0006] A first transparent conductive layer is formed on the substrate by using an atomic layer deposition process;

[0007] The second transparent conductive layer is deposited on the first transparent conductive layer by using a physical vapor deposition process or a rapid plasma deposition process.

[0008] In an optional embodiment, the material of the first transparent conductive layer and the second transparent conductive layer is indium tin oxide, tungsten-doped indium oxide, or tungsten-doped indium tin oxide.

[0009] In an optional embodiment, the materials of the first transparent conductive layer and the second transparent conductive layer are both indium tin oxide, and the step of manufacturing the first transparent conductive layer on the substrate by using an atomic layer deposition process includes:

[0010] A vapor phase indium precursor and a vapor phase tin precursor are alternately used with an oxidant for reaction deposition to obtain an alternately stacked indium oxide film and a tin oxide film.

[0011] In an optional embodiment, the step of depositing an indium oxide film by reacting a vapor phase indium precursor with an oxidant comprises:

[0012] Sequentially reacting a vapor phase indium precursor with a first oxidant and a second oxidant to deposit an indium oxide film;

[0013] Wherein, neither the first oxidant nor the second oxidant contains ozone.

[0014] In an optional embodiment, the first oxidant is selected from one of water, hydrogen peroxide, oxygen and oxygen plasma, and the second oxidant is selected from another of water, hydrogen peroxide, oxygen and oxygen plasma.

[0015] In an optional embodiment, the step of using atomic layer deposition of tin oxide film includes:

[0016] A vapor phase tin precursor is reacted with a third oxidant to deposit a tin oxide film, wherein the third oxidant is selected from one or more of water, hydrogen peroxide, oxygen, ozone and oxygen plasma.

[0017] In an optional embodiment, the reaction temperature for depositing the indium oxide film and the tin oxide film is 80-200°C.

[0018] In an optional embodiment, the vapor-phase indium precursor is cyclopentadienyl indium, and the vapor-phase tin precursor is tetrakis(dimethylamino)tin.

[0019] In an optional embodiment, the physical vapor deposition process includes a magnetron sputtering process and / or an evaporation process.

[0020] In a second aspect, the present application provides a method for manufacturing a heterojunction battery, comprising:

[0021] An intrinsic amorphous silicon layer and a doped silicon layer are sequentially formed on the crystalline silicon layer to obtain a silicon wafer;

[0022] Using a doped silicon layer as a substrate, a TCO thin film is manufactured on the doped silicon layer using the method for manufacturing a TCO thin film according to any one of claims 1 to 9;

[0023] Electrodes are fabricated on the TCO film.

[0024] In an optional embodiment, the step of sequentially forming an intrinsic amorphous silicon layer and a doped silicon layer on the crystalline silicon layer includes:

[0025] Depositing a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer on both sides of the crystalline silicon layer, respectively, and depositing a p-type doped silicon layer and an n-type doped silicon layer on the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer, respectively;

[0026] The step of using the atomic layer deposition process to make the first transparent conductive layer on the substrate includes: using the atomic layer deposition process to simultaneously make the first transparent conductive layer on the p-type doped silicon layer and the n-type doped silicon layer.

[0027] In an optional embodiment, the method for manufacturing a heterojunction battery further includes:

[0028] The first transparent conductive layer deposited on the sides of the crystalline silicon layer, the intrinsic amorphous silicon layer and the doped silicon layer is removed.

[0029] In an optional embodiment, the thickness of the first transparent conductive layer is 10-15 nm, and the thickness of the second transparent conductive layer is 80-95 nm.

[0030] Through the above technical scheme, the first transparent conductive layer is firstly prepared on the substrate by the atomic layer deposition process, and then the second transparent conductive layer is deposited on the first transparent conductive layer by the physical vapor deposition process or the rapid plasma deposition process. Since the atomic layer deposition process is a method of depositing an ultra-thin, uniform, pinhole-free dense layer by using a surface-controlled gas phase precursor, the reaction temperature is low and the substrate is not damaged. The physical vapor deposition process or the rapid plasma deposition process performed thereafter is performed on the first transparent conductive layer. Even if the process temperature is relatively higher and the energy is relatively large, it will not directly act on the substrate under the isolation effect of the first transparent conductive layer, so it is not easy to cause damage to the substrate, thereby ensuring the battery performance. The first transparent conductive layer and the second transparent conductive layer obtained together form a TCO film, which can play a conductive and light-transmitting role in the battery. Therefore, the method for preparing the TCO film provided in the embodiment of the present application can effectively protect the substrate from being damaged by high-energy particles, thereby ensuring the performance of the solar cell. In addition, the atomic layer deposition process can simultaneously deposit the first transparent conductive layer on both sides of the substrate, which can improve the process efficiency compared to the single-sided deposition process.

[0031] The method for manufacturing a heterojunction battery provided in an embodiment of the present application includes using the above-mentioned method for manufacturing a TCO thin film to manufacture a TCO thin film on a doped silicon layer.

[0032] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1This is a flow chart of a method for manufacturing a TCO thin film in one embodiment of the present application;

[0035] Figure 2 This is a schematic diagram of a heterojunction battery in one embodiment of the present application;

[0036] Figure 3 This is a flow chart of a method for manufacturing a heterojunction battery in one embodiment of the present application.

[0037] Icon: 100 - crystalline silicon layer; 200 - first intrinsic amorphous silicon layer; 300 - second intrinsic amorphous silicon layer; 400 - p-type doped silicon layer; 500 - n-type doped silicon layer; 601 - first TCO film; 610 - first transparent conductive layer; 620 - second transparent conductive layer; 602 - second TCO film; 700 - first electrode; 800 - second electrode. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0039] In the description of this application, it should be noted that the terms "inside", "outside", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the application is usually placed when in use, which is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0040] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0041] The TCO thin film of the heterojunction battery in the related technology is made by physical vapor deposition (PVD) process, such as magnetron sputtering process under this process category. The basic principle of this process is that under the action of electromagnetic field, the accelerated gas high-energy particles (Ar +) bombards the coating target, and the atoms on the target surface gain energy and escape from the surface and then deposit on the substrate (semi-finished cell with amorphous silicon coating) to form an oxide film. In the process of growing the transparent conductive layer by magnetron sputtering, high-load particles will cause certain damage to the amorphous silicon (or microcrystalline silicon) substrate. On the one hand, the O generated in the process of sputtering TCO materials such as indium tin oxide and zinc oxide - On the one hand, the oxidation of the substrate; on the other hand, the energetic particles and rays in the process have an impact on the lattice. The specific manifestations are: the minority carrier lifetime of single crystal silicon is reduced, the conductivity of microcrystalline / amorphous silicon film is deteriorated, the transmittance curve is shifted, and the crystallization rate changes. These damages will increase the defects of the emission layer, reduce the minority carrier lifetime of the silicon wafer, and thus have a negative impact on the conversion efficiency of the heterojunction battery.

[0042] To this end, the present application provides a method for manufacturing a TCO thin film, firstly using an atomic layer deposition process to manufacture a first transparent conductive layer on a substrate, and then depositing a second transparent conductive layer on the first transparent conductive layer by a physical vapor deposition process or a rapid plasma deposition process, thereby reducing the damage to the substrate during the TCO thin film manufacturing process. The present application also provides a method for manufacturing a heterojunction battery, sampling the above-mentioned TCO thin film manufacturing method to manufacture a TCO thin film on a doped silicon layer.

[0043] Figure 1 FIG. 1 is a flow chart of a method for making a TCO thin film in one embodiment of the present application. Figure 1 As shown, the method for preparing the TCO film includes the following steps:

[0044] Step S210 , forming a first transparent conductive layer on a substrate by using an atomic layer deposition process.

[0045] The first transparent conductive layer is formed by using an atomic layer deposition process with a low reaction temperature and energy to directly contact the substrate (such as a doped silicon layer), which is not easy to damage the substrate. In addition, the formed first transparent conductive layer can protect the substrate and prevent subsequent high temperature and high energy processes from damaging the substrate.

[0046] Taking the preparation of a TCO film made of indium tin oxide as an example, specifically, step S210 may include: alternately using a vapor phase indium precursor and a vapor phase tin precursor to react and deposit with an oxidant to obtain an alternately stacked indium oxide film and a tin oxide film. The obtained alternately stacked indium oxide film and tin oxide film is the first transparent conductive layer.

[0047] In this embodiment, step S210 is completed by an atomic layer deposition device, and the deposition process is performed in a reaction chamber of the atomic layer deposition device.

[0048] The step of using a vapor phase indium precursor to react with an oxidant to deposit an indium oxide film comprises: reacting the vapor phase indium precursor with a first oxidant and a second oxidant in sequence to deposit an indium oxide film. Specifically, the deposition method of the indium oxide film is as follows:

[0049] The reaction temperature of the reaction chamber is controlled at 80-200°C, and the pressure is controlled at 0.2-10 mbar. A gaseous indium precursor is introduced, and then an inert gas (such as nitrogen or argon) is introduced to purge the residual chemical source; secondly, a first oxidant is introduced, and then an inert gas is introduced for purging; finally, a second oxidant is introduced. Then an inert gas is introduced for purging to complete a sub-cycle of deposition of the indium oxide film. Different numbers of sub-cycles can be deposited according to actual conditions to obtain an indium oxide film of a certain thickness. The number of sub-cycles of each indium oxide film during the deposition process can be 1 to 30.

[0050] Specifically, the first oxidant is selected from one of water, hydrogen peroxide, oxygen and oxygen plasma, and the second oxidant is selected from another of water, hydrogen peroxide, oxygen and oxygen plasma. For example, the first oxidant is selected as deionized water, and the second oxidant is selected as oxygen; in other embodiments, the first oxidant and the second oxidant can be interchanged, or other oxidant types can be selected. The gas phase indium precursor can be selected as cyclopentadiene indium.

[0051] Considering that ozone will reduce the oxygen vacancies of the indium oxide film, therefore, optionally, both the first oxidant and the second oxidant do not contain ozone. Specifically, the use of ozone has the following disadvantages: 1) the reaction temperature needs to be above 250°C, which is significantly higher than that of the first oxidant and the second oxidant; 2) the resistivity of the indium oxide film produced is high; 3) the uniformity of the indium oxide film produced using ozone as an oxidant is worse.

[0052] The step of using atomic layer deposition to deposit a tin oxide film includes: reacting a third oxidant with a vapor phase tin precursor to deposit a tin oxide film. Specifically, the deposition method of the tin oxide film is as follows:

[0053] The reaction temperature of the reaction chamber is controlled at 80-200°C, and the pressure is controlled at 0.2-10 mbar. A vapor phase tin precursor is introduced, and then an inert gas (such as nitrogen or argon) is introduced to purge the residual chemical source; then a third oxidant is introduced; and finally an inert gas is introduced for purging to complete a sub-cycle of deposition of the tin oxide film. Different numbers of sub-cycles can be deposited according to actual conditions to obtain a tin oxide film of a certain thickness. The number of sub-cycles in the deposition process of each tin oxide film can be 1-20.

[0054] Optionally, the third oxidant is selected from one of water, hydrogen peroxide, oxygen, ozone and oxygen plasma. The vapor phase tin precursor may be tetrakis(dimethylamino)tin.

[0055] In an embodiment of the present application, the ratio of indium and tin elements in the first transparent conductive layer can be controlled by the number of sub-cycles in the indium oxide thin film deposition step and the number of sub-cycles in the tin oxide thin film deposition step. The more sub-cycles there are, the greater the corresponding film thickness and the greater the amount of the corresponding element; the fewer sub-cycles there are, the thinner the corresponding film thickness and the less the amount of the corresponding element. For example, when it is necessary to increase the ratio of indium to tin, the number of sub-cycles in the indium oxide thin film deposition step can be increased, and / or the number of sub-cycles in the tin oxide thin film deposition step can be reduced.

[0056] In the embodiment of the present application, the step of depositing an indium oxide film and the step of depositing a tin oxide film can be performed alternately for multiple times, so that an indium oxide film and a tin oxide film that are alternately stacked can be formed, that is, a first transparent conductive layer of an indium tin oxide material. The number of alternating depositions can be 1 to 30 times, wherein alternating deposition once means depositing a layer of indium oxide film and then depositing a layer of tin oxide film; it should be understood that depositing a layer of indium oxide film and depositing a layer of tin oxide film can include one or more sub-cycles.

[0057] Step S220 , depositing a second transparent conductive layer on the first transparent conductive layer by using a physical vapor deposition process or a rapid plasma deposition process.

[0058] In an embodiment of the present application, the physical vapor deposition process includes a magnetron sputtering process and / or an evaporation process. In an optional embodiment, the second transparent conductive layer is prepared by magnetron sputtering, and the sputtering target is an ITO target. Optionally, the mass ratio of In2O3 and SnO2 in the ITO target is 85:15 to 99:1, for example, the mass ratio of In2O3 and SnO2 is 97:3 or 90:10. The sputtering power can be selected as 1 to 3KW; the temperature of the first transparent conductive layer is 25 to 200°C, and the vacuum chamber pressure is 0.2 to 0.6Pa; the oxygen partial pressure accounts for 0.25 to 1.5%. Optionally, the thickness of the second transparent conductive layer is 70 to 100nm; further, the thickness of the second transparent conductive layer can be selected as 80 to 95nm.

[0059] In the embodiment of the present application, by setting the thickness of the first transparent conductive layer to 10-15 nm and the thickness of the second transparent conductive layer to 80-95 nm, the thickness of the film deposited by the atomic layer deposition process can be reduced, thereby reducing the process cost. The first transparent conductive layer of 10-15 nm is sufficient to protect the substrate and prevent subsequent physical vapor deposition or rapid plasma deposition from damaging the substrate.

[0060] The method for manufacturing the TCO thin film provided in the above embodiments of the present application can be applied to manufacturing the TCO thin film of a heterojunction battery. Figure 2Schematic diagram of a heterojunction battery in one embodiment of the present application. Figure 2 As shown, the heterojunction cell provided in the embodiment of the present application is specifically a silicon heterojunction cell, which includes a crystalline silicon layer 100, an intrinsic amorphous silicon layer, a doped silicon layer, a TCO film, and an electrode. Further, the intrinsic amorphous silicon layer includes a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 respectively disposed on two opposite sides of the crystalline silicon layer 100. The doped silicon layer includes a p-type doped silicon layer 400 and an n-type doped silicon layer 500, wherein the p-type doped silicon layer 400 is disposed on a side of the first intrinsic amorphous silicon layer 200 away from the crystalline silicon layer 100, and the n-type doped silicon layer 500 is disposed on a side of the second intrinsic amorphous silicon layer 300 away from the crystalline silicon layer 100. The TCO film includes a first TCO film 601 and a second TCO film 602. The first TCO film 601 is disposed on a side of the p-type doped silicon layer 400 away from the first intrinsic amorphous silicon layer 200, and the second TCO film 602 is disposed on a side of the n-type doped silicon layer 500 away from the second intrinsic amorphous silicon layer 300. The electrode includes a first electrode 700 disposed on the first TCO film 601 and a second electrode 800 disposed on the second TCO film 602. It can be seen that the heterojunction cell of this embodiment can be exposed to light from both sides.

[0061] At least one of the first TCO film 601 and the second TCO film 602 includes a first transparent conductive layer 610 and a second transparent conductive layer 620 stacked, wherein the first transparent conductive layer 610 is connected to the doped silicon layer, and the second transparent conductive layer 620 is connected to the electrode. Figure 1 In the embodiment, the first TCO film 601 and the second TCO film 602 both include a first transparent conductive layer 610 and a second transparent conductive layer 620 .

[0062] In this embodiment, the first transparent conductive layer 610 is prepared by an atomic layer deposition (ALD) process, and the second transparent conductive layer 620 is prepared by a physical vapor deposition (PVD) or a rapid plasma deposition (RPD) process, that is, the first TCO film 601 and the second TCO film 602 are both prepared by the TCO film manufacturing method provided in the above embodiment of the present application. Optionally, the thickness of the first transparent conductive layer 610 is 5 to 35 nm, and further, it can be selected as 10 to 15 nm; the thickness of the second transparent conductive layer 620 can be selected as 70 to 100 nm, and further, it can be selected as 80 to 95 nm. It should be understood that the thickness of the above-mentioned first transparent conductive layer 610 refers to the thickness of a single-layer first transparent conductive layer 610, rather than the sum of the thicknesses of the two first transparent conductive layers 610 in the first TCO film 601 and the second TCO film 602; the thickness of the above-mentioned second transparent conductive layer 620 should also be understood in the same way. By setting a thinner first transparent conductive layer 610, the process cost brought by the atomic layer deposition process itself can be reduced. And the thickness range of the first transparent conductive layer 610 provided in the above embodiment of the present application is also sufficient to protect the substrate and avoid damage to the substrate by subsequent physical vapor deposition process or rapid plasma deposition process. It should be understood that damage to the substrate (specifically the doped silicon layer) will increase the number of surface recombination centers, which will cause the photogenerated carriers to recombine before reaching the electrode, reducing the short-circuit current (Jsc) and open-circuit voltage (Voc) of the battery. By reducing substrate damage, surface recombination can be reduced, the survival rate of carriers can be increased, and thus the battery efficiency can be improved. In addition, substrate damage may also affect the contact quality between the TCO film and the substrate, resulting in an increase in contact resistance and affecting the fill factor of the battery. Reducing damage can ensure good electrical contact, reduce contact resistance, and improve battery efficiency.

[0063] In this embodiment, the crystalline silicon layer 100 may be n-type crystalline silicon, and the doped silicon layer may be amorphous silicon or microcrystalline silicon. The first TCO film 601 and the second TCO film 602 may be symmetrically arranged, that is, the material, process, and size are the same; or the first TCO film 601 and the second TCO film 602 may use different materials, processes, and structures.

[0064] Figure 3 This is a flow chart of a method for manufacturing a heterojunction battery in one embodiment of the present application, which can be used to manufacture the above-mentioned heterojunction battery. Figure 3 As shown, the method for manufacturing a heterojunction battery provided in an embodiment of the present application comprises the following steps:

[0065] Step S100 , sequentially forming an intrinsic amorphous silicon layer and a doped silicon layer on the crystalline silicon layer 100 .

[0066] To produce Figure 1Taking the heterojunction battery provided in the embodiment as an example, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 can be first deposited on the crystalline silicon layer 100, and then a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited. The specific deposition process of the above layers can adopt plasma enhanced chemical vapor deposition (PECVD).

[0067] Optionally, before depositing the first intrinsic amorphous silicon layer 200 and the second intrinsic amorphous silicon layer 300, both sides of the crystalline silicon layer 100 may be textured with an alkaline solution. The textured surface may improve light capture efficiency, reduce surface recombination, and thus improve battery performance.

[0068] Step S200, forming a TCO film on the doped silicon layer.

[0069] Specifically, the doped silicon layer may be used as a substrate to manufacture a TCO thin film through the above steps S210 and S220.

[0070] To produce Figure 1 Taking the heterojunction cell provided in the embodiment as an example, the first transparent conductive layer 610 is specifically manufactured on the p-type doped silicon layer 400 and / or the n-type doped silicon layer 500 by an atomic layer deposition process. The first transparent conductive layer 610 is formed by an atomic layer deposition process with a relatively low reaction temperature and energy so as to be in direct contact with the doped silicon layer, and it is not easy to damage the doped silicon layer. Moreover, the formed first transparent conductive layer 610 can protect the composite silicon wafer structure (including the doped silicon layer, the intrinsic amorphous silicon layer, and the crystalline silicon layer 100), and prevent the subsequent high temperature and high energy processes from damaging the composite silicon wafer structure. After the first transparent conductive layer is deposited by the atomic layer deposition process, the first transparent conductive layer not only covers the p-type doped silicon layer 400 and the n-type doped silicon layer 500, but also covers the side of the doped silicon layer, the intrinsic amorphous silicon layer, and the crystalline silicon layer 100. Therefore, after the atomic layer deposition process is used, the first transparent conductive layer deposited on the side of the crystalline silicon layer 100, the intrinsic amorphous silicon layer, and the doped silicon layer needs to be removed, so as to retain the first transparent conductive layer 610 stacked on the p-type doped silicon layer 400 and the n-type doped silicon layer 500. The method of removing the first transparent conductive layer deposited on the side can be laser removal, wet etching, or dry etching.

[0071] Subsequently, a second transparent conductive layer 620 is deposited on the two first transparent conductive layers 610 by using a physical vapor deposition process or a rapid plasma deposition process.

[0072] In this embodiment, the first transparent conductive layer 610 can be deposited on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 simultaneously, so as to simultaneously manufacture the first transparent conductive layer 610 in the first TCO film 601 and the second TCO film 602, thereby improving process efficiency.

[0073] Step S300: manufacturing electrodes on the TCO film.

[0074] In the embodiment of the present application, the first electrode 700 and the second electrode 800 can be prepared on the first TCO film 601 and the second TCO film 602 respectively by screen printing, electroplating, vacuum evaporation and the like. Figure 2 The heterojunction battery shown. The manufacturing method of the heterojunction battery provided in the embodiment of the present application adopts the above-mentioned manufacturing method of the TCO thin film to manufacture the TCO thin film, so the composite silicon wafer structure is less damaged and has better battery performance.

[0075] It should be understood that the method for manufacturing the TCO thin film provided in the above embodiments of the present application is not limited to manufacturing the TCO thin film of heterojunction cells, but can also be applied to the manufacturing of film structures of other types of solar cells.

[0076] The following is an introduction to the method for manufacturing the heterojunction battery provided by the present application in combination with a number of specific embodiments.

[0077] Example 1

[0078] The crystalline silicon layer is cleaned, and double-sided texturing is performed using an alkaline solution. Then, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 are deposited on the crystalline silicon layer 100 using plasma enhanced chemical vapor deposition (PECVD). Then, a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited to obtain a composite silicon wafer structure.

[0079] The composite silicon wafer structure is placed in an atomic layer deposition device, and the reaction temperature is controlled to be 80°C and the pressure is 0.2mbar. First, cyclopentadiene indium (temperature 40°C, injection time 2s, flow rate 500sccm) is introduced as a gas phase indium precursor, and then argon gas is introduced to purge the residual chemical source (purge time 15s). Secondly, deionized water (room temperature, injection time 2s, flow rate 500sccm) is introduced as the first oxidant, and then argon gas is introduced to purge (purge time 15s). Finally, oxygen (room temperature, injection time 2s, flow rate 500sccm) is introduced as the second oxidant, and then an inert gas is introduced to purge (purge time 15s) to complete the deposition of a sub-cycle of indium oxide film. 19 sub-cycles are performed in this way to obtain a layer of indium oxide film.

[0080] The reaction temperature was maintained at 80°C and the pressure was 0.2 mbar. Tetrakis(dimethylamino)tin (temperature 70°C, injection time 1s, flow rate 500sccm) was introduced as a gas phase tin precursor, followed by argon gas to purge the residual chemical source (purge time 15s). Deionized water (room temperature, injection time 2s, flow rate 500sccm) was then introduced as the third oxidant, and finally argon gas was purged (purge time 15s), thereby completing a sub-cycle of deposition of a tin oxide film on the indium oxide film. One sub-cycle was performed in this way to obtain a layer of tin oxide film.

[0081] Indium oxide thin films and tin oxide thin films are alternately deposited in the above manner for 16 times, and finally a first transparent conductive layer covering the surface of the composite silicon wafer structure is obtained. The first transparent conductive layer on the side of the composite silicon wafer structure is removed by etching, and the first transparent conductive layer located on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 is retained.

[0082] The second transparent conductive layer is made on the first transparent conductive layer by magnetron sputtering process. The sputtering target is ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 97:3, the sputtering power is 3KW, and the temperature of the first transparent conductive layer is 25°C. Thus, the first TCO film 601 and the second TCO film 602 are obtained.

[0083] The first electrode 700 and the second electrode 800 are respectively prepared on the first TCO film 601 and the second TCO film 602 by screen printing, and finally a heterojunction battery is obtained.

[0084] Example 2

[0085] The crystalline silicon layer is cleaned, and double-sided texturing is performed using an alkaline solution. Then, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 are deposited on the crystalline silicon layer 100 using plasma enhanced chemical vapor deposition (PECVD). Then, a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited to obtain a composite silicon wafer structure.

[0086] Place the composite silicon wafer structure in an atomic layer deposition device, control the reaction temperature to 100°C and the pressure to 1 mbar. First, introduce indium cyclopentadiene as a gas phase indium precursor (temperature 40°C, injection time 2s, flow rate 500sccm), and then introduce argon to purge the residual chemical source (purge time 15s). Secondly, introduce deionized water as the first oxidant (room temperature, injection time 2s, flow rate 500sccm), and then introduce argon to purge (purge time 15s). Finally, introduce oxygen as the second oxidant (room temperature, injection time 2s, flow rate 500sccm), and then introduce inert gas to purge (purge time 15s) to complete the deposition of a sub-cycle of indium oxide film. Perform 19 sub-cycles in this way to obtain a layer of indium oxide film.

[0087] The reaction temperature was maintained at 100°C and the pressure was 1 mbar. Tetrakis(dimethylamino)tin (temperature 70°C, injection time 1s, flow rate 500sccm) was introduced as a gas phase tin precursor, followed by argon gas to purge the residual chemical source (purge time 15s). Deionized water (room temperature, injection time 2s, flow rate 500sccm) was then introduced as the third oxidant, and finally argon gas was purged (purge time 15s), thereby completing a sub-cycle of deposition of a tin oxide film on the indium oxide film. This was repeated for three sub-cycles to obtain a layer of tin oxide film.

[0088] Indium oxide thin films and tin oxide thin films are alternately deposited in the above manner for 15 times, and finally a first transparent conductive layer covering the surface of the composite silicon wafer structure is obtained. The first transparent conductive layer on the side of the composite silicon wafer structure is removed by etching, and the first transparent conductive layer located on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 is retained.

[0089] The second transparent conductive layer is made on the first transparent conductive layer by magnetron sputtering process. The sputtering target is ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 90:10, the sputtering power is 3KW, and the temperature of the first transparent conductive layer is 25°C. Thus, the first TCO film 601 and the second TCO film 602 are obtained.

[0090] The first electrode 700 and the second electrode 800 are respectively prepared on the first TCO film 601 and the second TCO film 602 by electroplating, and finally a heterojunction battery is obtained.

[0091] Example 3

[0092] The crystalline silicon layer is cleaned, and double-sided texturing is performed using an alkaline solution. Then, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 are deposited on the crystalline silicon layer 100 using plasma enhanced chemical vapor deposition (PECVD). Then, a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited to obtain a composite silicon wafer structure.

[0093] The composite silicon wafer structure is placed in an atomic layer deposition device, and the reaction temperature is controlled to be 120°C and the pressure is 2mbar. First, cyclopentadiene indium (temperature 40°C, injection time 2s, flow rate 500sccm) is introduced as a gas phase indium precursor, and then argon gas is introduced to purge the residual chemical source (purge time 15s). Secondly, deionized water (room temperature, injection time 2s, flow rate 500sccm) is introduced as the first oxidant, and then argon gas is introduced to purge (purge time 15s). Finally, oxygen (room temperature, injection time 2s, flow rate 500sccm) is introduced as the second oxidant, and then an inert gas is introduced to purge (purge time 15s) to complete the deposition of a sub-cycle of indium oxide film. 19 sub-cycles are performed in this way to obtain a layer of indium oxide film.

[0094] The reaction temperature was maintained at 120°C and the pressure was 2 mbar. Tetrakis(dimethylamino)tin (temperature 70°C, injection time 1s, flow rate 500sccm) was introduced as a gas phase tin precursor, followed by argon gas to purge the residual chemical source (purge time 15s). Deionized water (room temperature, injection time 2s, flow rate 500sccm) was then introduced as the third oxidant, and finally argon gas was purged (purge time 15s), thereby completing a sub-cycle of deposition of a tin oxide film on the indium oxide film. This was repeated for 5 sub-cycles to obtain a layer of tin oxide film.

[0095] Indium oxide thin films and tin oxide thin films are alternately deposited in the above manner for 14 times, and finally a first transparent conductive layer covering the surface of the composite silicon wafer structure is obtained. The first transparent conductive layer on the side of the composite silicon wafer structure is removed by etching, and the first transparent conductive layer located on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 is retained.

[0096] The second transparent conductive layer is made on the first transparent conductive layer by magnetron sputtering process. The sputtering target is ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 97:3, the sputtering power is 3KW, and the temperature of the first transparent conductive layer is 25°C. Thus, the first TCO film 601 and the second TCO film 602 are obtained.

[0097] The first electrode 700 and the second electrode 800 are respectively prepared on the first TCO film 601 and the second TCO film 602 by vacuum evaporation, and finally a heterojunction battery is obtained.

[0098] Example 4

[0099] The crystalline silicon layer is cleaned, and double-sided texturing is performed using an alkaline solution. Then, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 are deposited on the crystalline silicon layer 100 using plasma enhanced chemical vapor deposition (PECVD). Then, a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited to obtain a composite silicon wafer structure.

[0100] The composite silicon wafer structure is placed in an atomic layer deposition device, and the reaction temperature is controlled to be 150°C and the pressure is 5mbar. First, cyclopentadiene indium (temperature 40°C, injection time 2s, flow rate 500sccm) is introduced as a gas phase indium precursor, and then argon gas is introduced to purge the residual chemical source (purge time 15s). Secondly, oxygen as the first oxidant is introduced (room temperature, injection time 2s, flow rate 500sccm), and then argon gas is introduced to purge (purge time 15s). Finally, hydrogen peroxide as the second oxidant is introduced (room temperature, injection time 2s, flow rate 500sccm), and then an inert gas is introduced to purge (purge time 15s) to complete the deposition of a sub-cycle of indium oxide film. 15 sub-cycles are performed in this way to obtain a layer of indium oxide film.

[0101] The reaction temperature was maintained at 150°C and the pressure was 5 mbar. Tetrakis(dimethylamino)tin (temperature 70°C, injection time 1s, flow rate 500sccm) was introduced as a gas phase tin precursor, followed by argon gas to purge the residual chemical source (purge time 15s). Then ozone (room temperature, injection time 2s, flow rate 500sccm) was introduced as the third oxidant, and finally argon gas was purged (purge time 15s), thereby completing a sub-cycle of deposition of a tin oxide film on the indium oxide film. This was repeated for 5 sub-cycles to obtain a layer of tin oxide film.

[0102] Indium oxide thin films and tin oxide thin films are alternately deposited in the above manner for 15 times, and finally a first transparent conductive layer covering the surface of the composite silicon wafer structure is obtained. The first transparent conductive layer on the side of the composite silicon wafer structure is removed by etching, and the first transparent conductive layer located on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 is retained.

[0103] The second transparent conductive layer is made on the first transparent conductive layer by magnetron sputtering process. The sputtering target is ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 97:3, the sputtering power is 3KW, and the temperature of the first transparent conductive layer is 25°C. Thus, the first TCO film 601 and the second TCO film 602 are obtained.

[0104] The first electrode 700 and the second electrode 800 are respectively prepared on the first TCO film 601 and the second TCO film 602 by vacuum evaporation, and finally a heterojunction battery is obtained.

[0105] Example 5

[0106] The crystalline silicon layer is cleaned, and double-sided texturing is performed using an alkaline solution. Then, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 are deposited on the crystalline silicon layer 100 using plasma enhanced chemical vapor deposition (PECVD). Then, a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited to obtain a composite silicon wafer structure.

[0107] The composite silicon wafer structure is placed in an atomic layer deposition device, and the reaction temperature is controlled to be 200°C and the pressure is 10mbar. First, cyclopentadiene indium (temperature 40°C, injection time 2s, flow rate 500sccm) is introduced as a gas phase indium precursor, and then argon gas is introduced to purge the residual chemical source (purge time 15s). Secondly, deionized water (room temperature, injection time 2s, flow rate 500sccm) is introduced as the first oxidant, and then argon gas is introduced to purge (purge time 15s). Finally, oxygen plasma (room temperature, injection time 2s, flow rate 500sccm) is introduced as the second oxidant, and then an inert gas purge (purge time 15s) is introduced to complete a sub-cycle of the deposition of the indium oxide film. 12 sub-cycles are performed in this way to obtain a layer of indium oxide film.

[0108] The reaction temperature was maintained at 200°C and the pressure was 10 mbar. Tetrakis(dimethylamino)tin was introduced as a gas phase tin precursor (temperature 70°C, injection time 1s, flow rate 500sccm), followed by argon gas to purge the residual chemical source (purge time 15s). Then oxygen was introduced as the third oxidant (room temperature, injection time 2s, flow rate 500sccm), and finally argon gas was introduced to purge (purge time 15s), thereby completing a sub-cycle of deposition of a tin oxide film on the indium oxide film. Two sub-cycles were performed in this way to obtain a layer of tin oxide film.

[0109] Indium oxide thin films and tin oxide thin films are alternately deposited in the above manner for 20 times, and finally a first transparent conductive layer covering the surface of the composite silicon wafer structure is obtained. The first transparent conductive layer on the side of the composite silicon wafer structure is removed by etching, and the first transparent conductive layer located on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 is retained.

[0110] The second transparent conductive layer is made on the first transparent conductive layer by magnetron sputtering process. The sputtering target is ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 97:3, the sputtering power is 3KW, and the temperature of the first transparent conductive layer is 25°C. Thus, the first TCO film 601 and the second TCO film 602 are obtained.

[0111] The first electrode 700 and the second electrode 800 are respectively prepared on the first TCO film 601 and the second TCO film 602 by electroplating, and finally a heterojunction battery is obtained.

[0112] Example 6

[0113] The crystalline silicon layer is cleaned, and double-sided texturing is performed using an alkaline solution. Then, a first intrinsic amorphous silicon layer 200 and a second intrinsic amorphous silicon layer 300 are deposited on the crystalline silicon layer 100 using plasma enhanced chemical vapor deposition (PECVD). Then, a p-type doped silicon layer 400 and an n-type doped silicon layer 500 are deposited to obtain a composite silicon wafer structure.

[0114] The composite silicon wafer structure is placed in an atomic layer deposition device, and the reaction temperature is controlled to be 250°C and the pressure is 0.2mbar. First, cyclopentadiene indium (temperature 40°C, injection time 2s, flow rate 500sccm) is introduced as a gas phase indium precursor, and then argon gas is introduced to purge the residual chemical source (purge time 15s). Secondly, ozone (room temperature, injection time 2s, flow rate 500sccm) is introduced, and then argon gas is introduced to purge (purge time 15s) to complete the deposition of a sub-cycle of indium oxide film. 19 sub-cycles are performed in this way to obtain a layer of indium oxide film.

[0115] The reaction temperature was maintained at 80°C and the pressure was 0.2 mbar. Tetrakis(dimethylamino)tin (temperature 70°C, injection time 1s, flow rate 500sccm) was introduced as a gas phase tin precursor, followed by argon gas to purge the residual chemical source (purge time 15s). Deionized water (room temperature, injection time 2s, flow rate 500sccm) was then introduced as the third oxidant, and finally argon gas was purged (purge time 15s), thereby completing a sub-cycle of deposition of a tin oxide film on the indium oxide film. One sub-cycle was performed in this way to obtain a layer of tin oxide film.

[0116] Indium oxide thin films and tin oxide thin films are alternately deposited in the above manner for 16 times, and finally a first transparent conductive layer covering the surface of the composite silicon wafer structure is obtained. The first transparent conductive layer on the side of the composite silicon wafer structure is removed by etching, and the first transparent conductive layer located on the p-type doped silicon layer 400 and the n-type doped silicon layer 500 is retained.

[0117] The second transparent conductive layer is made on the first transparent conductive layer by magnetron sputtering process. The sputtering target is ITO target, the mass ratio of In2O3 and SnO2 in the ITO target is 97:3, the sputtering power is 3KW, and the temperature of the first transparent conductive layer is 25°C. Thus, the first TCO film 601 and the second TCO film 602 are obtained.

[0118] The first electrode 700 and the second electrode 800 are respectively prepared on the first TCO film 601 and the second TCO film 602 by screen printing, and finally a heterojunction battery is obtained.

[0119] The first transparent conductive layer of Example 1 was tested by X-ray photoelectron spectroscopy. The results are shown in Table 1.

[0120] Table 1:

[0121]

[0122] It can be seen that the first transparent conductive layer deposited by the process of Example 1 is an indium tin oxide film.

[0123] Table 2 is a comparison of the relevant process parameters and performances of the indium oxide thin films made in different ways in Examples 1 to 3 and Example 6 of the present application.

[0124] Table 2:

[0125]

[0126] As shown in Table 1, ozone needs to react at a temperature above 250°, while the temperature of oxygen and water as oxygen sources will be reduced. And the ozone deposited film has a lower carrier concentration and a higher resistivity. This is because ozone has a strong oxidizing ability and there are few oxygen vacancies in the film layer, resulting in a low carrier concentration and a high resistivity. This means that ozone will reduce the oxygen vacancies in the first transparent conductive layer and increase the resistivity of the film layer, while oxygen and water as oxygen sources will not. In addition, it can be seen from Table 1 that at a lower process temperature, the quality of the first transparent conductive layer is higher, which is manifested as a lower resistivity, a higher carrier mobility and a carrier body concentration. Therefore, ozone is not selected as an oxygen source in some embodiments of the present application.

[0127] The following two test examples are used to compare the conductive properties of a TCO film deposited by atomic layer deposition and magnetron sputtering in sequence with that of a TCO film deposited by a single magnetron sputtering process.

[0128] Test Example 1

[0129] ALD equipment is used for coating, with a process temperature of 80°C and a vacuum chamber pressure of 1 mbar, to deposit a first transparent conductive layer with a thickness of 10 nm on the silicon oxide substrate.

[0130] PVD equipment is used for coating. The sputtering target is an ITO target with a mass ratio of In2O3 and SnO2 of 9:1. The sputtering power is 3KW, the substrate temperature is room temperature, the vacuum chamber pressure is 0.6Pa, the oxygen partial pressure is 1.5%, and a second transparent conductive layer with a thickness of 80nm is deposited on the silicon oxide substrate.

[0131] Test Example 2

[0132] PVD equipment was used for coating. The sputtering target was an ITO target with a mass ratio of In2O3 and SnO2 of 9:1. The sputtering power was 3KW, the substrate temperature was room temperature, the vacuum chamber pressure was 0.6Pa, the oxygen partial pressure was 1.5%, and a TCO film with a thickness of 90nm was deposited on the silicon oxide substrate.

[0133] The thickness of the TCO films prepared in the above-mentioned test examples 1 and 2 is 90 nm, and the square resistance of the TCO films obtained in test examples 1 and 2 is tested. Among them, the square resistance of the TCO film composed of the first transparent conductive layer and the second transparent conductive layer in test example 1 is 76Ω, and the square resistance of the TCO film prepared in test example 2 is 78Ω.

[0134] It can be seen that replacing part of the physical vapor deposition process with the atomic layer deposition process will not sacrifice the conductive properties of the TCO film.

[0135] In summary, the embodiment of the present application provides a method for manufacturing a TCO film, including using an atomic layer deposition process to manufacture a first transparent conductive layer 610 on a substrate, and then using a physical vapor deposition process or a rapid plasma deposition process to deposit a second transparent conductive layer 620 on the first transparent conductive layer 610. Since the atomic layer deposition process is a method for depositing an ultra-thin, uniform, pinhole-free dense layer using a surface-controlled vapor phase precursor, the reaction temperature is low and the substrate (such as a silicon wafer) is not damaged. The physical vapor deposition process or rapid plasma deposition process performed thereafter is performed on the first transparent conductive layer 610. Even if the process temperature is relatively higher and the energy is relatively large, it will not directly act on the substrate under the isolation effect of the first transparent conductive layer 610, so it is not easy to cause damage to the substrate, thereby ensuring the battery performance. The first transparent conductive layer 610 and the second transparent conductive layer 620 obtained together form a TCO film, which can play a conductive and light-transmitting role in the battery. Therefore, the method for manufacturing a TCO film provided in the embodiment of the present application can effectively protect the substrate from being damaged by high-energy particles, thereby ensuring the performance of the solar cell. In addition, the atomic layer deposition process can deposit the first transparent conductive layer 610 on both sides of the substrate at the same time, which has a high process efficiency.

[0136] The method for manufacturing a heterojunction battery provided in an embodiment of the present application includes using the above-mentioned method for manufacturing a TCO thin film to manufacture a TCO thin film on a doped silicon layer.

[0137] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a TCO thin film, characterized in that: include: A first transparent conductive layer is formed on the substrate by using an atomic layer deposition process; A second transparent conductive layer is deposited on the first transparent conductive layer by using a physical vapor deposition process or a rapid plasma deposition process.

2. The method for manufacturing a TCO thin film according to claim 1, characterized in that: The materials of the first transparent conductive layer and the second transparent conductive layer are both indium tin oxide, tungsten-doped indium oxide, or tungsten-doped indium tin oxide.

3. The method for manufacturing a TCO thin film according to claim 2, characterized in that: The first transparent conductive layer and the second transparent conductive layer are both made of indium tin oxide, and the step of fabricating the first transparent conductive layer on the substrate by using an atomic layer deposition process includes: A vapor phase indium precursor and a vapor phase tin precursor are alternately used with an oxidant for reaction deposition to obtain an alternately stacked indium oxide film and a tin oxide film.

4. The method for manufacturing a TCO thin film according to claim 3, characterized in that: The step of using the vapor phase indium precursor to react with the oxidant to deposit the indium oxide film comprises: Sequentially reacting the vapor phase indium precursor with a first oxidant and a second oxidant to deposit the indium oxide film; Wherein, neither the first oxidant nor the second oxidant contains ozone.

5. The method for manufacturing a TCO thin film according to claim 4, characterized in that: The first oxidant is selected from one of water, hydrogen peroxide, oxygen and oxygen plasma, and the second oxidant is selected from another of water, hydrogen peroxide, oxygen and oxygen plasma.

6. The method for manufacturing a TCO thin film according to claim 3, characterized in that: The step of using atomic layer deposition to deposit the tin oxide film comprises: The vapor phase tin precursor is reacted with a third oxidant to deposit the tin oxide film, and the third oxidant is selected from one or more of water, hydrogen peroxide, oxygen, ozone and oxygen plasma.

7. The method for manufacturing a TCO thin film according to claim 3, characterized in that: The reaction temperature for depositing the indium oxide film and the tin oxide film is 80-200°C.

8. The method for manufacturing a TCO thin film according to claim 3, characterized in that: The gas phase indium precursor is cyclopentadienyl indium, and the gas phase tin precursor is tetrakis(dimethylamino)tin.

9. The method for manufacturing a TCO thin film according to claims 1-8, characterized in that: The physical vapor deposition process includes a magnetron sputtering process and / or an evaporation process.

10. A method for manufacturing a heterojunction battery, characterized in that: include: An intrinsic amorphous silicon layer and a doped silicon layer are sequentially formed on the crystalline silicon layer; Taking the doped silicon layer as a substrate, a TCO thin film is manufactured on the doped silicon layer using the method for manufacturing a TCO thin film according to any one of claims 1 to 9; An electrode is fabricated on the TCO film.

11. The method for manufacturing a heterojunction battery according to claim 10, characterized in that: The steps of sequentially forming an intrinsic amorphous silicon layer and a doped silicon layer on a crystalline silicon layer include: Depositing a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer on both sides of the crystalline silicon layer, respectively, and depositing a p-type doped silicon layer and an n-type doped silicon layer on the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer, respectively; The step of using the atomic layer deposition process to form a first transparent conductive layer on the substrate includes: using the atomic layer deposition process to simultaneously form the first transparent conductive layer on the p-type doped silicon layer and the n-type doped silicon layer.

12. The method for manufacturing a heterojunction battery according to claim 11, characterized in that: The method for manufacturing the heterojunction battery also includes: The first transparent conductive layer deposited on the sides of the crystalline silicon layer, the intrinsic amorphous silicon layer and the doped silicon layer is removed.

13. The method for manufacturing a heterojunction battery according to any one of claims 10 to 12, characterized in that: The thickness of the first transparent conductive layer is 5-35 nm, and the thickness of the second transparent conductive layer is 70-100 nm.

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