Solar cell, preparation method thereof and photovoltaic module
By adopting multi-layer gate wire structure and low-priced metal materials in solar cells, the contact performance and transmission performance of gate wire are improved, and the problems of low current collection efficiency and large energy loss in the prior art are solved, thus achieving more efficient Current transmission and cost reduction.
Patent Information
- Application Number
- CN202411335739.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-24
- Publication Date
- 2024-12-27
AI Technical Summary
The prior art is difficult to effectively improve the gate line contact performance and transmission performance in solar cells, resulting in low current collection efficiency and large energy loss.
A structure including connected first sub-gate lines and second sub-gate lines, the first sub-gate lines extending along a surface parallel to the battery substrate, and the second sub-gate lines extending in the cross direction, covering and providing a first sub-gate lines through a protective layer. The second gate line is on the outside of the protective layer, a third sub-gate line with a larger line diameter is added to improve contact performance and transmission performance, and a low-priced metal such as copper or copper alloy and stable metal such as silver or aluminum are used to reduce costs.
It improves the current collection capacity and transmission efficiency of solar cells, reduces energy loss during current transmission, and reduces metallization costs.
Smart Images
Figure CN119208409A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a preparation method thereof, and a photovoltaic module. Background Art
[0002] Solar cells mainly consist of a cell substrate and a grid line. The grid line can collect and converge the photogenerated carriers generated by the cell substrate to form an electric current. At the same time, the grid line is also used for cell performance testing and series welding.
[0003] At present, how to effectively improve the contact performance and transmission performance of the gate line is an urgent problem to be solved in this field. Summary of the invention
[0004] The present application proposes a solar cell and a preparation method thereof, and a photovoltaic module, aiming to improve the contact performance and transmission performance of the grid line.
[0005] In a first aspect, an embodiment of the present application provides a solar cell, the solar cell comprising a cell substrate, a first grid line, a protective layer, and a second grid line, wherein the first grid line is disposed on the surface of the cell substrate, and the first grid line is electrically connected to the cell substrate. The protective layer is disposed on the surface of the cell substrate, and the protective layer covers the first grid line. At least a portion of the second grid line is disposed on a side of the protective layer away from the cell substrate, and the second grid line is electrically connected to the cell substrate and the first grid line.
[0006] Wherein, the first grid line includes a first sub-grid line and a second sub-grid line connected to each other, the first sub-grid line extends along a first direction parallel to the surface of the battery substrate, the second sub-grid line extends along a second direction parallel to the surface of the battery substrate, and the second direction intersects with the first direction. The area of the cross section of the first sub-grid line along the second direction is greater than the area of the cross section of the second sub-grid line along the first direction, that is, the line diameter of the first sub-grid line is greater than the line diameter of the second sub-grid line. The second grid line includes a third sub-grid line, the third sub-grid line extends along the first direction, the area of the cross section of the third sub-grid line along the second direction is greater than the area of the cross section of the second sub-grid line along the first direction, that is, the line diameter of the third sub-grid line is greater than the line diameter of the second sub-grid line.
[0007] In the solar cell provided in the above embodiment, the first grid line includes a first sub-grid line and a second sub-grid line connected to each other, and the second sub-grid line with a smaller wire diameter is used as an auxiliary grid line to collect the current generated by the battery substrate. By adding a first sub-grid line with a larger wire diameter, the first sub-grid line can also collect current, thereby improving the ability of the first grid line to collect current. In addition, by connecting the first sub-grid line with the second sub-grid line, the resistance of the first grid line can be reduced, which is conducive to reducing the energy loss during the transmission of current on the first grid line.
[0008] By covering the first sub-grid line and the second sub-grid line with the protective layer, the protection of the surfaces of the first sub-grid line and the second sub-grid line and the stability of the electrical connection between the first sub-grid line and the second sub-grid line and the battery substrate are improved, thereby improving the contact performance and transmission performance of the first grid line.
[0009] In addition, the second grid line is arranged on the outside of the protective layer, and the second grid line includes a third sub-grid line, and the wire diameter of the third sub-grid line is larger than the wire diameter of the second sub-grid line. The third sub-grid line with a larger wire diameter can be used as a main grid line for performance testing of solar cells or to achieve series welding of multiple solar cells.
[0010] In some embodiments, the orthographic projection of the third sub-gridline on the surface of the battery substrate overlaps at least partially with the orthographic projection of the first sub-gridline on the surface of the battery substrate, which can reduce the total shielding area of the battery substrate by the third sub-gridline and the first sub-gridline, and increase the area of the battery substrate receiving light. In addition, the length of the carrier transmission path between the third sub-gridline and the first sub-gridline is reduced, which is conducive to improving the contact performance and transmission performance of the third sub-gridline and the first sub-gridline.
[0011] In some embodiments, the second gate line further includes a fourth sub-gate line, the fourth sub-gate line is connected to the third sub-gate line, the fourth sub-gate line extends along the second direction, and the area of the cross section of the third sub-gate line along the second direction is greater than the area of the cross section of the fourth sub-gate line along the first direction, that is, the line diameter of the third sub-gate line is greater than the line diameter of the fourth sub-gate line.
[0012] In the above embodiment, a fourth sub-grid line connected to the third sub-grid line is added, the wire diameter of the third sub-grid line is larger than the wire diameter of the fourth sub-grid line, and the fourth sub-grid line can also be used for performance testing of solar cells and series welding between multiple solar cells, which increases the diversity of wiring methods. In addition, by connecting the fourth sub-grid line to the third sub-grid line, the resistance of the second grid line can be reduced, which is conducive to reducing the energy loss of the signal during the transmission of the second grid line.
[0013] In some embodiments, the orthographic projection of the fourth sub-gridline on the surface of the battery substrate overlaps at least partially with the orthographic projection of the second sub-gridline on the surface of the battery substrate, which can reduce the total shielding area of the battery substrate by the fourth sub-gridline and the second sub-gridline, and increase the area of the battery substrate receiving light. In addition, the length of the carrier transmission path between the fourth sub-gridline and the second sub-gridline is reduced, which is conducive to improving the contact performance and transmission performance of the fourth sub-gridline and the second sub-gridline.
[0014] In some embodiments, when the material of the protective layer is a conductive material, the protective layer is located between the second gate line and the first gate line, and between the second gate line and the battery substrate. The second gate line and the first gate line can be connected, and the second gate line and the battery substrate can be connected through the protective layer.
[0015] In some embodiments, when the material of the protective layer is a dielectric material, the protective layer is located between the second gate line and the first gate line and between the second gate line and the battery substrate, and the second gate line passes through the protective layer and is electrically connected to the battery substrate and the first gate line.
[0016] In some embodiments, the battery substrate comprises a first conductive layer, a light absorbing layer, and a second conductive layer stacked in sequence, and the first gate line, the protective layer, and the second gate line are arranged on the surface of the first conductive layer away from the second conductive layer, that is, the first gate line, the protective layer, and the second gate line are arranged on the front side of the battery substrate. Alternatively, the first gate line, the protective layer, and the second gate line are arranged on the surface of the second conductive layer away from the first conductive layer, that is, the first gate line, the protective layer, and the second gate line are arranged on the back side of the battery substrate. Alternatively, the first gate line, the protective layer, and the second gate line can be arranged on the surface of the first conductive layer away from the second conductive layer, and can also be arranged on the surface of the second conductive layer away from the first conductive layer, that is, the first gate line, the protective layer, and the second gate line can be arranged on the front side and the back side of the battery substrate.
[0017] In some embodiments, the material of the first grid line includes copper or copper alloy, which is an easily oxidized metal material. Since the first grid line is covered by the protective layer, the surface of the first grid line is protected, thereby avoiding the problem of oxidation failure of the first grid line. In addition, compared with precious metals such as silver, copper or copper alloy is a cheap metal, which can reduce the metallization cost of the solar cell while ensuring the overall efficiency of the solar cell.
[0018] Moreover, when the material of the first grid line is a cheap metal such as copper or copper alloy, a first sub-grid line with a larger wire diameter can be added on the basis of setting a second sub-grid line with a smaller wire diameter. This can improve the ability of the first grid line to collect current without increasing material costs too much. The material cost of the first grid line is low, which is beneficial to reducing the metallization cost of solar cells.
[0019] In addition, the material of the second gate line includes at least one of silver or aluminum. Since the second gate line is arranged outside the protective layer, the material of the second gate line can be selected from silver or aluminum with relatively stable chemical properties to improve the stability of the second gate line.
[0020] In a second aspect, the present application also provides a method for preparing a solar cell, the method comprising: forming a first grid line on the surface of a battery substrate, the first grid line being electrically connected to the battery substrate, the first grid line comprising a first sub-grid line and a second sub-grid line connected to each other, the first sub-grid line extending along a first direction parallel to the surface of the battery substrate, the second sub-grid line extending along a second direction parallel to the surface of the battery substrate, the second direction intersecting with the first direction, the area of the cross section of the first sub-grid line along the second direction being greater than the area of the cross section of the second sub-grid line along the first direction. Forming a protective layer on the surface of the battery substrate, the protective layer covering the first grid line. Forming a second grid line on a side of the protective layer away from the battery substrate, the second grid line being electrically connected to the battery substrate and the first grid line through the protective layer, the second grid line comprising a third sub-grid line, the third sub-grid line extending along the first direction, the area of the cross section of the third sub-grid line along the second direction being greater than the area of the cross section of the second sub-grid line along the first direction.
[0021] The above-mentioned preparation method of the present application forms a first sub-grid line and a second sub-grid line on the surface of the battery substrate, and the second sub-grid line with a smaller wire diameter is used as an auxiliary grid line to collect the current generated by the battery substrate. By forming the first sub-grid line with a larger wire diameter, the first sub-grid line can also collect current, thereby improving the ability of the first grid line to collect current. In addition, the first sub-grid line is connected to the second sub-grid line, which can reduce the resistance of the first grid line, thereby facilitating the reduction of energy loss in the process of current transmission on the first grid line.
[0022] Then, a protective layer covering the first sub-grid line and the second sub-grid line is formed to improve the protection of the surfaces of the first sub-grid line and the second sub-grid line, and the stability of the electrical connection between the first sub-grid line and the second sub-grid line and the battery substrate, thereby improving the contact performance and transmission performance of the first grid line.
[0023] Finally, a third sub-grid line is formed outside the protective layer. The wire diameter of the third sub-grid line is larger than that of the second sub-grid line. The third sub-grid line with a larger wire diameter can be used as a main grid line for performance testing of solar cells or for series welding of multiple solar cells.
[0024] In a third aspect, the present application further provides a photovoltaic assembly, which includes a plurality of solar cells as described in any of the above embodiments, and the plurality of solar cells are electrically connected.
[0025] The above photovoltaic modules have the same beneficial technical effects as solar cells, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] In order to more clearly illustrate the technical solution in the present application, the following is a brief introduction to the drawings required for use in some embodiments of the present application. Obviously, the drawings described below are only drawings of some embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, not the actual size of the product involved in the embodiments of the present application, or the actual process of the method.
[0027] Figure 1 A schematic diagram of the structure of a solar cell provided in an embodiment of the present application;
[0028] Figure 2 for Figure 1 A cross-sectional view of the solar cell shown along the section line AA';
[0029] Figure 3 for Figure 1 Another cross-sectional view of the solar cell shown along the section line AA';
[0030] Figure 4 A schematic diagram of the structure of another solar cell provided in an embodiment of the present application;
[0031] Figure 5 A cross-sectional view of another solar cell provided in an embodiment of the present application along the section line AA';
[0032] Figure 6 A cross-sectional view of another solar cell along the section line AA' provided in an embodiment of the present application;
[0033] Figure 7 This is a flow chart of a method for preparing a solar cell in an embodiment of the present application;
[0034] Figure 8A to Figure 8C A diagram showing the steps of preparing a solar cell in an embodiment of the present application;
[0035] Fig. 9 A schematic diagram of the structure of a photovoltaic module provided in an embodiment of the present application.
[0036] Reference numerals:
[0037] 1. Solar cell; 10. Cell substrate; 10a. First conductive layer; 10b. N-type amorphous silicon layer; 10c. Intrinsic amorphous silicon layer; 10d. Crystalline silicon layer; 10e. P-type amorphous silicon layer; 10f. Second conductive layer; 101. TCO film; 102. Passivation layer; 103. P+ emitter; 104. N-type silicon substrate; 105. Ultra-thin tunneling oxide layer; 106. N-type polysilicon layer; 107. Anti-reflection film; 11. First grid line; 111. First sub-grid line; 112. Second sub-grid line; 12. Protective layer; 13. Second grid line; 131. Third sub-grid line; 132. Fourth sub-grid line; 2. Photovoltaic module. DETAILED DESCRIPTION
[0038] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.
[0039] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be construed in an open, inclusive sense, ie, meaning "including, but not limited to."
[0040] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.
[0041] When describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For example, when describing some embodiments, the term "connection" may be used to indicate that two or more components are in direct physical or electrical contact with each other.
[0042] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values may, in practice, be based on additional conditions or values beyond those stated.
[0043] Exemplary embodiments are described herein with reference to cross-sectional views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.
[0044] An embodiment of the present application provides a solar cell, Figure 1 A schematic diagram of the structure of a solar cell provided in an embodiment of the present application.
[0045] like Figure 1 As shown, the solar cell 1 includes a cell substrate 10, a first grid line 11, a protective layer 12, and a second grid line 13. The first grid line 11 is disposed on the surface of the cell substrate 10, and the first grid line 11 is electrically connected to the solar cell 10. The protective layer 12 is also disposed on the surface of the cell substrate 10, and the protective layer 12 covers the first grid line 11. At least a portion of the second grid line 13 is disposed on a side of the protective layer 12 away from the cell substrate 10, and the second grid line 13 is electrically connected to the cell substrate 10 and the first grid line 11.
[0046] The first grid line 11 includes a first sub-grid line 111 and a second sub-grid line 112 connected to each other. The first sub-grid line 111 extends along a first direction X parallel to the surface of the battery substrate 10, and the second sub-grid line 112 extends along a second direction Y parallel to the surface of the battery substrate 10. The second direction Y intersects with the first direction X, for example, the second direction Y is perpendicular to the first direction X. Moreover, the cross-sectional area of the first sub-grid line 111 along the second direction Y is larger than the cross-sectional area of the second sub-grid line 112 along the first direction X, that is, the line diameter of the first sub-grid line 111 is larger than the line diameter of the second sub-grid line 112, and the second sub-grid line 112 with a smaller line diameter is equivalent to a secondary grid line.
[0047] The second gate line 13 includes a third sub-gate line 131, which extends along the first direction X. The cross-sectional area of the third sub-gate line 131 along the second direction Y is larger than the cross-sectional area of the second sub-gate line 112 along the first direction X, that is, the line diameter of the third sub-gate line 131 is larger than the line diameter of the second sub-gate line 112. The third sub-gate line 131 with a larger line diameter is equivalent to the main gate line.
[0048] In the solar cell 1 provided in the above embodiment, the first grid line 11 includes a first sub-grid line 111 and a second sub-grid line 112 connected to each other. The second sub-grid line 112 with a smaller wire diameter is used as an auxiliary grid line to collect the current generated by the battery substrate 10. By adding the first sub-grid line 111 with a larger wire diameter, the first sub-grid line 111 can also collect current, thereby improving the current collection capability of the first grid line 11. In addition, by connecting the first sub-grid line 111 with the second sub-grid line 112, the resistance of the first grid line 11 can be reduced, thereby facilitating the reduction of energy loss during the transmission of current on the first grid line 11.
[0049] By covering the first sub-grid line 111 and the second sub-grid line 112 with the protective layer 12, the protection of the surfaces of the first sub-grid line 111 and the second sub-grid line 112 and the stability of the electrical connection between the first sub-grid line 111 and the second sub-grid line 112 and the battery substrate 10 are improved, thereby improving the contact performance and transmission performance of the first grid line 11.
[0050] In addition, the second gate line 13 is arranged on the outside of the protective layer 12, and the second gate line 13 includes a third sub-gate line 131. The wire diameter of the third sub-gate line 131 is larger than the wire diameter of the second sub-gate line 112. The third sub-gate line 131 with a larger wire diameter can be used as a main gate line for performance testing of the battery substrate 10 or to realize series welding of multiple battery substrates 10.
[0051] In some embodiments, see Figure 1 The orthographic projection of the third sub-grid line 131 on the surface of the battery substrate 10 at least partially overlaps with the orthographic projection of the first sub-grid line 111 on the surface of the battery substrate 10, that is, in the direction Z, the third sub-grid line 131 and the first sub-grid line 111 are at least partially opposite, which can reduce the total shielding area of the battery substrate 10 by the third sub-grid line 131 and the first sub-grid line 111, and increase the area of the battery substrate 10 that receives light.
[0052] Furthermore, since the third sub-grid line 131 and the first sub-grid line 111 are at least partially opposite in direction Z, the length of the carrier transmission path between them can be reduced, which is beneficial to improving the contact performance and transmission performance between the third sub-grid line 131 and the first sub-grid line 111.
[0053] Exemplarily, the orthographic projection of the third sub-grid line 131 on the surface of the battery substrate 10 coincides with the orthographic projection of the first sub-grid line 111 on the surface of the battery substrate 10, that is, in direction Z, the third sub-grid line 131 is directly opposite to the first sub-grid line 111, which can further increase the area of the battery substrate 10 receiving light and further improve the contact performance and transmission performance between the third sub-grid line 131 and the first sub-grid line 111.
[0054] Figure 2 for Figure 1A cross-sectional view of a solar cell along the section line AA' is shown.
[0055] In some embodiments, Figure 2 As shown, since the first gate line 11, the second gate line 13 and the surface layer of the battery substrate 10 are all made of conductive materials, and when the material of the protective layer 12 is also made of conductive material, the protective layer 12 is located between the second gate line 13 and the first gate line 11, and between the second gate line 13 and the battery substrate 10. The second gate line 13 and the first gate line 11 can be connected, and the second gate line 13 and the surface layer of the battery substrate 10 can be connected through the protective layer 12.
[0056] For example, Figure 2 As shown, taking the battery substrate 10 as a heterojunction (Hetero-junction with Intrinsic Thin Film, HJT) battery as an example, along the direction Z, the battery substrate 10 includes a first conductive layer 10a, an N-type amorphous silicon layer 10b, an intrinsic amorphous silicon layer 10c, a crystalline silicon layer 10d, an intrinsic amorphous silicon layer 10c, a P-type amorphous silicon layer 10e and a second conductive layer 10f stacked in sequence, wherein the N-type amorphous silicon layer 10b, the intrinsic amorphous silicon layer 10c, the crystalline silicon layer 10d, the intrinsic amorphous silicon layer 10c and the P-type amorphous silicon layer 10e serve as light absorption layers for the heterojunction battery, and the first gate line 11, the protective layer 12 and the second gate line 13 are arranged on the surface of the first conductive layer 10a away from the second conductive layer 10f, that is, the first gate line 11, the protective layer 12 and the second gate line 13 are arranged on the front side of the battery substrate 10.
[0057] The material of the protective layer 12 can be the same as that of the first conductive layer 10a and the second conductive layer 10f, and both can be transparent conductive oxide (TCO) films. The transparent conductive oxide can include one or more of indium tin oxide (ITO), indium zinc oxide (IZO), indium tungsten oxide (IWO), fluorine-doped tin dioxide (FTO), indium cerium oxide (ICO), aluminum zinc oxide (AZO), and boron zinc oxide (BZO). The protective layer 12 connects the second gate line 13 with the first conductive layer 10a and the first gate line 11.
[0058] Figure 3 for Figure 1 Another cross-sectional view of the solar cell along the section line AA' is shown.
[0059] In some embodiments, Figure 3As shown, the material of the protective layer 12 may also include a dielectric material. For example, the dielectric material is silicon nitride (SiNx), which can be used for anti-reflection. The protective layer 12 is located between the second gate line 13 and the first gate line 11, and between the second gate line 13 and the battery substrate 10. In this case, the second gate line 13 can pass through the protective layer 12 and be electrically connected to the battery substrate 10 and the first gate line 11.
[0060] For example, Figure 3 As shown, taking the cell substrate 10 as a tunnel oxide passivated contact solar cell (TOPCON) as an example, along the Z direction, the cell substrate 10 includes a TCO film 101, a passivation layer 102, a P+ emitter 103, an N-type silicon substrate 104, an ultra-thin tunnel oxide layer 105, an N-type polysilicon layer 106 and an anti-reflection film 107 stacked in sequence, and the first gate line 11, the protective layer 12 and the second gate line 13 are arranged on the surface of the TCO film 101 away from the anti-reflection film 107.
[0061] When the material of the first gate line 11 is copper or copper alloy, copper or copper alloy can easily diffuse into the P+ emitter 103 through the passivation layer 102, which will affect the performance of the P+ emitter 103. Therefore, a layer of TCO film 101 is added between the first gate line 11 and the passivation layer 102. The TCO film 101 can block the diffusion of copper or copper alloy and protect the P+ emitter 103.
[0062] Figure 4 A schematic diagram of the structure of another solar cell provided in an embodiment of the present application.
[0063] In some embodiments, Figure 4 As shown, the second grid line 13 of the solar cell 1 also includes a fourth sub-grid line 132, which is connected to the third sub-grid line 131 and extends along the second direction Y. The cross-sectional area of the third sub-grid line 131 along the second direction Y is greater than the cross-sectional area of the fourth sub-grid line 132 along the first direction X, that is, the wire diameter of the third sub-grid line 131 is greater than the wire diameter of the fourth sub-grid line 132.
[0064] In the above embodiment, the second grid line 13 includes a third sub-grid line 131 and a fourth sub-grid line 132, the third sub-grid line 131 is connected to the fourth sub-grid line 132, and the direction of the fourth sub-grid line 132 is the same as the second direction Y. The area of the cross section of the third sub-grid line 131 along the second direction Y is greater than the area of the cross section of the fourth sub-grid line 132 along the first direction X. The fourth sub-grid line 132 can also be used for performance testing of the battery substrate 10 and series welding between multiple battery substrates 10, which increases the diversity of wiring methods.
[0065] Furthermore, by connecting the fourth sub-gate line 132 to the third sub-gate line 131 , the resistance of the second gate line 13 can be reduced, thereby facilitating the reduction of energy loss during signal transmission on the second gate line 13 .
[0066] In some embodiments, see Figure 4 The orthographic projection of the fourth sub-grid line 132 on the surface of the battery substrate 10 at least partially overlaps with the orthographic projection of the second sub-grid line 112 on the surface of the battery substrate 10, that is, in the direction Z, the fourth sub-grid line 132 and the second sub-grid line 112 are at least partially opposite to each other, which can reduce the total shielding area of the fourth sub-grid line 132 and the second sub-grid line 112 on the battery substrate 10 and increase the area of the battery substrate 10 that receives light.
[0067] Furthermore, since the fourth sub-gridline 132 and the second sub-gridline 112 are at least partially opposite in direction Z, the length of the carrier transmission path between them can be reduced, which is beneficial to improving the contact performance and transmission performance between the fourth sub-gridline 132 and the second sub-gridline 112 .
[0068] Exemplarily, the orthographic projection of the fourth sub-grid line 132 on the surface of the battery substrate 10 coincides with the orthographic projection of the second sub-grid line 112 on the surface of the battery substrate 10, that is, in direction Z, the fourth sub-grid line 132 is directly opposite to the second sub-grid line 112, which can further increase the area of the battery substrate 10 receiving light and further improve the contact performance and transmission performance between the fourth sub-grid line 132 and the second sub-grid line 112.
[0069] Figure 5 A cross-sectional view of another solar cell provided in an embodiment of the present application along the section line AA'; Figure 6 A cross-sectional view of another solar cell provided in an embodiment of the present application along the section line AA′.
[0070] In some embodiments, Figure 5 As shown, when the battery substrate 10 is a HJT battery, the first gate line 11, the protective layer 12 and the second gate line 13 are arranged on the surface of the second conductive layer 10f away from the first conductive layer 10a, that is, the first gate line 11, the protective layer 12 and the second gate line 13 are arranged on the back side of the battery substrate 10.
[0071] Similarly, when the battery substrate 10 is a TOPCON battery, the first gate line 11 , the protection layer 12 and the second gate line 13 may also be disposed on the back side of the battery substrate 10 .
[0072] In other embodiments, Figure 6As shown, when the battery substrate 10 is a HJT battery, the first gate line 11, the protective layer 12 and the second gate line 13 can be arranged on the surface of the first conductive layer 10a away from the second conductive layer 10f, or on the surface of the second conductive layer 10f away from the first conductive layer 10a. That is, the first gate line 11, the protective layer 12 and the second gate line 13 can be arranged on the front and back sides of the battery substrate 10.
[0073] Similarly, when the battery substrate 10 is a TOPCON battery, the first gate line 11 , the protection layer 12 and the second gate line 13 may also be disposed on the front and back sides of the battery substrate 10 .
[0074] In some embodiments, the material of the first grid line 11 includes copper or copper alloy, which is an easily oxidized metal material. Since the first grid line 11 is covered by the protective layer 12, the surface of the first grid line 11 is protected, thereby avoiding the problem of oxidation failure of the first grid line 11. In addition, compared with precious metals such as silver, copper or copper alloy is a cheap metal, which can reduce the metallization cost of the solar cell 1 while ensuring the overall efficiency of the solar cell 1.
[0075] Furthermore, when the material of the first grid line 11 is a cheap metal such as copper or copper alloy, a first sub-grid line 111 with a larger wire diameter can be added on the basis of setting a second sub-grid line 112 with a smaller wire diameter. This can improve the ability of the first grid line 11 to collect current without increasing material costs too much. The material cost of the first grid line 11 is relatively low, which is beneficial to reducing the metallization cost of the solar cell 1.
[0076] In addition, the material of the second gate line 13 includes at least one of silver or aluminum. Since the second gate line 13 is disposed outside the protection layer 12 , the material of the second gate line 13 can be silver or aluminum with relatively stable chemical properties to improve the stability of the second gate line 13 .
[0077] In order to verify the performance of the solar cell 1 provided in the embodiment of the present application, the inventors of the present application also conducted a comparative experiment:
[0078] See Table 1 below:
[0079] Eff_(%) Voc_(mV) Jsc_(mA / cm2) FF_(%) HTHH (85% / 85%-1000h) Comparative Example 1 0 0 0 0 +3％ Example 1 -0.52 0 -0.12 -1.3 +308.2％ Example 2 -0.07 0 -0.12 -0.2 +0.25％ Comparative Example 2 0 0 0 0 +2.1％ Example 3 +0.03 +3.1 -0.04 -0.20 +2.5％ Example 4 +0.02 +3.0 -0.06 -0.25 +0.05％
[0080] Table 1
[0081] Among them, "Eff" refers to the photoelectric conversion efficiency; "Voc" refers to the open circuit voltage, the unit is "mV"; "Jsc" refers to the current density, the unit is "mA / cm 2 "FF" refers to fill factor; "HTHH" refers to the resistance change rate of the gate line after 1000h of high temperature and high humidity test.
[0082] Comparative Example 1: Conventional HJT battery structure, the main grid line and the auxiliary grid line are both made of silver paste.
[0083] Embodiment 1: Conventional HJT battery structure, the secondary grid lines are made of copper paste, and the main grid lines are made of silver paste.
[0084] Example 2: Figure 2 In the HJT battery shown, the first busbar is made of copper paste and the second busbar is made of silver paste.
[0085] Comparative Example 2: In conventional TOPCON cells, both the main grid lines and the secondary grid lines are made of silver paste or silver aluminum paste.
[0086] Embodiment 3: TOPCON cell, a 20 nm thick tin-doped indium oxide (ITO) layer is added between the anti-reflection film and the passivation layer, and the main grid lines and the secondary grid lines are both made of silver paste or silver aluminum paste.
[0087] Example 4: Figure 3 The TOPCON cell shown has a 20 nm thick tin-doped indium oxide (ITO) layer added between the anti-reflection film and the passivation layer. The first grid line is made of copper paste, and the second grid line is made of silver paste or silver aluminum paste.
[0088] It can be seen that compared with Comparative Example 1, the photoelectric conversion efficiency, current density and fill factor of the HJT battery in Example 1 are slightly reduced, the open circuit voltage does not change, the resistance change rate of the secondary grid line increases, which is easy to increase the energy loss caused by the current transmission on the secondary grid line, and the overall efficiency of the HJT battery decreases.
[0089] Example 2 corresponds to the HJT battery provided in the present application. Compared with Comparative Example 1, its photoelectric conversion efficiency, current density and fill factor are slightly reduced, the open circuit voltage does not change, and the resistance change rate of the auxiliary gate line (first gate line) increases less, which is beneficial to reduce the energy loss caused by current transmission on the auxiliary gate line and improve the contact performance and transmission performance of the first gate line.
[0090] Moreover, compared with Comparative Example 2, the open circuit voltage of the TOPCON battery in Example 3 is slightly increased, the fill factor and current density are slightly decreased, and the resistance change rate of the secondary grid line and the overall efficiency of the TOPCON battery do not change much.
[0091] Example 4 corresponds to the TOPCON battery provided in the present application. Compared with Comparative Example 2, its open circuit voltage is slightly increased, the fill factor and current density are slightly decreased, the comprehensive efficiency of the TOPCON battery does not change much, and the resistance change rate of the secondary grid line (first grid line) is greatly reduced, which is beneficial to reduce the energy loss caused by current transmission on the secondary grid line and improve the contact performance and transmission performance of the first grid line.
[0092] The present application also provides a method for preparing a solar cell. Figure 7 This is a flow chart of a method for preparing a solar cell in an embodiment of the present application; Figure 8A to Figure 8C Schematic diagram of the steps of preparing a solar cell in an embodiment of the present application.
[0093] like Figure 7 As shown, the method for preparing a solar cell includes the following steps S901 to S903:
[0094] Step S901: Fig. 8A As shown, a first gate line 11 is formed on the surface of a battery substrate 10, and the first gate line 11 is electrically connected to the battery substrate 10, wherein the first gate line 11 includes a first sub-gate line 111 and a second sub-gate line 112 connected to each other, the first sub-gate line 111 extends along a first direction X parallel to the surface of the battery substrate 10, and the second sub-gate line 112 extends along a second direction Y parallel to the surface of the battery substrate 10, and the cross-sectional area of the first sub-gate line 111 along the second direction Y is greater than the cross-sectional area of the second sub-gate line 112 along the first direction X.
[0095] For example, the first sub-grid line 111 and the second sub-grid line 112 may be formed simultaneously by a screen printing process.
[0096] Step S902: Figure 8B As shown, a protection layer 12 is formed on the surface of the battery substrate 10 , and the protection layer 12 covers the first gate line 11 .
[0097] Step S903: Figure 8C As shown, a second gate line 13 is formed on a side of the protective layer 12 away from the battery substrate 10, and the second gate line 13 is electrically connected to the battery substrate 10 and the first gate line 11 through the protective layer 12, wherein the second gate line 13 includes a third sub-gate line 131, and the third sub-gate line 131 extends along a first direction X parallel to the surface of the battery substrate 10, and the area of the cross section of the third sub-gate line 131 along the second direction Y is greater than the area of the cross section of the second sub-gate line 112 along the first direction X.
[0098] Illustratively, the third sub-gate line 131 may be formed by a screen printing process.
[0099] The above-mentioned preparation method of the present application forms the first sub-gridline 111 and the second sub-gridline 112 on the surface of the solar cell. The second sub-gridline 112 with a smaller wire diameter is used as an auxiliary gridline to collect the current generated by the battery substrate 10. By forming the first sub-gridline 111 with a larger wire diameter, the first sub-gridline 111 can also collect current, thereby improving the current collection capability of the first gridline 11. In addition, the first sub-gridline 111 is connected to the second sub-gridline 112, which can reduce the resistance of the first gridline 11, thereby facilitating the reduction of energy loss during the transmission of current on the first gridline 11.
[0100] Then, a protective layer 12 is formed to cover the first sub-grid line 111 and the second sub-grid line 112, thereby improving the protection of the surfaces of the first sub-grid line 111 and the second sub-grid line 112 and the stability of the electrical connection between the first sub-grid line 111 and the second sub-grid line 112 and the battery substrate 10, thereby improving the contact performance and transmission performance of the first grid line 11.
[0101] Finally, a third sub-grid line 131 is formed on the outside of the protective layer 12 . The wire diameter of the third sub-grid line 131 is larger than the wire diameter of the second sub-grid line 112 . The third sub-grid line 131 with a larger wire diameter can be used as a main grid line for performance testing of the battery substrate 10 or for realizing series welding of multiple battery substrates 10 .
[0102] The present application also provides a photovoltaic module, Fig. 9 A schematic diagram of the structure of a photovoltaic module provided in an embodiment of the present application.
[0103] like Fig. 9 As shown, the photovoltaic module 2 includes a plurality of solar cells 1 as in any of the above embodiments, and the plurality of solar cells 1 are electrically connected to each other. The photovoltaic module 2 can adjust the number of solar cells 1 in the module according to demand to convert solar energy into electrical energy.
[0104] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that a person skilled in the art can think of within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A solar cell, characterized in that: include: Battery substrate; A first grid line is disposed on the surface of the battery substrate and is electrically connected to the battery substrate; A protective layer, disposed on the surface of the battery substrate and covering the first grid line; A second gate line, at least partially disposed on a side of the protection layer away from the battery substrate, the second gate line being electrically connected to the battery substrate and the first gate line; The first gate line includes a first sub-gate line and a second sub-gate line connected to each other, the first sub-gate line extends along a first direction parallel to the surface of the battery substrate, the second sub-gate line extends along a second direction parallel to the surface of the battery substrate, and the second direction intersects the first direction; the area of a cross section of the first sub-gate line along the second direction is greater than the area of a cross section of the second sub-gate line along the first direction; The second gate line includes a third sub-gate line, and the third sub-gate line extends along the first direction; the cross-sectional area of the third sub-gate line along the second direction is greater than the cross-sectional area of the second sub-gate line along the first direction.
2. The solar cell according to claim 1, characterized in that The orthographic projection of the third sub-grid line on the surface of the battery substrate at least partially overlaps with the orthographic projection of the first sub-grid line on the surface of the battery substrate.
3. The solar cell according to claim 1, characterized in that The second gate line further includes a fourth sub-gate line, and the fourth sub-gate line is connected to the third sub-gate line; The fourth sub-grid line extends along the second direction, and an area of a cross section of the third sub-grid line along the second direction is greater than an area of a cross section of the fourth sub-grid line along the first direction.
4. The solar cell according to claim 3, characterized in that: The orthographic projection of the fourth sub-gridline on the surface of the battery substrate at least partially overlaps with the orthographic projection of the second sub-gridline on the surface of the battery substrate.
5. The solar cell according to claim 1, characterized in that: The material of the protective layer includes a conductive material; The protection layer connects the second gate line with the battery substrate and the first gate line.
6. The solar cell according to claim 1, characterized in that The material of the protective layer includes a dielectric material; The second gate line passes through the protection layer and is electrically connected to the battery substrate and the first gate line.
7. The solar cell according to claim 1, characterized in that The battery substrate comprises a first conductive layer, a light absorbing layer and a second conductive layer which are stacked in sequence; The first gate line, the protection layer and the second gate line are arranged on a surface of the first conductive layer away from the second conductive layer; and / or, The first gate line, the protection layer and the second gate line are arranged on a surface of the second conductive layer away from the first conductive layer.
8. The solar cell according to claim 1, characterized in that The material of the first gate line includes copper or copper alloy, and the material of the second gate line includes at least one of silver and aluminum.
9. A method for preparing a solar cell, characterized in that: include: forming a first gate line on a surface of a battery substrate, wherein the first gate line is electrically connected to the battery substrate; forming a protective layer on the surface of the battery substrate, wherein the protective layer covers the first grid line; Forming a second gate line on a side of the protective layer away from the battery substrate, wherein the second gate line is electrically connected to the battery substrate and the first gate line through the protective layer; The first gate line includes a first sub-gate line and a second sub-gate line connected to each other, the first sub-gate line extends along a first direction parallel to the surface of the battery substrate, the second sub-gate line extends along a second direction parallel to the surface of the battery substrate, and the second direction intersects the first direction; the area of a cross section of the first sub-gate line along the second direction is greater than the area of a cross section of the second sub-gate line along the first direction; The second gate line includes a third sub-gate line, and the third sub-gate line extends along the first direction; the cross-sectional area of the third sub-gate line along the second direction is greater than the cross-sectional area of the second sub-gate line along the first direction.
10. A photovoltaic module, characterized in that: The invention comprises a plurality of solar cells according to any one of claims 1 to 8, wherein the plurality of solar cells are electrically connected.