A phototransistor and a phototransistor unit of a CMOS image sensor

Abstract

The embodiment of the present invention relates to a phototransistor and a phototransistor unit of a CMOS image sensor. The epitaxial structure of the phototransistor includes: a substrate, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer; the collector layer is arranged on the substrate, the thickness of the collector layer is 100nm-1000nm, and the doping concentration is 5×10 13 / cm 3 ‑1×10 16 / cm 3 The first base layer is arranged on the collector layer, and the doping type of the first base layer is opposite to the doping type of the collector layer; the second base layer is arranged on the first base layer; the emitter layer is arranged on the second base layer, and the doping type of the emitter layer is the same as the doping type of the collector layer; the high-doped layer is arranged on the emitter layer, and the doping type of the high-doped layer is the same as the doping type of the emitter layer; under an external voltage of less than 6V, the average electric field strength inside the collector layer of the phototransistor is 5×10 4 V / cm‑3×10 5 V / cm.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor phototransistors, and in particular to a phototransistor and a phototransistor unit of a CMOS image sensor. Background Art

[0002] CMOS image sensors use photoelectric conversion units to convert incident light signals into processable electrical signals. These electrical signals are then converted into image data for easy recording and further processing. An ideal CMOS image sensor photoelectric conversion unit is required to have good output linearity, fast read speed and high responsiveness.

[0003] Currently, phototransistors are rarely used in image sensors, mainly because it is difficult for phototransistors to achieve both high responsiveness and fast readout. When the thickness of the absorption layer (collector-base first pn junction depletion region width) of a phototransistor is more than 3 microns and the quantum efficiency is more than 50% in the visible light range, the phototransistor can generally obtain a responsiveness of 1A / W to 10A / W. However, the thicker absorption layer results in a longer readout time for the phototransistor, which is difficult to meet the needs of actual applications.

[0004] The width of the depletion region of the first pn junction of the collector-base of the phototransistor is inversely correlated with the cutoff frequency, while the cutoff frequency is positively correlated with the reading speed. Therefore, it is necessary to reduce the width of the depletion region of the first pn junction of the collector-base of the phototransistor and increase the cutoff frequency of the phototransistor to meet the fast reading of the phototransistor and then meet the high-speed shooting in the image sensor. However, based on the balanced absorption theory, reducing the width of the depletion region of the first pn junction of the collector-base will reduce the responsiveness of the phototransistor.

[0005] So how to make the phototransistor have both high responsiveness and fast reading speed is the key point that needs to be broken through in the current research on phototransistors. Summary of the invention

[0006] The object of the present invention is to provide a phototransistor and a phototransistor unit of a CMOS image sensor in view of the defects in the prior art.

[0007] To achieve the above-mentioned object, in a first aspect, the present invention provides a phototransistor of a CMOS image sensor.

[0008] The epitaxial structure of the phototransistor comprises: a substrate, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer;

[0009] The collector layer is arranged on the substrate, the thickness of the collector layer is 100nm-1000nm, and the doping concentration is 5×10 13 / cm3 -1×10 16 / cm 3 ;

[0010] The first base layer is disposed on the collector layer, and the doping type of the first base layer is opposite to the doping type of the collector layer;

[0011] The second base layer is disposed on the first base layer, and the doping type of the second base layer is the same as the doping type of the first base layer;

[0012] The emitter layer is arranged on the second base layer, and the doping type of the emitter layer is the same as the doping type of the collector layer;

[0013] The highly doped layer is disposed on the emitter layer, and the doping type of the highly doped layer is the same as the doping type of the emitter layer; wherein the doping concentration of the highly doped layer is greater than the doping concentration of the emitter layer;

[0014] Under an applied voltage of less than 6V, the average electric field strength inside the collector layer of the phototransistor is 5×10 4 V / cm-3×10 5 V / cm.

[0015] Preferably, the epitaxial structure of the phototransistor further comprises a transition layer; the transition layer is arranged between the substrate and the collector layer; the thickness of the transition layer is 0nm-500nm, and the doping method is unintentional doping or low-concentration doping, wherein the doping concentration of the low-concentration doping is 1×10 13 / cm 3 -1×10 15 / cm 3 .

[0016] Preferably, the substrate includes an n-type single crystal silicon substrate, a p-type single crystal silicon substrate or an SOI-type single crystal silicon substrate.

[0017] Preferably, the material of the first base layer is single crystal silicon or single crystal silicon germanium alloy, and the doping concentration is 4×10 13 / cm 3 -4×10 15 / cm 3 The material of the second base layer is single crystal silicon or single crystal silicon germanium alloy, and the doping concentration is 1×10 16 / cm 3 -5×10 18 / cm 3 ; Wherein, the chemical formula of the single crystal silicon germanium alloy is Si x Ge 1-x ,0 <x<1。

[0018] Preferably, the thickness of the first base layer is 10nm-100nm; the thickness of the second base layer is 50nm-500nm.

[0019] Preferably, the doping concentration of the emitter layer is 1×10 17 / cm 3 -1×10 19 / cm 3 , thickness is 50nm-300nm.

[0020] Preferably, the doping concentration of the high-doped layer is 5×10 18 / cm 3 -3×10 20 / cm 3 , thickness is 30nm-200nm.

[0021] Preferably, the phototransistor further comprises: an upper electrode, a back electrode and an isolation region;

[0022] The upper electrode is located on the highly doped layer of the epitaxial structure;

[0023] The back electrode is located under the substrate of the epitaxial structure;

[0024] The isolation region is arranged perpendicular to the epitaxial structure.

[0025] In a second aspect, the present invention provides a phototransistor unit, wherein the phototransistor unit comprises the phototransistor of the CMOS image sensor described in any one of the first aspects.

[0026] In a third aspect, the present invention provides a method for preparing the photoelectric triode unit described in the second aspect, the preparation method comprising:

[0027] A transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a high-doping layer are sequentially grown on the substrate to obtain an epitaxial structure of a phototransistor;

[0028] Arranging an isolation region along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region;

[0029] preparing an upper electrode on the highly doped layer;

[0030] A back electrode is prepared under the substrate to obtain the phototransistor unit.

[0031] The phototransistor of a CMOS image sensor provided by the embodiment of the present invention uses a thin collector layer to improve the reading speed of the phototransistor, and uses a strong electric field to enhance the absorption characteristics of the thin collector layer to improve the photoelectric conversion efficiency of the thin collector layer; the base and emitter are divided into a multilayer structure with different doping concentrations, which can not only optimize the extraction efficiency of photogenerated carriers and the gain of the phototransistor, thereby improving the responsiveness of the phototransistor, but also reduce the dark current of the phototransistor. Its unique design not only shows good photosensitivity, ensures the accuracy and detail richness of image capture, but also greatly improves the rate of image data reading, providing strong technical support for real-time imaging and high-speed dynamic scene capture. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of the epitaxial structure of a phototransistor of a CMOS image sensor provided by an embodiment of the present invention;

[0033] Figure 2 A schematic diagram of the structure of a phototransistor provided in an embodiment of the present invention;

[0034] Figure 3 A top view of a phototransistor unit provided by an embodiment of the present invention;

[0035] Figure 4 A flow chart of a method for preparing a photoelectric triode unit provided by an embodiment of the present invention;

[0036] Figure 5 This is a graph of the responsivity test results of the phototransistor provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments.

[0039] like Figure 1 As shown in the figure, an embodiment of the present invention provides a phototransistor of a CMOS image sensor, wherein the epitaxial structure 101 mainly includes: a substrate 1, a collector layer 2, a first base layer 3, a second base layer 4, an emitter layer 5 and a highly doped layer 6.

[0040] The substrate 1 is a supporting structure of the phototransistor and is located at the bottom layer of the epitaxial structure 101 . The substrate 1 may specifically include an n-type single crystal silicon substrate, a p-type single crystal silicon substrate or an SOI-type single crystal silicon substrate.

[0041] The material of the collector layer 2 can be realized by single crystal silicon. The doping type is the same as the doping type of the substrate 1. When the substrate 1 is an n-type single crystal silicon substrate, the doping type of the collector layer 2 is n-type doping, and the doping elements can be P and As. When the substrate 1 is a p-type single crystal silicon substrate, the doping type of the collector layer 2 is p-type doping, and the doping element can be B. The doping concentration of the collector layer 2 can be 5×10 13 / cm 3 -1×10 16 / cm 3 , preferably 1×10 15 / cm 3 The thickness of the collector layer 2 is specifically 100nm-1000nm, preferably 300nm. The main function of the collector layer 2 is to collect charge carriers, and also to isolate the external circuit to maintain the stability and reliability of the phototransistor. The collector layer 2 is specifically arranged on the substrate 1.

[0042] The thickness of the collector layer 2 is reduced to several times that of the prior art. First, it is beneficial to improve the reading speed of the phototransistor. Second, the epitaxial structure of the phototransistor is also thinner, which is beneficial to reduce the number of pollutant particles generated during the epitaxial process and reduce the process cost. Then, after the thickness of the collector layer 2 is reduced, the applied voltage of less than 6V can make the internal average electric field strength of the collector layer 2 reach 5×10 4 V / cm-3×10 5 V / cm, realizing the absorption enhancement effect of the non-equilibrium absorption enhancement theory, so that the depletion region of the collector-base first pn junction can absorb more light per unit length, generate more photogenerated carriers, and improve the photoelectric conversion efficiency. In other words, the strong internal and external electric fields are used to enhance the absorption characteristics of the thin collector layer 2. In addition, the thickness of the collector layer 2 is reduced to several times that of the existing structure, which greatly reduces the overall thickness of the phototransistor and reduces the high aspect ratio etching challenge of the deep trench isolation grooves between the phototransistors.

[0043] In addition, considering the three key goals of achieving efficient extraction of photogenerated carriers, reducing the dark current of the phototransistor, and improving the gain of the phototransistor under weak illumination (less than 1lux illumination), it is necessary to balance the relationship between the doping concentration and thickness of the collector layer 2, base, and emitter of the phototransistor. To achieve efficient extraction of photogenerated carriers, the collector layer-base first pn junction designed for the purpose of achieving efficient extraction of photogenerated carriers needs to completely deplete the collector layer as the absorption layer and satisfy the pn junction to separate the photogenerated carriers, and there is no surplus unextracted photogenerated carriers to recombine, requiring the collector layer and base doping concentration to be close. Then, the dark current of the pn junction is inversely correlated with the doping concentration of the p layer and the n layer. The dark current of the phototransistor mainly comes from the collector layer-base first pn junction. This means that when the phototransistor is working, the doping concentration of the collector layer 2 and the base needs to be reduced as much as possible to reduce the dark current of the phototransistor. The gain of the phototransistor under low light conditions is also affected by the doping concentration in the depletion region of the second pn junction of the base-emitter. It is necessary to reduce the doping concentration in the depletion region of the second pn junction of the base-emitter, that is, to reduce the doping concentration of the base and emitter, which helps to reduce the recombination current in the depletion region, improve the gain under low light conditions, and improve the linearity of the signal output of the phototransistor under low light conditions. In addition, the gain of the phototransistor is mainly inversely correlated with the ratio of the base doping concentration to the emitter doping concentration and the ratio of the base neutral zone width to the emitter neutral zone width. The width of the depletion region of the pn junction in the p-layer or n-layer is inversely correlated with the doping concentration of the layer, that is, the higher the doping concentration, the smaller the depletion zone width in the layer. The smaller the doping concentration of the base, the smaller the ratio of the base doping concentration to the emitter doping concentration; the smaller the ratio of the base doping concentration to the emitter doping concentration, the greater the gain. However, the depletion region of the emitter-base pn junction expands more on the base side. In order to prevent the voltage fluctuation from modulating the neutral zone width of the base layer too much, the base layer needs to have a relatively high doping.

[0044] In addition, the emitter needs to form an ohmic contact with the deposited metal layer in order for the external circuit to read the output current of the phototransistor. The emitter needs to be highly doped to form a good ohmic contact (low resistance). A high emitter doping concentration means a high emitter defect concentration, which will enhance the depletion of the base-emitter second pn junction recombination current and affect the signal output linearity of the phototransistor under illumination below 1lux. Therefore, the emitter doping concentration cannot be too high.

[0045] This creates a contradiction. The doping concentration of the base of the phototransistor should be lower to reduce the dark current of the phototransistor, improve the efficiency of photogenerated carrier extraction, and increase the gain. The doping concentration of the base should be higher to reduce the fluctuation amplitude of the gain with the applied voltage during the use of the phototransistor. The doping concentration of the emitter should be higher to increase the gain of the phototransistor and form a low-resistance ohmic contact. The doping concentration of the emitter should be lower to reduce the generation of recombination current in the depletion region of the second pn junction, which affects the linearity of the signal output of the phototransistor under low light. Therefore, the base is divided into a multi-layer structure with different doping concentrations according to the above requirements.

[0046] The first base layer 3 and the second base layer 4 are the bases of the epitaxial structure 101, and are disposed on the collector layer 2. The doping type is opposite to that of the collector layer 2. When the doping type of the collector layer 2 is n-type doping, that is, the doping type of the base is p-type doping, and the doping element may be B. When the doping type of the collector layer 2 is p-type doping, that is, the doping type of the base is n-type doping, and the doping element may be P or As.

[0047] The emitter layer 5 and the highly doped layer 6 are emitters of an epitaxial structure, and are specifically arranged on the second base layer 4. The doping type is the same as the doping type of the collector layer 2. When the doping type of the collector layer 2 is n-type doping, the doping type of the base is p-type doping, and the doping type of the emitter is n-type. The doping elements may be P and As. When the doping type of the collector layer 2 is p-type doping, the doping type of the base is n-type doping, and the doping type of the emitter is p-type doping. The doping element may be B.

[0048] In this way, the first base layer 3 and the collector layer 2 can form a first pn junction. The first pn junction affects the photoelectric conversion efficiency, photogenerated carrier extraction efficiency and dark current of the phototransistor. If the phototransistor is to have a low dark current, the doping concentrations of the first base layer 3 and the collector layer 2 cannot be too high. And the higher photogenerated carrier extraction efficiency also means that under the limitation of the lower doping concentration of the collector layer 2, the doping concentration of the collector layer 2 is only slightly higher than the doping concentration of the first base layer 3, and the doping concentration needs to meet the condition that no unextracted photogenerated carriers are accumulated and recombined in the first pn junction when the phototransistor is performing photoelectric conversion, so as to avoid the generation of photogenerated carrier blocking effect and realize efficient carrier extraction.

[0049] Specifically, the material of the first base layer 3 is single crystal silicon or single crystal silicon germanium alloy, and the doping concentration is 4×10 13 / cm 3 -4×10 15 / cm 3 , preferably 2×10 14 / cm 3. Among them, the chemical formula of the single-crystalline silicon-germanium alloy is Si x Ge 1-x , 0 < x < 1. The thickness of the first base layer 3 can be 10 nm - 100 nm, preferably 40 nm. The first base layer 3 is disposed on the collector layer 2.

[0050] The material of the second base layer 4 is specifically single-crystalline silicon or a single-crystalline silicon-germanium alloy, and the doping concentration can be 1×10 16 / cm 3 -5×10 18 / cm 3 , preferably 9×10 16 / cm 3 . The thickness of its second base layer 4 can be 50 nm - 500 nm, preferably 190 nm. The second base layer 4 is disposed on the first base layer 3. Among them, the chemical formula of the single-crystalline silicon-germanium alloy is Si x Ge 1-x , 0 < x < 1. And, the base neutral region, that is, the non-depletion region, is within the second base layer 4. In order to avoid the depletion region width of the first pn junction being modulated by an externally applied bias voltage, resulting in the depletion region extending to the second base layer 4, thereby changing the base neutral region width and affecting the gain. Therefore, the doping concentration of the second base layer 4 is greater than that of the first base layer 3.

[0051] The material of the emitter layer 5 is specifically single-crystalline silicon, and the doping concentration is specifically 1×10 17 / cm 3 -1×10 19 / cm 3 , preferably 4×10 18 / cm 3 , with a thickness of 50 nm - 300 nm, preferably 120 nm. The emitter layer 5 is disposed on the second base layer 4. The doping concentration of the emitter layer 5 is greater than that of the second base layer 4.

[0052] In this way, the emitter layer 5 and the second base layer 4 can form a second pn junction.

[0053] The material of the highly doped layer 6 is specifically single-crystalline silicon, which usually forms a good electrical contact with the external electrode to facilitate the application of a bias voltage and the collection of the current formed by the photo-generated carriers. It is disposed on the emitter layer 5, and the doping type of the highly doped layer 6 is the same as that of the emitter layer 5. The doping concentration of the highly doped layer 6 is specifically 5×10 18 / cm 3 -3×10 20 / cm 3 , preferably 5×10 19 / cm 3 , with a thickness of 30 nm - 200 nm, preferably 50 nm.

[0054] The second pn junction affects the gain of the phototransistor and whether the gain remains constant within a certain range. When the phototransistor outputs a photocurrent signal, the gain needs to remain constant within a certain range, so that the photocurrent is only positively correlated with the light signal, and the linear output of the photocurrent is achieved. The gain is inversely correlated with the ratio of the base doping concentration to the emitter doping concentration. Therefore, the doping concentration of the emitter layer 5 is greater than the doping concentration of the second base layer 4.

[0055] However, under low light conditions (less than 1 lux), if the smaller photogenerated current is lower than the recombination current in the depletion region of the second pn junction, the current gain value will decrease, resulting in nonlinearity in the output of the photogenerated electrical signal.

[0056] Therefore, the emitter is designed in layers, with the high-doped layer 6 as a separate layer, and the doping concentration of the high-doped layer 6 is greater than the doping concentration of the emitter layer 5, which not only realizes the function of ohmic contact and facilitates the adjustment of the doping concentration of the emitter layer 5, but also can reduce the defect concentration in the second pn junction depletion region, reduce the recombination current in the second pn junction depletion region, and improve the linearity of the output current under low light conditions.

[0057] In a preferred embodiment, the epitaxial structure 101 of the phototransistor further includes a transition layer 7, which is mainly used to improve the roughness of the surface of the substrate 1 and provide a smooth interface at the atomic level. The material of the transition layer 7 is specifically single crystal silicon. The thickness of the transition layer 7 can be 0nm-500nm, preferably 100nm. The doping method is unintentional doping or low concentration doping, wherein the doping concentration of the low concentration doping is 1×10 13 / cm 3 -1×10 15 / cm 3 The transition layer 7 is specifically arranged between the substrate 1 and the collector layer 2 .

[0058] Combination Figure 2 As shown, the phototransistor includes, in addition to the epitaxial structure 101 , an upper electrode 102 , a back electrode 103 and an isolation region 104 .

[0059] The upper electrode 102 is located on the high-doped layer 6 of the epitaxial structure 101 . The back electrode 103 is located under the substrate 1 of the epitaxial structure 101 .

[0060] The isolation region 104 is specifically arranged perpendicular to the epitaxial structure 101 , and is mainly used to achieve electrical isolation and optical isolation between the phototransistors.

[0061] The above improvements make the phototransistor of the present application have the following advantages:

[0062] First, based on the collector-base first pn junction of the non-equilibrium absorption theory, the absorption performance of the absorption region is enhanced, and the thickness of the collector layer can be reduced without being lower than the responsiveness of the existing phototransistor, thereby improving the reading speed of the phototransistor.

[0063] Second, the reduction in the overall thickness of the phototransistor brings additional benefits such as reduced epitaxial costs and reduced etching difficulty.

[0064] Third, the base is designed with a multi-layer structure and a first base layer is set, which provides an optimized degree of freedom for optimizing the doping concentration of the base layer in the collector-base first pn junction space charge region, and can better optimize the efficiency of photogenerated carriers; reducing the doping concentration of the first base layer and the collector layer, and reducing the charge concentration of the space charge in the collector-base first pn junction depletion region, is beneficial to reducing the dark current; reducing the doping concentration of the second base layer and the emitter layer, and reducing the charge concentration of the space charge in the base-emitter second pn junction depletion region, helps to reduce the recombination current in the depletion region, improve the gain under light conditions less than 1lux, and improve the signal output linearity of the phototransistor.

[0065] In summary, the phototransistor of a CMOS image sensor provided by the embodiment of the present invention uses a thin collector layer to improve the reading speed of the phototransistor, and uses a strong electric field to enhance the absorption characteristics of the thin collector layer to improve the photoelectric conversion efficiency of the thin collector layer; the base and emitter are divided into a multilayer structure with different doping concentrations, which can not only optimize the extraction efficiency of photogenerated carriers and the gain of the phototransistor, thereby improving the responsiveness of the phototransistor, but also reduce the dark current of the phototransistor. Its unique design not only shows good photosensitivity, ensures the accuracy and detail richness of image capture, but also greatly improves the rate of image data reading, providing strong technical support for real-time imaging and high-speed dynamic scene capture.

[0066] An embodiment of the present invention further provides a phototransistor unit, which includes any of the phototransistors of the CMOS image sensor described above.

[0067] The present invention also provides a method for preparing the above-mentioned photoelectric triode unit, which specifically comprises the following steps: Figure 4 The steps shown in:

[0068] Step 110, sequentially growing a transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer on a substrate to obtain an epitaxial structure of a phototransistor;

[0069] Specifically, the epitaxial structure can be understood as the functional area of ​​the phototransistor, which can be realized by using reduced-pressure chemical vapor deposition (RPCVD), low-pressure chemical vapor deposition (LPCVD), or ultra-high vacuum chemical vapor deposition (UHVCVD).

[0070] In a preferred embodiment, RPCVD deposition is used.

[0071] The selection of materials, doping concentration and doping type of each layer correspond to those described in the above structure and will not be described in detail here.

[0072] Step 120, setting an isolation region along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region;

[0073] Specifically, the isolation region is arranged along the vertical direction of the epitaxial structure, and can be arranged vertically from the upper surface of the highly doped layer to the lower bottom surface of the transition layer. The isolation region can divide the epitaxial structure into an array.

[0074] Specifically, first, the isolation trench is dry-etched using a deep trench isolation trench. The isolation trench can be etched using inductively coupled plasma (ICP), and the etching gas can be SF6 or C4F8.

[0075] Secondly, the epitaxial structure of the phototransistor with the isolation groove is placed in a high-temperature oxidation furnace and subjected to high-temperature thermal dry oxidation in an oxygen atmosphere to form a silicon dioxide passivation layer on the surface of the epitaxial structure and the surface of the isolation groove. The temperature of the high-temperature thermal dry oxidation is 750°C-1200°C.

[0076] Finally, a PECVD (Plasma Enhanced Chemical Vapor Deposition) device or a HDPCVD (High Density Plasma Chemical Vapor Deposition) device is used to fill the isolation groove with a dielectric material to form an isolation region. The dielectric material may be any one of photoresist, silicon dioxide, silicon nitride, and polysilicon, preferably silicon dioxide.

[0077] The isolation region mainly forms an electrical isolation region between adjacent phototransistors in the phototransistor unit, and isolates the photoelectric conversion regions, i.e., collector layers, of adjacent phototransistors, so as to avoid crosstalk of photogenerated current signals.

[0078] Step 130, preparing an upper electrode on the highly doped layer;

[0079] Specifically, the metal electrode is deposited by using an electron beam metal deposition device or a magnetron sputtering device. The material of the upper electrode can be a titanium aluminum alloy.

[0080] Step 140, preparing a back electrode on the substrate to obtain a phototransistor unit.

[0081] Specifically, an electron beam metal deposition device or a magnetron sputtering device is used to deposit the back electrode. The material of the back electrode can be a titanium aluminum alloy. Figure 3 As shown in , the function of the light-transmitting window area is to allow external light signals to enter the phototransistor for photoelectric conversion.

[0082] The preparation method of the phototransistor unit provided by the present invention can accurately control the doping concentration and thickness of functional layers such as the collector layer, the base layer and the emitter layer by using an epitaxial process, so as to better suppress the dark current of the phototransistor and increase the gain of the phototransistor. It overcomes the defects of the phototransistor prepared based on the bipolar tube or BiCMOS process, which includes the use of ion implantation to form a deeply buried high-doped silicon layer. The tailing effect of the ion implantation method will increase the doping concentration of the low-doped layer preset in the ion implantation path, affect the doping concentration and distribution of the doped layer, and affect the dark current and gain of the phototransistor. In short, the preparation method has a simple process flow and strong operability.

[0083] In order to better understand the technical solution provided by the present invention, the following uses a number of specific examples to illustrate the specific process of preparing a phototransistor unit using the method provided by the above embodiment of the present invention, as well as the performance of the prepared phototransistor.

[0084] Example 1

[0085] In the first step, a transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer are sequentially grown on a p-type single crystal silicon substrate by RPCVD technology to obtain an epitaxial structure of a phototransistor.

[0086] Among them, the transition layer, collector layer, first base layer, second base layer, emitter layer and highly doped layer are all made of single crystal silicon. The transition layer is unintentionally doped and has a thickness of 100nm. The epitaxial parameters of RPCVD are: temperature 900°C, pressure 7980Pa, and the epitaxial gases are dichlorosilane and hydrogen.

[0087] The collector layer is doped with B at a concentration of 8×10 14 / cm 3 , thickness is 100nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0088] The doping element of the first base electrode layer is P, and the doping concentration is 1×10 14 / cm 3 , thickness is 50nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0089] The doping element of the second base electrode layer is P, and the doping concentration is 6×10 16 / cm 3 , thickness is 200nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0090] The doping element of the emitter layer is B, and the doping concentration is 2×10 18 / cm 3 , thickness is 150nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0091] The doping element of the high-doped layer is B, and the doping concentration is 5×10 19 / cm 3 , thickness is 50nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0092] In the second step, an isolation region is arranged along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region.

[0093] First, ICP is used to etch the isolation trench, the depth-to-width ratio of the isolation trench is 4:1, and the etching gas is SF6.

[0094] Secondly, the epitaxial structure of the phototransistor with the isolation groove is placed in a high-temperature oxidation furnace, and a thermal dry oxidation process is performed in an oxygen atmosphere to form a silicon dioxide passivation layer on the surface of the epitaxial structure and the surface of the isolation groove. The thermal dry oxidation temperature is 950°C.

[0095] Finally, using the HDPCVD method, at 399Pa and 300°C, a 900nm thick silicon dioxide layer was deposited to fill the isolation grooves and form an isolation region.

[0096] In the third step, an upper electrode TiAl alloy electrode is prepared on the high-doped layer by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm.

[0097] In the fourth step, a back electrode TiAl alloy electrode is prepared on the substrate by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm, thereby obtaining a 60 μm×60 μm phototransistor unit.

[0098] Afterwards, the phototransistor responsivity test system was used to test the responsivity of the phototransistor unit. The test conditions were: input light wavelength: 600nm-800nm; and pulse 850nm light was used to irradiate the phototransistor unit. The waveform of the pulse signal output by the phototransistor unit was observed with an oscilloscope. The bias voltage between the upper electrode and the back electrode was 3V.

[0099] Example 2

[0100] In the first step, a transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer are sequentially grown on a p-type single crystal silicon substrate by RPCVD technology to obtain an epitaxial structure of a phototransistor.

[0101] Among them, the transition layer, collector layer, first base layer, second base layer, emitter layer and highly doped layer are all made of single crystal silicon. The transition layer is unintentionally doped and has a thickness of 100nm. The epitaxial parameters of RPCVD are: temperature 900°C, pressure 7980Pa, and the epitaxial gases are dichlorosilane and hydrogen.

[0102] The collector layer is doped with B at a concentration of 1×10 15 / cm 3 , thickness is 300nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0103] The doping element of the first base electrode layer is P, and the doping concentration is 2×10 14 / cm 3 , thickness is 40nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0104] The doping element of the second base electrode layer is P, and the doping concentration is 9×10 16 / cm 3 , thickness is 190nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0105] The doping element of the emitter layer is B, and the doping concentration is 4×1018 / cm 3 , thickness is 120nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0106] The doping element of the high-doped layer is B, and the doping concentration is 5×10 19 / cm 3 , thickness is 50nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0107] In the second step, an isolation region is arranged along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region.

[0108] First, ICP is used to etch the isolation groove, the depth-to-width ratio of the isolation groove is 5:1, and the etching gas can specifically be SF6.

[0109] Secondly, the epitaxial structure of the phototransistor with the isolation groove is placed in a high-temperature oxidation furnace, and a thermal dry oxidation process is performed in an oxygen atmosphere to form a silicon dioxide passivation layer on the surface of the epitaxial structure and the surface of the isolation groove. The thermal dry oxidation temperature is 950°C.

[0110] Finally, using the HDPCVD method, at 399 Pa and 300°C, 1100nm thick silicon dioxide is deposited to fill the isolation grooves and form an isolation region.

[0111] In the third step, an upper electrode TiAl alloy electrode is prepared on the high-doped layer by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm.

[0112] In the fourth step, a back electrode TiAl alloy electrode is prepared on the substrate by electron beam metal deposition method, the thickness of Ti metal is 20nm, and the thickness of Al metal is 300nm, so as to obtain a 60μm×60μm phototransistor unit.

[0113] Afterwards, the phototransistor responsivity test system was used to test the responsivity of the phototransistor unit. The test conditions were: input light wavelength: 600nm-800nm; and pulse 850nm light was used to irradiate the phototransistor unit. The waveform of the pulse signal output by the phototransistor unit was observed with an oscilloscope. The bias voltage between the upper electrode and the back electrode was 3V.

[0114] Comparative Example 1

[0115] In the first step, a transition layer, a collector layer, a base layer and an emitter layer are grown in sequence on a p-type single crystal silicon substrate by RPCVD technology to obtain the epitaxial structure of the phototransistor.

[0116] Among them, the transition layer, collector layer, base layer and emitter layer are all made of single crystal silicon. The transition layer is unintentionally doped and has a thickness of 100nm. The RPCVD epitaxial parameters are: temperature 900°C, pressure 7980Pa, and the epitaxial gases are dichlorosilane and hydrogen.

[0117] The collector layer is doped with B at a concentration of 8×10 13 / cm 3 , thickness is 3000nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and borane.

[0118] The base layer is doped with P at a concentration of 5×10 17 / cm 3 , thickness is 300nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0119] The doping element of the emitter layer is B, and the doping concentration is 2×10 19 / cm 3 , thickness is 200nm, the RPCVD epitaxial parameters are: temperature 900℃, pressure 7980Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0120] In the second step, ICP is used to etch the isolation groove, the depth-to-width ratio of the isolation groove is 18:1, and the etching gas can be SF6.

[0121] Secondly, the epitaxial structure of the phototransistor with the isolation groove is placed in a high-temperature oxidation furnace, and a thermal dry oxidation process is performed in an oxygen atmosphere to form a silicon dioxide passivation layer on the surface of the epitaxial structure and the surface of the isolation groove. The thermal dry oxidation temperature is 950°C.

[0122] The third step is to use the HDPCVD method to deposit 3600nm thick silicon dioxide to fill the isolation groove and form an isolation area at 399Pa and 300℃.

[0123] In the fourth step, an upper electrode TiAl alloy electrode is prepared on the high-doped layer by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm.

[0124] In the fifth step, a back electrode TiAl alloy electrode is prepared on the substrate by electron beam metal deposition method, the thickness of Ti metal is 20nm, and the thickness of Al metal is 300nm, so as to obtain a 60μm×60μm phototransistor unit.

[0125] Afterwards, the phototransistor responsivity test system was used to test the responsivity of the phototransistor unit. The test conditions were: input light wavelength: 600nm-800nm; and pulse 850nm light was used to irradiate the phototransistor unit. The oscilloscope observed the waveform of the phototransistor unit output pulse signal. The bias voltage between the upper electrode and the back electrode was 3V.

[0126] Table 1 is a table of test results of signal rise time and fall time of the phototransistor provided by an embodiment of the present invention.

[0127]

[0128] Table 1

[0129] It should be noted that the rise time is defined as the time required for the signal waveform to rise from 10% to 90%, and the fall time is defined as the time required for the signal waveform to fall from 90% to 10%.

[0130] As shown in Table 1, the signal rise time and signal fall time of the phototransistor of the present invention are both shorter than those of Comparative Example 1, indicating that the signal reading time of the phototransistor of the present invention is greatly reduced. This is because the phototransistor of the present invention utilizes an ultra-thin collector layer, shortening the transit distance of the photogenerated carriers, and under a strong electric field, the speed of the photogenerated carriers approaches the saturation drift speed, which shortens the transit time of the photogenerated carriers, resulting in a greatly reduced signal reading time of the phototransistor.

[0131] like Figure 5 As shown in , the phototransistor of the present invention has a higher responsiveness than comparative example 1. This is because the present invention utilizes the principle of realizing enhanced photoelectric conversion under the non-equilibrium conditions of a strong electric field and a pn junction using an extremely thin collector layer, and by adjusting the thickness and doping concentration of the collector layer, the base and the emitter, as well as the base and emitter structures, the photogenerated carrier extraction efficiency and gain of the phototransistor are optimized, thereby increasing the responsiveness of the phototransistor.

[0132] Example 3

[0133] In the first step, a transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer are sequentially grown on an n-type single crystal silicon substrate by LPCVD technology to obtain an epitaxial structure of a phototransistor.

[0134] Among them, the transition layer, collector layer, emitter layer and high-doped layer are all made of single crystal silicon, the first base layer and the second base layer are made of single crystal silicon-germanium alloy, the transition layer is low-concentration doped with a thickness of 300nm, and the LPCVD epitaxial parameters are: temperature 850, pressure 133.2Pa, and the epitaxial gases are dichlorosilane and hydrogen.

[0135] The collector layer is doped with P, and the doping concentration is 5×10 13 / cm 3 , thickness is 1000nm, LPCVD epitaxial parameters are: temperature 850, pressure 133.2Pa, epitaxial gas is dichlorodihydrogen silicon, hydrogen and phosphine.

[0136] The doping element of the first base electrode layer is B, and the doping concentration is 4×10 13 / cm 3 , thickness is 10nm, LPCVD epitaxial parameters are: temperature 850, pressure 133.2Pa, epitaxial gas is dichlorosilane, hydrogen, germane and borane.

[0137] The doping element of the second base electrode layer is B, and the doping concentration is 5×10 18 / cm 3 , thickness is 50nm, LPCVD epitaxial parameters are: temperature 850, pressure 133.2Pa, epitaxial gas is dichlorodihydrogen silicon, hydrogen, germane and borane.

[0138] The doping element of the emitter layer is P, and the doping concentration is 1×10 19 , thickness is 50nm, the LPCVD epitaxial parameters are: temperature 850, pressure 133.2Pa, and the epitaxial gases are dichlorosilane, hydrogen and phosphine.

[0139] The doping element of the high-doped layer is P, and the doping concentration is 3×10 20 / cm 3 , thickness is 30nm, LPCVD epitaxial parameters are: temperature 850, pressure 133.2Pa, epitaxial gas is dichlorodihydrogen silicon, hydrogen and phosphine.

[0140] In the second step, an isolation region is arranged along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region.

[0141] First, ICP is used to etch the isolation trench, the depth-to-width ratio of the isolation trench is 4:1, and the etching gas is C4F8.

[0142] Secondly, the epitaxial structure of the phototransistor with the isolation groove is placed in a high-temperature oxidation furnace, and a thermal dry oxidation process is performed in an oxygen atmosphere to form a silicon dioxide passivation layer on the surface of the epitaxial structure and the surface of the isolation groove. The thermal dry oxidation temperature is 950°C.

[0143] Finally, using the PECVD method, at 250Pa and 300°C, a 900nm thick silicon nitride layer is deposited to fill the isolation groove and form an isolation region.

[0144] In the third step, an upper electrode TiAl alloy electrode is prepared on the high-doped layer by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm.

[0145] In the fourth step, a back electrode TiAl alloy electrode is prepared on the substrate by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm, thereby obtaining a 60 μm×60 μm phototransistor unit.

[0146] Example 4

[0147] In the first step, a transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer are sequentially grown on a p-type single crystal silicon substrate by UHVCVD technology to obtain an epitaxial structure of a phototransistor.

[0148] Among them, the transition layer, collector layer, emitter layer and high-doped layer are all made of single crystal silicon, the first base layer and the second base layer are made of single crystal silicon-germanium alloy, the transition layer is low-concentration doped and has a thickness of 500nm. The epitaxial parameters of UHVCVD are: temperature 560°C, pressure 6.67Pa, and the epitaxial gases are silane and hydrogen.

[0149] The collector layer is doped with B at a concentration of 1×10 16 / cm 3 , thickness is 800nm, UHVCVD epitaxial parameters are: temperature 560℃, pressure 6.67Pa, epitaxial gases are silane, hydrogen and borane.

[0150] The doping element of the first base electrode layer is P, and the doping concentration is 4×10 15 / cm 3 , thickness is 100nm, UHVCVD epitaxial parameters are: temperature 560℃, pressure 6.67Pa, epitaxial gases are silane, hydrogen, germane and phosphine.

[0151] The doping element of the second base electrode layer is P, and the doping concentration is 1×10 16 / cm 3 , thickness is 500nm, the UHVCVD epitaxial parameters are: temperature 560℃, pressure 6.67Pa, and the epitaxial gases are silane, hydrogen, germane and phosphine.

[0152] The doping element of the emitter layer is B, and the doping concentration is 1×10 17 / cm 3 , thickness is 50nm, the epitaxial parameters of UHVCVD are: temperature 560℃, pressure 6.67Pa, and the epitaxial gases are silane, hydrogen and borane.

[0153] The doping element of the high-doped layer is B, and the doping concentration is 5×1018 / cm 3 , thickness is 200nm, UHVCVD epitaxial parameters are: temperature 560℃, pressure 6.67Pa, epitaxial gases are silane, hydrogen and borane.

[0154] In the second step, an isolation region is arranged along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region.

[0155] First, ICP is used to etch the isolation trench, the depth-to-width ratio of the isolation trench is 5:1, and the etching gas is C4F8.

[0156] Secondly, the epitaxial structure of the phototransistor with the isolation groove is placed in a high-temperature oxidation furnace, and a thermal dry oxidation process is performed in an oxygen atmosphere to form a silicon dioxide passivation layer on the surface of the epitaxial structure and the surface of the isolation groove. The thermal dry oxidation temperature is 950°C.

[0157] Finally, using the PECVD method, at 250Pa and 300°C, a 900nm thick silicon nitride layer is deposited to fill the isolation groove and form an isolation region.

[0158] In the third step, an upper electrode TiAl alloy electrode is prepared on the high-doped layer by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm.

[0159] In the fourth step, a back electrode TiAl alloy electrode is prepared on the substrate by electron beam metal deposition, with a Ti metal thickness of 20 nm and an Al metal thickness of 300 nm, thereby obtaining a 60 μm×60 μm phototransistor unit.

[0160] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A phototransistor for a CMOS image sensor, characterized in that: The epitaxial structure of the phototransistor comprises: a substrate, a collector layer, a first base layer, a second base layer, an emitter layer and a highly doped layer; The collector layer is arranged on the substrate, the thickness of the collector layer is 100nm-1000nm, and the doping concentration is 5×10 13 / cm 3 -1×10 16 / cm 3 ; The first base layer is disposed on the collector layer, and the doping type of the first base layer is opposite to the doping type of the collector layer; The second base layer is disposed on the first base layer, and the doping type of the second base layer is the same as the doping type of the first base layer; The emitter layer is arranged on the second base layer, and the doping type of the emitter layer is the same as the doping type of the collector layer; The highly doped layer is disposed on the emitter layer, and the doping type of the highly doped layer is the same as the doping type of the emitter layer; wherein the doping concentration of the highly doped layer is greater than the doping concentration of the emitter layer; Under an applied voltage of less than 6V, the average electric field strength inside the collector layer of the phototransistor is 5×10 4 V / cm-3×10 5 V / cm.

2. The phototransistor according to claim 1, characterized in that: The epitaxial structure of the phototransistor further comprises a transition layer; the transition layer is arranged between the substrate and the collector layer; the thickness of the transition layer is 0nm-500nm, and the doping method is unintentional doping or low-concentration doping, wherein the doping concentration of the low-concentration doping is 1×10 13 / cm 3 -1×10 15 / cm 3 .

3. The phototransistor according to claim 1, characterized in that: The substrate includes an n-type single crystal silicon substrate, a p-type single crystal silicon substrate or an SOI-type single crystal silicon substrate.

4. The phototransistor according to claim 1, characterized in that: The material of the first base layer is single crystal silicon or single crystal silicon germanium alloy, and the doping concentration is 4×10 13 / cm 3 -4×10 15 / cm 3 The material of the second base layer is single crystal silicon or single crystal silicon germanium alloy, and the doping concentration is 1×10 16 / cm 3 -5×10 18 / cm 3 ; Wherein, the chemical formula of the single crystal silicon germanium alloy is Si x Ge 1-x ,0 <x<1。 5. The phototransistor according to claim 1, characterized in that: The thickness of the first base layer is 10nm-100nm; the thickness of the second base layer is 50nm-500nm.

6. The phototransistor according to claim 1, characterized in that: The doping concentration of the emitter layer is 1×10 17 / cm 3 -1×10 19 / cm 3 , thickness is 50nm-300nm.

7. The phototransistor according to claim 1, characterized in that: The doping concentration of the high-doped layer is 5×10 18 / cm 3 -3×10 20 / cm 3 , thickness is 30nm-200nm.

8. The phototransistor according to claim 1, characterized in that: The phototransistor further comprises: an upper electrode, a back electrode and an isolation region; The upper electrode is located on the highly doped layer of the epitaxial structure; The back electrode is located under the substrate of the epitaxial structure; The isolation region is arranged perpendicular to the epitaxial structure.

9. A phototransistor unit, characterized in that: The phototransistor unit comprises the phototransistor of the CMOS image sensor according to any one of claims 1-8.

10. A method for preparing the photoelectric triode unit according to claim 9, characterized in that: The preparation method comprises: A transition layer, a collector layer, a first base layer, a second base layer, an emitter layer and a high-doping layer are sequentially grown on the substrate to obtain an epitaxial structure of a phototransistor; Arranging an isolation region along the vertical direction of the epitaxial structure of the phototransistor to obtain a phototransistor array separated by the isolation region; preparing an upper electrode on the highly doped layer; A back electrode is prepared under the substrate to obtain the photoelectric triode unit.

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