Digital-analog hybrid LDO (Low Dropout Regulator) suitable for high-speed signal interface circuit and FinFet process
By designing digital-to-analog hybrid LDO in high-speed signal interface circuit, combining analog and digital LDO modules, and adjusting the output voltage and current using light-load and heavy-load drive modules, the output voltage accuracy of traditional analog LDO in low-voltage and high-speed signal interface circuits is solved. The problem of reduced and weakened transient response has achieved an effect suitable for low-voltage operation and high-speed response.
Patent Information
- Application Number
- CN202411776106.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2024-12-31
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Traditional analog LDOs have problems such as reduced output voltage accuracy, weakened transient response and poor withstand voltage performance in low-voltage and high-speed signal interface circuits, which are difficult to meet the transient high-current requirements during high-speed read and write.
Design a digital-to-analog hybrid LDO, combining analog LDO and digital LDO modules, detect the output voltage through the control module and adjust the parameters of the digital LDO module. The light load and heavy load drive module are used to adjust the output voltage and under light and heavy load conditions respectively. Current, improve transient response and power rejection.
It achieves performance suitable for low-voltage operation, low power consumption and fast transient response, meets the transient high current requirements of high-speed interface circuits, and has lower area and good process portability in advanced processes, and is in light load It has good power rejection and has small ripple during heavy loads.
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Figure CN119232138A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor technology, and in particular to a digital-analog hybrid LDO suitable for a high-speed signal interface circuit and a FinFet process. Background Art
[0002] FinFET process is an innovative complementary metal oxide semiconductor (CMOS) transistor technology, which is derived from the design of the traditional standard field effect transistor (Field-Effect Transistor, FET). FinFET is called FinField-Effect Transistor, and its Chinese name is Fin Field Effect Transistor. Its name comes from the similarity between the shape of the transistor and the fin of a fish. The main innovation of the FinFET process lies in its 3D architecture design. In the traditional transistor structure, the gate that controls the passage of current can only control the connection and disconnection of the circuit on one side of the gate, which is a planar architecture. In the FinFET architecture, the gate is designed as a forked 3D architecture similar to a fish fin, which can control the connection and disconnection of the circuit on both sides of the circuit. This design greatly improves circuit control, reduces leakage current, and also greatly shortens the gate length of the transistor.
[0003] LDO (Low Dropout Regulator) is a low dropout linear regulator. It is a linear regulator that uses a transistor or FET operating in its linear region to subtract excess voltage from the applied input voltage to produce a regulated output voltage. The main feature of LDO is low voltage drop, that is, the difference between the input voltage and the output voltage is small. The working principle of LDO is based on the design of a linear regulator. By adding a transistor or FET inside it, the excess voltage is subtracted from the input voltage to produce a stable output voltage. When the input voltage is higher than the output voltage, the transistor or FET operates in the linear region, dropping the excess voltage to keep the output voltage stable. This design enables LDO to operate at a lower potential difference between input and output, and the minimum potential difference can usually be controlled below 1V when operating stably.
[0004] Traditional analog LDO has the advantages of high output accuracy and small output voltage ripple. However, with the development of process, the external power supply voltage VDD is reduced, the transistor size is miniaturized, and the disadvantages of traditional analog LDO are also manifested: 1. Reduced output voltage accuracy: Process evolution leads to a decrease in channel length, and the gain is reduced accordingly. In addition, the drop in power supply voltage makes the voltage margin of the operational amplifier insufficient, making it difficult to enter the saturation region, further reducing the gain and resulting in reduced output voltage accuracy. 2. Weakened transient response: The reduction in gain will affect the transient response characteristics of the LDO, making it less adaptable to load changes. 3. Voltage withstand problem: However, the voltage withstand performance of advanced process devices is poor, and the device is more likely to be broken down under high voltage. Summary of the invention
[0005] The purpose of the present invention is to provide a digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes. Compared with traditional analog LDOs, this method has the advantages of being suitable for low-voltage operation and low power consumption, and has a faster transient response, which can meet the needs of high-speed interface circuits for transient large currents during high-speed reading and writing. Compared with digital LDOs, this method has the advantages of good power supply suppression and can meet the needs of high-speed circuit modules such as PLL for power supply ripple. A digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes, comprising: an analog LDO module, a digital LDO module and a control module; The analog LDO module is connected to the digital LDO module and the control module, and is used to output a stable voltage; The digital LDO module is connected to the control module and is used to adjust the output voltage until it is stable when the output voltage changes; The control module is used to detect the output voltage and control the digital LDO module to adjust the output voltage.
[0006] Preferably, the digital LDO module comprises: a sink-DLDO module and a source-LDO module; The sink-DLDO module is connected to the control module and the analog LDO module, and is used to adjust the output voltage until it is stable; The source-LDO module is connected to the control module and the analog LDO module, and is used to adjust the output current according to the output voltage.
[0007] The sink-DLDO module includes a plurality of NMOSs, and the source-LDO module includes a plurality of PMOSs.
[0008] Preferably, the control module includes: a light-load drive module and a heavy-load drive module; The heavy-load drive module is used to generate a course control signal to control multiple power tubes simultaneously when the output voltage changes greatly; The light-load drive module is used to generate a fine control signal to control a single power tube when the output voltage changes slightly.
[0009] Preferably, the heavy-load driving module comprises: a dead zone control module, a high-side driving module, a low-side driving module, a first driving clamping module and a second driving clamping module; The high-side driver module is connected to the first driver clamp module; The first driver clamp module is connected to the low-side driver module; The low-side driving module is connected to the dead zone control module and the second driving clamping module.
[0010] Preferably, the light-load driving module comprises: a first NOT gate, a second NOT gate, a third NOT gate, a first NOR gate, a second NOR gate, a first delay unit, a second delay unit, a first AND gate, a second AND gate, a first buffer and a second buffer; The output end of the first NOT gate is connected to the input end of the first NOR gate and the input end of the second NOT gate; The output terminal of the second NOT gate is connected to the input terminal of the second NOR gate; The input end of the first NOR gate is connected to the input end of the second buffer, and the output end is connected to the input end of the first delay unit; The input end of the second NOR gate is connected to the output end of the first AND gate, and the output end is connected to the input end of the second delay unit; The output end of the first delay unit is connected to the input end of the first AND gate; The output end of the second delay unit is connected to the input end of the second AND gate; The output end of the first AND gate is connected to the input end of the third NOT gate; The output terminal of the second AND gate is connected to the second buffer; An input terminal of the first buffer is connected to an output terminal of the third NOT gate.
[0011] A digital-analog hybrid LDO control method applicable to a high-speed signal interface circuit and a FinFet process is applied to a digital-analog hybrid LDO applicable to a high-speed signal interface circuit and a FinFet process, comprising: Detect the output voltage of the analog LDO; The parameters of the digital LDO module are adjusted according to the output voltage of the analog LDO until the output voltage is stable.
[0012] Preferably, adjusting the parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable comprises: When the system is under heavy load, the output voltage changes greatly transiently, and the control module generates a course control signal to quickly adjust the current of the sink-source module by increasing the number of power tubes.
[0013] Preferably, adjusting the parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable comprises: When the system is under heavy load, the output voltage transient change is small, and the control module generates a fine control signal to finely control the sink-source current by adjusting the gate voltage of a single power tube.
[0014] An electronic device comprises: a chip, a processor and a memory, wherein the memory is used to store computer program codes, and the computer program codes include computer instructions. When the chip executes the computer instructions, the electronic device executes a digital-analog hybrid LDO control method suitable for high-speed signal interface circuits and FinFet processes.
[0015] The beneficial effects of the present invention are as follows: compared with the traditional analog LDO, the present invention has the following advantages: 1. It is suitable for low-voltage operation and has low power consumption; 2. It has a faster transient response under heavy load conditions, which can meet the transient large current requirements of high-speed interface circuits during high-speed reading and writing; 3. It has a lower area in advanced processes and has the advantages of good process portability. Compared with the digital LDO, the present invention has the following advantages: 1. When lightly loaded, only the analog module works, and the power supply suppression is good; 2. When moderately loaded, the digital LDO is adjusted using a fine control signal, and the ripple is small, which can meet the power supply ripple requirements of high-speed circuit modules such as PLL. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor. Figure 1 A schematic diagram of a digital-analog hybrid LDO structure suitable for high-speed signal interface circuits and FinFet processes according to the present invention; Figure 2 It is a structural schematic diagram of a heavy-duty drive module of the present invention; Figure 3 This is a structural schematic diagram of a light-load drive module of the present invention; Figure 4 The figure is a schematic diagram of the hardware structure of an electronic device of the present invention. DETAILED DESCRIPTION
[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0018] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0019] In addition, the descriptions of "first", "second", etc. in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0020] Traditional analog LDO has the advantages of high output accuracy and small output voltage ripple. However, with the development of process, the external power supply voltage VDD is reduced, the transistor size is miniaturized, and the disadvantages of traditional analog LDO are also manifested: 1. Reduced output voltage accuracy: Process evolution leads to a decrease in channel length, and the gain is reduced accordingly. In addition, the drop in power supply voltage makes the voltage margin of the operational amplifier insufficient, making it difficult to enter the saturation region, further reducing the gain and resulting in reduced output voltage accuracy. 2. Weakened transient response: The reduction in gain will affect the transient response characteristics of the LDO, making it less adaptable to load changes. 3. Voltage withstand problem: However, the voltage withstand performance of advanced process devices is poor, and the device is more likely to be broken down under high voltage.
[0021] Compared with the traditional analog LDO, the present invention has the following advantages: 1. It is suitable for low voltage operation and has low power consumption; 2. It has a faster transient response and can meet the transient large current requirements of high-speed interface circuits during high-speed reading and writing; 3. It has a lower area in advanced processes and has the advantages of good process portability. Compared with the digital LDO, the present invention has the following advantages: 1. When lightly loaded, only the analog module works and the power supply suppression is good; 2. When heavily loaded, the digital LDO is adjusted using a fine control signal, and the ripple is small, which can meet the power supply ripple requirements of high-speed circuit modules such as PLL.
[0022] Example 1 A digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes, reference Figure 1 , including: analog LDO module, digital LDO module and control module; The analog LDO module is connected with the digital LDO module and the control module to output a stable voltage; Analog LDO (Low Dropout Regulator) is a linear regulator used to ensure a stable output voltage within a certain input voltage variation range and load variation range. It controls the output voltage through an internal feedback loop to keep it at a constant value. Analog LDO is often used in application scenarios that require low noise and high precision, such as mobile devices and IoT devices.
[0023] The digital LDO module is connected to the control module and is used to adjust the output voltage until it is stable when the output voltage changes; Digital LDO (Low Dropout Regulator) is a low dropout linear regulator whose main feature is that it can maintain a specified output voltage over a wide range of load current and input voltage, and the difference between input and output voltage can be very small. This feature makes LDO widely used in various scenarios that require voltage regulation output.
[0024] The control module is used to detect the output voltage and control the digital LDO module to adjust the output voltage.
[0025] The embodiment of the present invention senses the output voltage to determine whether it is a light / medium / heavy load, thereby adjusting the control signal of the digital LDO. For medium and low loads, only the analog LDO or the fine-controlled digital LDO is enabled to improve the output voltage stability. For heavy loads, the course-controlled digital LDO is enabled to improve the transient response. The advantages of the small output ripple of the analog LDO and the good transient response of the digital LDO are combined.
[0026] Preferably, the digital LDO module comprises: a sink-DLDO module and a source-LDO module; The sink-DLDO module is connected to the control module and the analog LDO module to adjust the output voltage until it is stable; The source-LDO module is connected to the control module and the analog LDO module, and is used to adjust the output current according to the output voltage.
[0027] The sink-DLDO module includes a plurality of NMOSs, and the source-LDO module includes a plurality of PMOSs.
[0028] In the embodiment of the present invention, the analog LDO is used as the main module. When the VOUT changes slightly under light load, the analog LDO provides a stable voltage. The digital LDO includes a sink-DLDO (a plurality of NMOS power tubes) and a source-LDO (a plurality of PMOS power tubes), which works in transient response. When VOUT changes, the sink-source current is used to adjust VOUT to make it stable.
[0029] Preferably, the control module includes: a light-load drive module and a heavy-load drive module; The light-load drive module is used to generate course control signals and control multiple power tubes simultaneously when the output voltage changes greatly; The heavy-load drive module is used to generate a fine control signal to control a single power tube when the output voltage changes slightly.
[0030] Both the light-load drive module and the heavy-load drive module are modules used to control and drive high-power electronic devices. They ensure the safe operation of power semiconductor devices such as IGBT and MOSFET by providing the energy and protection functions required for the switching process. The main function of the light-load drive module and the heavy-load drive module is to provide the power required for the switching device to turn on and off, and to provide protection functions to ensure the reliability and safety of the chip. Preferably, reference Figure 2 , the heavy-load drive module includes: a dead zone control module, a high-side drive module, a low-side drive module, a first drive clamp module and a second drive clamp module; The high-side driver module is connected to the first driver clamp module; The first driver clamp module is connected to the low-side driver module; The low-side driving module is connected to the dead zone control module and the second driving clamping module.
[0031] In an embodiment of the present invention, the dead zone control module includes: an OR gate (OR1), two delay modules and an AND gate (AND1); The input end of the OR gate (OR1) is connected to the input end of the first delay module and the input end of the AND gate (AND1), and the output end is connected to the input end of the second delay module; The output of the AND gate (AND1) is connected to the bottom side driver module. The function of the dead zone control module is to prevent short circuits between power switching devices. In power converters such as inverters or H-bridge circuits, when the previous switch is turned off and the next switch is turned on, there must be a short time interval, namely the dead zone time, to prevent the two switches from being turned on at the same time and causing a power short circuit.
[0032] The high-side driver module includes: NOT gate (INV1), NOT gate (INV2), MOS tube (M1), MOS tube (M3); The input end of the NOT gate (INV1) is connected to the level shift circuit, and the output end is connected to the NOT gate (INV2); The output end of the NOT gate (INV2) is connected to the gate of the MOS tube (M1); The source of the MOS tube (M1) is connected to a high level, and the drain is connected to the bottom drive module; The source of the MOS tube (M3) is connected to a high level, and the drain is connected to the output voltage. The function of the high-side driver module is to drive and protect the load while providing flexibility and low power consumption.
[0033] The bottom edge driving module includes: MOS tube (M2), MOS tube (M4); The gate of the MOS tube (M2) is connected to the dead zone control module, the drain is connected to the MOS tube (M1), and the source is connected to the current source (I1); The source of the MOS tube (M4) is connected to the output voltage, and the drain is grounded. The function of the low-side driver is to control the on and off of the load by closing the ground wire, which is suitable for scenarios where circuit design needs to be simplified and cost needs to be controlled. The low-side driver adds a controllable switch to the ground end of the circuit, and controls the working state of the load by controlling the on and off of this switch. The circuit design of the low-side driver is relatively simple, usually consisting of a MOS tube and several resistors and capacitors. Due to the simple circuit design, the low-side driver is suitable for scenarios where cost needs to be controlled, especially when complex communication is not required. The specific working principle of the low-side driver is: a controllable switch is added to the ground end of the circuit. When the switch is turned on, one end of the load is connected to the ground, and the load starts to work; when the switch is turned off, the load is disconnected from the ground, and the load stops working. The main difference between the high-side driver and the low-side driver is the position of the switch. The switch of the low-side driver is located between the load and the ground, while the switch of the high-side driver is located between the power supply and the load. The low-side driver is suitable for circuit simplification and cost control, while the high-side driver is suitable for situations that require high reliability and complex control.
[0034] The function of the driver clamp module is to release the reverse impact current of the inductive load, making the use of the driver, stepper motor or switching power tube safer and more reliable. It is widely used in circuits such as toy car motor drive, stepper motor drive and switching power tube. Especially in high-power motors, the drive circuit and the control circuit are usually integrated. The drive circuit is responsible for outputting electric power, driving the armature winding of the motor, and is controlled by the control circuit. The specific working principle of the driver clamp module is realized through the clamp diode. The clamp diode can prevent the voltage from exceeding the predetermined value and protect other components in the circuit from damage. In the brushless motor driver, the clamp diode can release the reverse impact current generated by the inductive load when it is turned off, ensuring the stability and safety of the circuit. The driver clamp module has a strong current resistance capability, which can effectively resist excessive current and protect other components on the circuit board from damage.
[0035] Preferably, reference Figure 3 The light-load driving module includes: a first NOT gate, a second NOT gate, a third NOT gate, a first NOR gate, a second NOR gate, a first delay unit, a second delay unit, a first AND gate, a second AND gate, a first buffer and a second buffer; The output terminal of the first NOT gate is connected to the input terminal of the first NOR gate and the input terminal of the second NOT gate; The output terminal of the second NOT gate is connected to the input terminal of the second NOR gate; An input end of the first NOR gate is connected to an input end of the second buffer, and an output end is connected to an input end of the first delay unit; The input end of the second NOR gate is connected to the output end of the first AND gate, and the output end is connected to the input end of the second delay unit; The output end of the first delay unit is connected to the input end of the first AND gate; The output end of the second delay unit is connected to the input end of the second AND gate; An output terminal of the first AND gate is connected to an input terminal of the third NOT gate; An output terminal of the second AND gate is connected to the second buffer; The input terminal of the first buffer is connected to the output terminal of the third NOT gate.
[0036] Since the power tube has a large gate parasitic capacitance, the output signal of the light-load drive module needs to be buffered to ensure sufficient driving capability to achieve rapid switching of the power tube on and off. Compared with the power tube drive circuit using complex processes, the embodiment of the present invention can be implemented using ordinary circuit elements, which can significantly reduce the chip area and manufacturing cost. It has the advantage of a large operating voltage range and can be widely used in different circuit scenarios.
[0037] Example 2 A digital-analog hybrid LDO control method applicable to a high-speed signal interface circuit and a FinFet process is applied to a digital-analog hybrid LDO applicable to a high-speed signal interface circuit and a FinFet process, comprising: S100, detecting the output voltage of the analog LDO; Analog LDOs are mainly composed of an error amplifier, a reference voltage source, and an output transistor. When the input voltage or load changes, the error amplifier continuously compares the feedback signal of the output voltage with the reference voltage, and controls the working state of the output transistor to keep the output voltage stable. Specifically, when the output voltage drops, the error amplifier reduces its output, thereby increasing the conduction degree of the output transistor, increasing the output current, and thus returning the output voltage to the set value. The main advantages of analog LDOs include low noise, high precision, and simple design. It is suitable for application scenarios that require low noise and high precision power supplies. However, analog LDOs have low efficiency and are not suitable for high current applications. In addition, their output voltage range is limited and usually requires external components for compensation to ensure stability.
[0038] S200, adjusting parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable.
[0039] The working principle of digital LDO is to subtract the excess voltage from the applied input voltage through a transistor or field effect transistor (FET) operating in its saturation region to produce a regulated output voltage. Compared with traditional DC-DC converters, LDO has the advantages of low cost, low noise, low quiescent current, and requires few external components. This makes LDO widely used in scenarios where a regulated output is required. The main application scenarios of digital LDO include various electronic devices that require a regulated output. Due to its advantages such as low noise, low ripple, and low heat loss, LDO is widely used in portable devices, communication equipment, instrumentation and other fields.
[0040] Preferably, S200, adjusting the parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable includes: When the system is under heavy load, the output voltage changes greatly transiently, and the control module generates a course control signal to quickly adjust the current of the sink-source module by increasing the number of power tubes.
[0041] In an embodiment of the present invention, the parameters of the light-load drive module and the heavy-load drive module are adjusted by a control signal generated by a control module. The light-load drive module and the heavy-load drive module turn on different numbers of power tubes according to changes in the parameters. The current can be effectively adjusted by increasing or decreasing the number of power tubes.
[0042] Power tubes (such as MOSFET, IGBT, etc.) are used as switches or amplifiers in circuits to control the amount of current passing through them. When multiple power tubes are connected in parallel, they can share the current, allowing a larger total current to pass. Conversely, reducing the number of power tubes in parallel will limit the total current passing through. Increase current capacity in parallel: By connecting multiple power tubes in parallel, each tube can bear a part of the current, so the total current capacity is the sum of the current capacities of the individual tubes. This method is often used in situations where high current output is required, such as motor drives, power conversion, etc. Control the switch state: By precisely controlling the switch state (on or off) of each power tube, the current passing through the circuit can be further fine-tuned. For example, in PWM (pulse width modulation) technology, the average current size is adjusted by changing the duty cycle of the power tube on time.
[0043] Preferably, S200, adjusting the parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable includes: When the system is under heavy load, the output voltage transient change is small, and the control module generates a fine control signal to finely control the sink-source current by adjusting the gate voltage of a single power tube.
[0044] The control module senses the output voltage. When the output voltage changes transiently greatly under heavy load, the control module generates a course control signal to turn on a certain number of power tubes to adjust the sink-source current. When the output voltage changes transiently under heavy load, the control module generates a fine control signal to adjust the gate voltage of a single power tube to finely control the sink-source current.
[0045] The main difference between the light-load drive module and the heavy-load drive module lies in the difference in load current and working efficiency. The light-load drive module is used when the load is light, while the heavy-load drive module is used when the load is heavy. The light-load drive module is suitable for situations where the load is light. When the load is light, the current is small, the power consumption is also small, the conversion efficiency is relatively low, and the main power consumption is at the front end. For example, in a switching power supply, when the load connected to the back end is small, the current flowing through the load is large, and the power consumed is large, which is called heavy load. At this time, the conversion efficiency is high, and the main power consumption is on the load at the back end. The heavy-load drive module is suitable for situations where the load is heavy. When the load is heavy, the current is large and the power consumption is large, which is called heavy load. When overloaded, the rated power of the inverter will be smaller to adapt to the larger load current and overload factor.
[0046] Example 3 An electronic device comprises: a chip, a processor and a memory, wherein the memory is used to store computer program codes, and the computer program codes include computer instructions. When the chip executes the computer instructions, the electronic device executes a digital-analog hybrid LDO control method suitable for high-speed signal interface circuits and FinFet processes.
[0047] refer to Figure 4 , the electronic device 2 includes a processor 21, a memory 22, an input device 23, and an output device 24. The processor 21, the memory 22, the input device 23, and the output device 24 are coupled via a connector, and the connector includes various interfaces, transmission lines, or buses, etc., which are not limited in the embodiments of the present invention. It should be understood that in various embodiments of the present invention, coupling refers to mutual connection in a specific manner, including direct connection or indirect connection through other devices, for example, through various interfaces, transmission lines, buses, etc.
[0048] The processor 21 may be one or more graphics processing units (GPUs). When the processor 21 is a GPU, the GPU may be a single-core GPU or a multi-core GPU. Optionally, the processor 21 may be a processor group consisting of multiple GPUs, and the multiple processors are coupled to each other via one or more buses. Optionally, the processor may also be other types of processors, etc., which are not limited in the embodiments of the present invention.
[0049] The memory 22 can be used to store computer program instructions and various computer program codes including program codes for executing the scheme of the present invention. Optionally, the memory includes but is not limited to random access memory (RAM), read-only memory (ROM), erasable programmable read only memory (EPROM), or portable read only memory (CD-ROM), which is used for related instructions and data.
[0050] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 may be independent devices or an integrated device.
[0051] Compared with the traditional analog LDO, the present invention has the following advantages: 1. It is suitable for low voltage operation and has low power consumption; 2. It has a faster transient response and can meet the transient large current requirements of high-speed interface circuits during high-speed reading and writing; 3. It has a lower area in advanced processes and has the advantages of good process portability. Compared with the digital LDO, the present invention has the following advantages: 1. When lightly loaded, only the analog module works and the power supply suppression is good; 2. When heavily loaded, the digital LDO is adjusted using a fine control signal, and the ripple is small, which can meet the power supply ripple requirements of high-speed circuit modules such as PLL.
[0052] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.
Claims
1. A digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes, characterized in that: include: Analog LDO module, digital LDO module and control module; The analog LDO module is connected to the digital LDO module and the control module, and is used to output a stable voltage; The digital LDO module is connected to the control module and is used to adjust the output voltage until it is stable when the output voltage changes; The control module is used to detect the output voltage and control the digital LDO module to adjust the output voltage.
2. A digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes according to claim 1, characterized in that: The digital LDO module includes: a sink-DLDO module and a source-LDO module; The sink-DLDO module is connected to the control module and the analog LDO module, and is used to adjust the output voltage until it is stable; The source-LDO module is connected to the control module and the analog LDO module, and is used to adjust the output current according to the output voltage.
3. A digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes according to claim 2, characterized in that: The sink-DLDO module includes a plurality of NMOSs, and the source-LDO module includes a plurality of PMOSs.
4. The digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes according to claim 2, characterized in that: The control module includes: a light-load drive module and a heavy-load drive module; The light-load drive module is used to generate a course control signal to control multiple power tubes simultaneously when the output voltage changes greatly; The heavy-load drive module is used to generate a fine control signal to control a single power tube when the output voltage changes slightly.
5. The digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes according to claim 4, characterized in that: The heavy-load driving module comprises: a dead zone control module, a high-side driving module, a low-side driving module, a first driving clamping module and a second driving clamping module; The high-side driver module is connected to the first driver clamp module; The first driver clamp module is connected to the low-side driver module; The low-side driving module is connected to the dead zone control module and the second driving clamping module.
6. A digital-analog hybrid LDO suitable for high-speed signal interface circuits and FinFet processes according to claim 4, characterized in that: The light-load driving module includes: a first NOT gate, a second NOT gate, a third NOT gate, a first NOR gate, a second NOR gate, a first delay unit, a second delay unit, a first AND gate, a second AND gate, a first buffer and a second buffer; The output end of the first NOT gate is connected to the input end of the first NOR gate and the input end of the second NOT gate; The output terminal of the second NOT gate is connected to the input terminal of the second NOR gate; The input end of the first NOR gate is connected to the input end of the second buffer, and the output end is connected to the input end of the first delay unit; The input end of the second NOR gate is connected to the output end of the first AND gate, and the output end is connected to the input end of the second delay unit; The output end of the first delay unit is connected to the input end of the first AND gate; The output end of the second delay unit is connected to the input end of the second AND gate; The output end of the first AND gate is connected to the input end of the third NOT gate; The output terminal of the second AND gate is connected to the second buffer; An input terminal of the first buffer is connected to an output terminal of the third NOT gate.
7. A digital-analog hybrid LDO control method applicable to high-speed signal interface circuits and FinFet processes, applied to a digital-analog hybrid LDO applicable to high-speed signal interface circuits and FinFet processes as claimed in any one of claims 1 to 6, characterized in that: include: Detect the output voltage of the analog LDO; The parameters of the digital LDO module are adjusted according to the output voltage of the analog LDO until the output voltage is stable.
8. The digital-analog hybrid LDO control method applicable to high-speed signal interface circuits and FinFet processes according to claim 7, characterized in that: The step of adjusting the parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable comprises: When the system is under heavy load, the output voltage changes greatly transiently, and the control module generates a course control signal to quickly adjust the current of the sink-source module by increasing the number of power tubes.
9. The digital-analog hybrid LDO control method applicable to high-speed signal interface circuits and FinFet processes according to claim 7, characterized in that: The step of adjusting the parameters of the digital LDO module according to the output voltage of the analog LDO until the output voltage is stable comprises: When the system is under heavy load, the output voltage transient change is small, and the control module generates a fine control signal to finely control the sink-source current by adjusting the gate voltage of a single power tube.
10. An electronic device, characterized in that: include: A chip, a processor and a memory, wherein the memory is used to store computer program codes, wherein the computer program codes include computer instructions. When the chip executes the computer instructions, the electronic device executes a digital-analog hybrid LDO control method suitable for a high-speed signal interface circuit and a FinFet process as described in any one of claims 6 to 8.
Citation Information
Patent Citations
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