Debugging method and debugging device of processor, chip, program product and vehicle

Abstract

The invention discloses a debugging method and device of a processor, a chip, a program product and a vehicle, the processor is at least provided with a first operating system and a second operating system, the first operating system and the second operating system are realized based on an independent core, and the debugging method comprises the following steps: the first operating system obtains a debugging command of a host; in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system and receives feedback data sent by the second operating system in response to the debugging command; and the first operating system sends feedback data to the host. In this way, the efficiency of interactive debugging can be improved.

Description

Technical Field

[0001] The present application relates to the field of chip debugging technology, and in particular to a debugging method, a debugging device, a chip, a program product and a vehicle for a processor. Background Art

[0002] As electronic products become smarter, they often run in multiple different functional scenarios at the same time, which requires multiple operating systems to operate simultaneously. For example, the cockpit control chip of an intelligent driving vehicle generally implements the navigation system, audio and video system, real-time operating system, etc.

[0003] For cost considerations, multiple operating systems will be run by the same processor (chip). Since the processor is installed with multiple different operating systems, how to interactively debug these operating systems has become a key issue in improving processor production efficiency during the production stage. Summary of the invention

[0004] To solve the above problems, the present application provides a debugging method, a debugging device, a chip, a program product and a vehicle for a processor, which can improve the efficiency of interactive debugging.

[0005] A technical solution adopted by the present application is: providing a debugging method for a processor, wherein the processor is installed with at least a first operating system and a second operating system, wherein the first operating system and the second operating system are implemented based on independent cores, and the debugging method comprises: the first operating system obtains a debugging command from a host; in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system, and receives feedback data sent by the second operating system in response to the debugging command; and the first operating system sends the feedback data to the host.

[0006] In one embodiment, a first operating system sends a debugging command to a second operating system, and receives feedback data sent by the second operating system in response to the debugging command, including: the first operating system sends a debugging command to a first cache area; the second operating system reads the debugging command from the first cache area; the second operating system sends feedback data to the second cache area in response to the debugging command; the first operating system reads the feedback data from the second cache area.

[0007] In one embodiment, after the first operating system sends the debugging command to the first buffer area, the method further includes: the first operating system sends first interrupt information to the second operating system, so that the second operating system reads the debugging command from the first buffer area.

[0008] In one embodiment, after the second operating system sends feedback data to the second buffer area in response to the debug command, the second operating system further includes: sending second interrupt information to the first operating system so that the first operating system reads the feedback data from the second buffer area.

[0009] In one embodiment, before the first operating system obtains the debugging command of the host, it also includes: when the processor is connected to the host, generating a main device node based on the first operating system, and generating a virtual device node based on the second operating system; wherein the main device node and the virtual device node are used to be identified by the host to send debugging instructions based on the main device node or the virtual device node; or, in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system, including: in response to the debugging command containing identification information of the second operating system, the first operating system sends the debugging command to the second operating system.

[0010] In one embodiment, the processor and the host are connected based on the adb protocol; the first operating system is an Android operating system or a Linux operating system, and the second operating system is a FreeRTOS operating system.

[0011] Another technical solution adopted by the present application is: providing a debugging device for a processor, wherein the processor is installed with at least a first operating system and a second operating system, wherein the first operating system and the second operating system are implemented based on independent cores, and the debugging device for the processor comprises: an acquisition module, through which the first operating system acquires a debugging command from a host; a first sending module and a receiving module, which are used to debug the second operating system in response to the debugging command, wherein the first operating system sends the debugging command to the second operating system through the first sending module, and receives feedback data sent by the second operating system in response to the debugging command through the receiving module; and a second sending module, through which the first operating system sends feedback data to the host.

[0012] Another technical solution adopted by the present application is: to provide a chip, the chip includes a processor and a memory, the memory is used to store program data, and the processor is used to execute the debugging method of the processor as described above.

[0013] Another technical solution adopted by the present application is to provide a computer program product, which is used to be executed by a processor to implement the debugging method of the processor as described above.

[0014] Another technical solution adopted by the present application is: to provide a vehicle, which includes the chip as described above.

[0015] The debugging method of the processor provided in the present application includes: the first operating system obtains the debugging command of the host; in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system, and receives the feedback data sent by the second operating system in response to the debugging command; the first operating system sends the feedback data to the host. Through the above method, the forwarding of debugging instructions and feedback data is realized through the communication between multiple operating systems. When the host debugs multiple operating systems, it only needs to interact with one operating system that supports the debugging communication protocol. There is no need to switch commands between multiple operating systems, and the interactive debugging of multiple operating systems can be realized, which can improve the interactive testing efficiency of multi-system processors, thereby improving the production efficiency of processors. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:

[0017] Figure 1a is a first structural diagram of a processor in a related embodiment;

[0018] Figure 1b is a second structural diagram of a processor in a related embodiment;

[0019] Figure 1c is a third structural diagram of a processor in a related embodiment;

[0020] Figure 2 It is a flowchart of the first embodiment of the debugging method of the processor provided by the present application;

[0021] Figure 3 is a flowchart of a second embodiment of a debugging method for a processor provided by the present application;

[0022] Figure 4 is a flowchart of a third embodiment of a processor debugging method provided by the present application;

[0023] Figure 5 This is an interactive schematic diagram of a third embodiment of a debugging method for a processor provided by the present application;

[0024] Figure 6 It is a structural diagram of an embodiment of a debugging device for a processor provided by the present application;

[0025] Figure 7 It is a schematic structural diagram of a chip according to an embodiment of the present application;

[0026] Figure 8 It is a structural schematic diagram of a vehicle embodiment provided by the present application. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It will be appreciated that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some but not all structures related to the present application are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the art without making creative work are within the scope of protection of the present application.

[0028] The terms "first", "second", etc. in this application are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0029] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0030] The processor in the embodiment of the present application has multiple cores, and different operating systems are installed on each of the multiple cores.

[0031] In one embodiment, the processor may be a multi-core heterogeneous processor. The core feature of a multi-core heterogeneous processor is that it has two or more different types of cores, each of which has its own specific functions and advantages. For example, a multi-core heterogeneous processor may include several CPU cores and several GPU cores. Therefore, the processor can process general CPU tasks and graphics processing tasks at the same time.

[0032] Furthermore, a multi-core heterogeneous processor needs to combine multiple processor cores, and each core requires independent hardware components to support its functions. Therefore, a certain number of processor cores must be set up inside the processor and connected together. A multi-core heterogeneous processor has multiple processor cores, so caches must be shared between different cores. The cache hierarchy is an important factor in determining the size and type of cache. A single computer processor may support multiple main memories for easy access by different processor cores.

[0033] In a related embodiment, the host is connected to the processor via a serial port, and different operating systems involve different debugging commands. In this embodiment, the host can only debug one operating system at a time. If other operating systems need to be debugged, the command needs to be switched. In addition, in order to save hardware resources, the serial port used for interacting with different operating systems and the serial port for outputting debugging information are the same, which causes the output information to be mixed together, increasing the difficulty of identification. If the debugging information is output frequently, the interactive information may be flushed.

[0034] In another related embodiment, the host is debugged through the ADB protocol. ADB is a command line tool that allows users to communicate with connected Android devices. ADB can perform various operations, such as installing and debugging applications, and interacting with the shell on the device (shell refers to "software that provides an operating interface for users"). To use ADB, you first need to make sure that the host has the ADB tool installed, which is usually installed together with the Android SDK. In this embodiment, the host can only debug one operating system at a time. If other operating systems need to be debugged, it cannot be completed. In addition, the operating system for debugging interaction needs to support the ADB protocol, which is an impossible task for a real-time interactive system such as FreeRTOS.

[0035] See also Figure 1a-Figure 1c , Figure 1a is a first structural diagram of a processor in a related embodiment, Figure 1b is a second structural diagram of a processor in a related embodiment, Figure 1c 3 is a schematic diagram of the third structure of the processor in the relevant embodiment. In one application scenario, the current multi-core heterogeneous processor has three operating systems (or three domains), namely Android, Linux, and FreeRTOS.

[0036] Android is a free and open source mobile operating system based on the Linux kernel (excluding GNU components). It is mainly used in mobile devices such as smartphones and tablets.

[0037] Linux (generally referring to GNU / Linux) is a free to use and free to spread Unix-like operating system. It is a multi-user, multi-tasking operating system that complies with POSIX and supports multi-threading and multi-CPU.

[0038] FreeRTOS is a mini real-time operating system kernel. As a lightweight operating system, its functions include: task management, time management, semaphores, message queues, memory management, recording functions, software timers, coroutines, etc., which can basically meet the needs of smaller systems.

[0039] like Figure 1a As shown, since the Android system supports the ADB protocol, when the processor is connected to the host, the host can detect an ADB device.

[0040] like Figure 1b As shown in the figure, since the Linux system also supports the ADB protocol, when the processor is connected to the host, the host can detect an ADB device. When there are both Android and Linux systems, the host can detect two ADB devices. However, the host can only interact with one operating system at a time. If it interacts with the Linux system, it cannot interact with the Android system.

[0041] like Figure 1c As shown, the FreeRTOS system originally runs on resource-constrained hardware. If the ADB protocol is implemented on the FreeRTOS system, a large amount of memory and storage space will be consumed, causing the system to expand excessively. Therefore, FreeRTOS does not support the ADB protocol, which means that the interactive debugging path is blocked.

[0042] See also Figure 2 , Figure 2 1 is a flowchart of a first embodiment of a debugging method for a processor provided in the present application. The processor is installed with at least a first operating system and a second operating system. The first operating system and the second operating system are implemented based on independent cores. The debugging method includes:

[0043] Step 21: The first operating system obtains a debugging command from the host.

[0044] The host may be a computer, a mobile phone, or a debugging device dedicated to debugging.

[0045] The debugging command can be used to specify debugging of any operating system.

[0046] It is understandable that the host debugs the operating system, generally based on a dedicated communication protocol, but due to the differences in multiple operating systems, not all operating systems support the communication protocol. In this embodiment, the first operating system supports the communication protocol, while the second operating system does not support the communication protocol.

[0047] In one embodiment, the first operating system may be an Android system or a Linux operating system that supports the ADB protocol, and the second operating system may be a FreeRTOS operating system that does not support the ABD protocol.

[0048] In an application scenario, the host needs to debug the first operating system. Then, in step 21, after the first operating system obtains the debugging command of the host, it directly responds to the debugging command and generates feedback data, and sends the feedback data to the host.

[0049] In other application scenarios, if the host needs to debug other operating systems (taking the second operating system as an example) except the first operating system, step 22 and step 23 are executed.

[0050] Step 22: In response to a debugging command for debugging the second operating system, the first operating system sends a debugging command to the second operating system, and receives feedback data sent by the second operating system in response to the debugging command.

[0051] Among them, since the multiple cores in the processor are interconnected, and the first operating system and the second operating system share cache resources, different operating systems can interact with each other.

[0052] Specifically, the first operating system can identify which operating system the debugging command is used to debug based on the specific characters of the debugging command, and then send the debugging command to the corresponding operating system. For example, the first operating system sends the debugging command to the second operating system, the second operating system generates feedback data in response to the debugging command, and the second operating system then sends the feedback data to the first operating system.

[0053] Step 23: The first operating system sends feedback data to the host.

[0054] In this embodiment, since the first operating system supports the ADB protocol and the second operating system does not support the ADB protocol, the host cannot directly interact with the second operating system, and the first operating system is equivalent to a bridge between the host and the second operating system to forward debugging commands and feedback data. For the host, the host always interacts only with the first operating system, and in fact, the host can debug multiple operating systems (such as the second operating system) in a multi-core heterogeneous processor at the same time according to different debugging commands sent.

[0055] The debugging method of the processor provided in this embodiment includes: the first operating system obtains the debugging command of the host; in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system, and receives the feedback data sent by the second operating system in response to the debugging command; the first operating system sends the feedback data to the host. In the above manner, the forwarding of debugging instructions and feedback data is realized through the communication between multiple operating systems. When the host debugs multiple operating systems, it only needs to interact with one operating system that supports the debugging communication protocol. There is no need to switch commands between multiple operating systems, and the interactive debugging of multiple operating systems can be realized, which can improve the interactive testing efficiency of multi-system processors, thereby improving the production efficiency of processors.

[0056] See also Figure 3 , Figure 3 1 is a flow chart of a second embodiment of a debugging method for a processor provided in the present application. The processor is installed with at least a first operating system and a second operating system. The first operating system and the second operating system are implemented based on independent cores. The debugging method includes:

[0057] Step 31: When the processor is connected to the host, a main device node is generated based on the first operating system, and a virtual device node is generated based on the second operating system.

[0058] It is understandable that the ADB protocol is generally implemented based on a USB interface, because a USB port can have multiple functions. Here, by modifying the ADB protocol source code of the Android domain, in addition to implementing its own ADB device function, it also virtualizes a corresponding number of ADB devices according to the number of other domains. It is worth noting that the USB interface here is only an example and does not limit the connection method between the processor and the host. For example, in other embodiments, the processor and the host can also be connected via WIFI.

[0059] Specifically, the first operating system is an operating system that supports the debugging protocol, and the master device node is generally only one. Then, the second operating system can be an operating system that supports the debugging protocol or an operating system that does not support the debugging protocol. For example, the processor includes Android, Linux, and FreeRTOS, then Android can be used as the first operating system and a master device node can be generated, and Linux and FreeRTOS can be used as virtual device nodes.

[0060] Of course, in other embodiments, the ADB protocol source code of the Linux domain may also be modified, and then Linux is used as the first operating system and a main device node is generated, and Android and FreeRTOS are used as virtual device nodes.

[0061] Among them, after the processor is connected to the host, the host interacts with the main device node by default.

[0062] Step 32: The first operating system obtains a debugging command from the host.

[0063] Step 33: In response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system, and receives feedback data sent by the second operating system in response to the debugging command.

[0064] In one application scenario, the processor includes Android, Linux, and FreeRTOS, where Android is the master device node. When the processor is connected to the host, the host can identify three devices: the Android master node device, the Linux virtual node device, and the FreeRTOS virtual node device.

[0065] It can be understood that since the ADB protocol supports multiple devices, a "-s" parameter can be added for different debugging commands.

[0066] For example, when interactively debugging with the Android system, the host sends the ls command:

[0067] adb -s android shell ls

[0068] At this point, the data path is no different from that of an ordinary adb device, and it goes directly from the host to the kernel of the Android system.

[0069] For example, when interactively debugging with Linux or FreeRTOS, the host command is as follows:

[0070] adb -s linux shell ls

[0071] adb -s freertos shell ls

[0072] At this time, since Linux and FreeRTOS are virtual adb devices, the data is directly sent to the Android system, and Android needs to forward the data once.

[0073] Step 34: The first operating system sends feedback data to the host.

[0074] In this embodiment, since the first operating system supports the ADB protocol and the second operating system does not support the ADB protocol, the host cannot directly interact with the second operating system, and the first operating system is equivalent to a bridge between the host and the second operating system to forward debugging commands and feedback data. For the host, the host always interacts only with the first operating system, and in fact, the host can debug multiple operating systems (such as the second operating system) in a multi-core heterogeneous processor at the same time according to different debugging commands sent.

[0075] See also Figure 4 and Figure 5 , Figure 4 is a flowchart of a third embodiment of a debugging method for a processor provided by the present application, Figure 5 This is an interactive schematic diagram of a third embodiment of a debugging method for a processor provided in the present application. The processor is installed with at least a first operating system and a second operating system. The first operating system and the second operating system are implemented based on independent cores. The debugging method includes:

[0076] Step 41: The first operating system obtains a debugging command from the host.

[0077] Step 42: The first operating system sends a debugging command to the first buffer area.

[0078] Among them, this embodiment mainly introduces interactive debugging based on the ADB protocol, and the debugging command is used to interactively debug the second operating system.

[0079] For example, if the first operating system is an Android system and the second operating system is a FreeRTOS system, then the debugging command may be:

[0080] adb -s linux shell ls

[0081] For example, if the first operating system is an Android system and the second operating system is a Linux system, then the debugging command may be:

[0082] adb -s freertos shell ls

[0083] Step 43: The first operating system sends a first interrupt message to the second operating system.

[0084] The first operating system can send interrupt information to the corresponding operating system according to the characters in the debugging command to notify the operating system. For example, if the debugging command is "adb-s linux shell ls", the Android system sends interrupt information to the Linux system, and if the debugging command is "adb-s freertos shell ls", the Android system sends interrupt information to the FreeRTOS system.

[0085] Step 44: The second operating system reads the debugging command from the first buffer area.

[0086] After receiving the interrupt information, the second operating system (such as the FreeRTOS system) reads the debugging command from the first buffer area.

[0087] Step 45: The second operating system sends feedback data to the second buffer area in response to the debugging command.

[0088] Step 46: The second operating system sends a second interrupt message to the first operating system.

[0089] The second operating system sends the second interrupt information to the first operating system to notify the first operating system to read the feedback data.

[0090] Step 47: The first operating system reads the feedback data from the second buffer area.

[0091] After receiving the second interrupt information, the first operating system reads feedback data from the second buffer area.

[0092] Step 48: The first operating system sends feedback data to the host.

[0093] Optionally, the first cache area and the second cache area in the above embodiment can be implemented based on shared cache resources in the processor, and multiple operating systems can access the cache area. Specifically, the first cache area can be a sending cache, and the second cache area can be a receiving cache.

[0094] In this embodiment, since the first operating system supports the ADB protocol and the second operating system does not support the ADB protocol, the host cannot directly interact with the second operating system, and the first operating system is equivalent to a bridge between the host and the second operating system to forward debugging commands and feedback data. For the host, the host always interacts only with the first operating system, and in fact, the host can debug multiple operating systems (such as the second operating system) in a multi-core heterogeneous processor at the same time according to different debugging commands sent.

[0095] Through the above implementation, the present application mainly has the following technical effects:

[0096] 1. No need to switch between multiple operating systems, it is possible to interactively debug multi-core heterogeneous systems running on multi-core processors at the same time. In the above embodiment, the host only needs to interact with the Android system throughout the process.

[0097] 2. For real-time operating systems that do not support the adb protocol (such as FreeRTOS), interactive debugging can also be performed through ADB.

[0098] 3. Simplify the interactive debugging process, quickly locate problems, improve debugging efficiency, and enable the processor to stabilize as quickly as possible, further improving production efficiency.

[0099] See also Figure 6 , Figure 6 It is a structural diagram of an embodiment of a debugging device for a processor provided in the present application. The processor is installed with at least a first operating system and a second operating system, and the first operating system and the second operating system are implemented based on independent cores. The debugging device 600 includes a first receiving module 61, a first sending module 62, a second receiving module 63 and a second sending module 64.

[0100] Among them, the first operating system obtains the debugging command of the host through the first receiving module 61; in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system through the second sending module 64, and receives the feedback data sent by the second operating system in response to the debugging command through the second receiving module 63; the first operating system sends the feedback data to the host through the first sending module 62.

[0101] Optionally, in one embodiment, the first operating system sends a debug command to the first cache area through the second sending module 64; the second operating system reads the debug command from the first cache area; the second operating system sends feedback data to the second cache area in response to the debug command; the first operating system reads feedback data from the second cache area through the second receiving module 63.

[0102] In addition, in one embodiment, the debugging device 600 further includes a third receiving module 65 and a third sending module 66 .

[0103] Optionally, in one embodiment, after the first operating system sends the debugging command to the first buffer area, the first operating system sends the first interrupt information to the second operating system through the third sending module 66, so that the second operating system reads the debugging command from the first buffer area.

[0104] Optionally, in one embodiment, after the second operating system sends feedback data to the second cache area in response to the debug command, the first operating system receives the second interrupt information sent by the second operating system through the third receiving module 65, so that the first operating system reads the feedback data from the second cache area.

[0105] Optionally, in one embodiment, the debugging device 600 is also used to generate a main device node based on the first operating system and a virtual device node based on the second operating system when the processor is connected to the host; wherein the main device node and the virtual device node are used to be identified by the host to send debugging instructions based on the main device node or the virtual device node.

[0106] Optionally, in one embodiment, the first operating system is further configured to: in response to the debugging command containing identification information of the second operating system, the first operating system sends the debugging command to the second operating system.

[0107] In one embodiment, the processor and the host are connected based on the adb protocol; the first operating system is an Android operating system or a Linux operating system, and the second operating system is a FreeRTOS operating system.

[0108] See also Figure 6 , Figure 6 6 is a schematic diagram of the structure of a chip according to an embodiment of the present application. The chip 600 includes a processor 61 and a memory 62. The memory 62 is used to store program data. The processor 61 is installed with at least a first operating system and a second operating system. The first operating system and the second operating system are implemented based on independent cores. The processor 61 is used to execute the following debugging method:

[0109] The first operating system obtains a debugging command from the host; in response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system and receives feedback data sent by the second operating system in response to the debugging command; the first operating system sends the feedback data to the host.

[0110] Optionally, in one embodiment, the processor is used to execute: the first operating system sends a debug command to the first cache area; the second operating system reads the debug command from the first cache area; the second operating system sends feedback data to the second cache area in response to the debug command; the first operating system reads the feedback data from the second cache area.

[0111] Optionally, in one embodiment, after the first operating system sends the debugging command to the first buffer area, the first operating system sends the first interrupt information to the second operating system, so that the second operating system reads the debugging command from the first buffer area.

[0112] Optionally, in one embodiment, after the second operating system sends feedback data to the second buffer area in response to the debug command, the second operating system sends second interrupt information to the first operating system, so that the first operating system reads the feedback data from the second buffer area.

[0113] Optionally, in one embodiment, the processor is used to execute: when the processor is connected to the host, generating a main device node based on the first operating system, and generating a virtual device node based on the second operating system; wherein the main device node and the virtual device node are used to be identified by the host to send debugging instructions based on the main device node or the virtual device node; or, in response to the debugging command containing identification information of the second operating system, the first operating system sends the debugging command to the second operating system.

[0114] Optionally, in one embodiment, the processor and the host are connected based on the adb protocol; the first operating system is an Android operating system or a Linux operating system, and the second operating system is a FreeRTOS operating system.

[0115] The present application also provides a computer program product, which, when executed by a processor, is used to implement: a first operating system obtains a debugging command from a host; in response to the debugging command for debugging a second operating system, the first operating system sends the debugging command to the second operating system, and receives feedback data sent by the second operating system in response to the debugging command; the first operating system sends the feedback data to the host.

[0116] Optionally, in one embodiment, when the computer program product is executed by a processor, it is used to implement: the first operating system sends a debug command to a first cache area; the second operating system reads the debug command from the first cache area; the second operating system sends feedback data to the second cache area in response to the debug command; the first operating system reads the feedback data from the second cache area.

[0117] Optionally, in one embodiment, after the first operating system sends the debugging command to the first buffer area, the first operating system sends the first interrupt information to the second operating system, so that the second operating system reads the debugging command from the first buffer area.

[0118] Optionally, in one embodiment, the computer program product, when executed by a processor, is used to implement: when the processor is connected to a host, generating a main device node based on a first operating system, and generating a virtual device node based on a second operating system; wherein the main device node and the virtual device node are used to be identified by the host to send debugging instructions based on the main device node or the virtual device node; or, in response to the debugging command containing identification information of the second operating system, the first operating system sends a debugging command to the second operating system.

[0119] Optionally, in one embodiment, the processor and the host are connected based on the adb protocol; the first operating system is an Android operating system or a Linux operating system, and the second operating system is a FreeRTOS operating system.

[0120] Optionally, in one embodiment, after the second operating system sends feedback data to the second buffer area in response to the debug command, the second operating system sends second interrupt information to the first operating system, so that the first operating system reads the feedback data from the second buffer area.

[0121] See also Figure 7 , Figure 7 It is a schematic diagram of the structure of an embodiment of a vehicle provided in the present application. The vehicle 700 includes a chip 600, and the chip 600 is the chip introduced in the above embodiment.

[0122] It is understandable that the chip 600 may be a chip for realizing an intelligent cockpit. An intelligent cockpit is designed to integrate a variety of IT and artificial intelligence technologies, create a new integrated digital platform in the vehicle, provide an intelligent experience for the driver, and promote driving safety. At present, there have been many research works at home and abroad, such as installing cameras on the AB pillars and rearview mirrors of the vehicle to provide emotion recognition, age detection, residue detection, seat belt detection, etc.

[0123] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device implementation described above is only illustrative, for example, the division of the modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0124] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0125] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0126] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A processor debugging method, characterized in that: The processor is installed with at least a first operating system and a second operating system, the first operating system and the second operating system are implemented based on independent cores, and the debugging method includes: The first operating system obtains a debugging command from the host; In response to the debugging command for debugging the second operating system, the first operating system sends the debugging command to the second operating system, and receives feedback data sent by the second operating system in response to the debugging command; The first operating system sends the feedback data to the host.

2. The processor debugging method according to claim 1, characterized in that: The first operating system sends the debugging command to the second operating system, and receives feedback data sent by the second operating system in response to the debugging command, including: The first operating system sends the debugging command to the first buffer area; The second operating system reads the debugging command from the first buffer area; The second operating system sends feedback data to the second buffer area in response to the debugging command; The first operating system reads the feedback data from the second buffer area.

3. The processor debugging method according to claim 2, characterized in that: After the first operating system sends the debugging command to the first buffer area, the method further includes: The first operating system sends first interrupt information to the second operating system, so that the second operating system reads the debugging command from the first buffer area.

4. The processor debugging method according to claim 2, characterized in that: After the second operating system sends the feedback data to the second buffer area in response to the debugging command, the method further includes: The second operating system sends second interrupt information to the first operating system, so that the first operating system reads the feedback data from the second buffer area.

5. The processor debugging method according to claim 1, characterized in that: Before the first operating system obtains the debugging command of the host, the method further includes: When the processor is connected to the host, a main device node is generated based on the first operating system, and a virtual device node is generated based on the second operating system; wherein the main device node and the virtual device node are used to be identified by the host to send the debugging instruction based on the main device node or the virtual device node; or. In response to the debugging command being used to debug the second operating system, the first operating system sending the debugging command to the second operating system includes: In response to the debugging command including identification information of the second operating system, the first operating system sends the debugging command to the second operating system.

6. The processor debugging method according to any one of claims 1 to 5, characterized in that: The processor and the host are connected based on the adb protocol; The first operating system is an Android operating system or a Linux operating system, and the second operating system is a FreeRTOS operating system.

7. A processor debugging device, characterized in that: The processor is installed with at least a first operating system and a second operating system, the first operating system and the second operating system are implemented based on independent cores, and the debugging device of the processor includes: an acquisition module, through which the first operating system acquires a debugging command of the host; a first sending module and a receiving module, for debugging the second operating system in response to the debugging command, wherein the first operating system sends the debugging command to the second operating system through the first sending module, and receives feedback data sent by the second operating system in response to the debugging command through the receiving module; A second sending module, through which the first operating system sends the feedback data to the host.

8. A chip, characterized in that: The chip includes a processor and a memory, the memory is used to store program data, and the processor is used to execute the debugging method of the processor according to any one of claims 1 to 7.

9. A computer program product, characterized in that The computer program product is used to be executed by a processor to implement the debugging method of the processor according to any one of claims 1 to 7.

10. A vehicle, characterized in that: The vehicle comprises the chip as claimed in claim 8.

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