Hard disk backboard and server

Abstract

The invention discloses a hard disk backboard and a server, and relates to the technical field of servers. The power supply control interface of the backboard controller is connected with the hard disk connector, the power supply control function of the hard disk is fully utilized to control the work of the hard disk, the situation that the occupied area of the backboard is additionally increased in an electronic fuse mode is avoided, and connection is achieved only in an interface mode; meanwhile, a clock buffer is added and integrated with a power supply control function of the hard disk to realize a power-on time sequence which is strictly required by a high-speed signal of a specific hard disk, so that the hard disk identification error problem caused by a time sequence error risk is reduced, the hard disk identification accuracy is improved, and the adaptation compatibility between the hard disk and a mainboard is correspondingly improved. Besides, the backboard controller and the hard disk connector are connected through the first communication interface, the situation that key information is leaked due to the fact that conventional hard disk information acquisition occupies a polling communication protocol for a long time is avoided, and the safety of hard disk information acquisition is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and in particular to a hard disk backplane and a server. Background Art

[0002] The choice of server hard disk usually depends on specific performance requirements and storage capacity requirements. Solid-state drives have become the preferred storage device for improving server performance due to their high-speed book reading and writing capabilities, durability and low power consumption.

[0003] For some specific hard disks, high-speed signals follow the timing signals that have strict requirements for power-on timing (power-on timing signal-clock signal-set signal). The backplane provides a connection interface between the hard disk and other components of the server. The backplane cannot control the clock signal. When the motherboard and backplane are developed independently, the order of the power-on timing and clock signal is confused, and timing errors occur, resulting in the inability to identify the hard disk. In addition, the control platform of the server motherboard obtains hard disk information through polling of the independent communication protocol switch on the backplane, resulting in long-term occupation of the communication protocol. Key information of the hard disk may be leaked during the polling process, reducing the reliability of the backplane.

[0004] Therefore, how to identify each hard disk to improve the compatibility of the server mainboard and the reliability of the backplane is an urgent problem that needs to be solved by those skilled in the art. Summary of the invention

[0005] The purpose of the present invention is to provide a hard disk backplane and a server to solve the problem that when a mainboard and a backplane are developed independently, the power-on timing and the order of the clock signal are confused, a timing error occurs, and the hard disk cannot be identified and key information of the hard disk is leaked during the polling process, thereby reducing the reliability of the backplane.

[0006] In order to solve the above technical problems, the present invention provides a hard disk backplane, including a clock buffer, a backplane controller and a hard disk connector;

[0007] The backplane controller is connected to the hard disk connector via a power control interface; and the hard disk connector is connected to the server mainboard via a power connector, and the backplane controller is used to control the power control function inside the hard disk to realize power control of the hard disk;

[0008] The clock buffers are connected to the server mainboard connector, the backplane controller and the hard disk connector; and are used to receive an enable signal from the backplane controller to send the clock signal of the server mainboard to the hard disk;

[0009] The backplane controller is also connected to the hard disk connector via the first communication interface, and is also used to obtain hard disk information and send it to the server mainboard.

[0010] On the one hand, the timing control process of the hard disk backplane includes:

[0011] Power the hard disk through the power connector;

[0012] When the backplane controller is working, the power control signal of the power control interface is pulled down, so that when the level signal of the power control signal is at a low level, the hard disk is powered on;

[0013] When the backplane controller is not working, the power control signal of the power control interface is pulled high, so that when the level signal of the power control signal is at a high level, the hard disk is not powered on.

[0014] On the other hand, it also includes:

[0015] The backplane controller is also connected to the hard disk connector through a reset interface, and is used to control the hard disk connector to enter a reset state when the level signal of the signal corresponding to the reset interface is at a low level; when the level signal of the signal corresponding to the reset interface is at a high level, control the hard disk connector to enter a released state to facilitate the normal operation of the hard disk.

[0016] On the other hand, it also includes registers;

[0017] The register is connected to the backplane controller and is used to store hard disk information so as to facilitate acquisition by the control platform of the server mainboard through the backplane controller.

[0018] On the other hand, the information type of the hard disk information is classified according to the acquisition method of the control platform of the server motherboard, and the information type includes an active trigger type with the control platform and a passive trigger type with the control platform; the information corresponding to the active trigger type of the control platform at least includes hard disk temperature information, disk life information and log register information; the information corresponding to the passive trigger type of the control platform at least includes hard disk capacity and hard disk model;

[0019] The process of the control platform of the server mainboard acquiring the information corresponding to the passive trigger type of the control platform specifically includes:

[0020] The backplane controller is used to communicate with the control platform of the server mainboard through the first communication interface when the actual temperature information of the hard disk reaches the temperature threshold;

[0021] When the disk life information reaches a life threshold, communication is performed with the control platform of the server mainboard via the first communication interface; and the hard disk power supply of the hard disk connector is turned off via the power control interface.

[0022] On the other hand, the backplane controller is also connected to the hard disk connector via a status signal interface; and is used to determine the corresponding hard disk abnormal state according to the hard disk information;

[0023] The server mainboard connector is connected to the backplane controller; when the server mainboard identifies that there is a fault in the hard disk information, the server mainboard sends a control instruction to the backplane controller;

[0024] The backplane controller is also used to receive control instructions sent by the server mainboard; when receiving that the hard disk abnormal state is abnormal, it communicates with the control platform of the server mainboard through the first communication interface and sends the log register information to the control platform.

[0025] On the other hand, it also includes:

[0026] The backplane controller is also connected to the hard disk connector via a clock request signal;

[0027] The control process of the backplane controller includes:

[0028] Obtaining the working status of the hard disk;

[0029] When the working state of the hard disk is a low power consumption state, the clock request signal is pulled high so as to close the reference clock information of the hard disk;

[0030] The clock signal sent by the server mainboard is controlled to be turned off at the output channel of the clock buffer by an enable signal;

[0031] When receiving a configuration request command of the hard disk, the clock request signal is pulled low so as to open the reference clock information of the hard disk;

[0032] The clock signal sent by the server mainboard is controlled to be turned on at the output channel of the clock buffer through an enable signal, so that the hard disk enters a normal working state;

[0033] The corresponding operation process when the hard disk enters the low power consumption state specifically includes:

[0034] The server motherboard's processor is connected to the hard disk via in-band communication;

[0035] When the link corresponding to the in-band communication mode is in an idle state, the controller of the server mainboard controls the hard disk to enter a low power consumption state through software control.

[0036] On the other hand, the backplane controller is also connected to the hard disk connector via a system management reset interface;

[0037] The backplane controller is also used to pull down the reset signal of the system management reset interface when the hard disk information cannot be obtained;

[0038] When the preset time of the pull-down operation is reached, the reset signal of the system management reset interface is pulled high.

[0039] On the other hand, the server motherboard connector is connected to the backplane controller via a state control signal interface; the server motherboard connector is connected to the processor;

[0040] The backplane controller is also used to control the status signal interface to light up the corresponding hard disk when receiving the status control signal sent by the server mainboard.

[0041] In order to solve the above technical problems, the present invention also provides a server, including a server mainboard, a hard disk backplane and a hard disk;

[0042] The server mainboard is connected to the hard disk via the hard disk backplane.

[0043] The present invention provides a hard disk backplane, comprising a clock buffer, a backplane controller and a hard disk connector; the backplane controller is connected to the hard disk connector via a power control interface; and the hard disk connector is connected to a server mainboard via a power connector, and the backplane controller is used to control the power control function inside the hard disk to realize power control of the hard disk; the clock buffer is connected to the server mainboard connector, the backplane controller and the hard disk connector; and is used to receive an enable signal from the backplane controller to send a clock signal from the server mainboard to the hard disk; the backplane controller is also connected to the hard disk connector via a first communication interface, and is also used to obtain hard disk information and send it to the server mainboard.

[0044] The beneficial effect of the present invention is that the power control interface of the backplane controller is connected with the hard disk connector, and the power control function of the hard disk itself is fully utilized to control the operation of the hard disk, avoiding the additional backplane area occupied by the form of electronic fuses, and only connecting through the interface mode; at the same time, a clock buffer is added, and it is combined with the power control function of the hard disk itself to realize the power-on timing sequence that strictly requires the high-speed signal of a specific hard disk to follow, reducing the hard disk recognition error problem caused by the risk of timing errors, improving the recognition accuracy of the hard disk, and correspondingly improving the adaptation compatibility between the hard disk and the motherboard. In addition, the present invention connects the backplane controller and the hard disk connector through the first communication interface, avoiding the key information leakage caused by the conventional hard disk information acquisition occupying the polling communication protocol for a long time, and improving the security of hard disk information acquisition.

[0045] Secondly, the timing control method, on the basis of saving the hardware area occupied by the backplane, realizes the power control function of the power disabling function carried by the hard disk itself to realize the power control of the hard disk and improve the comprehensive utilization rate of the hard disk. The control of the clock signal is completed by the backplane itself, without considering the hard disk adaptation problem when matching different motherboards, improving the adaptation compatibility. The connection relationship of the register is used to store the hard disk information, so as to facilitate the control of the flat acquisition to realize the comprehensive management of the server's hard disk. The control platform of the server motherboard obtains the information corresponding to the passive trigger type of the control platform. The backplane CPLD polls to obtain various information of the hard disk, and compares the temperature parameters, disk life, and LED light status information with the threshold / theoretical parameters. If the comparison result shows that a certain parameter is abnormal, the corresponding register log information of the hard disk is captured and reported to the control platform. The control platform takes corresponding measures for various problems and records the corresponding IDL log / alarm information under the WEB of the control platform. The first communication interface of each channel corresponds to a hard disk. Compared with the case where the upstream is BMC (only one I2C channel, for all NVME backplanes in the system), it can pre-process key data and actively trigger / report accidents, thus avoiding the omission of key data caused by long-term scanning of the I2C bus under the BMC and enhancing system stability.

[0046] In addition, the present invention also provides a server having the same beneficial effects as the hard disk backplane described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 This is a conventional server system architecture diagram;

[0049] Figure 2 A structural diagram of a hard disk backplane provided by an embodiment of the present invention;

[0050] Figure 3 The present invention provides a flowchart of a control method of a backplane controller. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] The core of the present invention is to provide a hard disk backplane and server to solve the problem that when the mainboard and backplane are developed independently, the power-on timing and the clock signal sequence are confused, timing errors occur, resulting in the inability to identify the hard disk and the leakage of key hard disk information during the polling process, thereby reducing the reliability of the backplane.

[0053] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0054] With the rapid development of technologies such as big data, cloud computing, and artificial intelligence (AI), the demand for storage capacity has increased dramatically, and higher requirements have been placed on storage performance, power consumption, heat dissipation, and maintainability. As new solid-state drives (SSDs) under the Enterprise and Data Center Small Form Factor (EDSFF) standard, E1.S and E3.S are designed for hyperscale data centers and enterprise computing nodes. By optimizing size, heat dissipation, capacity, and maintainability, they have become important solutions to meet future storage needs. Among them, the E1.S hard drive is particularly suitable for 1U rack-mounted storage servers with its compact size, good heat dissipation performance, and high storage capacity, effectively solving the limitations of traditional M.2 hard drives in hot swapping, heat dissipation, and capacity expansion. The E3.S hard drive focuses more on replacing traditional 2.5-inch U.2 hard drives, which not only support higher bandwidth and power consumption, but also have stronger scalability and flexibility, and can better meet enterprise-level storage needs.

[0055] Figure 1 This is a conventional server system architecture diagram, such as Figure 1As shown in the figure, the high-speed signals (clock signal (CLK) and peripheral component interconnect express (PCIE) signal) required by the hard disk are directly transmitted from the server motherboard, and no timing control is performed on the hard disk backplane. The Inter-Integrated Circuit (I2C) signal is generated by the Baseboard Management Controller (BMC) on the server motherboard or the Software Configuration Management (SCM) board, and then sent to each hard disk through the I2C switch on the backplane to obtain hard disk information. At this time, the hard disk power supply (P12V) is provided by the server motherboard and is provided to each hard disk through the electronic fuse (EFUSE). The enable signal of the electronic fuse (EFUSE) here is provided by the complex programmable logic device (CPLD) of the backplane to control the time-sharing power-on or separate power-on and power-off of the backplane.

[0056] For some specific hard disks, the high-speed signals follow the Non-Volatile Memory Express (NVMW) protocol. The power-on sequence requirement is P3V3_STBY / P12V→CLK signal→PERST signal (programming reset signal). Figure 1 This type of backplane does not perform timing control, which will cause confusion between the power-on signal and the clock signal in the scenario where the mainboard and the backplane are developed separately. The clock signal may be sent first when the power-on signal is not turned on, which will affect the recognition and performance of the hard disk. Secondly, the BMC of the server mainboard obtains hard disk information through the I2C switch, and needs to continuously adopt a one-by-one polling method. The polling time to obtain hard disk information is long, and the I2C bus will also be occupied for a long time. When polling the current hard disk to obtain hard disk information, the key information of another hard disk cannot be obtained, resulting in the leakage of the key information of the hard disk. The hard disk backplane provided by the present invention can solve the above technical problems.

[0057] Figure 2 A structural diagram of a hard disk backplane provided by an embodiment of the present invention, such as Figure 2 As shown, it includes a clock buffer 3, a backplane controller 5 and a hard disk connector 4;

[0058] The backplane controller 5 is connected to the hard disk connector 4 through a power control interface; and the hard disk connector 4 is connected to the server mainboard 1 through a power connector. The backplane controller 5 is used to control the power control function inside the hard disk to realize power control of the hard disk;

[0059] The clock buffer 3 is connected to the server mainboard 1 connector, the backplane controller 5 and the hard disk connector 4; it is used to receive the enable signal of the backplane controller 5 to send the clock signal of the server mainboard 1 to the hard disk;

[0060] The backplane controller 5 is also connected to the hard disk connector 4 via the first communication interface, and is also used to obtain hard disk information and send it to the server mainboard 1 .

[0061] Specifically, the backplane controller is used to manage the communication between the hard disk and the motherboard, including data transmission, power management, fault detection and hot-swap operations. The backplane controller here can be a programmable logic device or other controllers, etc., which are not limited here. Programmable logic devices are digital integrated circuits that use programming to implement specific logic functions. There is no limit on the specific device, which can be a programmable read-only memory, programmable array logic, general array logic, CPLD or field programmable gate array (Field-Programmable Gate Array, FPGA), etc., which are not limited here and can be set according to actual conditions. The backplane controller is located on the backplane, which is a circuit board that provides a middle layer for connecting the hard disk and other possible storage devices to the motherboard.

[0062] The backplane controller is connected to the hard disk connector through the power control interface. The power disable (PWRDIS) function in the hard disk is used here to remotely control the power status of the hard disk. The PWRDIS function allows users to control the opening and closing of the hard disk through software to achieve power management and energy saving effects. When the PWRDIS signal is activated, it cuts off the power supply of the hard disk, making the hard disk unable to start; when the PWRDIS signal is disabled, the hard disk can start and run normally. This function is particularly suitable for data centers and server environments, and can remotely shut down the power of the hard disk when it is not in use, thereby saving energy.

[0063] The hard disk connector of the present invention is connected to the server motherboard through the power connector, and the power connector provides P12V power supply to the hard disk through the server motherboard. At this time, the backplane controller controls the power control function inside the hard disk to realize the power control of the hard disk. The power control here is to work normally during the power-on process of the hard disk. If it is disabled, the hard disk is in an idle state, and the power is not turned off at this time.

[0064] In some embodiments, the timing control process of the hard disk backplane includes:

[0065] Power the hard disk through the power connector;

[0066] When the backplane controller is working, the power control signal of the power control interface is pulled down, so that when the level signal of the power control signal is at a low level, the hard disk is powered on;

[0067] When the backplane controller is not working, the power control signal of the power control interface is pulled high, so that when the level signal of the power control signal is at a high level, the hard disk is not powered on.

[0068] like Figure 2 As shown, during the boot process, the P12V power signal is powered on to supply power to the hard disk, and the backplane controller 5 pulls down the power control signal of the power control interface after it works. It can be understood that when the power control signal is at a high level, the hardware circuit between the hard disk and the P12V power supply is cut off, and when the power control signal is at a low level, the hard disk P12V is powered on normally. However, the corresponding hardware circuit of the power control signal pulls up the signal by default when the hard disk backplane 2 is pulled up, and the backplane controller 5 controls the pull-down signal. It is pulled up by default when the backplane controller 5 is not working, P12V is not powered on, and the hard disk does not work.

[0069] The timing control method provided in this embodiment, on the basis of saving the hardware occupied area of ​​the backplane, realizes power control of the hard disk through the power control function of the power disabling function carried by the hard disk itself, thereby improving the comprehensive utilization rate of the hard disk.

[0070] A clock buffer is a circuit used to improve the quality and stability of clock signals. Its main functions include clock signal replication, format conversion, and level conversion. The clock buffer can generate multiple clock signals from a clock signal source through frequency replication, and can also adjust the format and level of the clock signal to meet the needs of different electronic systems. The role of the clock buffer is very critical. It can improve the driving ability of the clock signal and reduce signal attenuation, thereby ensuring that the signal can be stably transmitted to various parts of the system. In addition, the clock buffer also has isolation and protection functions, which can prevent noise from interfering with the clock signal and maintain the purity of the clock signal.

[0071] The clock buffer is connected to the server motherboard connector, the backplane controller and the hard disk connector. The backplane controller sends an enable signal to the clock buffer. At this time, the enable signal of the server motherboard connector is sent to the hard disk connector through the clock buffer to send the clock signal of the server motherboard to the hard disk. After the hard disk receives the clock signal, after a certain preset time, the backplane controller will pull up the reset signal of the hard disk connector to realize the normal operation of the hard disk.

[0072] In some embodiments, it also includes:

[0073] The backplane controller is also connected to the hard disk connector through a reset interface, and is used to control the hard disk connector to enter a reset state when the level signal of the signal corresponding to the reset interface is at a low level; when the level signal of the signal corresponding to the reset interface is at a high level, it controls the hard disk connector to enter a released state to facilitate normal operation of the hard disk.

[0074] like Figure 2 As shown, the backplane controller 5 and the hard disk connector 4 are also connected via a reset interface. The level signal corresponding to the reset interface resets the hard disk when it is at a low level, and releases the reset state when it is at a high level, and the hard disk works normally.

[0075] The control of the clock signal in this embodiment is all completed through the backplane itself, and there is no need to consider the hard disk adaptation problem when matching with different motherboards, thereby improving the adaptation compatibility.

[0076] The backplane controller is also connected to the hard disk connector through a first communication interface to obtain hard disk information. The first communication interface here can be an I2C interface or an interface of other communication protocols. There is no limitation here, as long as the hard disk information can be sent to the server motherboard.

[0077] Compared with the conventional method of obtaining hard disk information through an I2C switch, the present invention stores the hard disk information in the backplane controller, compares it with different thresholds, and actively reports it to the control platform when the threshold is reached. The conventional control platform can only obtain it through polling, and will ignore the key information of the hard disk corresponding to the normal polling. The present invention connects the backplane controller and the hard disk connector through the first communication interface, and sends the hard disk information to the backplane controller in real time to prevent the leakage of hard disk information.

[0078] The embodiment of the present invention provides a hard disk backplane, including a clock buffer, a backplane controller and a hard disk connector; the backplane controller is connected to the hard disk connector through a power control interface; and the hard disk connector is connected to the server mainboard through the power connector, and the backplane controller is used to control the power control function inside the hard disk to realize the power control of the hard disk; the clock buffer is connected to the server mainboard connector, the backplane controller and the hard disk connector; it is used to receive the enable signal of the backplane controller to send the clock signal of the server mainboard to the hard disk; the backplane controller is also connected to the hard disk connector through a first communication interface, and is also used to obtain hard disk information and send it to the server mainboard. Through the power control interface of the backplane controller and the hard disk connector, the power control function of the hard disk itself is fully utilized to control the work of the hard disk, avoiding the additional occupied area of ​​the backplane in the form of electronic fuses, and only connecting through the interface mode; at the same time, the clock buffer is added, and the power control function of the hard disk itself is combined to realize the power-on timing sequence that the high-speed signal of the specific hard disk follows the strict requirements, reducing the hard disk recognition error problem caused by the risk of timing error, improving the recognition accuracy of the hard disk, and correspondingly improving the adaptation compatibility between the hard disk and the mainboard. In addition, the present invention connects the backplane controller and the hard disk connector via the first communication interface, thereby avoiding the leakage of key information caused by the conventional hard disk information acquisition occupying the polling communication protocol for a long time, thereby improving the security of hard disk information acquisition.

[0079] In some embodiments, further comprising a register;

[0080] The register is connected to the backplane controller and is used to store hard disk information so that it can be obtained by the control platform of the server mainboard through the backplane controller.

[0081] Specifically, the first communication signal required for hard disk out-of-band management is modified to the backplane controller on the mainboard side. For each hard disk, the backplane controller provides a separate first communication interface for obtaining basic information of the hard disk, such as power-on status, capacity, model, temperature, disk life, etc. The basic information of the hard disk is written into a specific register so that the control platform can read and obtain relevant information of the hard disk.

[0082] The control platform in this embodiment may be a BMC, or a remote management tool, monitoring software, etc., which is not limited here and can be set according to actual conditions.

[0083] The connection relationship of the registers in this embodiment is used to store hard disk information so as to facilitate control and acquisition to achieve comprehensive management of the hard disk of the server.

[0084] In some embodiments, the information type of the hard disk information is classified by the acquisition method of the control platform of the server motherboard, and the information type includes an active trigger type with the control platform and a passive trigger type with the control platform; the information corresponding to the active trigger type of the control platform at least includes hard disk temperature information, disk life information and log register information; the information corresponding to the passive trigger type of the control platform at least includes hard disk capacity and hard disk model;

[0085] The process of the control platform of the server mainboard acquiring information corresponding to the passive trigger type of the control platform specifically includes:

[0086] The backplane controller is used to communicate with the control platform of the server mainboard through the first communication interface when the actual temperature information of the hard disk reaches the temperature threshold;

[0087] When the disk life information reaches a life threshold, communication is performed with the control platform of the server mainboard through the first communication interface; and the hard disk power supply of the hard disk connector is turned off through the power control interface.

[0088] It is understandable that the control platform of the server motherboard can obtain information in two ways: active acquisition and passive acquisition. Active acquisition is the active acquisition of the control platform, which corresponds to the passive triggering of the backplane controller, that is, when the control platform has relevant needs, it actively communicates with the backplane controller to capture relevant information. Passive acquisition is the active triggering of the backplane controller. After the backplane controller monitors the relevant abnormality, it actively reports it to the control platform for processing.

[0089] The information corresponding to the active trigger type of the control platform includes at least the hard disk temperature information, disk life information and log register information, and the information corresponding to the passive trigger type of the control platform includes at least the hard disk capacity, hard disk model and other inherent information of the hard disk.

[0090] When the actual temperature information of the hard disk reaches the temperature threshold and when the disk life information reaches the life threshold, the backplane controller communicates with the control platform of the server mainboard through the first communication interface. The communication here is that the server mainboard is connected to the connector of the communication interface of the backplane through the connector of the communication interface of the server mainboard, and its hard disk information is sent to the control platform. When the disk life reaches the life threshold, in addition to communicating with the control platform of the server mainboard through the first communication interface, it is also necessary to turn off the hard disk power supply operation of the hard disk connector through the power control interface.

[0091] When the control platform receives temperature information, it needs to adapt the cooling strategy for the front, middle, and rear hard disks based on the location of the backplane (the method for determining the location of the backplane is that there are three types of I2C HEADERs on the motherboard, which are connected to the front, middle, and rear backplanes respectively. The BMC can determine whether the hard disk is front, middle, or rear by judging the source of the I2C signal).

[0092] When the control platform receives the disk life, the relevant information will be displayed on the current alarm interface of the control platform to remind the operator to replace the hard disk and back up the information in time.

[0093] In some other embodiments, the backplane controller is further connected to the hard disk connector via a status signal interface; and is used to determine the corresponding hard disk abnormal state according to the hard disk information;

[0094] The server motherboard connector is connected to the backplane controller; it is used to send control instructions to the backplane controller when the server motherboard identifies that there is a fault in the hard disk information;

[0095] The backplane controller is also used to receive control instructions sent by the server mainboard; when receiving the hard disk abnormal state as abnormal, it communicates with the control platform of the server mainboard through the first communication interface and sends the log register information to the control platform.

[0096] Specifically, the status of the status signal interface corresponding to the hard disk controlled by the monitoring backplane controller can be an error state or a normal state. Figure 2 As shown, the backplane controller 5 and the hard disk connector 4 are connected through a status signal interface, and the corresponding hard disk abnormal status is determined according to the hard disk information. When the server motherboard 1 recognizes that there is a fault in the hard disk information, a control instruction needs to be sent to the backplane controller 5 to communicate with the control platform (baseboard management controller) of the server motherboard 1 through the first communication interface, and the log register is sent to the control platform.

[0097] The light emitting diode (LED) is displayed in the ERROR state. The state of the LED indicates the current state of the hard disk. Usually, during the information exchange between the central processing unit (CPU) and the hard disk through the PCIE signal, the hard disk error is identified in the in-band method, and then the CPLD is controlled to light up through the voltage programming pin (VPP). When the CPLD monitors that the LED is in the ERROR state, that is, the hard disk is in an abnormal state, it actively captures the key log register information in the hard disk and communicates with the BMC. After receiving the information, the BMC displays the relevant log on the BMC WEB to provide a reference for fault location.

[0098] The control platform of the server motherboard provided in this embodiment obtains the information corresponding to the passive trigger type of the control platform. The backplane CPLD polls to obtain various types of hard disk information, and compares the temperature parameters, disk life, LED light status information with the threshold / theoretical parameters. If the comparison result shows that a certain parameter is abnormal, the log information of the corresponding register of the hard disk is captured and reported to the control platform. The control platform takes corresponding measures for various problems and records the corresponding IDL log / alarm information under the WEB of the control platform. The first communication interface of each channel corresponds to a hard disk respectively. Compared with the upstream BMC (only one I2C channel, for all NVME backplanes in the system), key data preprocessing and active triggering / reporting of accidents can be performed, which can avoid the omission of key data caused by long-term scanning of the I2C bus under the BMC, and enhance system stability.

[0099] In some embodiments, it also includes:

[0100] The backplane controller also interfaces with the hard disk connector via a clock request signal;

[0101] The control process of the backplane controller includes:

[0102] Get the working status of the hard disk;

[0103] When the working state of the hard disk is a low power consumption state, the clock request signal is pulled high to close the reference clock information of the hard disk;

[0104] The clock signal sent by the server mainboard is controlled to be turned off at the output channel of the clock buffer by an enable signal;

[0105] When receiving the configuration request command of the hard disk, the clock request signal is pulled low to open the reference clock information of the hard disk;

[0106] The clock signal sent by the server mainboard is controlled by the enable signal to be turned on at the output channel of the clock buffer, so that the hard disk can enter a normal working state;

[0107] The corresponding operation process when the hard disk enters the low power consumption state specifically includes:

[0108] The server motherboard's processor is connected to the hard disk via in-band communication;

[0109] When the link corresponding to the in-band communication mode is in an idle state, the controller of the server mainboard controls the hard disk to enter a low power consumption state through software control.

[0110] Specifically, during the data interaction between the hard disk and the upstream CPU, if the PCIE link is in an idle state, the hard disk and the HOST end confirm and then pull up the clock request signal (CLKREQ signal), and at the same time, the CPLD controls to turn off the hard disk reference clock, and the hard disk enters the L1 state (low power consumption state); when the hard disk in the L1 state receives the Configuration Requests command through the in-band, the CLKREQ signal is pulled high, the CPLD controls to turn on the hard disk reference clock, re-establishes the connection with the CPU high-speed signal, and the hard disk enters the L0 state (normal working state).

[0111] The CPU communicates with the hard disk and reads and writes data through the in-band (PCIE signal). When the link is idle, the HOST side controls the hard disk to enter the L1 state (i.e., low power consumption state) through software. At this time, the hard disk will pull up the CLKREQ signal (when the signal is high, it notifies the upstream to turn off the hard disk reference clock; when it is low, it notifies the upstream to turn on the hard disk reference clock). Then the CPLD controls the CLK BUFFER output channel to turn off through the enable signal (EN), and the hard disk enters the L1 state. In this state, the hard disk can only receive the in-band Configuration Requests command and shield other commands. When the hard disk receives the Configuration Requests command, it pulls down the CLKREQ signal, and the CPLD turns on the corresponding output channel of the CLK BUFFER. The hard disk establishes a link connection with the CPU and enters the L0 state (i.e., normal working state). By controlling CLK, it can support the hard disk L0 and L1 working states, reduce the hard disk power consumption, and improve system performance.

[0112] Figure 3 A flow chart of a control method of a backplane controller provided by an embodiment of the present invention, such as Figure 3 As shown, including:

[0113] S11: The power-on sequence meets the requirements and the hard disk works normally;

[0114] S12: Determine whether the hard disk has abnormal information; if so, proceed to step S13; if not, proceed to step S15;

[0115] S13: The backplane controller actively captures relevant logs and notifies the control platform;

[0116] S14: The control platform makes adaptive adjustments and records logs or alarm information;

[0117] S15: The hard disk continues to work;

[0118] S16: Determine whether the hard disk needs to be switched to a low power consumption state; if so, proceed to step S17; if not, proceed to step S23;

[0119] S17: The hard disk pulls up the clock request signal;

[0120] S18: The backplane controller turns off the hard disk reference clock signal;

[0121] S19: The hard disk enters a low power consumption state;

[0122] S20: Determine whether the hard disk needs to be switched to a normal working state; if so, proceed to step S21;

[0123] S21: The hard disk pulls down the clock request signal;

[0124] S22: The backplane controller turns on the hard disk reference clock signal;

[0125] S23: The hard disk enters normal working state.

[0126] In some embodiments, the backplane controller is also connected to the hard disk connector via a system management reset interface;

[0127] The backplane controller is also used to pull down the reset signal of the system management reset interface when the hard disk information cannot be obtained;

[0128] When the preset time of the pull-down operation is reached, the reset signal of the system management reset interface is pulled high.

[0129] Specifically, when the backplane CPLD cannot obtain hard disk information through I2C, the SMBRST signal (the signal of the system management reset interface) is pulled low for a preset time and then pulled high to avoid the I2C hanging problem caused by the hard disk insertion and removal process (I2C signals include serial clock line (SCL) and serial data line (SDA). When SCL / SDA is always low, it manifests as a hanging problem).

[0130] In some embodiments, the server motherboard connector is connected to the backplane controller via a status control signal interface; the server motherboard connector is connected to the processor;

[0131] The backplane controller is also used to control the status signal interface to light up the corresponding hard disk when receiving the status control signal sent by the server mainboard.

[0132] Specifically, Figure 2 As shown, the state of the LED light indicates the current state of the hard disk. Usually, during the information exchange between the CPU and the hard disk through the PCIE signal, an error in the hard disk is identified in the in-band manner, and then the CPLD is controlled to light up through the VPP bus.

[0133] The present embodiment provides a method of connecting the server mainboard and the backplane controller through a VPP signal (status control signal), and connecting the server mainboard connector to the processor to implement subsequent light operations. At the same time, the fault reporting is triggered by the lighting operation to improve fault location.

[0134] In some embodiments, when the number of first communication interfaces of the backplane controller is greater than or equal to the number of hard disks, one first communication interface corresponds to one hard disk; when the number of first communication interfaces of the backplane controller is less than the number of hard disks, the backplane controller is expanded so that the first communication interface of the expanded backplane controller can be connected to the hard disk to satisfy that one first communication interface corresponds to one hard disk.

[0135] In this embodiment, considering that each first communication interface corresponds to a hard disk, key data can be transmitted to the backplane controller in real time, so as to realize pre-processing of key data and active and timely triggering or reporting of accidents, thereby improving system stability.

[0136] Furthermore, the present invention also provides a server, such as Figure 2 As shown, it includes a server mainboard, a hard disk backplane and a hard disk;

[0137] The server mainboard is connected to the hard disk via the hard disk backplane mentioned above.

[0138] For an introduction to a server provided by the present invention, please refer to the above method embodiment, which will not be described in detail herein. The server has the same beneficial effects as the above hard disk backplane.

[0139] The hard disk backplane and server provided by the present invention are introduced in detail above. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the present invention.

[0140] It should also be noted that, in this specification, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A hard disk backplane, characterized in that: Includes clock buffers, backplane controllers, and hard drive connectors; The backplane controller is connected to the hard disk connector via a power control interface; and the hard disk connector is connected to the server mainboard via a power connector, and the backplane controller is used to control the power control function inside the hard disk to realize power control of the hard disk; The clock buffers are connected to the server mainboard connector, the backplane controller and the hard disk connector; and are used to receive an enable signal from the backplane controller to send the clock signal of the server mainboard to the hard disk; The backplane controller is also connected to the hard disk connector via the first communication interface, and is also used to obtain hard disk information and send it to the server mainboard.

2. The hard disk backplane according to claim 1, characterized in that: The timing control process of the hard disk backplane includes: Power the hard disk through the power connector; When the backplane controller is working, the power control signal of the power control interface is pulled down, so that when the level signal of the power control signal is at a low level, the hard disk is powered on; When the backplane controller is not working, the power control signal of the power control interface is pulled high, so that when the level signal of the power control signal is at a high level, the hard disk is not powered on.

3. The hard disk backplane according to claim 1, characterized in that: Also includes: The backplane controller is also connected to the hard disk connector via a reset interface, and is used to control the hard disk connector to enter a reset state when the level signal of the signal corresponding to the reset interface is at a low level; When the level signal of the signal corresponding to the reset interface is at a high level, the hard disk connector is controlled to enter a released state so that the hard disk can work normally.

4. The hard disk backplane according to claim 1, characterized in that: It also includes registers; The register is connected to the backplane controller and is used to store hard disk information so as to facilitate acquisition by the control platform of the server mainboard through the backplane controller.

5. The hard disk backplane according to claim 4, characterized in that: The information type of the hard disk information is classified according to the acquisition method of the control platform of the server motherboard, and the information type includes an active trigger type with the control platform and a passive trigger type with the control platform; the information corresponding to the active trigger type of the control platform at least includes hard disk temperature information, disk life information and log register information; the information corresponding to the passive trigger type of the control platform at least includes hard disk capacity and hard disk model; The process of the control platform of the server mainboard acquiring the information corresponding to the passive trigger type of the control platform specifically includes: The backplane controller is used to communicate with the control platform of the server mainboard through the first communication interface when the actual temperature information of the hard disk reaches the temperature threshold; When the disk life information reaches a life threshold, communication is performed with the control platform of the server mainboard via the first communication interface; and the hard disk power supply of the hard disk connector is turned off via the power control interface.

6. The hard disk backplane according to claim 5, characterized in that: The backplane controller is also connected to the hard disk connector via a status signal interface; and is used to determine the corresponding hard disk abnormal status according to the hard disk information; The server mainboard connector is connected to the backplane controller; When the server mainboard identifies that the hard disk information is faulty, it sends a control instruction to the backplane controller; The backplane controller is also used to receive control instructions sent by the server mainboard; when receiving that the hard disk abnormal state is abnormal, it communicates with the control platform of the server mainboard through the first communication interface and sends the log register information to the control platform.

7. The hard disk backplane according to claim 1, characterized in that: Also includes: The backplane controller is also connected to the hard disk connector via a clock request signal; The control process of the backplane controller includes: Obtaining the working status of the hard disk; When the working state of the hard disk is a low power consumption state, the clock request signal is pulled high so as to close the reference clock information of the hard disk; Controlling the clock signal sent by the server mainboard to be turned off at the output channel of the clock buffer through an enable signal; When receiving a configuration request command of the hard disk, the clock request signal is pulled low so as to open the reference clock information of the hard disk; Controlling the clock signal sent by the server mainboard to be turned on at the output channel of the clock buffer through an enable signal, so that the hard disk enters a normal working state; The corresponding operation process when the hard disk enters the low power consumption state specifically includes: The server motherboard's processor is connected to the hard disk via in-band communication; When the link corresponding to the in-band communication mode is in an idle state, the controller of the server mainboard controls the hard disk to enter a low power consumption state through software control.

8. The hard disk backplane according to claim 1, characterized in that: The backplane controller is also connected to the hard disk connector via a system management reset interface; The backplane controller is also used to pull down the reset signal of the system management reset interface when the hard disk information cannot be obtained; When the preset time of the pull-down operation is reached, the reset signal of the system management reset interface is pulled high.

9. The hard disk backplane according to claim 6, characterized in that: The server motherboard connector is connected to the backplane controller via a status control signal interface; the server motherboard connector is connected to the processor; The backplane controller is also used to control the status signal interface to light up the corresponding hard disk when receiving the status control signal sent by the server mainboard.

10. A server, characterized in that: Including server motherboard, hard disk backplane and hard disk; The server mainboard is connected to the hard disk via the hard disk backplane described in any one of claims 1 to 9 above.

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