Voltage converter and control method thereof

Abstract

The invention discloses a voltage converter and a control method thereof. The voltage converter comprises an output capacitor, a first charge pump circuit of a switched capacitor type structure and a second charge pump circuit of a diode type structure, and the second charge pump circuit of the diode type charge pump structure is used for pre-charging the output capacitor of the circuit at the initial starting stage of the circuit. Therefore, the output voltage can be quickly charged to the required voltage level, so that the output voltage can meet the working condition required when the first charge pump is started, the time required by the first charge pump circuit to reach a stable working state is shortened, the starting performance of the circuit is remarkably improved, and the efficiency and the stability of the circuit are improved. In addition, the ripple amplitude generated by the output voltage is reduced by using a clock adjustment technology.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and more particularly, to a voltage converter and a control method thereof. Background Art

[0002] A charge pump voltage converter is a circuit that uses capacitors as energy storage elements and achieves voltage conversion through switch control. Its main applications include providing the required voltage level in low-power devices, such as portable electronic devices, embedded systems, and sensor networks. Charge pump voltage converters have the advantages of simple structure, high efficiency, and no inductor components. They are suitable for applications with limited space and sensitive to electromagnetic interference.

[0003] like Figure 1 As shown, a conventional charge pump voltage converter 100 generally includes a plurality of switches (e.g., switches S1, S2, S3, and S4), a capacitor CF, and an oscillator 110. The oscillator 110 is used to generate control signals φ1 and φ2 for controlling switches S1 to S4. The control signals φ1 and φ2 realize charge transfer and voltage increase or decrease by periodically switching switches. However, with this structure, as the load current increases, the ripple of the output voltage will also increase, affecting the power quality.

[0004] In order to overcome the above problems, some improvement schemes have emerged in recent years. Figure 2 As shown, by adopting a multi-phase charge pump voltage converter 200 , switching loss and current stress can be distributed among different phases, thereby improving overall efficiency and reducing output ripple.

[0005] However, in practical applications, the charge pump voltage converter of the prior art still encounters some problems: 1. During the startup process of the charge pump circuit, the output voltage needs to gradually rise to the target voltage. However, due to the low output voltage in the initial state of the circuit, the internal switch and control circuit may not work properly. In this case, the charge pump circuit cannot effectively perform voltage conversion, resulting in startup failure. This problem is particularly evident under low input voltage or high load conditions. 2. The prior art uses a constant frequency clock signal to control the switching action in the charge pump circuit, which causes electromagnetic interference (EMI) problems during operation, which not only affects the performance of the circuit itself, but may also interfere with surrounding electronic equipment. Summary of the invention

[0006] In order to solve the above problems in the prior art, the present invention provides a voltage converter and a control method thereof, which can significantly improve the startup performance of the circuit and enhance the circuit efficiency and stability.

[0007] According to one aspect of the present invention, there is provided a voltage converter, comprising: an output capacitor connected between an output terminal of the voltage converter and a reference ground potential, the output terminal being used to provide an output voltage of the voltage converter to a load; a first charge pump circuit comprising a switched capacitor charge pump structure, for providing a first output power to the output terminal according to an input voltage under the action of a first control signal; a second charge pump circuit comprising a diode charge pump structure, for providing a second output power to the output terminal according to a second control signal to pre-charge the output capacitor; and a control circuit for providing the first control signal and the second control signal.

[0008] Optionally, the frequency of the second control signal is greater than the frequency of the first control signal.

[0009] Optionally, the frequency of the first control signal or the second control signal varies randomly within a certain frequency range.

[0010] Optionally, the control circuit includes: a first oscillator for generating a first clock signal having a reference frequency; and a frequency divider for dividing the first clock signal to generate the first control signal, wherein the frequency of the first control signal is less than the reference frequency.

[0011] Optionally, the control circuit also includes: a first random frequency controller, used to generate a random number according to the first clock signal, and convert the random number into a first frequency control signal according to the first clock signal, wherein the first frequency control signal has a pulse sequence with unequal pulse widths; and a frequency conversion generator, used to generate the second control signal according to the first clock signal and the first frequency control signal.

[0012] Optionally, the first random frequency controller includes: a frequency division module, used to perform a frequency division operation on the first clock signal to generate a second clock signal; a random number generation module, used to generate a plurality of binary random numbers according to the second clock signal; and a parallel-to-serial conversion module, used to convert the plurality of random numbers into the first frequency control signal for serial output based on the first clock signal.

[0013] Optionally, the frequency conversion generator includes: a D flip-flop, configured to sample each data bit in the first frequency control signal according to the first clock signal to generate the second control signal.

[0014] Optionally, the control circuit includes: a second oscillator, used to generate a third clock signal and the second control signal, the third clock signal and the second clock signal having a reference frequency; a second random frequency controller, used to generate a random number according to the third clock signal, and convert the random number into a second frequency control signal according to the third clock signal, wherein the second frequency control signal has a pulse sequence with unequal pulse widths; a multiplexer, used to selectively obtain a multiplexed output signal according to the third clock signal or the second frequency control signal; and an edge modulator, used to generate the first control signal according to the multiplexed output signal, wherein the frequency of the first control signal varies randomly within a certain frequency range.

[0015] Optionally, the edge modulator further includes a counter, and the counter is used to count the pulse edges of the multiplexed output signal and set the effective pulse width of the first control signal according to the count value.

[0016] Optionally, each clock cycle of the first control signal is divided into M sub-cycles, where M is an integer greater than 1, wherein the multiplexer is used to provide the second frequency control signal as the multiplexed output signal to the edge modulator in k sub-cycles among the M sub-cycles, and to provide the third clock signal as the multiplexed output signal to the edge modulator in Mk sub-cycles among the M sub-cycles.

[0017] Optionally, the first charge pump circuit includes: a first switch and a third switch that are alternately turned on and connected in series between an input terminal and a reference ground potential, wherein the input terminal receives the input voltage; a second switch and a fourth switch that are alternately turned on and connected in series between the reference ground potential and the output terminal; and a flying capacitor, a first end of which is connected to a connection node between the first switch and the third switch, and a second end of which is connected to a connection node between the second switch and the fourth switch, wherein control ends of the first switch and the second switch are controlled by the first control signal, and control ends of the third switch and the fourth switch are controlled by an inverted signal of the first control signal.

[0018] Optionally, the second charge pump circuit includes: a first diode and a second diode connected in series between a power supply voltage and the output terminal; a first capacitor, a first end of which is connected to a connection node between the first diode and the second diode, and a second end of which is connected to the second control signal; and a second capacitor, a first end of which is connected to the output terminal, and a second end of which is connected to a reference ground potential.

[0019] Optionally, the voltage converter further includes: a fifth switch connected between the second charge pump circuit and the output end, the fifth switch being used to disconnect the current path between the second charge pump circuit and the output end when the output voltage rises to a set threshold.

[0020] According to another aspect of the present invention, there is provided a control method for the above-mentioned voltage converter, comprising: generating a first clock signal having a reference frequency; performing frequency division processing on the first clock signal to generate a first control signal for controlling a first charge pump circuit, wherein the frequency of the first control signal is less than the reference frequency; generating a random number according to the first clock signal, and converting the random number into a first frequency control signal according to the first clock signal, wherein the first frequency control signal has a pulse sequence with unequal pulse widths; and generating a second control signal for controlling a second charge pump circuit according to the first clock signal and the first frequency control signal, wherein the frequency of the second control signal varies randomly within a certain frequency range.

[0021] Optionally, generating a random number according to the first clock signal and converting the random number into a first frequency control signal according to the first clock signal includes: performing a frequency division operation on the first clock signal to generate a second clock signal; generating a plurality of binary random numbers according to the second clock signal; and converting the plurality of random numbers into the first frequency control signal for serial output based on the first clock signal.

[0022] Optionally, generating the second control signal for controlling the second charge pump circuit according to the first clock signal and the first frequency control signal includes: sampling each data bit in the first frequency control signal according to the first clock signal to generate the second control signal.

[0023] According to another aspect of the present invention, a control method for the above-mentioned voltage converter is provided, comprising: generating a third clock signal and a second control signal for controlling a second charge pump circuit, the third clock signal and the second clock signal having a reference frequency; generating a random number according to the third clock signal, and converting the random number into a second frequency control signal according to the third clock signal, wherein the second frequency control signal has a pulse sequence with unequal pulse widths; selectively obtaining a multiplexed output signal according to the third clock signal or the second frequency control signal; and generating a first control signal for controlling a first charge pump circuit according to the multiplexed output signal, wherein the frequency of the first control signal varies randomly within a certain frequency range.

[0024] Optionally, generating the first control signal for controlling the first charge pump circuit according to the multiplexed output signal includes: counting pulse edges of the multiplexed output signal, and setting an effective pulse width of the first control signal according to the count value.

[0025] Optionally, each clock cycle of the first control signal is divided into M sub-cycles, where M is an integer greater than 1, wherein, in k sub-cycles among the M sub-cycles, the second frequency control signal is used as the multiplexed output signal, and in Mk sub-cycles among the M sub-cycles, the third clock signal is used as the multiplexed output signal.

[0026] In summary, an embodiment of the present invention proposes a voltage converter, which pre-charges the output capacitor of the circuit at the initial stage of circuit startup through a second charge pump circuit with a diode charge pump structure, so that the output voltage can be quickly charged to the required voltage level, thereby reducing the time required for the first charge pump circuit to reach a stable working state, significantly improving the startup performance of the circuit, and improving the circuit efficiency and stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0028] Figure 1 FIG. 1 is a schematic structural diagram of a conventional charge pump voltage converter 100 .

[0029] Figure 2 FIG. 2 shows a schematic structural diagram of a multi-phase charge pump voltage converter 200 provided in the prior art.

[0030] Figure 3 FIG. 4 is a schematic structural diagram of a voltage converter 300 provided in the first embodiment of the present application.

[0031] Figure 4 A schematic structural diagram of a first charge pump circuit 310 provided in the first embodiment of the present application is shown.

[0032] Figure 5 FIG. 4 is a schematic diagram showing the structure of the second charge pump circuit 320 provided in the first embodiment of the present application.

[0033] Figure 6 A schematic diagram of the structure of the random frequency controller 333 provided in the first embodiment of the present application is shown.

[0034] Figure 7 FIG. 4 is a waveform diagram of the voltage converter 300 according to the first embodiment of the present application.

[0035] Figure 8A schematic structural diagram of a voltage converter 400 provided in a second embodiment of the present application is shown.

[0036] Fig. 9 FIG. 4 shows a working timing diagram of the control circuit 430 provided in the second embodiment of the present application. DETAILED DESCRIPTION

[0037] The present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown in the drawings.

[0038] Many specific details of the present invention are described below, such as device structure, materials, dimensions, processing technology and techniques, so as to more clearly understand the present invention. However, as those skilled in the art will appreciate, the present invention may be implemented without following these specific details.

[0039] It should be understood that the connection / coupling of A and B in the embodiment of the present application means that A and B can be connected in series or in parallel, or A and B are connected through other devices, and the embodiment of the present application is not limited to this.

[0040] The embodiments of the charge pump voltage converter provided in the present application will be described below in conjunction with the accompanying drawings.

[0041] Figure 3 FIG. 2 shows a schematic diagram of the structure of a voltage converter 300 provided in the first embodiment of the present application. Figure 3 As shown, the voltage converter 300 of this embodiment includes: a first charge pump circuit 310, a second charge pump circuit 320, a control circuit 330 and an output capacitor Cout.

[0042] Among them, the first charge pump circuit 310 is used as the "main boost circuit" of the circuit, which is used to provide a first output power to the output end of the voltage converter 300 according to the input voltage Vin, and the output end provides the output voltage Vout of the voltage converter 300 to the load. For example, the first charge pump circuit 310 includes a switched capacitor charge pump, which is used to boost the input voltage Vin under the control of the first control signal CTRL1 to provide the first output power to the output end. The output capacitor Cout is connected between the output end of the voltage converter 300 and the reference ground potential, and is used to reduce the output ripple of the output voltage Vout.

[0043] The second charge pump circuit 320 serves as the "auxiliary boost circuit" of the circuit, which is used to pre-charge the output capacitor Cout at the initial stage of circuit startup, and then raise the output voltage Vout to a certain potential (for example, the lowest voltage that can make the switch in the first charge pump circuit 310 normally turned on), and then make the switch in the first charge pump circuit 310 work normally to perform normal voltage conversion. For example, the second charge pump circuit 320 includes, for example, a diode charge pump having multiple diodes and one or more capacitors. Since the diode charge pump does not have a switching device, its voltage conversion process will not be affected by the output voltage Vout. Furthermore, the second charge pump circuit 320 is used to provide a second output power to the output end according to the second control signal CTRL2.

[0044] The control circuit 330 is used to generate the first control signal CTRL1 and the second control signal CTRL2 to respectively control the operation of the first charge pump circuit 310 and the second charge pump circuit 320. Furthermore, the frequency of the first control signal CTRL1 is lower than the frequency of the second control signal CTRL2, which not only allows the capacitor in the first charge pump circuit 310 to have more time to charge and discharge in each cycle, but also effectively reduces the ripple of the output voltage of the entire circuit by superimposing the high-frequency, low-amplitude ripple voltage generated by the second charge pump circuit 320 and the low-frequency, high-amplitude ripple voltage generated by the first charge pump circuit 310 at the voltage output end.

[0045] Furthermore, the frequency of the first control signal CTRL1 or the frequency of the second control signal CTRL2 varies randomly within a certain frequency range, thereby eliminating electromagnetic interference effects caused by the switching operation of the charge pump circuit.

[0046] Further, in Figure 3 In the example given, the frequency of the first control signal CTRL1 is constant, while the frequency of the second control signal CTRL2 varies randomly within a certain frequency range. Figure 3 As shown, the control circuit 330 includes an oscillator 331 , a frequency divider 332 , a random frequency controller 333 and a variable frequency generator 334 .

[0047] The oscillator 331 is used to generate a first clock signal CLK1 having a reference frequency. The frequency divider 332 is used to divide the first clock signal CLK1 to generate the first control signal CTRL1, wherein the frequency of the first control signal CTRL1 is less than the reference frequency of the first clock signal CLK1.

[0048] The random frequency controller 333 is used for receiving the first clock signal CLK1 , and generating a random pulse sequence (representing a random number) with unequal pulse widths as the frequency control signal RDN1 according to the first clock signal CLK1 with a pulse sequence with equal pulse widths.

[0049] The frequency conversion generator 334 is used to generate the second control signal CTRL2 with a randomly changing frequency according to the first clock signal CLK1 and the frequency control signal RDN1. Further, the frequency conversion generator 334 may include a sampling module (not shown in the figure), and the sampling module is used to perform a sampling operation on each data bit in the frequency control signal RDN1 according to the first clock signal CLK1 to generate the second control signal CTRL2. The present invention does not limit the structure of the sampling module. In an exemplary embodiment, the sampling module can be implemented by a D flip-flop. Further, the frequency conversion generator 334 may also include a frequency divider (not shown in the figure), and the frequency divider is used to generate a plurality of sampling signals that are integer multiples of the period of the first clock signal CLK1 according to the first clock signal CLK1. The sampling frequencies of the plurality of sampling signals are f1, f2, f3... respectively. In actual use, the sampling frequency of the sampling module can be selectively set to one of f1, f2, f3... according to specific circumstances.

[0050] For example, the output waveform of the frequency control signal RDN1 is presented as a pulse sequence with different pulse widths, and each data bit in the random number is presented as a corresponding level (e.g., a high level) with a preset duration in the frequency control signal RDN1, and the preset duration is proportional to the clock cycle of the first clock signal CLK1. For example, the interval of each data bit of the random number is equal to the clock cycle of the first clock signal CLK1, and the pulse width of each data bit of the random number is proportional to the clock cycle of the first clock signal CLK1 according to a certain coefficient (e.g., N). Further, since the duration of each bit in the random number is equal to the clock cycle of the first clock signal CLK1, the single-bit pulse in the frequency control signal RND1 can provide the highest clock frequency fo, a pulse of two bit times can provide a clock frequency fo / 2, a pulse of three bit times can provide a clock frequency fo / 3, and so on. Therefore, when these digital pulse sequences are created, these pulse sequences can carry instantaneous random frequencies into the variable frequency generator 334, thereby generating the second control signal CTRL2 with randomly changing frequencies.

[0051] Figure 4 FIG. 3 is a schematic diagram showing the structure of the first charge pump circuit 310 provided in the first embodiment of the present application. Figure 4As shown, the first charge pump circuit 310 includes four switches S1, S2, S3 and S4 and a flying capacitor CF. Switches S1 and S3 are connected in series between an input terminal and a reference ground potential, and the input terminal is used to receive an input voltage Vin. Switches S2 and S4 are connected in series between the reference ground potential and an output terminal. A first end of the flying capacitor CF is connected to a connection node between switches S1 and S3, and a second end is connected to a connection node between switches S2 and S4. Among them, the switch groups S1 and S2 as charging switch elements and the switch groups S3 and S4 as discharging switch elements are complementarily turned on (ON) and off (OFF) by a first control signal CTRL1. For example, the turning on and off of S1 and S2 as charging switch elements is controlled by the first control signal CTRL1, and the turning on and off of S3 and S4 as discharging switch elements is controlled by the inverted signal CTRL1b of the first control signal. That is, in the charging state of the first control signal CTRL1 = "1" (high level), switches S1 and S2 are turned on, and switches S3 and S4 are turned off, so that the input voltage Vin charges the flying capacitor CF. On the other hand, in the transfer state of the first control signal CTRL1 = "0" (low level), switches S1 and S2 are turned off, and switches S3 and S4 are turned on, so that the charge is redistributed between the flying capacitor CF and the output capacitor Cout. In this way, the above-mentioned charging state and transfer state are repeated alternately, and finally the output voltage Vout = -Vin can be obtained at the voltage output end.

[0052] Understandably, although Figure 4 A schematic structure of a first charge pump circuit is shown in the figure, but the present application is not limited thereto. The present application is also applicable to other charge pump topologies, such as a voltage doubling charge pump structure, a negative pressure charge pump structure, or a boost charge pump structure.

[0053] Figure 5 FIG. 3 shows a schematic diagram of the structure of the second charge pump circuit 320 provided in the first embodiment of the present application. Figure 5As shown, the second charge pump circuit 320 includes diodes D1, D2 and capacitors C1 and C2. Wherein, diodes D1 and D2 are connected in series between the power supply voltage Vcc and the voltage output terminal of the voltage converter 300, and the forward direction of each diode points from the power supply voltage Vcc to the voltage output terminal. . The first end of capacitor C1 is connected to the cathode of diode D1, and the second end of capacitor C1 is connected to the second control signal CTRL2. The first end of capacitor C2 is connected to the cathode of diode D2, and the second end of capacitor C2 is connected to the reference ground potential. In the charging state of the second control signal CTRL2 = "0" (low level), diode D1 is turned on and diode D2 is turned off, so that the power supply voltage Vcc charges capacitor C1, and the voltage of node A1 gradually approaches the power supply voltage Vcc. On the other hand, in the transfer state of the second control signal CTRL2 = "1" (high level), the diode D1 is turned off, and the diode D2 is turned on, the first end of the capacitor C1 (i.e., the node A1) is connected to the output end through the diode D2, and the second end of the capacitor C1 is raised to the high level potential of the second control signal CTRL2 (for example, the high level potential of the second control signal CTRL2 is equal to the power supply voltage Vcc). Since the voltage on the capacitor will not change suddenly, the node A1 and the output voltage are also raised to nearly 2 times the power supply voltage Vcc. In this way, the above-mentioned charging state and transfer state are repeated alternately, and finally the output voltage Vout = 2*Vcc can be obtained at the voltage output end.

[0054] Understandably, although Figure 5 A schematic structure of a second charge pump circuit is shown in FIG. 1 , but the present application is not limited thereto, and those skilled in the art may determine the number of diodes and capacitors in the second charge pump circuit according to specific applications.

[0055] Figure 6 FIG. 3 shows a schematic diagram of the structure of the random frequency controller 333 provided in the first embodiment of the present application. Figure 6 As shown, the random frequency controller 333 includes a frequency division module 3301 , a random number generation module 3302 and a parallel-to-serial conversion module 3303 .

[0056] The frequency dividing module 3301 is used to perform a frequency dividing operation on the first clock signal CLK1 to generate a second clock signal CLK2. In this embodiment, the frequency of the second clock signal CLK2 is lower than the frequency of the first clock signal CLK1.

[0057] The random number generation module 3302 is used to receive the second clock signal CLK2, and use the second clock signal CLK2 as the operating clock to generate multiple binary random numbers according to the set operation rules. In an exemplary embodiment, the random number generation module 3302 can store multiple operation rules, and select and use different operation rules according to different set values. In other embodiments, the multiple operation rules can be stored in a memory (not shown in the figure) outside the random number generation module 3302, and the random number generation module reads the external memory according to the set value and adopts the corresponding operation rules. The present application does not limit the architecture of the random number generation module 3302. In an exemplary embodiment, the random number generation module 3302 may include a linear feedback shift register (LFSR) that generates and outputs a linear random number sequence based on a primitive polynomial, and the set value can be used as a tap bit of the linear feedback shift register. Since the random variable generated by the linear feedback shift register has periodicity, when the set value changes, the periodicity of the random variable will also change accordingly.

[0058] The parallel-to-serial converter module 3303 is used to receive the parallel data stream generated by the random number generation module 3302 and convert it into a serial data stream based on the first clock signal CLK1 to generate the frequency control signal RDN1.

[0059] Figure 7 FIG. 2 shows a waveform diagram of the voltage converter 300 of the first embodiment of the present application. Figure 7 As shown, during the time period T1, the second charge pump circuit 320 is in working state, and the output capacitor Cout is precharged by the second charge pump circuit 320, so that the output voltage Vout gradually moves toward a more negative voltage direction. During the time period T2, the output voltage Vout is driven to -1.8V, at which time the switch in the first charge pump circuit 310 can work normally, so the first charge pump circuit 310 starts to start. During the time period T3, both the first charge pump circuit 310 and the second charge pump circuit 320 are enabled, and the first charge pump circuit 310 contributes the main power and the second charge pump circuit 320 outputs power to the output capacitor Cout, and the output voltage Vout is the superimposed voltage of the output voltage of the first charge pump circuit 310 and the output voltage of the second charge pump circuit 320.

[0060] According to the above description, the voltage converter 300 of the present application pre-charges the output capacitor of the circuit at the initial stage of the circuit startup through the second charge pump circuit of the diode charge pump structure, so that the output voltage can be quickly charged to the required voltage level, thereby reducing the time required for the first charge pump circuit to reach a stable working state, significantly improving the startup performance of the circuit, and improving the circuit efficiency and stability. In addition, the voltage converter 300 of the present application can also superimpose the high-frequency, low-amplitude ripple voltage generated by the second charge pump circuit with the low-frequency, high-amplitude ripple voltage generated by the first charge pump circuit at the voltage output end, which can effectively reduce the ripple of the output voltage of the entire circuit.

[0061] Figure 8 FIG. 4 is a schematic diagram showing the structure of a voltage converter 400 provided in the second embodiment of the present application. Figure 8 As shown, the voltage converter 400 includes a first charge pump circuit 410, a second charge pump circuit 420 and a control circuit 430. The structures and principles of the first charge pump circuit 410 and the second charge pump circuit 430 are the same as those of the first charge pump circuit 310 and the second charge pump circuit 320 in the first embodiment, and are not described in detail herein. Figure 8 In the example given, the frequency of the second control signal CTRL2 is constant, while the frequency of the first control signal CTRL1 varies randomly within a certain range. Furthermore, the control circuit 430 uses pulse edge modulation technology to adjust the frequency of the first control signal CTRL1, so that the first charge pump circuit 410 operates using a spread spectrum switching clock, thereby reducing the output noise of the circuit and improving the electromagnetic interference effect of the circuit.

[0062] Furthermore, the control circuit 430 includes an oscillator 431 , a random frequency controller 432 , a multiplexer 433 and an edge modulator 434 .

[0063] The oscillator 431 is used to generate a third clock signal CLK3 and the second control signal CTRL2 , and the second control signal CTRL2 and the third clock signal CLK2 have a reference frequency.

[0064] The random frequency controller 432 is used to receive the third clock signal CLK3 and generate a random pulse sequence with unequal pulse widths as the frequency control signal RDN2 according to the third clock signal CLK3. Further, the structure and principle of the random frequency controller 432 are the same as those of the random frequency controller 333 in the first embodiment, which will not be described in detail here.

[0065] The multiplexer 433 is used to receive the third clock signal CLK3 and the frequency control signal RDN2, and is configured to selectively obtain the multiplexed output signal CKMUX according to the third clock signal CLK3 and the frequency control signal RDN2. Further, the multiplexer 433 is a time division multiplexing circuit, and the third clock signal CLK3 and the frequency control signal RDN2 are transmitted to the output end of the multiplexer in different time segments. Since the frequency control signal RDN2 carries a random pulse sequence (representing a random number) with unequal pulse widths, the pulse sequence of the multiplexed output signal CKMUX will also carry a random pulse sequence with unequal pulse widths.

[0066] The edge modulator 434 is used to generate the first control signal CTRL1 according to the pulse edge of the multiplexed output signal CKMUX. For example, each clock cycle of the first control signal CTRL1 is divided into M sub-cycles, where M is an integer greater than 1, and the edge modulator 434 may include a counter (not shown in the figure), and the counter counts the pulse edges of the multiplexed output signal CKMUX within the M sub-cycles, and sets the effective pulse width (for example, high level width) of the first control signal CTRL1 according to the obtained count value. Further, in k sub-periods among the M sub-periods, k is greater than zero and less than M, and the multiplexer provides the frequency control signal RDN2 as an output signal to the edge modulator 434, so that in the k sub-periods, the counting frequency of the counter is controlled by the frequency control signal RDN2; in Mk sub-periods among the M sub-periods, the multiplexer 433 provides the third clock signal CLK3 as an output signal to the edge modulator 434, so that in the Mk sub-periods, the counting frequency of the counter is controlled by the frequency of the third clock signal CLK3. Since the frequency control signal RDN2 carries a random pulse sequence with unequal pulse widths, the effective pulse widths of the first control signal CTRL1 in different clock periods are different, thereby achieving the purpose of adjusting the clock frequency of the first control signal CTRL1.

[0067] Further, the present embodiment can be expanded into two working modes: in the first working mode, the first control signal CTRL1 has a fixed period, so when the high level width of the first control signal CTRL1 in different periods is different, the variation and the low level width in the same period compensate each other, and then the period time of the first control signal CTRL1 can be fixed. In the second working mode, the first control signal CTRL1 is operated by a spread spectrum switching clock, that is, the low level width of the first control signal CTRL1 in different periods remains unchanged, so when the high level width of the first control signal CTRL1 in different periods is different, the period time of the first control signal CTRL1 will also change accordingly, thereby achieving the purpose of adjusting the clock frequency of the first control signal CTRL1.

[0068] Fig. 9 FIG. 4 is a timing diagram of the operation of the control circuit 430 provided in the second embodiment of the present application. CTRL1 represents the output signal of the edge modulator 434, SWP represents the waveform diagram of the gating control signal of the multiplexer 433, CKMUX represents the output signal of the multiplexer 433 (ie, the multiplexed output signal), and RDN2 represents the output signal of the random frequency controller 432. Fig. 9 As shown, during the high level period of the signal SWP, the multiplexer 433 outputs the output signal RDN2 of the random frequency controller 434 to the multiplexed output signal CKMUX, so that the counting frequency of the edge modulator 434 is controlled by the variable frequency provided by the frequency control signal RDN2. During the low level period of the signal SWP, the multiplexer 433 outputs the third clock signal CLK to the multiplexed output signal CKMUX, so that the counting frequency of the edge modulator 434 is controlled by the fixed frequency provided by the third clock signal CLK3. The pulse edges calculated by the two are superimposed, and finally a variable effective pulse width can be obtained on the first control signal CTRL1.

[0069] According to the above description, the voltage converter 400 provided in the second embodiment of the present application performs a spread spectrum operation on the first control signal CTRL1 through a pulse edge modulation technique, so that the switching frequency of the first charge pump circuit 410 is adjustable within a certain frequency range and the effective level time is greater than a preset time (for example, Mk oscillator cycles), thereby greatly reducing the output noise of the circuit and improving the electromagnetic interference effect of the circuit.

[0070] Furthermore, since in the voltage converter 400 provided in the second embodiment, the second charge pump circuit 420 operates at a fixed frequency, in order to avoid the influence of the second charge pump circuit 420 on the output ripple, the voltage converter 400 further includes a switch S5 connected between the second charge pump circuit 420 and the voltage output terminal, and the switch S5 is used to be disconnected when the output voltage Vout rises to the set threshold value Vth, so as to cut off the current path between the second charge pump circuit 420 and the voltage output terminal, and only the first charge pump circuit 410 provides power to the voltage output terminal. Furthermore, the voltage converter 400 may include a comparator (not shown in the figure), through which the output voltage Vout is compared with the set threshold value Vth, and the switch S5 is controlled to be turned on and off according to the comparison result. Of course, the present application does not limit this.

[0071] Some examples of the voltage converter of the embodiment of the present invention are described above, however, the embodiment of the present invention is not limited thereto, and there may be other ways of expansion and deformation. For example, in some other embodiments, the second control signal may be spread spectrum operated by pulse edge modulation counting, so that the switching frequency of the second charge pump circuit is adjustable within a certain frequency range, so that the switching frequency of the first charge pump circuit is constant, which can also greatly reduce the output noise of the circuit and improve the electromagnetic interference effect of the circuit.

[0072] For example, it should be understood that the reference ground potential in the aforementioned embodiments may be replaced by other non-zero reference potentials (having a positive voltage amplitude or a negative voltage amplitude) or a reference signal with a controlled variation in alternative embodiments.

[0073] At the same time, those skilled in the art can realize that, in combination with the structures and methods of the various examples described in the embodiments disclosed herein, different configuration methods or adjustment methods can be used to implement the described functions for each structure or a reasonable deformation of the structure, but such implementation should not be considered to be beyond the scope of the present application. In addition, it should be understood that the connection relationship between the various components of the amplifier in the aforementioned figure in the embodiments of the present application is a schematic example and does not impose any limitation on the embodiments of the present application.

[0074] In summary, an embodiment of the present invention proposes a voltage converter, which pre-charges the output capacitor of the circuit at the initial stage of circuit startup through a second charge pump circuit with a diode charge pump structure, so that the output voltage can be quickly charged to the required voltage level, thereby reducing the time required for the first charge pump circuit to reach a stable working state, significantly improving the startup performance of the circuit, and improving the circuit efficiency and stability.

[0075] In an optional embodiment, the voltage converter of the present application is also used to control the switching operation of the second charge pump circuit using a random clock frequency within a certain frequency range, so that the second charge pump circuit can generate a high-frequency, low-amplitude ripple voltage. By superimposing the ripple voltage generated by the second charge pump circuit with the low-frequency, high-amplitude ripple voltage generated by the first charge pump circuit at the voltage output end, the ripple of the output voltage of the entire circuit can be effectively reduced and the output stability can be improved.

[0076] In an optional embodiment, the voltage converter of the present application is also used to modulate the pulse width of the control signal of the first charge pump circuit through a pulse edge modulation technique, so that the first charge pump circuit operates using a spread spectrum switching clock within a certain frequency range, thereby reducing the output noise of the circuit and improving the electromagnetic interference effect of the circuit.

[0077] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0078] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A voltage converter, comprising: an output capacitor connected between an output terminal of the voltage converter and a reference ground potential, wherein the output terminal is used to provide an output voltage of the voltage converter to a load; A first charge pump circuit, comprising a switched capacitor charge pump structure, for providing a first output power to the output terminal according to an input voltage under the action of a first control signal; a second charge pump circuit, comprising a diode charge pump structure, for providing a second output power to the output terminal according to a second control signal to pre-charge the output capacitor; as well as The control circuit is used to provide the first control signal and the second control signal.

2. The voltage converter according to claim 1, wherein: The frequency of the second control signal is greater than the frequency of the first control signal.

3. The voltage converter according to claim 1, wherein: The frequency of the first control signal or the second control signal changes randomly within a certain frequency range.

4. The voltage converter according to claim 1, wherein: The control circuit comprises: A first oscillator, configured to generate a first clock signal having a reference frequency; and The frequency divider is used to perform frequency division processing on the first clock signal to generate the first control signal, and the frequency of the first control signal is less than the reference frequency.

5. The voltage converter according to claim 4, wherein: The control circuit further comprises: a first random frequency controller, configured to generate a random number according to the first clock signal, and convert the random number into a first frequency control signal according to the first clock signal, wherein the first frequency control signal has a pulse sequence with unequal pulse widths; and A frequency conversion generator is used to generate the second control signal according to the first clock signal and the first frequency control signal.

6. The voltage converter according to claim 5, wherein: The first random frequency controller comprises: A frequency division module, used for performing a frequency division operation on the first clock signal to generate a second clock signal; a random number generating module, configured to generate a plurality of binary random numbers according to the second clock signal; and The parallel-to-serial conversion module is used to convert the plurality of random numbers into the first frequency control signal output in series based on the first clock signal.

7. The voltage converter according to claim 5, wherein: The variable frequency generator comprises: A D flip-flop is used to sample each data bit in the first frequency control signal according to the first clock signal to generate the second control signal.

8. The voltage converter according to claim 1, wherein: The control circuit comprises: A second oscillator, used for generating a third clock signal and the second control signal, wherein the third clock signal and the second clock signal have a reference frequency; a second random frequency controller, configured to generate a random number according to the third clock signal, and convert the random number into a second frequency control signal according to the third clock signal, wherein the second frequency control signal has a pulse sequence with unequal pulse widths; a multiplexer, configured to selectively obtain a multiplexed output signal according to the third clock signal or the second frequency control signal; and An edge modulator is used to generate the first control signal according to the multiplexed output signal, wherein the frequency of the first control signal varies randomly within a certain frequency range.

9. The voltage converter according to claim 8, wherein: The edge modulator further includes a counter, which is used to count the pulse edges of the multiplexed output signal and set the effective pulse width of the first control signal according to the count value.

10. The voltage converter according to claim 9, wherein: Each clock cycle of the first control signal is divided into M sub-cycles, where M is an integer greater than 1. The multiplexer is used to provide the second frequency control signal as the multiplexed output signal to the edge modulator in k sub-cycles among the M sub-cycles, and to provide the third clock signal as the multiplexed output signal to the edge modulator in Mk sub-cycles among the M sub-cycles.

11. The voltage converter according to claim 1, wherein: The first charge pump circuit comprises: The first switch and the third switch are alternately turned on and connected in series between an input terminal and a reference ground potential, wherein the input terminal receives the input voltage; A second switch and a fourth switch which are alternately turned on are connected in series between the reference ground potential and the output terminal; and a flying capacitor having a first end connected to a connection node between the first switch and the third switch and a second end connected to a connection node between the second switch and the fourth switch, Control ends of the first switch and the second switch are controlled by the first control signal, and control ends of the third switch and the fourth switch are controlled by an inverted signal of the first control signal.

12. The voltage converter according to claim 1, wherein: The second charge pump circuit comprises: A first diode and a second diode are connected in series between a power supply voltage and the output terminal; a first capacitor having a first end connected to a connection node between the first diode and the second diode and a second end connected to the second control signal; and A second capacitor has a first terminal connected to the output terminal and a second terminal connected to a reference ground potential.

13. The voltage converter according to any one of claims 8 to 10, wherein: Also includes: A fifth switch is connected between the second charge pump circuit and the output end, and is used to disconnect the current path between the second charge pump circuit and the output end when the output voltage rises to a set threshold.

14. A control method for the voltage converter according to claim 1, comprising: generating a first clock signal having a reference frequency; Performing frequency division processing on the first clock signal to generate a first control signal for controlling a first charge pump circuit, wherein the frequency of the first control signal is less than the reference frequency; generating a random number according to the first clock signal, and converting the random number into a first frequency control signal according to the first clock signal, wherein the first frequency control signal has a pulse sequence with unequal pulse widths; as well as generating a second control signal for controlling a second charge pump circuit according to the first clock signal and the first frequency control signal, Wherein, the frequency of the second control signal changes randomly within a certain frequency range.

15. The control method according to claim 14, wherein: The step of generating a random number according to the first clock signal and converting the random number into a first frequency control signal according to the first clock signal comprises: Performing a frequency division operation on the first clock signal to generate a second clock signal; generating a plurality of binary random numbers according to the second clock signal; and The plurality of random numbers are converted into the first frequency control signal which is output in series based on the first clock signal.

16. The control method according to claim 14, wherein: Generating a second control signal for controlling a second charge pump circuit according to the first clock signal and the first frequency control signal comprises: Each data bit in the first frequency control signal is sampled according to the first clock signal to generate the second control signal.

17. A control method for the voltage converter according to claim 1, comprising: generating a third clock signal and a second control signal for controlling a second charge pump circuit, wherein the third clock signal and the second clock signal have a reference frequency; generating a random number according to the third clock signal, and converting the random number into a second frequency control signal according to the third clock signal, wherein the second frequency control signal has a pulse sequence with unequal pulse widths; Optionally obtaining a multiplexed output signal according to the third clock signal or the second frequency control signal; and A first control signal for controlling a first charge pump circuit is generated according to the multiplexed output signal, wherein a frequency of the first control signal varies randomly within a certain frequency range.

18. The control method according to claim 17, wherein: Generating a first control signal for controlling a first charge pump circuit according to the multiplexed output signal comprises: The pulse edges of the multiplexed output signal are counted, and the effective pulse width of the first control signal is set according to the count value.

19. The control method according to claim 18, wherein: Each clock cycle of the first control signal is divided into M sub-cycles, where M is an integer greater than 1. In which, in k sub-periods among the M sub-periods, the second frequency control signal is used as the multiplexed output signal, and in Mk sub-periods among the M sub-periods, the third clock signal is used as the multiplexed output signal.

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